From 56e07eea11228e9272b63e918c5fde479bd9ddba Mon Sep 17 00:00:00 2001 From: Pepping <pepping> Date: Thu, 28 Apr 2016 12:00:04 +0000 Subject: [PATCH] Readdata of the reg_dp_xonoff is now connected --- .../src/vhdl/mmm_apertif_unb1_correlator.vhd | 2 ++ 1 file changed, 2 insertions(+) diff --git a/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/mmm_apertif_unb1_correlator.vhd b/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/mmm_apertif_unb1_correlator.vhd index b9c326aa29..9b82bd56e0 100644 --- a/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/mmm_apertif_unb1_correlator.vhd +++ b/applications/apertif/designs/apertif_unb1_correlator/src/vhdl/mmm_apertif_unb1_correlator.vhd @@ -520,6 +520,7 @@ ARCHITECTURE str OF mmm_apertif_unb1_correlator IS ram_st_sst_write_export : out std_logic; eth1g_reg_read_export : out std_logic; ram_diag_data_buffer_input_post_clk_export : out std_logic; + reg_dp_xonoff_output_readdata_export : in std_logic_vector(31 downto 0) := (others => '0'); reg_diag_data_buffer_mesh_reset_export : out std_logic; ram_diag_data_buffer_input_post_writedata_export : out std_logic_vector(31 downto 0); eth1g_tse_write_export : out std_logic; @@ -940,6 +941,7 @@ BEGIN reg_dp_xonoff_output_address_export => reg_dp_xonoff_output_mosi.address(0), reg_dp_xonoff_output_clk_export => OPEN, reg_dp_xonoff_output_read_export => reg_dp_xonoff_output_mosi.rd, + reg_dp_xonoff_output_readdata_export => reg_dp_xonoff_output_miso.rddata(c_word_w-1 DOWNTO 0), reg_dp_xonoff_output_reset_export => OPEN, reg_dp_xonoff_output_write_export => reg_dp_xonoff_output_mosi.wr, reg_dp_xonoff_output_writedata_export => reg_dp_xonoff_output_mosi.wrdata(c_word_w-1 DOWNTO 0), -- GitLab