diff --git a/boards/uniboard1/designs/unb1_minimal/src/vhdl/mmm_unb1_minimal.vhd b/boards/uniboard1/designs/unb1_minimal/src/vhdl/mmm_unb1_minimal.vhd
index 6dc02ae9c7974770658bdb6892b73246e9e1ed42..df88403bfbad9692952e71b1477d9ff2ece9b10b 100644
--- a/boards/uniboard1/designs/unb1_minimal/src/vhdl/mmm_unb1_minimal.vhd
+++ b/boards/uniboard1/designs/unb1_minimal/src/vhdl/mmm_unb1_minimal.vhd
@@ -147,7 +147,7 @@ BEGIN
   -- SOPC for synthesis
   ----------------------------------------------------------------------------
   gen_sopc : IF g_sim = FALSE GENERATE
-    u_sopc : ENTITY work.sopc_unb_minimal
+    u_sopc : ENTITY work.sopc_unb1_minimal
     PORT MAP (
       clk_0                                         => xo_clk, 
       reset_n                                       => xo_rst_n,