diff --git a/libraries/base/dp/tb/vhdl/tb_dp_block_from_mm.vhd b/libraries/base/dp/tb/vhdl/tb_dp_block_from_mm.vhd
index d1b64a7811ec2a247f08d0729e5a5661154eab0a..8313c467f3690c236eba85393fec21351941cb2d 100644
--- a/libraries/base/dp/tb/vhdl/tb_dp_block_from_mm.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_dp_block_from_mm.vhd
@@ -103,6 +103,8 @@ BEGIN
   -- STIMULI
   ------------------------------------------------------------------------------
   
+  start_address_dly <= start_address WHEN rising_edge(clk);  -- dp_block_to_mm is 1 clock behind so set address also 1 clock later. 
+  
   p_init_ram : PROCESS
   BEGIN
     ram_wr_en <= '0';
@@ -124,13 +126,12 @@ BEGIN
   BEGIN
     start_pulse   <= '0';
     start_address <= 0;
-    start_address_dly <= 0;
     proc_common_wait_until_high(clk, init_done);
     FOR i IN 0 TO c_nof_blocks-1 LOOP
       start_address <= i * g_data_size; 
       start_pulse <= '1';
       proc_common_wait_some_cycles(clk, 1);
-      start_address_dly <= i * g_data_size;  -- dp_block_to_mm is 1 clock behind so set address also 1 clock later. 
+      
       start_pulse <= '0';
       proc_common_wait_until_high(clk, block_done);
     END LOOP;
diff --git a/libraries/base/dp/tb/vhdl/tb_tb_dp_block_from_mm.vhd b/libraries/base/dp/tb/vhdl/tb_tb_dp_block_from_mm.vhd
index 85a1c7f7af938a1de53b4ecd9c23d0e080f412e4..cc66e86052b50ef422e7ec8f5ed75359fecec06d 100644
--- a/libraries/base/dp/tb/vhdl/tb_tb_dp_block_from_mm.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_tb_dp_block_from_mm.vhd
@@ -23,6 +23,7 @@
 -- . Test bench running multiple tb_dp_block_from_mm.vhd with different settings 
 --
 -- Description:
+--   
 -- --------------------------------------------------------------------------
 
 -- > as 10
@@ -40,7 +41,7 @@ END tb_tb_dp_block_from_mm;
 ARCHITECTURE tb OF tb_tb_dp_block_from_mm IS
   SIGNAL tb_end : STD_LOGIC := '0';  -- declare tb_end to avoid 'No objects found' error on 'when -label tb_end'
 BEGIN
-  
+  -- used generics for tb_dp_block_from_mm (g_data_size, g_step_size, g_nof_data)
   u0_tst_1_1_1   : ENTITY work.tb_dp_block_from_mm GENERIC MAP (1, 1, 1);
   u1_tst_2_2_17  : ENTITY work.tb_dp_block_from_mm GENERIC MAP (2, 2, 17);
   u2_tst_2_2_256 : ENTITY work.tb_dp_block_from_mm GENERIC MAP (2, 2, 256);