From 526e4305fef2fe71d1af9481bb131f6baa0202be Mon Sep 17 00:00:00 2001
From: Jonathan Hargreaves <hargreaves@astron.nl>
Date: Fri, 9 Oct 2015 14:41:47 +0000
Subject: [PATCH] replace fpga_temp_sens with fpga_sense
---
.../unb2_board/src/vhdl/unb2_fpga_sens_reg.vhd | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_fpga_sens_reg.vhd b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_fpga_sens_reg.vhd
index ad918f286e..c7ae0a5037 100644
--- a/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_fpga_sens_reg.vhd
+++ b/boards/uniboard2/libraries/unb2_board/src/vhdl/unb2_fpga_sens_reg.vhd
@@ -43,9 +43,12 @@ ENTITY unb2_fpga_sens_reg IS
start : IN STD_LOGIC;
-- Memory Mapped Slave in mm_clk domain
- sla_in : IN t_mem_mosi; -- actual ranges defined by c_mm_reg
- sla_out : OUT t_mem_miso; -- actual ranges defined by c_mm_reg
+ sla_temp_in : IN t_mem_mosi; -- actual ranges defined by c_mm_reg
+ sla_temp_out : OUT t_mem_miso; -- actual ranges defined by c_mm_reg
+ sla_voltage_in : IN t_mem_mosi; -- actual ranges defined by c_mm_reg
+ sla_voltage_out : OUT t_mem_miso; -- actual ranges defined by c_mm_reg
+
-- MM registers
--sens_err : IN STD_LOGIC := '0';
--sens_data : IN t_slv_8_arr(0 TO g_sens_nof_result-1); -- FIXME should be OUT
@@ -64,7 +67,7 @@ BEGIN
temp_high <= (others => '0'); --i_temp_high;
- u_fpga_temp_sens: ENTITY fpga_temp_sens_lib.fpga_temp_sens
+ u_fpga_sense: ENTITY fpga_sense_lib.fpga_sense
GENERIC MAP (
g_technology => g_technology,
g_sim => g_sim
@@ -75,8 +78,11 @@ BEGIN
start_sense => start,
- reg_mosi => sla_in,
- reg_miso => sla_out
+ reg_temp_mosi => sla_temp_in,
+ reg_temp_miso => sla_temp_out,
+
+ reg_voltage_sense_mosi => sla_voltage_in,
+ reg_voltage_sense_miso => sla_voltage_out
);
END str;
--
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