From 5216a8ba5e073160ee2334f7e9e74f09fcd3fb84 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Fri, 13 Feb 2015 08:17:49 +0000
Subject: [PATCH] Small extra on hdl_lib_uses_sim key description.
---
tools/hdltool_readme.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/hdltool_readme.txt b/tools/hdltool_readme.txt
index 4050a3be52..4ded181565 100644
--- a/tools/hdltool_readme.txt
+++ b/tools/hdltool_readme.txt
@@ -345,7 +345,8 @@ d) hdllib.cfg key descriptions
VHDL LIBRARY clauses need to be mentioned, all lower level libraries are found automatically.
The hdl_lib_uses_synth key and hdl_lib_uses_sim key separate the dependencies due to the synth_files from the extra
dependencies that come from the test bench files. This seperation avoids that libraries that are only needed for the
- test bench simulations also get included in the list of libraries for synthesis.
+ test bench simulations also get included in the list of libraries for synthesis. Often the 'test_bench_files' do not
+ depend on other libraries, so then the 'hdl_lib_uses_sim' remains empty.
- hdl_lib_technology =
The IP technology that this library is using or targets, e.g. ip_stratixiv for UniBoard1, ip_arria10 for UniBoard2. For generic HDL libraries use ''.
--
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