From 51612a836fe751dcd46c39decff4cf3bb161f64e Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Thu, 20 Nov 2014 11:59:52 +0000
Subject: [PATCH] No need to use ip/ and no need to use *_top.vhd.
---
.../{ip => }/compile_ip.tcl | 0
.../{ip => }/generate_ip.sh | 0
.../ip_arria10/transceiver_pll_10g/hdllib.cfg | 13 +++--
.../transceiver_pll_10g/ip/hdllib.cfg | 17 ------
.../ip_arria10_transceiver_pll_10g.qsys | 0
.../ip_arria10_transceiver_pll_10g_top.vhd | 57 -------------------
6 files changed, 7 insertions(+), 80 deletions(-)
rename libraries/technology/ip_arria10/transceiver_pll_10g/{ip => }/compile_ip.tcl (100%)
rename libraries/technology/ip_arria10/transceiver_pll_10g/{ip => }/generate_ip.sh (100%)
delete mode 100644 libraries/technology/ip_arria10/transceiver_pll_10g/ip/hdllib.cfg
rename libraries/technology/ip_arria10/transceiver_pll_10g/{ip => }/ip_arria10_transceiver_pll_10g.qsys (100%)
delete mode 100644 libraries/technology/ip_arria10/transceiver_pll_10g/ip_arria10_transceiver_pll_10g_top.vhd
diff --git a/libraries/technology/ip_arria10/transceiver_pll_10g/ip/compile_ip.tcl b/libraries/technology/ip_arria10/transceiver_pll_10g/compile_ip.tcl
similarity index 100%
rename from libraries/technology/ip_arria10/transceiver_pll_10g/ip/compile_ip.tcl
rename to libraries/technology/ip_arria10/transceiver_pll_10g/compile_ip.tcl
diff --git a/libraries/technology/ip_arria10/transceiver_pll_10g/ip/generate_ip.sh b/libraries/technology/ip_arria10/transceiver_pll_10g/generate_ip.sh
similarity index 100%
rename from libraries/technology/ip_arria10/transceiver_pll_10g/ip/generate_ip.sh
rename to libraries/technology/ip_arria10/transceiver_pll_10g/generate_ip.sh
diff --git a/libraries/technology/ip_arria10/transceiver_pll_10g/hdllib.cfg b/libraries/technology/ip_arria10/transceiver_pll_10g/hdllib.cfg
index 73b55bbfbb..f4f4f975a6 100644
--- a/libraries/technology/ip_arria10/transceiver_pll_10g/hdllib.cfg
+++ b/libraries/technology/ip_arria10/transceiver_pll_10g/hdllib.cfg
@@ -1,16 +1,17 @@
hdl_lib_name = ip_arria10_transceiver_pll_10g
-hdl_library_clause_name = ip_arria10_transceiver_pll_10g_lib
-hdl_lib_uses = ip_arria10_transceiver_pll_10g_altera_xcvr_atx_pll_a10_140
+hdl_library_clause_name = ip_arria10_transceiver_pll_10g_altera_xcvr_atx_pll_a10_140
+hdl_lib_uses =
hdl_lib_technology = ip_arria10
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
+modelsim_compile_ip_files =
+ $RADIOHDL/libraries/technology/ip_arria10/transceiver_pll_10g/ip/compile_ip.tcl
+
synth_files =
- ip_arria10_transceiver_pll_10g_top.vhd
test_bench_files =
-modelsim_search_libraries =
- altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver
- altera lpm sgate altera_mf altera_lnsim twentynm twentynm_hssi twentynm_hip
+quartus_qip_files =
+ generated/ip_arria10_transceiver_pll_10g.qip
diff --git a/libraries/technology/ip_arria10/transceiver_pll_10g/ip/hdllib.cfg b/libraries/technology/ip_arria10/transceiver_pll_10g/ip/hdllib.cfg
deleted file mode 100644
index 4cb86aa2c2..0000000000
--- a/libraries/technology/ip_arria10/transceiver_pll_10g/ip/hdllib.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-hdl_lib_name = ip_arria10_transceiver_pll_10g_altera_xcvr_atx_pll_a10_140
-hdl_library_clause_name = ip_arria10_transceiver_pll_10g_altera_xcvr_atx_pll_a10_140
-hdl_lib_uses =
-hdl_lib_technology = ip_arria10
-
-build_dir_sim = $HDL_BUILD_DIR
-build_dir_synth = $HDL_BUILD_DIR
-
-modelsim_compile_ip_files =
- $RADIOHDL/libraries/technology/ip_arria10/transceiver_pll_10g/ip/compile_ip.tcl
-
-synth_files =
-
-test_bench_files =
-
-quartus_qip_files =
- generated/ip_arria10_transceiver_pll_10g.qip
diff --git a/libraries/technology/ip_arria10/transceiver_pll_10g/ip/ip_arria10_transceiver_pll_10g.qsys b/libraries/technology/ip_arria10/transceiver_pll_10g/ip_arria10_transceiver_pll_10g.qsys
similarity index 100%
rename from libraries/technology/ip_arria10/transceiver_pll_10g/ip/ip_arria10_transceiver_pll_10g.qsys
rename to libraries/technology/ip_arria10/transceiver_pll_10g/ip_arria10_transceiver_pll_10g.qsys
diff --git a/libraries/technology/ip_arria10/transceiver_pll_10g/ip_arria10_transceiver_pll_10g_top.vhd b/libraries/technology/ip_arria10/transceiver_pll_10g/ip_arria10_transceiver_pll_10g_top.vhd
deleted file mode 100644
index 8b841c41ed..0000000000
--- a/libraries/technology/ip_arria10/transceiver_pll_10g/ip_arria10_transceiver_pll_10g_top.vhd
+++ /dev/null
@@ -1,57 +0,0 @@
--------------------------------------------------------------------------------
---
--- Copyright (C) 2014
--- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
--- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
--- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
---
--- This program is free software: you can redistribute it and/or modify
--- it under the terms of the GNU General Public License as published by
--- the Free Software Foundation, either version 3 of the License, or
--- (at your option) any later version.
---
--- This program is distributed in the hope that it will be useful,
--- but WITHOUT ANY WARRANTY; without even the implied warranty of
--- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
--- GNU General Public License for more details.
---
--- You should have received a copy of the GNU General Public License
--- along with this program. If not, see <http://www.gnu.org/licenses/>.
---
--------------------------------------------------------------------------------
-
--- Purpose: Wrapper for generated ip_arria10_transceiver_pll_10g.vhd
--- Description:
--- This wrapper avoids the need to vmap the ip_arria10_transceiver_pll_10g_altera_xcvr_atx_pll_a10_140 library
--- in the technology independent library that instantiate this IP.
--- Remarks:
--- . Manually created from generated ip_arria10_transceiver_pll_10g.vhd.
-
-library IEEE;
-use IEEE.std_logic_1164.all;
-
-library ip_arria10_transceiver_pll_10g_altera_xcvr_atx_pll_a10_140;
-
-entity ip_arria10_transceiver_pll_10g_top is
- port (
- pll_powerdown : in std_logic := '0'; -- pll_powerdown.pll_powerdown
- pll_refclk0 : in std_logic := '0'; -- pll_refclk0.clk
- tx_serial_clk : out std_logic; -- tx_serial_clk.clk
- pll_locked : out std_logic; -- pll_locked.pll_locked
- pll_cal_busy : out std_logic -- pll_cal_busy.pll_cal_busy
- );
-end ip_arria10_transceiver_pll_10g_top;
-
-architecture str of ip_arria10_transceiver_pll_10g_top is
-begin
-
- u_ip_arria10_transceiver_pll_10g : entity ip_arria10_transceiver_pll_10g_altera_xcvr_atx_pll_a10_140.ip_arria10_transceiver_pll_10g
- port map (
- pll_powerdown => pll_powerdown, -- pll_powerdown.pll_powerdown
- pll_refclk0 => pll_refclk0 , -- pll_refclk0.clk
- tx_serial_clk => tx_serial_clk, -- tx_serial_clk.clk
- pll_locked => pll_locked , -- pll_locked.pll_locked
- pll_cal_busy => pll_cal_busy -- pll_cal_busy.pll_cal_busy
- );
-
-end str;
--
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