From 4fdb66a5c49305fba7ac6cc7f7751232f5ede460 Mon Sep 17 00:00:00 2001 From: Daniel van der Schuur <schuur@astron.nl> Date: Wed, 1 Sep 2021 16:53:42 +0200 Subject: [PATCH] -Added sine wave and random input test benches. --- libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd | 2 +- .../dsp/st/tb/vhdl/tb_tb_st_histogram.vhd | 32 ++++++++++++++----- 2 files changed, 25 insertions(+), 9 deletions(-) diff --git a/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd b/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd index 56c1840c05..90ec563740 100644 --- a/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd +++ b/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd @@ -110,7 +110,7 @@ ARCHITECTURE tb OF tb_st_histogram IS SIGNAL nxt_stimuli_src_out : t_dp_sosi; SIGNAL stimuli_src_in : t_dp_siso; SIGNAL stimuli_count : REAL; - SIGNAL stimuli_data : STD_LOGIC_VECTOR(g_data_w-1 DOWNTO 0); + SIGNAL stimuli_data : STD_LOGIC_VECTOR(g_data_w-1 DOWNTO 0); --NOTE This is undefined in the wave window SIGNAL stimuli_done : STD_LOGIC; diff --git a/libraries/dsp/st/tb/vhdl/tb_tb_st_histogram.vhd b/libraries/dsp/st/tb/vhdl/tb_tb_st_histogram.vhd index 6520219ccd..a69031c62f 100644 --- a/libraries/dsp/st/tb/vhdl/tb_tb_st_histogram.vhd +++ b/libraries/dsp/st/tb/vhdl/tb_tb_st_histogram.vhd @@ -37,23 +37,39 @@ ARCHITECTURE tb OF tb_tb_st_histogram IS SIGNAL tb_end : STD_LOGIC := '0'; -- declare tb_end to avoid 'No objects found' error on 'when -label tb_end' BEGIN --- g_nof_sync : NATURAL := 4; --- g_data_w : NATURAL := 8; --- g_nof_bins : NATURAL := 256; --- g_nof_data : NATURAL := 1024; --- g_stimuli_mode : STRING := "dc"; --- g_data_type : STRING := "unsigned" +-- g_nof_sync : NATURAL := 4; +-- g_data_w : NATURAL := 8; +-- g_nof_bins : NATURAL := 256; +-- g_nof_data : NATURAL := 1024; +-- g_stimuli_mode : STRING := "dc"; +-- g_data_type : STRING := "unsigned" +-- Counter data u_tb_st_histogram_0 : ENTITY work.tb_st_histogram GENERIC MAP ( 7, 8, 256, 1024, "counter", "unsigned"); -- Incoming data wraps (repeats) 1024/ 256= 4 times: Bin count = 4 u_tb_st_histogram_1 : ENTITY work.tb_st_histogram GENERIC MAP ( 6, 10, 256, 4096, "counter", "unsigned"); -- Incoming data wraps (repeats) 4096/ 256=16 times: Bin count = 16 u_tb_st_histogram_2 : ENTITY work.tb_st_histogram GENERIC MAP ( 5, 12, 512, 4096, "counter", "unsigned"); -- Incoming data wraps (repeats) 4096/ 512= 8 times: Bin count = 8 u_tb_st_histogram_3 : ENTITY work.tb_st_histogram GENERIC MAP ( 4, 13, 1024, 8192, "counter", "unsigned"); -- Incoming data wraps (repeats) 8192/1024= 8 times: Bin count = 8 -u_tb_st_histogram_4 : ENTITY work.tb_st_histogram GENERIC MAP (40, 6, 64, 128, "counter", "unsigned"); -- Incoming data wraps (repeats) 128/ 64= 2 times: Bin count = 2 +u_tb_st_histogram_4 : ENTITY work.tb_st_histogram GENERIC MAP (20, 6, 64, 128, "counter", "unsigned"); -- Incoming data wraps (repeats) 128/ 64= 2 times: Bin count = 2 +-- DC signal u_tb_st_histogram_5 : ENTITY work.tb_st_histogram GENERIC MAP ( 2, 8, 256, 1024, "dc", "unsigned"); u_tb_st_histogram_6 : ENTITY work.tb_st_histogram GENERIC MAP ( 6, 10, 256, 4096, "dc", "unsigned"); u_tb_st_histogram_7 : ENTITY work.tb_st_histogram GENERIC MAP ( 5, 12, 512, 4096, "dc", "unsigned"); u_tb_st_histogram_8 : ENTITY work.tb_st_histogram GENERIC MAP ( 4, 13, 1024, 8192, "dc", "unsigned"); -u_tb_st_histogram_9 : ENTITY work.tb_st_histogram GENERIC MAP (40, 6, 64, 128, "dc", "unsigned"); +u_tb_st_histogram_9 : ENTITY work.tb_st_histogram GENERIC MAP (11, 6, 64, 128, "dc", "unsigned"); + +-- Sine wave +u_tb_st_histogram_10: ENTITY work.tb_st_histogram GENERIC MAP ( 4, 3, 8, 20, "sine", "signed"); +u_tb_st_histogram_11: ENTITY work.tb_st_histogram GENERIC MAP ( 8, 6, 64, 200, "sine", "signed"); +u_tb_st_histogram_12: ENTITY work.tb_st_histogram GENERIC MAP (12, 8, 256, 2000, "sine", "signed"); +u_tb_st_histogram_13: ENTITY work.tb_st_histogram GENERIC MAP (17, 10, 256, 3455, "sine", "signed"); +u_tb_st_histogram_14: ENTITY work.tb_st_histogram GENERIC MAP (21, 14, 1024, 8111, "sine", "signed"); + +-- Random +u_tb_st_histogram_15: ENTITY work.tb_st_histogram GENERIC MAP ( 4, 3, 8, 20, "random", "signed"); +u_tb_st_histogram_16: ENTITY work.tb_st_histogram GENERIC MAP ( 6, 6, 64, 200, "random", "signed"); +u_tb_st_histogram_17: ENTITY work.tb_st_histogram GENERIC MAP ( 9, 8, 256, 2000, "random", "signed"); +u_tb_st_histogram_18: ENTITY work.tb_st_histogram GENERIC MAP (17, 10, 256, 3455, "random", "signed"); +u_tb_st_histogram_19: ENTITY work.tb_st_histogram GENERIC MAP (13, 14, 1024, 8111, "random", "signed"); END tb; -- GitLab