diff --git a/applications/compaan/designs/compaan_io_test_fn/src/vhdl/compaan_wrapper.vhd b/applications/compaan/designs/compaan_io_test_fn/src/vhdl/compaan_wrapper.vhd
index 4ec85c47e29ba87cce4ed734f31b11a78cc7d13b..7ba8b54427dcfed61c2bfbeab09fe41f75528807 100644
--- a/applications/compaan/designs/compaan_io_test_fn/src/vhdl/compaan_wrapper.vhd
+++ b/applications/compaan/designs/compaan_io_test_fn/src/vhdl/compaan_wrapper.vhd
@@ -1,5 +1,5 @@
 ------------------------------------------------------------------
--- Wrapper between ASTRON and Compaan
+-- Wrapper between ASTRON and Compaan - FN
 ------------------------------------------------------------------
 LIBRARY IEEE, dp_lib, unb1_board_lib, io_test_lib;
 USE IEEE.STD_LOGIC_1164.ALL;
@@ -8,7 +8,8 @@ USE unb1_board_lib.unb1_board_pkg.ALL;
 
 ENTITY compaan_wrapper IS
   GENERIC (
-    g_blocks_per_sync : NATURAL := 10
+    g_blocks_per_sync : NATURAL := 10;
+    g_blocksize       : NATURAL := 8
   );
   PORT (
     -- Streaming sink (RX: ASTRON -> Compaan)
@@ -130,7 +131,7 @@ BEGIN
         g_use_sync       => FALSE,
         g_use_ctrl       => TRUE,
         g_use_complex    => FALSE,
-        g_fifo_size      => 4*g_blocks_per_sync,
+        g_fifo_size      => 4*g_blocksize,
         g_fifo_af_margin => 4,
         g_fifo_rl        => 0
       )
@@ -168,7 +169,7 @@ BEGIN
         g_use_sync       => FALSE,
         g_use_ctrl       => TRUE,
         g_use_complex    => FALSE,
-        g_fifo_size      => 4*g_blocks_per_sync,
+        g_fifo_size      => 4*g_blocksize,
         g_fifo_af_margin => 4,
         g_fifo_rl        => 0
       )
@@ -192,8 +193,9 @@ BEGIN
   gen_pkg_signals: FOR i IN 0 TO 14 GENERATE
     u_gen_signals : ENTITY dp_lib.dp_block_gen
       GENERIC MAP(
-        g_use_src_in => FALSE,
-        g_nof_data   => g_blocks_per_sync
+        g_use_src_in       => FALSE,
+        g_nof_data         => g_blocksize,
+        g_nof_blk_per_sync => g_blocks_per_sync
       )
       PORT MAP(
         rst     => KPN_RST,