From 4c14590541e06db364db44dd469e1c52dd570abd Mon Sep 17 00:00:00 2001 From: Leon Hiemstra <hiemstra@astron.nl> Date: Fri, 25 Sep 2015 10:13:19 +0000 Subject: [PATCH] excludes change (using 1600 for ddr4) --- .../designs/unb2_test/revisions/unb2_test_all/hdllib.cfg | 3 +-- .../designs/unb2_test/revisions/unb2_test_ddr_MB_I/hdllib.cfg | 1 + .../designs/unb2_test/revisions/unb2_test_ddr_MB_II/hdllib.cfg | 1 + .../unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg | 2 +- 4 files changed, 4 insertions(+), 3 deletions(-) diff --git a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_all/hdllib.cfg b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_all/hdllib.cfg index b0486490e9..afb79d2f08 100644 --- a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_all/hdllib.cfg +++ b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_all/hdllib.cfg @@ -2,8 +2,7 @@ hdl_lib_name = unb2_test_all hdl_library_clause_name = unb2_test_all_lib hdl_lib_uses_synth = common mm technology unb2_board unb2_test hdl_lib_uses_sim = -hdl_lib_excludes = ip_arria10_ddr4_8g_2400 ip_arria10_ddr4_4g_1600 ip_arria10_phy_10gbase_r ip_arria10_transceiver_reset_controller_1 - +hdl_lib_excludes = ip_arria10_ddr4_8g_2400 ip_arria10_ddr4_4g_2000 ip_arria10_phy_10gbase_r ip_arria10_transceiver_reset_controller_1 hdl_lib_technology = ip_arria10 synth_files = diff --git a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I/hdllib.cfg b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I/hdllib.cfg index 50e443058b..b48fb0e704 100644 --- a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I/hdllib.cfg +++ b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I/hdllib.cfg @@ -12,6 +12,7 @@ hdl_lib_excludes = ip_arria10_tse_sgmii_gx ip_arria10_transceiver_reset_controller_1 ip_arria10_transceiver_reset_controller_24 ip_arria10_ddr4_8g_2400 + ip_arria10_ddr4_4g_2000 synth_files = unb2_test_ddr_MB_I.vhd diff --git a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_II/hdllib.cfg b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_II/hdllib.cfg index 61a5e209d1..a097f6e1c5 100644 --- a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_II/hdllib.cfg +++ b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_II/hdllib.cfg @@ -12,6 +12,7 @@ hdl_lib_excludes = ip_arria10_tse_sgmii_gx ip_arria10_transceiver_reset_controller_1 ip_arria10_transceiver_reset_controller_24 ip_arria10_ddr4_8g_2400 + ip_arria10_ddr4_4g_2000 synth_files = unb2_test_ddr_MB_II.vhd diff --git a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg index 3c3c279cc2..2dfd41d41c 100644 --- a/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg +++ b/boards/uniboard2/designs/unb2_test/revisions/unb2_test_ddr_MB_I_II/hdllib.cfg @@ -12,7 +12,7 @@ hdl_lib_excludes = ip_arria10_tse_sgmii_gx ip_arria10_transceiver_reset_controller_1 ip_arria10_transceiver_reset_controller_24 ip_arria10_ddr4_8g_2400 - ip_arria10_ddr4_4g_1600 + ip_arria10_ddr4_4g_2000 synth_files = unb2_test_ddr_MB_I_II.vhd -- GitLab