From 4c04ea8baadfc12b02a0d57315a197b60167bf20 Mon Sep 17 00:00:00 2001
From: Reinier van der Walle <walle@astron.nl>
Date: Fri, 7 May 2021 15:46:20 +0200
Subject: [PATCH] processed review comments
---
libraries/dsp/st/src/vhdl/st_xsq_mm_to_dp.vhd | 22 +++++++++----------
libraries/dsp/st/src/vhdl/st_xst.vhd | 16 +++++++++-----
libraries/dsp/st/tb/vhdl/tb_st_xst.vhd | 4 ++--
3 files changed, 24 insertions(+), 18 deletions(-)
diff --git a/libraries/dsp/st/src/vhdl/st_xsq_mm_to_dp.vhd b/libraries/dsp/st/src/vhdl/st_xsq_mm_to_dp.vhd
index 81d0d66f60..0327d6162c 100644
--- a/libraries/dsp/st/src/vhdl/st_xsq_mm_to_dp.vhd
+++ b/libraries/dsp/st/src/vhdl/st_xsq_mm_to_dp.vhd
@@ -66,10 +66,14 @@ ARCHITECTURE rtl OF st_xsq_mm_to_dp IS
CONSTANT c_reg_rst : t_reg := (c_dp_sosi_rst, c_dp_sosi_rst, '0', 0, 0, 0);
- SIGNAL r : t_reg;
- SIGNAL nxt_r : t_reg;
+ SIGNAL r : t_reg;
+ SIGNAL nxt_r : t_reg;
+ SIGNAL mm_mosi : t_mem_mosi := c_mem_mosi_rst;
+
BEGIN
+ mm_mosi_arr <= (OTHERS => mm_mosi); -- all mosi are identical.
+
u_sosi : PROCESS(r, mm_miso_arr)
BEGIN
FOR I IN 0 TO g_nof_streams-1 LOOP
@@ -94,22 +98,18 @@ BEGIN
BEGIN
v := r;
v.out_sosi_ctrl := c_dp_sosi_rst;
- FOR I IN 0 TO g_nof_streams-1 LOOP
- mm_mosi_arr(I).rd <= '0';
- END LOOP;
+ mm_mosi.rd <= '0';
+ -- initiate next block and capture in_sosi strobe
IF r.busy = '0' AND in_sosi.sop = '1' THEN
- -- initiate next block
v.busy := '1';
v.in_sosi_strobe := in_sosi;
ELSIF r.busy = '1' THEN
-- continue with block
- FOR I IN 0 TO g_nof_streams-1 LOOP
- mm_mosi_arr(I).rd <= '1';
- mm_mosi_arr(I).address <= TO_MEM_ADDRESS(r.crosslets_index * g_nof_signal_inputs + r.in_b_index); -- streams iterate over in_b_index
- END LOOP;
+ mm_mosi.rd <= '1';
+ mm_mosi.address <= TO_MEM_ADDRESS(r.crosslets_index * g_nof_signal_inputs + r.in_b_index); -- streams iterate over in_b_index
- -- Counters
+ -- Indices counters to select data order
IF r.in_b_index < g_nof_signal_inputs - 1 THEN
v.in_b_index := r.in_b_index + 1;
ELSE
diff --git a/libraries/dsp/st/src/vhdl/st_xst.vhd b/libraries/dsp/st/src/vhdl/st_xst.vhd
index f7d7d37e7f..ba841158b0 100644
--- a/libraries/dsp/st/src/vhdl/st_xst.vhd
+++ b/libraries/dsp/st/src/vhdl/st_xst.vhd
@@ -89,6 +89,7 @@ ARCHITECTURE str OF st_xst IS
SIGNAL reg_x_sosi_0_im : t_slv_64_arr(g_nof_signal_inputs-1 DOWNTO 0);
BEGIN
+ -- MM -> DP
st_xsq_mm_to_dp : ENTITY work.st_xsq_mm_to_dp
GENERIC MAP(
g_nof_streams => g_nof_streams,
@@ -105,11 +106,14 @@ BEGIN
out_sosi_arr => x_sosi_arr
);
- -- rewire
+ -- in_b_sosi_arr = x_sosi_arr
in_b_sosi_arr <= x_sosi_arr;
+
+ -- Capture x_sosi_arr(0) data
reg_x_sosi_0_re(nxt_r.in_b_index) <= x_sosi_arr(0).re;
reg_x_sosi_0_im(nxt_r.in_b_index) <= x_sosi_arr(0).im;
+ -- reorder x_sosi_arr(0) data to follow in_a_index instead of in_b_index. All sosi in in_a_sosi_arr are identical.
p_in_a : PROCESS(x_sosi_arr, reg_x_sosi_0_re, reg_x_sosi_0_im, nxt_r.in_a_index)
BEGIN
FOR I IN 0 TO g_nof_streams-1 LOOP
@@ -119,6 +123,7 @@ BEGIN
END LOOP;
END PROCESS;
+ -- Register process
p_reg : PROCESS(dp_rst, dp_clk)
BEGIN
IF dp_rst='1' THEN
@@ -128,16 +133,17 @@ BEGIN
END IF;
END PROCESS;
+ -- Combinatorial process to create in_a_index and in_b_index for reoredering x_sosi_arr(0) data.
p_comb : PROCESS(r, x_sosi_arr)
VARIABLE v : t_reg;
BEGIN
v := r;
-
+ -- initiate next block
IF r.busy = '0' AND x_sosi_arr(0).sop = '1' THEN
- -- initiate next block
v.busy := '1';
+ -- Continue block
ELSIF r.busy = '1' THEN
- -- Counters
+ -- Indices counters to select data order
IF r.in_b_index < g_nof_signal_inputs - 1 THEN
v.in_b_index := r.in_b_index + 1;
ELSE
@@ -149,6 +155,7 @@ BEGIN
END IF;
END IF;
END IF;
+ -- End of block
IF x_sosi_arr(0).eop = '1' THEN
v.busy := '0';
v.in_a_index := 0;
@@ -157,7 +164,6 @@ BEGIN
nxt_r <= v;
END PROCESS;
-
-- st_xsq instances
st_xsq_arr : ENTITY work.st_xsq_arr
GENERIC MAP (
diff --git a/libraries/dsp/st/tb/vhdl/tb_st_xst.vhd b/libraries/dsp/st/tb/vhdl/tb_st_xst.vhd
index 62e4513c04..53d63fe0aa 100644
--- a/libraries/dsp/st/tb/vhdl/tb_st_xst.vhd
+++ b/libraries/dsp/st/tb/vhdl/tb_st_xst.vhd
@@ -159,7 +159,7 @@ BEGIN
------------------------------------------------------------------------------
-- MM Stimuli
------------------------------------------------------------------------------
- gen_mm_stim : FOR M IN 0 TO g_nof_streams-1 GENERATE
+ gen_mm_stimuli : FOR M IN 0 TO g_nof_streams-1 GENERATE
p_mm_stimuli : PROCESS
BEGIN
-- read statistics
@@ -224,7 +224,7 @@ BEGIN
----------------------------------------------------------------------------
- -- RAM
+ -- RAMs that contain a block of crosslets for each stream
----------------------------------------------------------------------------
gen_ram : FOR I IN 0 TO g_nof_streams-1 GENERATE
u_ram : ENTITY common_lib.common_ram_cr_cw
--
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