diff --git a/libraries/base/diag/tb/vhdl/tb_diag_wg_wideband.vhd b/libraries/base/diag/tb/vhdl/tb_diag_wg_wideband.vhd index 5fe5307223af3b54807bffcd691fe80b30ea4130..65b32019f74e74e4913199c999df5a4e799bc08c 100644 --- a/libraries/base/diag/tb/vhdl/tb_diag_wg_wideband.vhd +++ b/libraries/base/diag/tb/vhdl/tb_diag_wg_wideband.vhd @@ -82,7 +82,8 @@ ARCHITECTURE tb OF tb_diag_wg_wideband IS SIGNAL restart : STD_LOGIC; SIGNAL wg_ctrl : t_diag_wg; - + SIGNAL wg_ctrl_act : t_diag_wg; + SIGNAL wg_mode : NATURAL; SIGNAL wg_freq : NATURAL; SIGNAL wg_ampl : NATURAL; @@ -155,6 +156,8 @@ BEGIN -- wg_ampl <= INTEGER(1.0/REAL(c_wg_full_scale) * c_ampl_unit); -- yields amplitude of 1 -- wg_ampl <= INTEGER(3.0/REAL(c_wg_full_scale) * c_ampl_unit); -- yields amplitude of 3 + WAIT FOR c_clk_period*10; + WAIT UNTIL rising_edge(clk); -- align to rising edge WAIT FOR c_clk_period*200; @@ -163,23 +166,38 @@ BEGIN -- CALC mode wg_mode <= c_diag_wg_mode_calc; + + -- Verify that wg_ctrl_act does not change without restart + WAIT FOR c_clk_period*3; + ASSERT TO_UINT(wg_ctrl_act.mode) = c_diag_wg_mode_off REPORT "Wrong wg_ctrl_act mode before restart" SEVERITY ERROR; + restart <= '1'; WAIT FOR c_clk_period*1; restart <= '0'; + + -- Verify that wg_ctrl_act updated after restart + WAIT FOR c_clk_period*3; + ASSERT TO_UINT(wg_ctrl_act.mode) = c_diag_wg_mode_calc REPORT "Wrong wg_ctrl_act mode after restart" SEVERITY ERROR; + WAIT FOR c_clk_period*3000; restart <= '1'; WAIT FOR c_clk_period*1; restart <= '0'; WAIT FOR c_clk_period*3000; --WAIT FOR 1 sec; - + -- OFF mode wg_mode <= c_diag_wg_mode_off; + + -- Verify that wg_ctrl_act updated after WG off + WAIT FOR c_clk_period*3; + ASSERT TO_UINT(wg_ctrl_act.mode) = c_diag_wg_mode_off REPORT "Wrong wg_ctrl_act mode after WG off" SEVERITY ERROR; + restart <= '1'; WAIT FOR c_clk_period*1; restart <= '0'; WAIT FOR c_clk_period*200; - + -- SINGLE mode wg_mode <= c_diag_wg_mode_single; FOR I IN 0 TO 1 LOOP @@ -245,6 +263,7 @@ BEGIN st_restart => restart, st_ctrl => wg_ctrl, + st_ctrl_act => wg_ctrl_act, out_ovr => out_ovr, out_dat => out_dat,