From 4a3b032aa2e637f4be36461098d0f2203711c0ca Mon Sep 17 00:00:00 2001 From: Reinier van der Walle <walle@astron.nl> Date: Fri, 18 Sep 2020 11:12:12 +0200 Subject: [PATCH] Processed review comments for L2SDP-131 merge request --- .../ip/qsys_lofar2_unb2b_filterbank/jesd.ip | 3276 ----------------- .../quartus/qsys_lofar2_unb2b_filterbank.qsys | 1007 ++++- .../lofar2_unb2b_filterbank_full/hdllib.cfg | 5 + .../src/vhdl/lofar2_unb2b_filterbank.vhd | 19 +- .../src/vhdl/mmm_lofar2_unb2b_filterbank.vhd | 19 +- .../vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd | 7 + .../tb/vhdl/tb_lofar2_unb2b_filterbank.vhd | 21 +- .../lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd | 4 +- 8 files changed, 898 insertions(+), 3460 deletions(-) delete mode 100644 applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/jesd.ip diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/jesd.ip b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/jesd.ip deleted file mode 100644 index 1afabbdcdc..0000000000 --- a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/ip/qsys_lofar2_unb2b_filterbank/jesd.ip +++ /dev/null @@ -1,3276 +0,0 @@ -<?xml version="1.0" ?> -<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"> - <spirit:vendor>Intel Corporation</spirit:vendor> - <spirit:library>jesd</spirit:library> - <spirit:name>jesd204_0</spirit:name> - <spirit:version>18.0</spirit:version> - <spirit:busInterfaces> - <spirit:busInterface> - <spirit:name>alldev_lane_aligned</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>alldev_lane_aligned</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>csr_cf</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>csr_cf</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>csr_cs</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>csr_cs</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>csr_f</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>csr_f</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>csr_hd</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>csr_hd</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>csr_k</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>csr_k</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>csr_l</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>csr_l</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>csr_lane_powerdown</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>csr_lane_powerdown</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>csr_m</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>csr_m</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>csr_n</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>csr_n</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>csr_np</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>csr_np</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>csr_rx_testmode</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>csr_rx_testmode</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>csr_s</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>csr_s</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>dev_lane_aligned</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>dev_lane_aligned</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>dev_sync_n</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>dev_sync_n</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>jesd204_rx_avs</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>chipselect</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_avs_chipselect</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>address</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_avs_address</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>read</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_avs_read</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>readdata</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_avs_readdata</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>waitrequest</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_avs_waitrequest</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>write</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_avs_write</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>writedata</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_avs_writedata</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>addressAlignment</spirit:name> - <spirit:displayName>Slave addressing</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>addressGroup</spirit:name> - <spirit:displayName>Address group</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>addressSpan</spirit:name> - <spirit:displayName>Address span</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="addressSpan">1024</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>addressUnits</spirit:name> - <spirit:displayName>Address units</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>alwaysBurstMaxBurst</spirit:name> - <spirit:displayName>Always burst maximum burst</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>Associated clock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock">jesd204_rx_avs_clk</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>Associated reset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset">jesd204_rx_avs_rst_n</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>bitsPerSymbol</spirit:name> - <spirit:displayName>Bits per symbol</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>bridgedAddressOffset</spirit:name> - <spirit:displayName>Bridged Address Offset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>bridgesToMaster</spirit:name> - <spirit:displayName>Bridges to master</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>burstOnBurstBoundariesOnly</spirit:name> - <spirit:displayName>Burst on burst boundaries only</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>burstcountUnits</spirit:name> - <spirit:displayName>Burstcount units</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>constantBurstBehavior</spirit:name> - <spirit:displayName>Constant burst behavior</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>explicitAddressSpan</spirit:name> - <spirit:displayName>Explicit address span</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>holdTime</spirit:name> - <spirit:displayName>Hold</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>interleaveBursts</spirit:name> - <spirit:displayName>Interleave bursts</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>isBigEndian</spirit:name> - <spirit:displayName>Big endian</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>isFlash</spirit:name> - <spirit:displayName>Flash memory</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>isMemoryDevice</spirit:name> - <spirit:displayName>Memory device</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>isNonVolatileStorage</spirit:name> - <spirit:displayName>Non-volatile storage</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>linewrapBursts</spirit:name> - <spirit:displayName>Linewrap bursts</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>maximumPendingReadTransactions</spirit:name> - <spirit:displayName>Maximum pending read transactions</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>maximumPendingWriteTransactions</spirit:name> - <spirit:displayName>Maximum pending write transactions</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>minimumReadLatency</spirit:name> - <spirit:displayName>minimumReadLatency</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>minimumResponseLatency</spirit:name> - <spirit:displayName>Minimum response latency</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>minimumUninterruptedRunLength</spirit:name> - <spirit:displayName>Minimum uninterrupted run length</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>printableDevice</spirit:name> - <spirit:displayName>Can receive stdout/stderr</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>readLatency</spirit:name> - <spirit:displayName>Read latency</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>readWaitStates</spirit:name> - <spirit:displayName>Read wait states</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="readWaitStates">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>readWaitTime</spirit:name> - <spirit:displayName>Read wait</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="readWaitTime">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>registerIncomingSignals</spirit:name> - <spirit:displayName>Register incoming signals</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>registerOutgoingSignals</spirit:name> - <spirit:displayName>Register outgoing signals</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>setupTime</spirit:name> - <spirit:displayName>Setup</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>timingUnits</spirit:name> - <spirit:displayName>Timing units</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>transparentBridge</spirit:name> - <spirit:displayName>Transparent bridge</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>waitrequestAllowance</spirit:name> - <spirit:displayName>Waitrequest allowance</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>wellBehavedWaitrequest</spirit:name> - <spirit:displayName>Well-behaved waitrequest</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>writeLatency</spirit:name> - <spirit:displayName>Write latency</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>writeWaitStates</spirit:name> - <spirit:displayName>Write wait states</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>writeWaitTime</spirit:name> - <spirit:displayName>Write wait</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>embeddedsw.configuration.isFlash</spirit:name> - <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name> - <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name> - <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name> - <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>jesd204_rx_avs_clk</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>clk</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_avs_clk</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>clockRate</spirit:name> - <spirit:displayName>Clock rate</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>externallyDriven</spirit:name> - <spirit:displayName>Externally driven</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ptfSchematicName</spirit:name> - <spirit:displayName>PTF schematic name</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value> - </spirit:parameter> - </spirit:parameters> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>jesd204_rx_avs_rst_n</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>reset_n</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_avs_rst_n</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>Associated clock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock">jesd204_rx_avs_clk</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>synchronousEdges</spirit:name> - <spirit:displayName>Synchronous edges</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value> - </spirit:parameter> - </spirit:parameters> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>jesd204_rx_dlb_data</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_dlb_data</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>jesd204_rx_dlb_data_valid</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_dlb_data_valid</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>jesd204_rx_dlb_disperr</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_dlb_disperr</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>jesd204_rx_dlb_errdetect</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_dlb_errdetect</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>jesd204_rx_dlb_kchar_data</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_dlb_kchar_data</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>jesd204_rx_frame_error</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_frame_error</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>jesd204_rx_int</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="interrupt" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>irq</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_int</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedAddressablePoint</spirit:name> - <spirit:displayName>Associated addressable interface</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">jesd.jesd204_rx_avs</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>Associated clock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock">jesd204_rx_avs_clk</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>Associated reset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset">jesd204_rx_avs_rst_n</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>bridgedReceiverOffset</spirit:name> - <spirit:displayName>Bridged receiver offset</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="bridgedReceiverOffset">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>bridgesToReceiver</spirit:name> - <spirit:displayName>Bridges to receiver</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="bridgesToReceiver"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>irqScheme</spirit:name> - <spirit:displayName>Interrupt scheme</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="irqScheme">NONE</spirit:value> - </spirit:parameter> - </spirit:parameters> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>jesd204_rx_link</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon_streaming" spirit:version="18.0"></spirit:busType> - <spirit:master></spirit:master> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>data</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_link_data</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>valid</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_link_valid</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>ready</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>jesd204_rx_link_ready</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock">rxlink_clk</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset">rxlink_rst_n</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>beatsPerCycle</spirit:name> - <spirit:displayName>Beats Per Cycle</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="beatsPerCycle">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>dataBitsPerSymbol</spirit:name> - <spirit:displayName>Data bits per symbol</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="dataBitsPerSymbol">32</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>emptyWithinPacket</spirit:name> - <spirit:displayName>emptyWithinPacket</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="emptyWithinPacket">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>errorDescriptor</spirit:name> - <spirit:displayName>Error descriptor</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="errorDescriptor"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>firstSymbolInHighOrderBits</spirit:name> - <spirit:displayName>First Symbol In High-Order Bits</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="firstSymbolInHighOrderBits">true</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>highOrderSymbolAtMSB</spirit:name> - <spirit:displayName>highOrderSymbolAtMSB</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="highOrderSymbolAtMSB">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>maxChannel</spirit:name> - <spirit:displayName>Maximum channel</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="maxChannel">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>packetDescription</spirit:name> - <spirit:displayName>Packet description </spirit:displayName> - <spirit:value spirit:format="string" spirit:id="packetDescription"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>readyAllowance</spirit:name> - <spirit:displayName>Ready allowance</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="readyAllowance">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>readyLatency</spirit:name> - <spirit:displayName>Ready latency</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="readyLatency">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>symbolsPerBeat</spirit:name> - <spirit:displayName>Symbols per beat </spirit:displayName> - <spirit:value spirit:format="long" spirit:id="symbolsPerBeat">1</spirit:value> - </spirit:parameter> - </spirit:parameters> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>pll_ref_clk</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>clk</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>pll_ref_clk</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>clockRate</spirit:name> - <spirit:displayName>Clock rate</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>externallyDriven</spirit:name> - <spirit:displayName>Externally driven</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ptfSchematicName</spirit:name> - <spirit:displayName>PTF schematic name</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value> - </spirit:parameter> - </spirit:parameters> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>rx_analogreset</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>rx_analogreset</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>rx_analogreset</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>rx_cal_busy</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>rx_cal_busy</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>rx_cal_busy</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>rx_digitalreset</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>rx_digitalreset</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>rx_digitalreset</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>rx_islockedtodata</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>rx_is_lockedtodata</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>rx_islockedtodata</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>rx_serial_data</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>rx_serial_data</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>rx_serial_data</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>rxlink_clk</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>clk</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>rxlink_clk</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>clockRate</spirit:name> - <spirit:displayName>Clock rate</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>externallyDriven</spirit:name> - <spirit:displayName>Externally driven</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ptfSchematicName</spirit:name> - <spirit:displayName>PTF schematic name</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value> - </spirit:parameter> - </spirit:parameters> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>rxlink_rst_n</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>reset_n</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>rxlink_rst_n_reset_n</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>Associated clock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock">rxlink_clk</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>synchronousEdges</spirit:name> - <spirit:displayName>Synchronous edges</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value> - </spirit:parameter> - </spirit:parameters> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>rxphy_clk</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>rxphy_clk</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>sof</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>sof</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>somf</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>somf</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - <spirit:busInterface> - <spirit:name>sysref</spirit:name> - <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType> - <spirit:slave></spirit:slave> - <spirit:portMaps> - <spirit:portMap> - <spirit:logicalPort> - <spirit:name>export</spirit:name> - </spirit:logicalPort> - <spirit:physicalPort> - <spirit:name>sysref</spirit:name> - </spirit:physicalPort> - </spirit:portMap> - </spirit:portMaps> - <spirit:parameters> - <spirit:parameter> - <spirit:name>associatedClock</spirit:name> - <spirit:displayName>associatedClock</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>associatedReset</spirit:name> - <spirit:displayName>associatedReset</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>prSafe</spirit:name> - <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value> - </spirit:parameter> - </spirit:parameters> - <spirit:vendorExtensions> - <altera:altera_assignments> - <spirit:parameters> - <spirit:parameter> - <spirit:name>ui.blockdiagram.direction</spirit:name> - <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_assignments> - </spirit:vendorExtensions> - </spirit:busInterface> - </spirit:busInterfaces> - <spirit:model> - <spirit:views> - <spirit:view> - <spirit:name>QUARTUS_SYNTH</spirit:name> - <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier> - <spirit:modelName>altera_jesd204</spirit:modelName> - <spirit:fileSetRef> - <spirit:localName>QUARTUS_SYNTH</spirit:localName> - </spirit:fileSetRef> - </spirit:view> - </spirit:views> - <spirit:ports> - <spirit:port> - <spirit:name>alldev_lane_aligned</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>csr_cf</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>4</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>csr_cs</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>1</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>csr_f</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>7</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>csr_hd</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>csr_k</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>4</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>csr_l</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>4</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>csr_lane_powerdown</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>csr_m</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>7</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>csr_n</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>4</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>csr_np</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>4</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>csr_rx_testmode</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>3</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>csr_s</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>4</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>dev_lane_aligned</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>dev_sync_n</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_avs_chipselect</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_avs_address</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>7</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_avs_read</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_avs_readdata</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>31</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_avs_waitrequest</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_avs_write</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_avs_writedata</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>31</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_avs_clk</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_avs_rst_n</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_dlb_data</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>31</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_dlb_data_valid</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_dlb_disperr</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>3</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_dlb_errdetect</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>3</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_dlb_kchar_data</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>3</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_frame_error</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_int</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_link_data</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>31</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_link_valid</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>jesd204_rx_link_ready</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>pll_ref_clk</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>rx_analogreset</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>rx_cal_busy</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>rx_digitalreset</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>rx_islockedtodata</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>rx_serial_data</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>rxlink_clk</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>rxlink_rst_n_reset_n</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>rxphy_clk</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>sof</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>3</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>somf</spirit:name> - <spirit:wire> - <spirit:direction>out</spirit:direction> - <spirit:vector> - <spirit:left>0</spirit:left> - <spirit:right>3</spirit:right> - </spirit:vector> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - <spirit:port> - <spirit:name>sysref</spirit:name> - <spirit:wire> - <spirit:direction>in</spirit:direction> - <spirit:wireTypeDefs> - <spirit:wireTypeDef> - <spirit:typeName>STD_LOGIC</spirit:typeName> - <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef> - </spirit:wireTypeDef> - </spirit:wireTypeDefs> - </spirit:wire> - </spirit:port> - </spirit:ports> - </spirit:model> - <spirit:vendorExtensions> - <altera:entity_info> - <spirit:vendor>Intel Corporation</spirit:vendor> - <spirit:library>jesd</spirit:library> - <spirit:name>altera_jesd204</spirit:name> - <spirit:version>18.0</spirit:version> - </altera:entity_info> - <altera:altera_module_parameters> - <spirit:parameters> - <spirit:parameter> - <spirit:name>wrapper_opt</spirit:name> - <spirit:displayName>Jesd204b wrapper</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="wrapper_opt">base_phy</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>sdc_constraint</spirit:name> - <spirit:displayName>Set constraint for sdc</spirit:displayName> - <spirit:value spirit:format="float" spirit:id="sdc_constraint">1.0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>DEVICE_FAMILY</spirit:name> - <spirit:displayName>Device family</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="DEVICE_FAMILY">Arria 10</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>part_trait_dp</spirit:name> - <spirit:displayName>Device Part</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="part_trait_dp">10AX115U2F45E1SG</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>DATA_PATH</spirit:name> - <spirit:displayName>Data path</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="DATA_PATH">RX</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>SUBCLASSV</spirit:name> - <spirit:displayName>Jesd204b subclass</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="SUBCLASSV">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>lane_rate</spirit:name> - <spirit:displayName>Data rate</spirit:displayName> - <spirit:value spirit:format="float" spirit:id="lane_rate">4000.0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>PCS_CONFIG</spirit:name> - <spirit:displayName>PCS Option</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="PCS_CONFIG">JESD_PCS_CFG1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>pll_type</spirit:name> - <spirit:displayName>PLL Type</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="pll_type">CMU</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>bonded_mode</spirit:name> - <spirit:displayName>Bonding Mode </spirit:displayName> - <spirit:value spirit:format="string" spirit:id="bonded_mode">bonded</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>REFCLK_FREQ</spirit:name> - <spirit:displayName>PLL/CDR Reference Clock Frequency</spirit:displayName> - <spirit:value spirit:format="float" spirit:id="REFCLK_FREQ">200.0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>gui_analog_voltage</spirit:name> - <spirit:displayName>VCCR_GXB and VCCT_GXB supply voltage for the Transceiver</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="gui_analog_voltage">1_0V</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>bitrev_en</spirit:name> - <spirit:displayName>Enable Bit reversal and Byte reversal</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="bitrev_en">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>pll_reconfig_enable</spirit:name> - <spirit:displayName>Enable Transceiver Dynamic Reconfiguration</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="pll_reconfig_enable">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>rcfg_jtag_enable</spirit:name> - <spirit:displayName>Enable Altera Debug Master Endpoint</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="rcfg_jtag_enable">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>rcfg_shared</spirit:name> - <spirit:displayName>Share Reconfiguration Interface</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="rcfg_shared">true</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>rcfg_enable_split_interface</spirit:name> - <spirit:displayName>Provide Separate Reconfiguration Interface for Each Channel</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="rcfg_enable_split_interface">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>set_capability_reg_enable</spirit:name> - <spirit:displayName>Enable Capability Registers</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="set_capability_reg_enable">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>set_user_identifier</spirit:name> - <spirit:displayName>Set user-defined IP identifier</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="set_user_identifier">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>set_csr_soft_logic_enable</spirit:name> - <spirit:displayName>Enable Control and Status Registers</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="set_csr_soft_logic_enable">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>set_prbs_soft_logic_enable</spirit:name> - <spirit:displayName>Enable PRBS Soft Accumulators</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="set_prbs_soft_logic_enable">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>L</spirit:name> - <spirit:displayName>Lanes per converter device (L)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="L">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>M</spirit:name> - <spirit:displayName>Converters per device (M)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="M">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>GUI_EN_CFG_F</spirit:name> - <spirit:displayName>Enable manual F configuration</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="GUI_EN_CFG_F">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>GUI_CFG_F</spirit:name> - <spirit:displayName>Octets per frame (F)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="GUI_CFG_F">2</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>F</spirit:name> - <spirit:displayName>Octets per frame (F)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="F">2</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>N</spirit:name> - <spirit:displayName>Converter resolution (N)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="N">14</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>N_PRIME</spirit:name> - <spirit:displayName>Transmitted bits per sample (N')</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="N_PRIME">16</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>S</spirit:name> - <spirit:displayName>Samples per converter per frame (S)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="S">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>K</spirit:name> - <spirit:displayName>Frames per multiframe (K)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="K">32</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>SCR</spirit:name> - <spirit:displayName>Enable scramble (SCR)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="SCR">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>CS</spirit:name> - <spirit:displayName>Control Bits (CS)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="CS">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>CF</spirit:name> - <spirit:displayName>Control Words (CF)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="CF">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>HD</spirit:name> - <spirit:displayName>High Density user data format (HD)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="HD">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ECC_EN</spirit:name> - <spirit:displayName>Enable Error Code Correction (ECC_EN)</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="ECC_EN">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>DLB_TEST</spirit:name> - <spirit:displayName>Enable Digital Loop Back Test (DLB_TEST)</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="DLB_TEST">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>PHADJ</spirit:name> - <spirit:displayName>Phase adjustment request (PHADJ)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="PHADJ">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ADJCNT</spirit:name> - <spirit:displayName>Adjustment resolution step count (ADJCNT)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="ADJCNT">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ADJDIR</spirit:name> - <spirit:displayName>Direction of adjustment (ADJDIR)</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="ADJDIR">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>OPTIMIZE</spirit:name> - <spirit:displayName>CSR Programmability</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="OPTIMIZE">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>DID</spirit:name> - <spirit:displayName>Device ID</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="DID">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>BID</spirit:name> - <spirit:displayName>Bank ID</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="BID">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>LID0</spirit:name> - <spirit:displayName>Lane0 ID</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="LID0">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>FCHK0</spirit:name> - <spirit:displayName>Lane0 checksum</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="FCHK0">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>LID1</spirit:name> - <spirit:displayName>Lane1 ID</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="LID1">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>FCHK1</spirit:name> - <spirit:displayName>Lane1 checksum</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="FCHK1">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>LID2</spirit:name> - <spirit:displayName>Lane2 ID</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="LID2">2</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>FCHK2</spirit:name> - <spirit:displayName>Lane2 checksum</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="FCHK2">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>LID3</spirit:name> - <spirit:displayName>Lane3 ID</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="LID3">3</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>FCHK3</spirit:name> - <spirit:displayName>Lane3 checksum</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="FCHK3">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>LID4</spirit:name> - <spirit:displayName>Lane4 ID</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="LID4">4</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>FCHK4</spirit:name> - <spirit:displayName>Lane4 checksum</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="FCHK4">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>LID5</spirit:name> - <spirit:displayName>Lane5 ID</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="LID5">5</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>FCHK5</spirit:name> - <spirit:displayName>Lane5 checksum</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="FCHK5">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>LID6</spirit:name> - <spirit:displayName>Lane6 ID</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="LID6">6</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>FCHK6</spirit:name> - <spirit:displayName>Lane6 checksum</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="FCHK6">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>LID7</spirit:name> - <spirit:displayName>Lane7 ID</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="LID7">7</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>FCHK7</spirit:name> - <spirit:displayName>Lane7 checksum</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="FCHK7">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>d_refclk_freq</spirit:name> - <spirit:displayName>PLL/CDR Reference Clock Frequency</spirit:displayName> - <spirit:value spirit:format="float" spirit:id="d_refclk_freq">200.0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>JESDV</spirit:name> - <spirit:displayName>JESDV</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="JESDV">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>PMA_WIDTH</spirit:name> - <spirit:displayName>PMA_WIDTH</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="PMA_WIDTH">32</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>SER_SIZE</spirit:name> - <spirit:displayName>SER_SIZE</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="SER_SIZE">4</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>FK</spirit:name> - <spirit:displayName>FK</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="FK">64</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>RES1</spirit:name> - <spirit:displayName>RES1</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="RES1">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>RES2</spirit:name> - <spirit:displayName>RES2</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="RES2">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>BIT_REVERSAL</spirit:name> - <spirit:displayName>BIT_REVERSAL</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="BIT_REVERSAL">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>BYTE_REVERSAL</spirit:name> - <spirit:displayName>BYTE_REVERSAL</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="BYTE_REVERSAL">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ALIGNMENT_PATTERN</spirit:name> - <spirit:displayName>ALIGNMENT_PATTERN</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="ALIGNMENT_PATTERN">658812</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>PULSE_WIDTH</spirit:name> - <spirit:displayName>PULSE_WIDTH</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="PULSE_WIDTH">2</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>LS_FIFO_DEPTH</spirit:name> - <spirit:displayName>LS_FIFO_DEPTH</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="LS_FIFO_DEPTH">32</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>LS_FIFO_WIDTHU</spirit:name> - <spirit:displayName>LS_FIFO_WIDTHU</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="LS_FIFO_WIDTHU">5</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>UNUSED_TX_PARALLEL_WIDTH</spirit:name> - <spirit:displayName>UNUSED_TX_PARALLEL_WIDTH</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="UNUSED_TX_PARALLEL_WIDTH">92</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>UNUSED_RX_PARALLEL_WIDTH</spirit:name> - <spirit:displayName>UNUSED_RX_PARALLEL_WIDTH</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="UNUSED_RX_PARALLEL_WIDTH">72</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>XCVR_PLL_LOCKED_WIDTH</spirit:name> - <spirit:displayName>XCVR_PLL_LOCKED_WIDTH</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="XCVR_PLL_LOCKED_WIDTH">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>RECONFIG_ADDRESS_WIDTH</spirit:name> - <spirit:displayName>RECONFIG_ADDRESS_WIDTH</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="RECONFIG_ADDRESS_WIDTH">10</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>DEPTH_PIPE</spirit:name> - <spirit:displayName>Pipeline stages for link_clk domain reset signal</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="DEPTH_PIPE">3</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>xcvr_ip</spirit:name> - <spirit:displayName>xcvr_ip</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="xcvr_ip">ltile</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>die_types</spirit:name> - <spirit:displayName>die_types</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="die_types"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>die_revisions</spirit:name> - <spirit:displayName>die_revisions</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="die_revisions"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>support_c1</spirit:name> - <spirit:displayName>support_c1</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="support_c1">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>support_c2</spirit:name> - <spirit:displayName>support_c2</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="support_c2">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>support_c3</spirit:name> - <spirit:displayName>support_c3</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="support_c3">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>crete_tile_status</spirit:name> - <spirit:displayName>Transceiver Tile</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="crete_tile_status">ltile</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>gui_user_crete_tile</spirit:name> - <spirit:displayName>Transceiver Tile</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="gui_user_crete_tile">etile</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>TEST_COMPONENTS_EN</spirit:name> - <spirit:displayName>Add Test Components</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="TEST_COMPONENTS_EN">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>TERMINATE_RECONFIG_EN</spirit:name> - <spirit:displayName>Terminate Reconfig Signals</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="TERMINATE_RECONFIG_EN">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ED_TYPE</spirit:name> - <spirit:displayName>Select Design</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="ED_TYPE">DATAPATH</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ED_FILESET_SIM</spirit:name> - <spirit:displayName>Simulation</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="ED_FILESET_SIM">true</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ED_FILESET_SYNTH</spirit:name> - <spirit:displayName>Synthesis</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="ED_FILESET_SYNTH">true</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ED_HDL_FORMAT_SIM</spirit:name> - <spirit:displayName>HDL Format</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="ED_HDL_FORMAT_SIM">VHDL</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ED_SIM_PAT_TESTMODE</spirit:name> - <spirit:displayName>Test pattern</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="ED_SIM_PAT_TESTMODE">PRBS_7</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ED_HDL_FORMAT_SYNTH</spirit:name> - <spirit:displayName>HDL Format</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="ED_HDL_FORMAT_SYNTH">VERILOG</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ED_DEV_KIT</spirit:name> - <spirit:displayName>Select Board</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="ED_DEV_KIT">NONE</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>GUI_ED_DEV_KIT</spirit:name> - <spirit:displayName>Select Board</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="GUI_ED_DEV_KIT">None</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ED_SINGLE_REFCLK</spirit:name> - <spirit:displayName>Single reference clock (Advanced users only. Not recommended.)</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="ED_SINGLE_REFCLK">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>ED_3WIRE_SPI</spirit:name> - <spirit:displayName>Generate 3-wire SPI module</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="ED_3WIRE_SPI">true</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>SELECT_CUSTOM_DEVICE</spirit:name> - <spirit:displayName>Change Target Device</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="SELECT_CUSTOM_DEVICE">false</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>AUTO_DEVICE</spirit:name> - <spirit:displayName>Auto DEVICE</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="AUTO_DEVICE">10AX115U2F45E1SG</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>AUTO_DEVICE_SPEEDGRADE</spirit:name> - <spirit:displayName>Auto DEVICE_SPEEDGRADE</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="AUTO_DEVICE_SPEEDGRADE">1</spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_module_parameters> - <altera:altera_system_parameters> - <spirit:parameters> - <spirit:parameter> - <spirit:name>device</spirit:name> - <spirit:displayName>Device</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>deviceFamily</spirit:name> - <spirit:displayName>Device family</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>deviceSpeedGrade</spirit:name> - <spirit:displayName>Device Speed Grade</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>generationId</spirit:name> - <spirit:displayName>Generation Id</spirit:displayName> - <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>bonusData</spirit:name> - <spirit:displayName>bonusData</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="bonusData">bonusData -{ - element jesd204_0 - { - datum _sortIndex - { - value = "0"; - type = "int"; - } - } -} -</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>hideFromIPCatalog</spirit:name> - <spirit:displayName>Hide from IP Catalog</spirit:displayName> - <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>lockedInterfaceDefinition</spirit:name> - <spirit:displayName>lockedInterfaceDefinition</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"></spirit:value> - </spirit:parameter> - <spirit:parameter> - <spirit:name>systemInfos</spirit:name> - <spirit:displayName>systemInfos</spirit:displayName> - <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition> - <connPtSystemInfos> - <entry> - <key>jesd204_rx_avs</key> - <value> - <connectionPointName>jesd204_rx_avs</connectionPointName> - <suppliedSystemInfos/> - <consumedSystemInfos> - <entry> - <key>ADDRESS_MAP</key> - <value><address-map><slave name='jesd204_rx_avs' start='0x0' end='0x400' datawidth='32' /></address-map></value> - </entry> - <entry> - <key>ADDRESS_WIDTH</key> - <value>10</value> - </entry> - <entry> - <key>MAX_SLAVE_DATA_WIDTH</key> - <value>32</value> - </entry> - </consumedSystemInfos> - </value> - </entry> - </connPtSystemInfos> -</systemInfosDefinition>]]></spirit:value> - </spirit:parameter> - </spirit:parameters> - </altera:altera_system_parameters> - <altera:altera_interface_boundary> - <altera:interface_mapping altera:name="alldev_lane_aligned" altera:internal="jesd204_0.alldev_lane_aligned" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="alldev_lane_aligned" altera:internal="alldev_lane_aligned"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_cf" altera:internal="jesd204_0.csr_cf" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="csr_cf" altera:internal="csr_cf"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_cs" altera:internal="jesd204_0.csr_cs" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="csr_cs" altera:internal="csr_cs"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_f" altera:internal="jesd204_0.csr_f" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="csr_f" altera:internal="csr_f"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_hd" altera:internal="jesd204_0.csr_hd" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="csr_hd" altera:internal="csr_hd"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_k" altera:internal="jesd204_0.csr_k" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="csr_k" altera:internal="csr_k"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_l" altera:internal="jesd204_0.csr_l" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="csr_l" altera:internal="csr_l"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_lane_powerdown" altera:internal="jesd204_0.csr_lane_powerdown" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="csr_lane_powerdown" altera:internal="csr_lane_powerdown"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_m" altera:internal="jesd204_0.csr_m" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="csr_m" altera:internal="csr_m"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_n" altera:internal="jesd204_0.csr_n" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="csr_n" altera:internal="csr_n"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_np" altera:internal="jesd204_0.csr_np" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="csr_np" altera:internal="csr_np"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_rx_testmode" altera:internal="jesd204_0.csr_rx_testmode" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="csr_rx_testmode" altera:internal="csr_rx_testmode"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_s" altera:internal="jesd204_0.csr_s" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="csr_s" altera:internal="csr_s"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="csr_tx_testmode" altera:internal="jesd204_0.csr_tx_testmode"></altera:interface_mapping> - <altera:interface_mapping altera:name="csr_tx_testpattern_a" altera:internal="jesd204_0.csr_tx_testpattern_a"></altera:interface_mapping> - <altera:interface_mapping altera:name="csr_tx_testpattern_b" altera:internal="jesd204_0.csr_tx_testpattern_b"></altera:interface_mapping> - <altera:interface_mapping altera:name="csr_tx_testpattern_c" altera:internal="jesd204_0.csr_tx_testpattern_c"></altera:interface_mapping> - <altera:interface_mapping altera:name="csr_tx_testpattern_d" altera:internal="jesd204_0.csr_tx_testpattern_d"></altera:interface_mapping> - <altera:interface_mapping altera:name="dev_lane_aligned" altera:internal="jesd204_0.dev_lane_aligned" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="dev_lane_aligned" altera:internal="dev_lane_aligned"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="dev_sync_n" altera:internal="jesd204_0.dev_sync_n" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="dev_sync_n" altera:internal="dev_sync_n"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_rx_avs" altera:internal="jesd204_0.jesd204_rx_avs" altera:type="avalon" altera:dir="end"> - <altera:port_mapping altera:name="jesd204_rx_avs_address" altera:internal="jesd204_rx_avs_address"></altera:port_mapping> - <altera:port_mapping altera:name="jesd204_rx_avs_chipselect" altera:internal="jesd204_rx_avs_chipselect"></altera:port_mapping> - <altera:port_mapping altera:name="jesd204_rx_avs_read" altera:internal="jesd204_rx_avs_read"></altera:port_mapping> - <altera:port_mapping altera:name="jesd204_rx_avs_readdata" altera:internal="jesd204_rx_avs_readdata"></altera:port_mapping> - <altera:port_mapping altera:name="jesd204_rx_avs_waitrequest" altera:internal="jesd204_rx_avs_waitrequest"></altera:port_mapping> - <altera:port_mapping altera:name="jesd204_rx_avs_write" altera:internal="jesd204_rx_avs_write"></altera:port_mapping> - <altera:port_mapping altera:name="jesd204_rx_avs_writedata" altera:internal="jesd204_rx_avs_writedata"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_rx_avs_clk" altera:internal="jesd204_0.jesd204_rx_avs_clk" altera:type="clock" altera:dir="end"> - <altera:port_mapping altera:name="jesd204_rx_avs_clk" altera:internal="jesd204_rx_avs_clk"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_rx_avs_rst_n" altera:internal="jesd204_0.jesd204_rx_avs_rst_n" altera:type="reset" altera:dir="end"> - <altera:port_mapping altera:name="jesd204_rx_avs_rst_n" altera:internal="jesd204_rx_avs_rst_n"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_rx_dlb_data" altera:internal="jesd204_0.jesd204_rx_dlb_data" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="jesd204_rx_dlb_data" altera:internal="jesd204_rx_dlb_data"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_rx_dlb_data_valid" altera:internal="jesd204_0.jesd204_rx_dlb_data_valid" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="jesd204_rx_dlb_data_valid" altera:internal="jesd204_rx_dlb_data_valid"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_rx_dlb_disperr" altera:internal="jesd204_0.jesd204_rx_dlb_disperr" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="jesd204_rx_dlb_disperr" altera:internal="jesd204_rx_dlb_disperr"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_rx_dlb_errdetect" altera:internal="jesd204_0.jesd204_rx_dlb_errdetect" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="jesd204_rx_dlb_errdetect" altera:internal="jesd204_rx_dlb_errdetect"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_rx_dlb_kchar_data" altera:internal="jesd204_0.jesd204_rx_dlb_kchar_data" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="jesd204_rx_dlb_kchar_data" altera:internal="jesd204_rx_dlb_kchar_data"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_rx_frame_error" altera:internal="jesd204_0.jesd204_rx_frame_error" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="jesd204_rx_frame_error" altera:internal="jesd204_rx_frame_error"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_rx_int" altera:internal="jesd204_0.jesd204_rx_int" altera:type="interrupt" altera:dir="end"> - <altera:port_mapping altera:name="jesd204_rx_int" altera:internal="jesd204_rx_int"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_rx_link" altera:internal="jesd204_0.jesd204_rx_link" altera:type="avalon_streaming" altera:dir="start"> - <altera:port_mapping altera:name="jesd204_rx_link_data" altera:internal="jesd204_rx_link_data"></altera:port_mapping> - <altera:port_mapping altera:name="jesd204_rx_link_ready" altera:internal="jesd204_rx_link_ready"></altera:port_mapping> - <altera:port_mapping altera:name="jesd204_rx_link_valid" altera:internal="jesd204_rx_link_valid"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_tx_avs" altera:internal="jesd204_0.jesd204_tx_avs"></altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_tx_avs_clk" altera:internal="jesd204_0.jesd204_tx_avs_clk"></altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_tx_avs_rst_n" altera:internal="jesd204_0.jesd204_tx_avs_rst_n"></altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_tx_dlb_data" altera:internal="jesd204_0.jesd204_tx_dlb_data"></altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_tx_dlb_kchar_data" altera:internal="jesd204_0.jesd204_tx_dlb_kchar_data"></altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_tx_frame_error" altera:internal="jesd204_0.jesd204_tx_frame_error"></altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_tx_frame_ready" altera:internal="jesd204_0.jesd204_tx_frame_ready"></altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_tx_int" altera:internal="jesd204_0.jesd204_tx_int"></altera:interface_mapping> - <altera:interface_mapping altera:name="jesd204_tx_link" altera:internal="jesd204_0.jesd204_tx_link"></altera:interface_mapping> - <altera:interface_mapping altera:name="mdev_sync_n" altera:internal="jesd204_0.mdev_sync_n"></altera:interface_mapping> - <altera:interface_mapping altera:name="pll_locked" altera:internal="jesd204_0.pll_locked"></altera:interface_mapping> - <altera:interface_mapping altera:name="pll_ref_clk" altera:internal="jesd204_0.pll_ref_clk" altera:type="clock" altera:dir="end"> - <altera:port_mapping altera:name="pll_ref_clk" altera:internal="pll_ref_clk"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="rx_analogreset" altera:internal="jesd204_0.rx_analogreset" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="rx_analogreset" altera:internal="rx_analogreset"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="rx_cal_busy" altera:internal="jesd204_0.rx_cal_busy" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="rx_cal_busy" altera:internal="rx_cal_busy"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="rx_csr_cf" altera:internal="jesd204_0.rx_csr_cf"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_csr_cs" altera:internal="jesd204_0.rx_csr_cs"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_csr_f" altera:internal="jesd204_0.rx_csr_f"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_csr_hd" altera:internal="jesd204_0.rx_csr_hd"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_csr_k" altera:internal="jesd204_0.rx_csr_k"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_csr_l" altera:internal="jesd204_0.rx_csr_l"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_csr_lane_powerdown" altera:internal="jesd204_0.rx_csr_lane_powerdown"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_csr_m" altera:internal="jesd204_0.rx_csr_m"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_csr_n" altera:internal="jesd204_0.rx_csr_n"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_csr_np" altera:internal="jesd204_0.rx_csr_np"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_csr_s" altera:internal="jesd204_0.rx_csr_s"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_dev_sync_n" altera:internal="jesd204_0.rx_dev_sync_n"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_digitalreset" altera:internal="jesd204_0.rx_digitalreset" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="rx_digitalreset" altera:internal="rx_digitalreset"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="rx_islockedtodata" altera:internal="jesd204_0.rx_islockedtodata" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="rx_islockedtodata" altera:internal="rx_islockedtodata"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="rx_pll_ref_clk" altera:internal="jesd204_0.rx_pll_ref_clk"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_serial_data" altera:internal="jesd204_0.rx_serial_data" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="rx_serial_data" altera:internal="rx_serial_data"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="rx_seriallpbken" altera:internal="jesd204_0.rx_seriallpbken"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_sof" altera:internal="jesd204_0.rx_sof"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_somf" altera:internal="jesd204_0.rx_somf"></altera:interface_mapping> - <altera:interface_mapping altera:name="rx_sysref" altera:internal="jesd204_0.rx_sysref"></altera:interface_mapping> - <altera:interface_mapping altera:name="rxlink_clk" altera:internal="jesd204_0.rxlink_clk" altera:type="clock" altera:dir="end"> - <altera:port_mapping altera:name="rxlink_clk" altera:internal="rxlink_clk"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="rxlink_rst_n" altera:internal="jesd204_0.rxlink_rst_n" altera:type="reset" altera:dir="end"> - <altera:port_mapping altera:name="rxlink_rst_n_reset_n" altera:internal="rxlink_rst_n_reset_n"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="rxphy_clk" altera:internal="jesd204_0.rxphy_clk" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="rxphy_clk" altera:internal="rxphy_clk"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="sof" altera:internal="jesd204_0.sof" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="sof" altera:internal="sof"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="somf" altera:internal="jesd204_0.somf" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="somf" altera:internal="somf"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="sync_n" altera:internal="jesd204_0.sync_n"></altera:interface_mapping> - <altera:interface_mapping altera:name="sysref" altera:internal="jesd204_0.sysref" altera:type="conduit" altera:dir="end"> - <altera:port_mapping altera:name="sysref" altera:internal="sysref"></altera:port_mapping> - </altera:interface_mapping> - <altera:interface_mapping altera:name="tx_analogreset" altera:internal="jesd204_0.tx_analogreset"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_bonding_clocks_ch0" altera:internal="jesd204_0.tx_bonding_clocks_ch0"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_bonding_clocks_ch1" altera:internal="jesd204_0.tx_bonding_clocks_ch1"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_cal_busy" altera:internal="jesd204_0.tx_cal_busy"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_csr_cf" altera:internal="jesd204_0.tx_csr_cf"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_csr_cs" altera:internal="jesd204_0.tx_csr_cs"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_csr_f" altera:internal="jesd204_0.tx_csr_f"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_csr_hd" altera:internal="jesd204_0.tx_csr_hd"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_csr_k" altera:internal="jesd204_0.tx_csr_k"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_csr_l" altera:internal="jesd204_0.tx_csr_l"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_csr_lane_powerdown" altera:internal="jesd204_0.tx_csr_lane_powerdown"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_csr_m" altera:internal="jesd204_0.tx_csr_m"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_csr_n" altera:internal="jesd204_0.tx_csr_n"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_csr_np" altera:internal="jesd204_0.tx_csr_np"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_csr_s" altera:internal="jesd204_0.tx_csr_s"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_dev_sync_n" altera:internal="jesd204_0.tx_dev_sync_n"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_digitalreset" altera:internal="jesd204_0.tx_digitalreset"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_serial_data" altera:internal="jesd204_0.tx_serial_data"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_somf" altera:internal="jesd204_0.tx_somf"></altera:interface_mapping> - <altera:interface_mapping altera:name="tx_sysref" altera:internal="jesd204_0.tx_sysref"></altera:interface_mapping> - <altera:interface_mapping altera:name="txlink_clk" altera:internal="jesd204_0.txlink_clk"></altera:interface_mapping> - <altera:interface_mapping altera:name="txlink_rst_n" altera:internal="jesd204_0.txlink_rst_n"></altera:interface_mapping> - <altera:interface_mapping altera:name="txphy_clk" altera:internal="jesd204_0.txphy_clk"></altera:interface_mapping> - </altera:altera_interface_boundary> - <altera:altera_has_warnings>false</altera:altera_has_warnings> - <altera:altera_has_errors>false</altera:altera_has_errors> - </spirit:vendorExtensions> -</spirit:component> \ No newline at end of file diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/qsys_lofar2_unb2b_filterbank.qsys b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/qsys_lofar2_unb2b_filterbank.qsys index 9ec0a36276..33c63f9b18 100644 --- a/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/qsys_lofar2_unb2b_filterbank.qsys +++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/quartus/qsys_lofar2_unb2b_filterbank.qsys @@ -60,6 +60,11 @@ } element cpu_0.debug_mem_slave { + datum _lockedAddress + { + value = "1"; + type = "boolean"; + } datum baseAddress { value = "14336"; @@ -249,6 +254,22 @@ type = "String"; } } + element ram_scrap + { + datum _sortIndex + { + value = "37"; + type = "int"; + } + } + element ram_scrap.mem + { + datum baseAddress + { + value = "2048"; + type = "String"; + } + } element ram_st_sst { datum _sortIndex @@ -1071,6 +1092,41 @@ internal="ram_fil_coefs.writedata" type="conduit" dir="end" /> + <interface + name="ram_scrap_address" + internal="ram_scrap.address" + type="conduit" + dir="end" /> + <interface + name="ram_scrap_clk" + internal="ram_scrap.clk" + type="conduit" + dir="end" /> + <interface + name="ram_scrap_read" + internal="ram_scrap.read" + type="conduit" + dir="end" /> + <interface + name="ram_scrap_readdata" + internal="ram_scrap.readdata" + type="conduit" + dir="end" /> + <interface + name="ram_scrap_reset" + internal="ram_scrap.reset" + type="conduit" + dir="end" /> + <interface + name="ram_scrap_write" + internal="ram_scrap.write" + type="conduit" + dir="end" /> + <interface + name="ram_scrap_writedata" + internal="ram_scrap.writedata" + type="conduit" + dir="end" /> <interface name="ram_st_sst_address" internal="ram_st_sst.address" @@ -4780,7 +4836,7 @@ <consumedSystemInfos> <entry> <key>ADDRESS_MAP</key> - <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x200' end='0x300' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x300' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_si.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='reg_dp_shiftram.mem' start='0x3040' end='0x3060' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3060' end='0x3080' datawidth='32' /><slave name='reg_epcs.mem' start='0x3080' end='0x30A0' datawidth='32' /><slave name='reg_remu.mem' start='0x30A0' end='0x30C0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x30C0' end='0x30D0' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x30D0' end='0x30D8' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x30D8' end='0x30E0' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x30E0' end='0x30E8' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x30E8' end='0x30F0' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x30F0' end='0x30F8' datawidth='32' /><slave name='pio_pps.mem' start='0x30F8' end='0x3100' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3200' end='0x3208' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='reg_diag_data_buffer_jesd.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0x8000' end='0xC000' datawidth='32' /><slave name='reg_diag_data_buffer_bsn.mem' start='0xC000' end='0x10000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_diag_data_buffer_jesd.mem' start='0x40000' end='0x80000' datawidth='32' /><slave name='ram_diag_data_buffer_bsn.mem' start='0x80000' end='0xC0000' datawidth='32' /><slave name='ram_wg.mem' start='0xC0000' end='0xD0000' datawidth='32' /><slave name='jesd204b.mem' start='0xD0000' end='0xD4000' datawidth='32' /><slave name='ram_st_sst.mem' start='0xD4000' end='0xD6000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0xD6000' end='0xD7000' datawidth='32' /></address-map></value> + <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x200' end='0x300' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x300' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_si.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='reg_dp_shiftram.mem' start='0x3040' end='0x3060' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3060' end='0x3080' datawidth='32' /><slave name='reg_epcs.mem' start='0x3080' end='0x30A0' datawidth='32' /><slave name='reg_remu.mem' start='0x30A0' end='0x30C0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x30C0' end='0x30D0' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x30D0' end='0x30D8' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x30D8' end='0x30E0' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x30E0' end='0x30E8' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x30E8' end='0x30F0' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x30F0' end='0x30F8' datawidth='32' /><slave name='pio_pps.mem' start='0x30F8' end='0x3100' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3200' end='0x3208' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='reg_diag_data_buffer_jesd.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0x8000' end='0xC000' datawidth='32' /><slave name='reg_diag_data_buffer_bsn.mem' start='0xC000' end='0x10000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_diag_data_buffer_jesd.mem' start='0x40000' end='0x80000' datawidth='32' /><slave name='ram_diag_data_buffer_bsn.mem' start='0x80000' end='0xC0000' datawidth='32' /><slave name='ram_wg.mem' start='0xC0000' end='0xD0000' datawidth='32' /><slave name='jesd204b.mem' start='0xD0000' end='0xD4000' datawidth='32' /><slave name='ram_st_sst.mem' start='0xD4000' end='0xD6000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0xD6000' end='0xD7000' datawidth='32' /></address-map></value> </entry> <entry> <key>ADDRESS_WIDTH</key> @@ -8489,17 +8545,710 @@ </interfaces> </boundary> <originalModuleInfo> - <className>altera_avalon_pio</className> - <version>18.0</version> - <displayName>PIO (Parallel I/O) Intel FPGA IP</displayName> + <className>altera_avalon_pio</className> + <version>18.0</version> + <displayName>PIO (Parallel I/O) Intel FPGA IP</displayName> + </originalModuleInfo> + <systemInfoParameterDescriptors> + <descriptors> + <descriptor> + <parameterDefaultValue>0</parameterDefaultValue> + <parameterName>clockRate</parameterName> + <parameterType>java.lang.Long</parameterType> + <systemInfoArgs>clk</systemInfoArgs> + <systemInfotype>CLOCK_RATE</systemInfotype> + </descriptor> + </descriptors> + </systemInfoParameterDescriptors> + <systemInfos> + <connPtSystemInfos> + <entry> + <key>clk</key> + <value> + <connectionPointName>clk</connectionPointName> + <suppliedSystemInfos/> + <consumedSystemInfos> + <entry> + <key>CLOCK_RATE</key> + <value>100000000</value> + </entry> + </consumedSystemInfos> + </value> + </entry> + <entry> + <key>s1</key> + <value> + <connectionPointName>s1</connectionPointName> + <suppliedSystemInfos> + <entry> + <key>ADDRESS_MAP</key> + <value><address-map><slave name='s1' start='0x0' end='0x10' datawidth='32' /></address-map></value> + </entry> + <entry> + <key>ADDRESS_WIDTH</key> + <value>4</value> + </entry> + <entry> + <key>MAX_SLAVE_DATA_WIDTH</key> + <value>32</value> + </entry> + </suppliedSystemInfos> + <consumedSystemInfos/> + </value> + </entry> + </connPtSystemInfos> + </systemInfos> +</componentDefinition>]]></parameter> + <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> + <hdlLibraryName>qsys_lofar2_unb2b_filterbank_pio_wdi</hdlLibraryName> + <fileSets> + <fileSet> + <fileSetName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetFixedName> + <fileSetKind>QUARTUS_SYNTH</fileSetKind> + <fileSetFiles/> + </fileSet> + <fileSet> + <fileSetName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetFixedName> + <fileSetKind>SIM_VERILOG</fileSetKind> + <fileSetFiles/> + </fileSet> + <fileSet> + <fileSetName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetFixedName> + <fileSetKind>SIM_VHDL</fileSetKind> + <fileSetFiles/> + </fileSet> + </fileSets> +</generationInfoDefinition>]]></parameter> + <parameter name="hlsFile" value="" /> + <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_pio_wdi.ip</parameter> + <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> + <assignmentValueMap> + <entry> + <key>embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER</key> + <value>0</value> + </entry> + <entry> + <key>embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER</key> + <value>0</value> + </entry> + <entry> + <key>embeddedsw.CMacro.CAPTURE</key> + <value>0</value> + </entry> + <entry> + <key>embeddedsw.CMacro.DATA_WIDTH</key> + <value>1</value> + </entry> + <entry> + <key>embeddedsw.CMacro.DO_TEST_BENCH_WIRING</key> + <value>0</value> + </entry> + <entry> + <key>embeddedsw.CMacro.DRIVEN_SIM_VALUE</key> + <value>0</value> + </entry> + <entry> + <key>embeddedsw.CMacro.EDGE_TYPE</key> + <value>NONE</value> + </entry> + <entry> + <key>embeddedsw.CMacro.FREQ</key> + <value>100000000</value> + </entry> + <entry> + <key>embeddedsw.CMacro.HAS_IN</key> + <value>0</value> + </entry> + <entry> + <key>embeddedsw.CMacro.HAS_OUT</key> + <value>1</value> + </entry> + <entry> + <key>embeddedsw.CMacro.HAS_TRI</key> + <value>0</value> + </entry> + <entry> + <key>embeddedsw.CMacro.IRQ_TYPE</key> + <value>NONE</value> + </entry> + <entry> + <key>embeddedsw.CMacro.RESET_VALUE</key> + <value>0</value> + </entry> + <entry> + <key>embeddedsw.dts.compatible</key> + <value>altr,pio-1.0</value> + </entry> + <entry> + <key>embeddedsw.dts.group</key> + <value>gpio</value> + </entry> + <entry> + <key>embeddedsw.dts.name</key> + <value>pio</value> + </entry> + <entry> + <key>embeddedsw.dts.params.altr,gpio-bank-width</key> + <value>1</value> + </entry> + <entry> + <key>embeddedsw.dts.params.resetvalue</key> + <value>0</value> + </entry> + <entry> + <key>embeddedsw.dts.vendor</key> + <value>altr</value> + </entry> + </assignmentValueMap> +</assignmentDefinition>]]></parameter> + <parameter name="svInterfaceDefinition" value="" /> + </module> + <module + name="ram_aduh_monitor" + kind="altera_generic_component" + version="1.0" + enabled="1"> + <parameter name="componentDefinition"><![CDATA[<componentDefinition> + <boundary> + <interfaces> + <interface> + <name>address</name> + <type>conduit</type> + <isStart>false</isStart> + <ports> + <port> + <name>coe_address_export</name> + <role>export</role> + <direction>Output</direction> + <width>12</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC_VECTOR</vhdlType> + </port> + </ports> + <assignments> + <assignmentValueMap/> + </assignments> + <parameters> + <parameterValueMap> + <entry> + <key>associatedClock</key> + </entry> + <entry> + <key>associatedReset</key> + </entry> + <entry> + <key>prSafe</key> + <value>false</value> + </entry> + </parameterValueMap> + </parameters> + </interface> + <interface> + <name>clk</name> + <type>conduit</type> + <isStart>false</isStart> + <ports> + <port> + <name>coe_clk_export</name> + <role>export</role> + <direction>Output</direction> + <width>1</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC</vhdlType> + </port> + </ports> + <assignments> + <assignmentValueMap/> + </assignments> + <parameters> + <parameterValueMap> + <entry> + <key>associatedClock</key> + </entry> + <entry> + <key>associatedReset</key> + </entry> + <entry> + <key>prSafe</key> + <value>false</value> + </entry> + </parameterValueMap> + </parameters> + </interface> + <interface> + <name>mem</name> + <type>avalon</type> + <isStart>false</isStart> + <ports> + <port> + <name>avs_mem_address</name> + <role>address</role> + <direction>Input</direction> + <width>12</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC_VECTOR</vhdlType> + </port> + <port> + <name>avs_mem_write</name> + <role>write</role> + <direction>Input</direction> + <width>1</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC</vhdlType> + </port> + <port> + <name>avs_mem_writedata</name> + <role>writedata</role> + <direction>Input</direction> + <width>32</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC_VECTOR</vhdlType> + </port> + <port> + <name>avs_mem_read</name> + <role>read</role> + <direction>Input</direction> + <width>1</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC</vhdlType> + </port> + <port> + <name>avs_mem_readdata</name> + <role>readdata</role> + <direction>Output</direction> + <width>32</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC_VECTOR</vhdlType> + </port> + </ports> + <assignments> + <assignmentValueMap> + <entry> + <key>embeddedsw.configuration.isFlash</key> + <value>0</value> + </entry> + <entry> + <key>embeddedsw.configuration.isMemoryDevice</key> + <value>0</value> + </entry> + <entry> + <key>embeddedsw.configuration.isNonVolatileStorage</key> + <value>0</value> + </entry> + <entry> + <key>embeddedsw.configuration.isPrintableDevice</key> + <value>0</value> + </entry> + </assignmentValueMap> + </assignments> + <parameters> + <parameterValueMap> + <entry> + <key>addressAlignment</key> + <value>DYNAMIC</value> + </entry> + <entry> + <key>addressGroup</key> + <value>0</value> + </entry> + <entry> + <key>addressSpan</key> + <value>16384</value> + </entry> + <entry> + <key>addressUnits</key> + <value>WORDS</value> + </entry> + <entry> + <key>alwaysBurstMaxBurst</key> + <value>false</value> + </entry> + <entry> + <key>associatedClock</key> + <value>system</value> + </entry> + <entry> + <key>associatedReset</key> + <value>system_reset</value> + </entry> + <entry> + <key>bitsPerSymbol</key> + <value>8</value> + </entry> + <entry> + <key>bridgedAddressOffset</key> + <value>0</value> + </entry> + <entry> + <key>bridgesToMaster</key> + </entry> + <entry> + <key>burstOnBurstBoundariesOnly</key> + <value>false</value> + </entry> + <entry> + <key>burstcountUnits</key> + <value>WORDS</value> + </entry> + <entry> + <key>constantBurstBehavior</key> + <value>false</value> + </entry> + <entry> + <key>explicitAddressSpan</key> + <value>0</value> + </entry> + <entry> + <key>holdTime</key> + <value>0</value> + </entry> + <entry> + <key>interleaveBursts</key> + <value>false</value> + </entry> + <entry> + <key>isBigEndian</key> + <value>false</value> + </entry> + <entry> + <key>isFlash</key> + <value>false</value> + </entry> + <entry> + <key>isMemoryDevice</key> + <value>false</value> + </entry> + <entry> + <key>isNonVolatileStorage</key> + <value>false</value> + </entry> + <entry> + <key>linewrapBursts</key> + <value>false</value> + </entry> + <entry> + <key>maximumPendingReadTransactions</key> + <value>0</value> + </entry> + <entry> + <key>maximumPendingWriteTransactions</key> + <value>0</value> + </entry> + <entry> + <key>minimumReadLatency</key> + <value>1</value> + </entry> + <entry> + <key>minimumResponseLatency</key> + <value>1</value> + </entry> + <entry> + <key>minimumUninterruptedRunLength</key> + <value>1</value> + </entry> + <entry> + <key>prSafe</key> + <value>false</value> + </entry> + <entry> + <key>printableDevice</key> + <value>false</value> + </entry> + <entry> + <key>readLatency</key> + <value>1</value> + </entry> + <entry> + <key>readWaitStates</key> + <value>0</value> + </entry> + <entry> + <key>readWaitTime</key> + <value>0</value> + </entry> + <entry> + <key>registerIncomingSignals</key> + <value>false</value> + </entry> + <entry> + <key>registerOutgoingSignals</key> + <value>false</value> + </entry> + <entry> + <key>setupTime</key> + <value>0</value> + </entry> + <entry> + <key>timingUnits</key> + <value>Cycles</value> + </entry> + <entry> + <key>transparentBridge</key> + <value>false</value> + </entry> + <entry> + <key>waitrequestAllowance</key> + <value>0</value> + </entry> + <entry> + <key>wellBehavedWaitrequest</key> + <value>false</value> + </entry> + <entry> + <key>writeLatency</key> + <value>0</value> + </entry> + <entry> + <key>writeWaitStates</key> + <value>0</value> + </entry> + <entry> + <key>writeWaitTime</key> + <value>0</value> + </entry> + </parameterValueMap> + </parameters> + </interface> + <interface> + <name>read</name> + <type>conduit</type> + <isStart>false</isStart> + <ports> + <port> + <name>coe_read_export</name> + <role>export</role> + <direction>Output</direction> + <width>1</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC</vhdlType> + </port> + </ports> + <assignments> + <assignmentValueMap/> + </assignments> + <parameters> + <parameterValueMap> + <entry> + <key>associatedClock</key> + </entry> + <entry> + <key>associatedReset</key> + </entry> + <entry> + <key>prSafe</key> + <value>false</value> + </entry> + </parameterValueMap> + </parameters> + </interface> + <interface> + <name>readdata</name> + <type>conduit</type> + <isStart>false</isStart> + <ports> + <port> + <name>coe_readdata_export</name> + <role>export</role> + <direction>Input</direction> + <width>32</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC_VECTOR</vhdlType> + </port> + </ports> + <assignments> + <assignmentValueMap/> + </assignments> + <parameters> + <parameterValueMap> + <entry> + <key>associatedClock</key> + </entry> + <entry> + <key>associatedReset</key> + </entry> + <entry> + <key>prSafe</key> + <value>false</value> + </entry> + </parameterValueMap> + </parameters> + </interface> + <interface> + <name>reset</name> + <type>conduit</type> + <isStart>false</isStart> + <ports> + <port> + <name>coe_reset_export</name> + <role>export</role> + <direction>Output</direction> + <width>1</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC</vhdlType> + </port> + </ports> + <assignments> + <assignmentValueMap/> + </assignments> + <parameters> + <parameterValueMap> + <entry> + <key>associatedClock</key> + </entry> + <entry> + <key>associatedReset</key> + </entry> + <entry> + <key>prSafe</key> + <value>false</value> + </entry> + </parameterValueMap> + </parameters> + </interface> + <interface> + <name>system</name> + <type>clock</type> + <isStart>false</isStart> + <ports> + <port> + <name>csi_system_clk</name> + <role>clk</role> + <direction>Input</direction> + <width>1</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC</vhdlType> + </port> + </ports> + <assignments> + <assignmentValueMap/> + </assignments> + <parameters> + <parameterValueMap> + <entry> + <key>clockRate</key> + <value>0</value> + </entry> + <entry> + <key>externallyDriven</key> + <value>false</value> + </entry> + <entry> + <key>ptfSchematicName</key> + </entry> + </parameterValueMap> + </parameters> + </interface> + <interface> + <name>system_reset</name> + <type>reset</type> + <isStart>false</isStart> + <ports> + <port> + <name>csi_system_reset</name> + <role>reset</role> + <direction>Input</direction> + <width>1</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC</vhdlType> + </port> + </ports> + <assignments> + <assignmentValueMap/> + </assignments> + <parameters> + <parameterValueMap> + <entry> + <key>associatedClock</key> + <value>system</value> + </entry> + <entry> + <key>synchronousEdges</key> + <value>DEASSERT</value> + </entry> + </parameterValueMap> + </parameters> + </interface> + <interface> + <name>write</name> + <type>conduit</type> + <isStart>false</isStart> + <ports> + <port> + <name>coe_write_export</name> + <role>export</role> + <direction>Output</direction> + <width>1</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC</vhdlType> + </port> + </ports> + <assignments> + <assignmentValueMap/> + </assignments> + <parameters> + <parameterValueMap> + <entry> + <key>associatedClock</key> + </entry> + <entry> + <key>associatedReset</key> + </entry> + <entry> + <key>prSafe</key> + <value>false</value> + </entry> + </parameterValueMap> + </parameters> + </interface> + <interface> + <name>writedata</name> + <type>conduit</type> + <isStart>false</isStart> + <ports> + <port> + <name>coe_writedata_export</name> + <role>export</role> + <direction>Output</direction> + <width>32</width> + <lowerBound>0</lowerBound> + <vhdlType>STD_LOGIC_VECTOR</vhdlType> + </port> + </ports> + <assignments> + <assignmentValueMap/> + </assignments> + <parameters> + <parameterValueMap> + <entry> + <key>associatedClock</key> + </entry> + <entry> + <key>associatedReset</key> + </entry> + <entry> + <key>prSafe</key> + <value>false</value> + </entry> + </parameterValueMap> + </parameters> + </interface> + </interfaces> + </boundary> + <originalModuleInfo> + <className>avs_common_mm</className> + <version>1.0</version> + <displayName>avs_common_mm</displayName> </originalModuleInfo> <systemInfoParameterDescriptors> <descriptors> <descriptor> - <parameterDefaultValue>0</parameterDefaultValue> - <parameterName>clockRate</parameterName> + <parameterDefaultValue>-1</parameterDefaultValue> + <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName> <parameterType>java.lang.Long</parameterType> - <systemInfoArgs>clk</systemInfoArgs> + <systemInfoArgs>system</systemInfoArgs> <systemInfotype>CLOCK_RATE</systemInfotype> </descriptor> </descriptors> @@ -8507,30 +9256,17 @@ <systemInfos> <connPtSystemInfos> <entry> - <key>clk</key> - <value> - <connectionPointName>clk</connectionPointName> - <suppliedSystemInfos/> - <consumedSystemInfos> - <entry> - <key>CLOCK_RATE</key> - <value>100000000</value> - </entry> - </consumedSystemInfos> - </value> - </entry> - <entry> - <key>s1</key> + <key>mem</key> <value> - <connectionPointName>s1</connectionPointName> + <connectionPointName>mem</connectionPointName> <suppliedSystemInfos> <entry> <key>ADDRESS_MAP</key> - <value><address-map><slave name='s1' start='0x0' end='0x10' datawidth='32' /></address-map></value> + <value><address-map><slave name='mem' start='0x0' end='0x4000' datawidth='32' /></address-map></value> </entry> <entry> <key>ADDRESS_WIDTH</key> - <value>4</value> + <value>14</value> </entry> <entry> <key>MAX_SLAVE_DATA_WIDTH</key> @@ -8540,118 +9276,54 @@ <consumedSystemInfos/> </value> </entry> + <entry> + <key>system</key> + <value> + <connectionPointName>system</connectionPointName> + <suppliedSystemInfos/> + <consumedSystemInfos> + <entry> + <key>CLOCK_RATE</key> + <value>100000000</value> + </entry> + </consumedSystemInfos> + </value> + </entry> </connPtSystemInfos> </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_pio_wdi</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_pio_wdi</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">../lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_pio_wdi.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_aduh_monitor.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> - <assignmentValueMap> - <entry> - <key>embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER</key> - <value>0</value> - </entry> - <entry> - <key>embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER</key> - <value>0</value> - </entry> - <entry> - <key>embeddedsw.CMacro.CAPTURE</key> - <value>0</value> - </entry> - <entry> - <key>embeddedsw.CMacro.DATA_WIDTH</key> - <value>1</value> - </entry> - <entry> - <key>embeddedsw.CMacro.DO_TEST_BENCH_WIRING</key> - <value>0</value> - </entry> - <entry> - <key>embeddedsw.CMacro.DRIVEN_SIM_VALUE</key> - <value>0</value> - </entry> - <entry> - <key>embeddedsw.CMacro.EDGE_TYPE</key> - <value>NONE</value> - </entry> - <entry> - <key>embeddedsw.CMacro.FREQ</key> - <value>100000000</value> - </entry> - <entry> - <key>embeddedsw.CMacro.HAS_IN</key> - <value>0</value> - </entry> - <entry> - <key>embeddedsw.CMacro.HAS_OUT</key> - <value>1</value> - </entry> - <entry> - <key>embeddedsw.CMacro.HAS_TRI</key> - <value>0</value> - </entry> - <entry> - <key>embeddedsw.CMacro.IRQ_TYPE</key> - <value>NONE</value> - </entry> - <entry> - <key>embeddedsw.CMacro.RESET_VALUE</key> - <value>0</value> - </entry> - <entry> - <key>embeddedsw.dts.compatible</key> - <value>altr,pio-1.0</value> - </entry> - <entry> - <key>embeddedsw.dts.group</key> - <value>gpio</value> - </entry> - <entry> - <key>embeddedsw.dts.name</key> - <value>pio</value> - </entry> - <entry> - <key>embeddedsw.dts.params.altr,gpio-bank-width</key> - <value>1</value> - </entry> - <entry> - <key>embeddedsw.dts.params.resetvalue</key> - <value>0</value> - </entry> - <entry> - <key>embeddedsw.dts.vendor</key> - <value>altr</value> - </entry> - </assignmentValueMap> + <assignmentValueMap/> </assignmentDefinition>]]></parameter> <parameter name="svInterfaceDefinition" value="" /> </module> <module - name="ram_aduh_monitor" + name="ram_diag_data_buffer_bsn" kind="altera_generic_component" version="1.0" enabled="1"> @@ -8667,7 +9339,7 @@ <name>coe_address_export</name> <role>export</role> <direction>Output</direction> - <width>12</width> + <width>16</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -8731,7 +9403,7 @@ <name>avs_mem_address</name> <role>address</role> <direction>Input</direction> - <width>12</width> + <width>16</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -8800,7 +9472,7 @@ </entry> <entry> <key>addressSpan</key> - <value>16384</value> + <value>262144</value> </entry> <entry> <key>addressUnits</key> @@ -9206,11 +9878,11 @@ <suppliedSystemInfos> <entry> <key>ADDRESS_MAP</key> - <value><address-map><slave name='mem' start='0x0' end='0x4000' datawidth='32' /></address-map></value> + <value><address-map><slave name='mem' start='0x0' end='0x40000' datawidth='32' /></address-map></value> </entry> <entry> <key>ADDRESS_WIDTH</key> - <value>14</value> + <value>18</value> </entry> <entry> <key>MAX_SLAVE_DATA_WIDTH</key> @@ -9237,37 +9909,37 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_aduh_monitor</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_aduh_monitor.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> <parameter name="svInterfaceDefinition" value="" /> </module> <module - name="ram_diag_data_buffer_bsn" + name="ram_diag_data_buffer_jesd" kind="altera_generic_component" version="1.0" enabled="1"> @@ -9853,37 +10525,37 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> <parameter name="svInterfaceDefinition" value="" /> </module> <module - name="ram_diag_data_buffer_jesd" + name="ram_fil_coefs" kind="altera_generic_component" version="1.0" enabled="1"> @@ -9899,7 +10571,7 @@ <name>coe_address_export</name> <role>export</role> <direction>Output</direction> - <width>16</width> + <width>14</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -9963,7 +10635,7 @@ <name>avs_mem_address</name> <role>address</role> <direction>Input</direction> - <width>16</width> + <width>14</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -10032,7 +10704,7 @@ </entry> <entry> <key>addressSpan</key> - <value>262144</value> + <value>65536</value> </entry> <entry> <key>addressUnits</key> @@ -10438,11 +11110,11 @@ <suppliedSystemInfos> <entry> <key>ADDRESS_MAP</key> - <value><address-map><slave name='mem' start='0x0' end='0x40000' datawidth='32' /></address-map></value> + <value><address-map><slave name='mem' start='0x0' end='0x10000' datawidth='32' /></address-map></value> </entry> <entry> <key>ADDRESS_WIDTH</key> - <value>18</value> + <value>16</value> </entry> <entry> <key>MAX_SLAVE_DATA_WIDTH</key> @@ -10469,37 +11141,37 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_fil_coefs.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> <parameter name="svInterfaceDefinition" value="" /> </module> <module - name="ram_fil_coefs" + name="ram_scrap" kind="altera_generic_component" version="1.0" enabled="1"> @@ -10515,7 +11187,7 @@ <name>coe_address_export</name> <role>export</role> <direction>Output</direction> - <width>14</width> + <width>9</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -10579,7 +11251,7 @@ <name>avs_mem_address</name> <role>address</role> <direction>Input</direction> - <width>14</width> + <width>9</width> <lowerBound>0</lowerBound> <vhdlType>STD_LOGIC_VECTOR</vhdlType> </port> @@ -10648,7 +11320,7 @@ </entry> <entry> <key>addressSpan</key> - <value>65536</value> + <value>2048</value> </entry> <entry> <key>addressUnits</key> @@ -11054,11 +11726,11 @@ <suppliedSystemInfos> <entry> <key>ADDRESS_MAP</key> - <value><address-map><slave name='mem' start='0x0' end='0x10000' datawidth='32' /></address-map></value> + <value><address-map><slave name='mem' start='0x0' end='0x800' datawidth='32' /></address-map></value> </entry> <entry> <key>ADDRESS_WIDTH</key> - <value>16</value> + <value>11</value> </entry> <entry> <key>MAX_SLAVE_DATA_WIDTH</key> @@ -11085,30 +11757,30 @@ </systemInfos> </componentDefinition>]]></parameter> <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition> - <hdlLibraryName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</hdlLibraryName> + <hdlLibraryName>qsys_lofar2_unb2b_filterbank_ram_scrap</hdlLibraryName> <fileSets> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_scrap</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_scrap</fileSetFixedName> <fileSetKind>QUARTUS_SYNTH</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_scrap</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_scrap</fileSetFixedName> <fileSetKind>SIM_VERILOG</fileSetKind> <fileSetFiles/> </fileSet> <fileSet> - <fileSetName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</fileSetName> - <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_fil_coefs</fileSetFixedName> + <fileSetName>qsys_lofar2_unb2b_filterbank_ram_scrap</fileSetName> + <fileSetFixedName>qsys_lofar2_unb2b_filterbank_ram_scrap</fileSetFixedName> <fileSetKind>SIM_VHDL</fileSetKind> <fileSetFiles/> </fileSet> </fileSets> </generationInfoDefinition>]]></parameter> <parameter name="hlsFile" value="" /> - <parameter name="logicalView">ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_fil_coefs.ip</parameter> + <parameter name="logicalView">ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_scrap.ip</parameter> <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition> <assignmentValueMap/> </assignmentDefinition>]]></parameter> @@ -26230,6 +26902,13 @@ end="ram_fil_coefs.mem"> <parameter name="baseAddress" value="0x00010000" /> </connection> + <connection + kind="avalon" + version="18.0" + start="cpu_0.data_master" + end="ram_scrap.mem"> + <parameter name="baseAddress" value="0x0800" /> + </connection> <connection kind="avalon" version="18.0" @@ -26410,6 +27089,7 @@ version="18.0" start="clk_0.clk" end="ram_fil_coefs.system" /> + <connection kind="clock" version="18.0" start="clk_0.clk" end="ram_scrap.system" /> <connection kind="interrupt" version="18.0" @@ -26601,6 +27281,11 @@ version="18.0" start="clk_0.clk_reset" end="ram_fil_coefs.system_reset" /> + <connection + kind="reset" + version="18.0" + start="clk_0.clk_reset" + end="ram_scrap.system_reset" /> <connection kind="reset" version="18.0" diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/revisions/lofar2_unb2b_filterbank_full/hdllib.cfg b/applications/lofar2/designs/lofar2_unb2b_filterbank/revisions/lofar2_unb2b_filterbank_full/hdllib.cfg index 6da27b327b..2a737df34f 100644 --- a/applications/lofar2/designs/lofar2_unb2b_filterbank/revisions/lofar2_unb2b_filterbank_full/hdllib.cfg +++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/revisions/lofar2_unb2b_filterbank_full/hdllib.cfg @@ -77,5 +77,10 @@ quartus_ip_files = $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_jesd.ip $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_diag_data_buffer_bsn.ip $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_jesd204b.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_fil_coefs.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_ram_st_sst.ip + $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_filterbank/ip/qsys_lofar2_unb2b_filterbank/qsys_lofar2_unb2b_filterbank_reg_si.ip + + nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2 diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd index dc35d01678..e1457d0b26 100644 --- a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd +++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd @@ -239,11 +239,15 @@ ARCHITECTURE str OF lofar2_unb2b_filterbank IS SIGNAL ram_fil_coefs_mosi : t_mem_mosi; SIGNAL ram_fil_coefs_miso : t_mem_miso; + -- Scrap ram + SIGNAL ram_scrap_mosi : t_mem_mosi; + SIGNAL ram_scrap_miso : t_mem_miso; + -- QSFP leds SIGNAL qsfp_green_led_arr : STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.nof_bus-1 DOWNTO 0); SIGNAL qsfp_red_led_arr : STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp.nof_bus-1 DOWNTO 0); - SIGNAL alt_sosi_arr : t_dp_sosi_arr(c_nof_streams-1 DOWNTO 0); + SIGNAL ait_sosi_arr : t_dp_sosi_arr(c_nof_streams-1 DOWNTO 0); SIGNAL pfb_sosi_arr : t_dp_sosi_arr(c_sdp_P_pfb-1 DOWNTO 0); @@ -347,8 +351,8 @@ BEGIN eth1g_ram_mosi => eth1g_ram_mosi, eth1g_ram_miso => eth1g_ram_miso, - ram_scrap_mosi => c_mem_mosi_rst, - ram_scrap_miso => open, + ram_scrap_mosi => ram_scrap_mosi, + ram_scrap_miso => ram_scrap_miso, -- FPGA pins -- . General @@ -462,8 +466,9 @@ BEGIN ram_fil_coefs_mosi => ram_fil_coefs_mosi, ram_fil_coefs_miso => ram_fil_coefs_miso, reg_si_mosi => reg_si_mosi, - reg_si_miso => reg_si_miso - + reg_si_miso => reg_si_miso, + ram_scrap_mosi => ram_scrap_mosi, + ram_scrap_miso => ram_scrap_miso ); @@ -520,7 +525,7 @@ BEGIN jesd204b_sync_n => JESD204B_SYNC_N, -- Streaming data output - out_sosi_arr => alt_sosi_arr + out_sosi_arr => ait_sosi_arr ); @@ -534,7 +539,7 @@ BEGIN dp_clk => dp_clk, dp_rst => dp_rst, - in_sosi_arr => alt_sosi_arr, + in_sosi_arr => ait_sosi_arr, pfb_sosi_arr => pfb_sosi_arr, mm_rst => mm_rst, diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/mmm_lofar2_unb2b_filterbank.vhd b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/mmm_lofar2_unb2b_filterbank.vhd index a5b3d810a3..a395da6990 100644 --- a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/mmm_lofar2_unb2b_filterbank.vhd +++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/mmm_lofar2_unb2b_filterbank.vhd @@ -152,7 +152,11 @@ ENTITY mmm_lofar2_unb2b_filterbank IS -- Spectral Inversion reg_si_mosi : OUT t_mem_mosi; - reg_si_miso : IN t_mem_miso + reg_si_miso : IN t_mem_miso; + + -- Scrap ram + ram_scrap_mosi : OUT t_mem_mosi; + ram_scrap_miso : IN t_mem_miso ); END mmm_lofar2_unb2b_filterbank; @@ -241,6 +245,9 @@ BEGIN u_mm_file_reg_si : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_SI") PORT MAP(mm_rst, mm_clk, reg_si_mosi, reg_si_miso ); + + u_mm_file_ram_scrap : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "RAM_SCRAP") + PORT MAP(mm_rst, mm_clk, ram_scrap_mosi, ram_scrap_miso ); ---------------------------------------------------------------------------- -- Procedure that polls a sim control file that can be used to e.g. get -- the simulation time in ns @@ -527,7 +534,15 @@ BEGIN reg_si_write_export => reg_si_mosi.wr, reg_si_writedata_export => reg_si_mosi.wrdata(c_word_w-1 DOWNTO 0), reg_si_read_export => reg_si_mosi.rd, - reg_si_readdata_export => reg_si_miso.rddata(c_word_w-1 DOWNTO 0) + reg_si_readdata_export => reg_si_miso.rddata(c_word_w-1 DOWNTO 0), + + ram_scrap_clk_export => OPEN, + ram_scrap_reset_export => OPEN, + ram_scrap_address_export => ram_scrap_mosi.address(9-1 DOWNTO 0), + ram_scrap_write_export => ram_scrap_mosi.wr, + ram_scrap_writedata_export => ram_scrap_mosi.wrdata(c_word_w-1 DOWNTO 0), + ram_scrap_read_export => ram_scrap_mosi.rd, + ram_scrap_readdata_export => ram_scrap_miso.rddata(c_word_w-1 DOWNTO 0) ); END GENERATE; END str; diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd index 5c80ae8108..b221fba548 100644 --- a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd +++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/qsys_lofar2_unb2b_filterbank_pkg.vhd @@ -98,6 +98,13 @@ PACKAGE qsys_lofar2_unb2b_filterbank_pkg IS ram_fil_coefs_reset_export : out std_logic; -- export ram_fil_coefs_write_export : out std_logic; -- export ram_fil_coefs_writedata_export : out std_logic_vector(31 downto 0); -- export + ram_scrap_address_export : out std_logic_vector(8 downto 0); -- export + ram_scrap_clk_export : out std_logic; -- export + ram_scrap_read_export : out std_logic; -- export + ram_scrap_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export + ram_scrap_reset_export : out std_logic; -- export + ram_scrap_write_export : out std_logic; -- export + ram_scrap_writedata_export : out std_logic_vector(31 downto 0); -- export ram_st_sst_address_export : out std_logic_vector(10 downto 0); -- export ram_st_sst_clk_export : out std_logic; -- export ram_st_sst_read_export : out std_logic; -- export diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/tb/vhdl/tb_lofar2_unb2b_filterbank.vhd b/applications/lofar2/designs/lofar2_unb2b_filterbank/tb/vhdl/tb_lofar2_unb2b_filterbank.vhd index f322629c59..2182067cdf 100644 --- a/applications/lofar2/designs/lofar2_unb2b_filterbank/tb/vhdl/tb_lofar2_unb2b_filterbank.vhd +++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/tb/vhdl/tb_lofar2_unb2b_filterbank.vhd @@ -85,9 +85,6 @@ ARCHITECTURE tb OF tb_lofar2_unb2b_filterbank IS CONSTANT c_tb_clk_period : TIME := 100 ps; -- use fast tb_clk to speed up M&C CONSTANT c_cable_delay : TIME := 12 ns; - CONSTANT c_sample_freq : NATURAL := c_unb2b_board_ext_clk_freq_200M/10**6; -- 200 MSps - CONSTANT c_sample_period : TIME := (10**6 / c_sample_freq) * 1 ps; - CONSTANT c_nof_block_per_sync : NATURAL := 16; CONSTANT c_wpfb_sim : t_wpfb := func_wpfb_set_nof_block_per_sync(c_sdp_wpfb_subbands, c_nof_block_per_sync); @@ -95,12 +92,10 @@ ARCHITECTURE tb OF tb_lofar2_unb2b_filterbank IS CONSTANT c_lo_factor : REAL := 1.0 - c_percentage; -- lower boundary CONSTANT c_hi_factor : REAL := 1.0 + c_percentage; -- higher boundary - CONSTANT c_subband_period : TIME := c_sdp_N_fft * c_sample_period; - -- WG CONSTANT c_full_scale_ampl : REAL := REAL(2**(18-1)-1); -- = full scale of WG CONSTANT c_bsn_start_wg : NATURAL := 2; -- start WG at this BSN to instead of some BSN, to avoid mismatches in exact expected data values - CONSTANT c_ampl_sp_0 : NATURAL := 2**(14-1)/2; -- in number of lsb + CONSTANT c_ampl_sp_0 : NATURAL := 2**(c_sdp_W_adc-1)/2; -- in number of lsb CONSTANT c_wg_subband_freq_unit : REAL := c_diag_wg_freq_unit/REAL(c_sdp_N_fft); -- subband freq = Fs/1024 = 200 MSps/1024 = 195312.5 Hz sinus CONSTANT c_wg_freq_offset : REAL := 0.0/11.0; -- in freq_unit CONSTANT c_subband_sp_0 : REAL := 102.0; -- Select subband at index 102 = 102/1024 * 200MHz = 19.921875 MHz @@ -211,7 +206,7 @@ BEGIN u_lofar_unb2b_filterbank : ENTITY work.lofar2_unb2b_filterbank GENERIC MAP ( g_design_name => "lofar2_unb2b_filterbank_full", - g_design_note => "Lofar2 adc full", + g_design_note => "", g_sim => c_sim, g_sim_unb_nr => c_unb_nr, g_sim_node_nr => c_node_nr, @@ -306,8 +301,8 @@ BEGIN mmf_mm_bus_wr(c_mm_file_reg_bsn_scheduler_wg, 1, 0, tb_clk); -- assume v_bsn < 2**31-1 -- Wait for ADUH monitor to have filled with WG data - WAIT FOR c_subband_period*c_sdp_N_taps; - WAIT FOR c_subband_period*2; + WAIT FOR c_sdp_T_sub*c_sdp_N_taps; + WAIT FOR c_sdp_T_sub*2; ---------------------------------------------------------------------------- -- WG data : read ADUH monitor buffer @@ -315,9 +310,9 @@ BEGIN -- Wait for start of sync interval mmf_mm_wait_until_value(c_mm_file_reg_bsn_scheduler_wg, 0, -- read BSN low "UNSIGNED", rd_data, ">=", c_nof_block_per_sync*2, -- this is the wait until condition - c_subband_period, tb_clk); + c_sdp_T_sub, tb_clk); - WAIT FOR c_subband_period; -- ensure that one block of samples has filled the ADUH monitor buffer after the sync + WAIT FOR c_sdp_T_sub; -- ensure that one block of samples has filled the ADUH monitor buffer after the sync -- Read via MM FOR I IN 0 TO c_mon_buffer_nof_words-1 LOOP @@ -331,7 +326,7 @@ BEGIN sp_sample <= sp_samples(I); END LOOP; - WAIT FOR c_subband_period*3; + WAIT FOR c_sdp_T_sub*3; --------------------------------------------------------------------------- -- Read ADUH monitor power sum @@ -339,7 +334,7 @@ BEGIN -- Wait for start of sync interval mmf_mm_wait_until_value(c_mm_file_reg_bsn_scheduler_wg, 0, -- read BSN low "UNSIGNED", rd_data, ">=", c_nof_block_per_sync*3, -- this is the wait until condition - c_subband_period, tb_clk); + c_sdp_T_sub, tb_clk); -- Read ADUH monitor power sum mmf_mm_bus_rd(c_mm_file_reg_aduh_mon, 2, rd_data, tb_clk); -- read low part diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd index 2b5882b9c7..382750aac1 100644 --- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd +++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_pkg.vhd @@ -49,7 +49,9 @@ PACKAGE sdp_pkg is CONSTANT c_sdp_W_fir_coef : NATURAL := 16; CONSTANT c_sdp_W_subband : NATURAL := 18; CONSTANT c_sdp_P_pfb : NATURAL := c_sdp_S_pn/c_sdp_Q_fft; - + CONSTANT c_sdp_f_adc_MHz : NATURAL := 200; + CONSTANT c_sdp_T_adc : TIME := (10**6/c_sdp_f_adc_MHz) * 1 ps; + CONSTANT c_sdp_T_sub : TIME := c_sdp_N_fft * c_sdp_T_adc; -- In SDP c_nof_channels = 2**nof_chan = 1 and wb_factor = 1, -- therefore these parameters are not explicitly used in calculation of derived constants -- GitLab