diff --git a/libraries/base/common/src/vhdl/common_pkg.vhd b/libraries/base/common/src/vhdl/common_pkg.vhd
index 9d4be12f077a5624612486010b5bbfd3e1ee47ff..f26318f9307ab924d5422850505eaa1d75d965f1 100644
--- a/libraries/base/common/src/vhdl/common_pkg.vhd
+++ b/libraries/base/common/src/vhdl/common_pkg.vhd
@@ -366,7 +366,8 @@ PACKAGE common_pkg IS
   
   FUNCTION TO_UREAL(uvec : STD_LOGIC_VECTOR) RETURN REAL;  -- convert unsigned slv of any length to REAL
   FUNCTION TO_SREAL(svec : STD_LOGIC_VECTOR) RETURN REAL;  -- convert signed slv of any length to REAL
-  FUNCTION TO_SREAL(svec : STD_LOGIC_VECTOR; resolution_w : INTEGER) RETURN REAL; -- convert signed fixed point slv of any length, and with fixed point resolution of 2**resolution_w, to REAL
+  FUNCTION TO_UREAL(uvec : STD_LOGIC_VECTOR; resolution_w : INTEGER) RETURN REAL; -- convert unsigned fixed point slv of any length, and with resolution of 2**resolution_w, to REAL
+  FUNCTION TO_SREAL(svec : STD_LOGIC_VECTOR; resolution_w : INTEGER) RETURN REAL; -- convert signed fixed point slv of any length, and with resolution of 2**resolution_w, to REAL
     
 -- The RESIZE for SIGNED in IEEE.NUMERIC_STD extends the sign bit or it keeps the sign bit and LS part. This
   -- behaviour of preserving the sign bit is less suitable for DSP and not necessary in general. A more
@@ -1779,16 +1780,27 @@ PACKAGE BODY common_pkg IS
     END IF;
   END;
 
-  FUNCTION TO_SREAL(svec : STD_LOGIC_VECTOR; resolution_w : INTEGER) RETURN REAL IS
-    VARIABLE v_real : REAL := TO_SREAL(svec);  -- first convert as signed integer
+  FUNCTION TO_UREAL(uvec : STD_LOGIC_VECTOR; resolution_w : INTEGER) RETURN REAL IS
+    -- First convert as unsigned integer:
+    VARIABLE v_real : REAL := TO_UREAL(uvec);
   BEGIN
-    -- The resolution_w is the number of bits that LSbit 0 in svec is after or before the fixed point.
-    -- The real value is then scaled by scaling the integer value by 2**resolution_w:
-    -- . resolution_w = 0 : scale by 2**0 = 1, so no scaling and the value is treated as an integer
-    -- . resolution_w < 0 : scale up
-    -- . resolution_w > 0 : scale down
+    -- Then scale to real (see TO_SREAL)
+    RETURN v_real * 2.0**REAL(resolution_w);
+  END;
+  
+  FUNCTION TO_SREAL(svec : STD_LOGIC_VECTOR; resolution_w : INTEGER) RETURN REAL IS
+    -- First convert as signed integer:
+    VARIABLE v_real : REAL := TO_SREAL(svec);
+  BEGIN
+    -- Then scale to real:
+    -- . The resolution_w is the number of bits that LSbit 0 in svec is after or before the fixed point.
+    -- . The real value is then scaled by scaling the integer value by 2**resolution_w:
+    --   . resolution_w = 0 : scale by 2**0 = 1, so no scaling and the value is treated as an integer
+    --   . resolution_w < 0 : scale up
+    --   . resolution_w > 0 : scale down
     RETURN v_real * 2.0**REAL(resolution_w);
   END;
+    
   
   FUNCTION RESIZE_NUM(u : UNSIGNED; w : NATURAL) RETURN UNSIGNED IS
   BEGIN