From 4841e2867702409411a4dad45c7c2470325cacb2 Mon Sep 17 00:00:00 2001
From: Eric Kooistra <kooistra@astron.nl>
Date: Thu, 6 Jan 2022 14:05:05 +0100
Subject: [PATCH] Add ERROR note to proc_common_stop_simulation in case of
timeout.
---
libraries/base/common/tb/vhdl/tb_common_pkg.vhd | 1 +
1 file changed, 1 insertion(+)
diff --git a/libraries/base/common/tb/vhdl/tb_common_pkg.vhd b/libraries/base/common/tb/vhdl/tb_common_pkg.vhd
index 00aac656e5..505bdf3885 100644
--- a/libraries/base/common/tb/vhdl/tb_common_pkg.vhd
+++ b/libraries/base/common/tb/vhdl/tb_common_pkg.vhd
@@ -527,6 +527,7 @@ PACKAGE BODY tb_common_pkg IS
SIGNAL tb_end : IN STD_LOGIC) IS
BEGIN
WHILE tb_end='0' LOOP
+ ASSERT NOW < c_timeout REPORT "Test bench timeout." SEVERITY ERROR;
ASSERT NOW < c_timeout REPORT "Test bench timeout." SEVERITY FAILURE;
WAIT FOR 1 us;
END LOOP;
--
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