diff --git a/libraries/io/eth/tb/vhdl/tb_eth_tester.vhd b/libraries/io/eth/tb/vhdl/tb_eth_tester.vhd
index 446a40361b88942056a726ce26dcfd97e14b28ef..7a89799b5b3935da46cf30bc9ceaf061ff25aa40 100644
--- a/libraries/io/eth/tb/vhdl/tb_eth_tester.vhd
+++ b/libraries/io/eth/tb/vhdl/tb_eth_tester.vhd
@@ -32,6 +32,7 @@ USE IEEE.std_logic_1164.ALL;
USE IEEE.numeric_std.ALL;
USE common_lib.common_pkg.ALL;
USE common_lib.common_mem_pkg.ALL;
+USE common_lib.common_str_pkg.ALL;
USE common_lib.tb_common_pkg.ALL;
USE common_lib.tb_common_mem_pkg.ALL;
USE common_lib.common_network_layers_pkg.ALL;
@@ -43,7 +44,8 @@ USE work.tb_eth_tester_pkg.ALL;
ENTITY tb_eth_tester IS
GENERIC (
- g_nof_streams : NATURAL := 1;
+ g_tb_str : STRING := "";
+ g_nof_streams : NATURAL := 2;
-- sl: enable
-- sl: enable_sync
@@ -53,24 +55,37 @@ ENTITY tb_eth_tester IS
-- nat: mem_low_adrs
-- nat: mem_high_adrs
-- nat: bsn_init
- g_bg_ctrl_int : t_diag_block_gen_integer := ('1', '1', 50, 20, 100, 0, 30, 0)
+ g_bg_ctrl_first : t_diag_block_gen_integer := ('1', '1', 50, 8, 100, 0, 30, 0); -- for first stream
+ g_bg_ctrl_others : t_diag_block_gen_integer := ('1', '1', 30, 8, 10, 0, 30, 0) -- for other streams
);
END tb_eth_tester;
ARCHITECTURE tb OF tb_eth_tester IS
- CONSTANT mm_clk_period : TIME := 10 ns; -- 100 MHz
- CONSTANT st_clk_period : TIME := 5 ns; -- 200 MHz
+ CONSTANT mm_clk_period : TIME := 10 ns; -- 100 MHz
+ CONSTANT st_clk_period : TIME := 5 ns; -- 200 MHz
- -- Use same bg_ctrl for all streams, this provides sufficient test coverage
- CONSTANT c_bg_ctrl_int_arr : t_diag_block_gen_integer_arr(g_nof_streams-1 DOWNTO 0) := (OTHERS => g_bg_ctrl_int);
+ CONSTANT c_slot_len_first : NATURAL := g_bg_ctrl_first.samples_per_packet + g_bg_ctrl_first.gapsize;
+ CONSTANT c_slot_len_others : NATURAL := g_bg_ctrl_others.samples_per_packet + g_bg_ctrl_others.gapsize;
+
+ CONSTANT c_sync_period_first : NATURAL := c_slot_len_first * g_bg_ctrl_first.blocks_per_sync;
+ CONSTANT c_sync_period_others : NATURAL := c_slot_len_others * g_bg_ctrl_others.blocks_per_sync;
+ CONSTANT c_nof_sync : NATURAL := 3;
+ CONSTANT c_run_time : NATURAL := c_nof_sync * largest(c_sync_period_first, c_sync_period_others);
+ CONSTANT c_nof_sync_first : NATURAL := c_run_time / c_sync_period_first;
+ CONSTANT c_nof_sync_others : NATURAL := c_run_time / c_sync_period_others;
+
+ CONSTANT c_nof_sop_first : NATURAL := g_bg_ctrl_first.blocks_per_sync;
+ CONSTANT c_nof_sop_others : NATURAL := g_bg_ctrl_others.blocks_per_sync;
+ CONSTANT c_nof_valid_first : NATURAL := c_nof_sop_first * ceil_div(g_bg_ctrl_first.samples_per_packet * c_octet_w, c_word_w);
+ CONSTANT c_nof_valid_others : NATURAL := c_nof_sop_others * ceil_div(g_bg_ctrl_others.samples_per_packet * c_octet_w, c_word_w);
-- Use sim default src MAC, IP, UDP port from eth_tester_pkg.vhd and based on c_gn_index
- CONSTANT c_gn_index : NATURAL := 17; -- global node index
- CONSTANT c_gn_eth_src_mac : STD_LOGIC_VECTOR(c_network_eth_mac_addr_w-1 DOWNTO 0) := c_eth_tester_eth_src_mac_47_16 & func_eth_tester_gn_index_to_mac_15_0(c_gn_index);
- CONSTANT c_gn_ip_src_addr : STD_LOGIC_VECTOR(c_network_ip_addr_w-1 DOWNTO 0) := c_eth_tester_ip_src_addr_31_16 & func_eth_tester_gn_index_to_ip_15_0(c_gn_index);
- CONSTANT c_gn_udp_src_port : STD_LOGIC_VECTOR(c_network_udp_port_w-1 DOWNTO 0) := c_eth_tester_udp_src_port_15_8 & TO_UVEC(c_gn_index, 8);
+ CONSTANT c_gn_index : NATURAL := 17; -- global node index
+ CONSTANT c_gn_eth_src_mac : STD_LOGIC_VECTOR(c_network_eth_mac_addr_w-1 DOWNTO 0) := c_eth_tester_eth_src_mac_47_16 & func_eth_tester_gn_index_to_mac_15_0(c_gn_index);
+ CONSTANT c_gn_ip_src_addr : STD_LOGIC_VECTOR(c_network_ip_addr_w-1 DOWNTO 0) := c_eth_tester_ip_src_addr_31_16 & func_eth_tester_gn_index_to_ip_15_0(c_gn_index);
+ CONSTANT c_gn_udp_src_port : STD_LOGIC_VECTOR(c_network_udp_port_w-1 DOWNTO 0) := c_eth_tester_udp_src_port_15_8 & TO_UVEC(c_gn_index, 8);
-- Clocks and reset
SIGNAL mm_rst : STD_LOGIC := '1';
@@ -79,10 +94,15 @@ ARCHITECTURE tb OF tb_eth_tester IS
SIGNAL st_clk : STD_LOGIC := '1';
SIGNAL st_pps : STD_LOGIC := '0';
SIGNAL tb_end : STD_LOGIC := '0';
+ SIGNAL first_end : STD_LOGIC := '0';
+ SIGNAL others_end : STD_LOGIC := '0';
+
+ -- Use same bg_ctrl for all streams, this provides sufficient test coverage
+ SIGNAL bg_ctrl_arr : t_diag_block_gen_integer_arr(g_nof_streams-1 DOWNTO 0);
-- ETH UDP data path interface
SIGNAL tx_udp_sosi_arr : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
- SIGNAL tx_udp_siso_arr : t_dp_siso_arr(g_nof_streams-1 DOWNTO 0) := (OTHERS=> c_dp_siso_rdy);
+ SIGNAL tx_udp_siso_arr : t_dp_siso_arr(g_nof_streams-1 DOWNTO 0) := (OTHERS => c_dp_siso_rdy);
SIGNAL rx_udp_sosi_arr : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
-- MM interface
@@ -101,8 +121,18 @@ ARCHITECTURE tb OF tb_eth_tester IS
SIGNAL reg_strobe_total_count_rx_copi : t_mem_copi := c_mem_copi_rst;
SIGNAL reg_strobe_total_count_rx_cipo : t_mem_cipo;
- SIGNAL tx_count : NATURAL;
- SIGNAL rx_count : NATURAL;
+ -- . reg_strobe_total_count
+ SIGNAL tx_count_arr : t_natural_arr(g_nof_streams-1 DOWNTO 0);
+ SIGNAL rx_count_arr : t_natural_arr(g_nof_streams-1 DOWNTO 0);
+ SIGNAL exp_count_arr : t_natural_arr(g_nof_streams-1 DOWNTO 0);
+
+ -- . reg_bsn_monitor_v2
+ SIGNAL tx_nof_sop_arr : t_natural_arr(g_nof_streams-1 DOWNTO 0);
+ SIGNAL tx_nof_valid_arr : t_natural_arr(g_nof_streams-1 DOWNTO 0);
+ SIGNAL tx_latency_arr : t_natural_arr(g_nof_streams-1 DOWNTO 0);
+ SIGNAL rx_nof_sop_arr : t_natural_arr(g_nof_streams-1 DOWNTO 0);
+ SIGNAL rx_nof_valid_arr : t_natural_arr(g_nof_streams-1 DOWNTO 0);
+ SIGNAL rx_latency_arr : t_natural_arr(g_nof_streams-1 DOWNTO 0);
BEGIN
@@ -111,53 +141,169 @@ BEGIN
mm_rst <= '1', '0' AFTER mm_clk_period*5;
st_rst <= '1', '0' AFTER st_clk_period*5;
- gen_mm : FOR I IN g_nof_streams-1 DOWNTO 0 GENERATE
- p_mm : PROCESS
- VARIABLE v_offset : NATURAL;
- BEGIN
- proc_common_wait_until_low(mm_clk, mm_rst);
- proc_common_wait_some_cycles(mm_clk, 10);
+ -- Using
+ --SIGNAL exp_count_arr : t_natural_arr(g_nof_streams-1 DOWNTO 0);
+ -- (g_nof_streams-1 DOWNTO 1 => c_nof_sync * g_bg_ctrl_others.blocks_per_sync,
+ -- 0 => c_nof_sync * g_bg_ctrl_first.blocks_per_sync);
+ -- yields verror 1074, verror 1048, therefor use p_init instead, and
+ -- therefor use bg_ctrl_arr instead of c_bg_ctrl_arr.
+ p_init : PROCESS
+ BEGIN
+ bg_ctrl_arr <= (OTHERS => g_bg_ctrl_others);
+ bg_ctrl_arr(0) <= g_bg_ctrl_first;
+
+ exp_count_arr <= (OTHERS => c_nof_sync_others * g_bg_ctrl_others.blocks_per_sync);
+ exp_count_arr(0) <= c_nof_sync_first * g_bg_ctrl_first.blocks_per_sync;
+ WAIT;
+ END PROCESS;
- -- Stimuli
+ -- Timing signals to run each BG for c_nof_sync periods
+ p_first_end : PROCESS
+ BEGIN
+ proc_common_wait_until_high(st_clk, st_pps);
+ proc_common_wait_some_cycles(st_clk, c_sync_period_first * c_nof_sync);
+ first_end <= '1';
+ WAIT;
+ END PROCESS;
+
+ p_others_end : PROCESS
+ BEGIN
+ proc_common_wait_until_high(st_clk, st_pps);
+ proc_common_wait_some_cycles(st_clk, c_sync_period_others * c_nof_sync);
+ others_end <= '1';
+ WAIT;
+ END PROCESS;
+
+ -----------------------------------------------------------------------------
+ -- MM control and monitoring
+ -----------------------------------------------------------------------------
+ p_mm : PROCESS
+ VARIABLE v_offset : NATURAL;
+ BEGIN
+ proc_common_wait_until_low(mm_clk, mm_rst);
+ proc_common_wait_some_cycles(mm_clk, 10);
+
+ ---------------------------------------------------------------------------
+ -- Stimuli
+ ---------------------------------------------------------------------------
+ FOR I IN g_nof_streams-1 DOWNTO 0 LOOP
v_offset := I * c_diag_bg_reg_nof_dat;
- proc_mem_mm_bus_wr(v_offset + 1, c_bg_ctrl_int_arr(I).samples_per_packet, mm_clk, reg_bg_ctrl_copi); -- Set bg_ctrl.nof samples per block
- proc_mem_mm_bus_wr(v_offset + 2, c_bg_ctrl_int_arr(I).blocks_per_sync, mm_clk, reg_bg_ctrl_copi); -- Set bg_ctrl.nof blocks per sync
- proc_mem_mm_bus_wr(v_offset + 3, c_bg_ctrl_int_arr(I).gapsize, mm_clk, reg_bg_ctrl_copi); -- Set bg_ctrl.gapsize
- proc_mem_mm_bus_wr(v_offset + 4, c_bg_ctrl_int_arr(I).mem_low_adrs, mm_clk, reg_bg_ctrl_copi); -- Set bg_ctrl.mem low address
- proc_mem_mm_bus_wr(v_offset + 5, c_bg_ctrl_int_arr(I).mem_high_adrs, mm_clk, reg_bg_ctrl_copi); -- Set bg_ctrl.mem high address
- proc_mem_mm_bus_wr(v_offset + 6, c_bg_ctrl_int_arr(I).bsn_init, mm_clk, reg_bg_ctrl_copi); -- Set bg_ctrl.lower part of the initial bsn
- proc_mem_mm_bus_wr(v_offset + 7, 0, mm_clk, reg_bg_ctrl_copi); -- Set bg_ctrl.higher part of the initial bsn
+ -- Prepare the BG
+ proc_mem_mm_bus_wr(v_offset + 1, bg_ctrl_arr(I).samples_per_packet, mm_clk, reg_bg_ctrl_copi);
+ proc_mem_mm_bus_wr(v_offset + 2, bg_ctrl_arr(I).blocks_per_sync, mm_clk, reg_bg_ctrl_copi);
+ proc_mem_mm_bus_wr(v_offset + 3, bg_ctrl_arr(I).gapsize, mm_clk, reg_bg_ctrl_copi);
+ proc_mem_mm_bus_wr(v_offset + 4, bg_ctrl_arr(I).mem_low_adrs, mm_clk, reg_bg_ctrl_copi);
+ proc_mem_mm_bus_wr(v_offset + 5, bg_ctrl_arr(I).mem_high_adrs, mm_clk, reg_bg_ctrl_copi);
+ proc_mem_mm_bus_wr(v_offset + 6, bg_ctrl_arr(I).bsn_init, mm_clk, reg_bg_ctrl_copi); -- low part
+ proc_mem_mm_bus_wr(v_offset + 7, 0, mm_clk, reg_bg_ctrl_copi); -- high part
-- Enable the BG at st_pps pulse.
proc_mem_mm_bus_wr(v_offset + 0, 3, mm_clk, reg_bg_ctrl_copi);
- proc_common_wait_some_cycles(mm_clk, 10);
- -- Issue an st_pps pulse to start the enabled BG
- proc_common_gen_pulse(st_clk, st_pps);
+ END LOOP;
+ proc_common_wait_some_cycles(mm_clk, 10);
+ -- Issue an st_pps pulse to start the enabled BG
+ proc_common_gen_pulse(st_clk, st_pps);
- -- Run test
- proc_common_wait_some_cycles(st_clk, 1000);
+ -- Run test
+ proc_common_wait_some_cycles(st_clk, c_run_time);
- -- Disable the BG
+ -- Disable the BG
+ FOR I IN g_nof_streams-1 DOWNTO 0 LOOP
+ v_offset := I * c_diag_bg_reg_nof_dat;
+ -- Disable the other BG
proc_mem_mm_bus_wr(v_offset + 0, 0, mm_clk, reg_bg_ctrl_copi);
- proc_common_wait_some_cycles(mm_clk, 100);
+ END LOOP;
+ proc_common_wait_some_cycles(mm_clk, 100);
- -- Verification: total nof Tx packets = total nof Rx packets
- -- . read low part, ignore high part (= 0)
+ -------------------------------------------------------------------------
+ -- Verification: Total nof Tx packets = total nof Rx packets
+ -------------------------------------------------------------------------
+ FOR I IN g_nof_streams-1 DOWNTO 0 LOOP
v_offset := I * c_dp_strobe_total_count_reg_adr_span;
+ -- . read low part, ignore high part (= 0)
+ -- . Tx
proc_mem_mm_bus_rd(v_offset + 0, mm_clk, reg_strobe_total_count_tx_cipo, reg_strobe_total_count_tx_copi);
proc_mem_mm_bus_rd_latency(1, mm_clk);
- tx_count <= TO_UINT(reg_strobe_total_count_tx_cipo.rddata(c_word_w-1 DOWNTO 0));
+ tx_count_arr(I) <= TO_UINT(reg_strobe_total_count_tx_cipo.rddata(c_word_w-1 DOWNTO 0));
+ -- . Rx
proc_mem_mm_bus_rd(v_offset + 0, mm_clk, reg_strobe_total_count_rx_cipo, reg_strobe_total_count_rx_copi);
proc_mem_mm_bus_rd_latency(1, mm_clk);
- rx_count <= TO_UINT(reg_strobe_total_count_rx_cipo.rddata(c_word_w-1 DOWNTO 0));
+ rx_count_arr(I) <= TO_UINT(reg_strobe_total_count_rx_cipo.rddata(c_word_w-1 DOWNTO 0));
proc_common_wait_some_cycles(mm_clk, 1);
- ASSERT tx_count = rx_count REPORT "Wrong total block count, Tx count(" & NATURAL'IMAGE(tx_count) & ") /= "
- & NATURAL'IMAGE(rx_count) & " = Rx count" SEVERITY ERROR;
+ ASSERT rx_count_arr(I) = tx_count_arr(I) REPORT g_tb_str & "Wrong total block count("
+ & NATURAL'IMAGE(I) & "), Rx count = "
+ & NATURAL'IMAGE(rx_count_arr(I)) & " /= "
+ & NATURAL'IMAGE(tx_count_arr(I)) & " = Tx count" SEVERITY ERROR;
+ ASSERT rx_count_arr(I) = exp_count_arr(I) REPORT g_tb_str & "Wrong total block count("
+ & NATURAL'IMAGE(I) & "), Rx count = "
+ & NATURAL'IMAGE(rx_count_arr(I)) & " /= "
+ & NATURAL'IMAGE(exp_count_arr(I)) & " = Expected count" SEVERITY ERROR;
+ END LOOP;
+
+ -------------------------------------------------------------------------
+ -- Verification: BSN monitors (yield same values in every sync interval)
+ -------------------------------------------------------------------------
+ FOR I IN g_nof_streams-1 DOWNTO 0 LOOP
+ v_offset := I * c_dp_bsn_monitor_v2_reg_adr_span;
+ -- 3 = nof_sop
+ -- 4 = nof_valid
+ -- 6 = latency
+ -- . Tx
+ proc_mem_mm_bus_rd(v_offset + 3, mm_clk, reg_bsn_monitor_v2_tx_cipo, reg_bsn_monitor_v2_tx_copi);
+ proc_mem_mm_bus_rd_latency(1, mm_clk);
+ tx_nof_sop_arr(I) <= TO_UINT(reg_bsn_monitor_v2_tx_cipo.rddata(c_word_w-1 DOWNTO 0));
+ proc_mem_mm_bus_rd(v_offset + 4, mm_clk, reg_bsn_monitor_v2_tx_cipo, reg_bsn_monitor_v2_tx_copi);
+ proc_mem_mm_bus_rd_latency(1, mm_clk);
+ tx_nof_valid_arr(I) <= TO_UINT(reg_bsn_monitor_v2_tx_cipo.rddata(c_word_w-1 DOWNTO 0));
+ proc_mem_mm_bus_rd(v_offset + 6, mm_clk, reg_bsn_monitor_v2_tx_cipo, reg_bsn_monitor_v2_tx_copi);
+ proc_mem_mm_bus_rd_latency(1, mm_clk);
+ tx_latency_arr(I) <= TO_UINT(reg_bsn_monitor_v2_tx_cipo.rddata(c_word_w-1 DOWNTO 0));
+ -- . Rx
+ proc_mem_mm_bus_rd(v_offset + 3, mm_clk, reg_bsn_monitor_v2_rx_cipo, reg_bsn_monitor_v2_rx_copi);
+ proc_mem_mm_bus_rd_latency(1, mm_clk);
+ rx_nof_sop_arr(I) <= TO_UINT(reg_bsn_monitor_v2_rx_cipo.rddata(c_word_w-1 DOWNTO 0));
+ proc_mem_mm_bus_rd(v_offset + 4, mm_clk, reg_bsn_monitor_v2_rx_cipo, reg_bsn_monitor_v2_rx_copi);
+ proc_mem_mm_bus_rd_latency(1, mm_clk);
+ rx_nof_valid_arr(I) <= TO_UINT(reg_bsn_monitor_v2_rx_cipo.rddata(c_word_w-1 DOWNTO 0));
+ proc_mem_mm_bus_rd(v_offset + 6, mm_clk, reg_bsn_monitor_v2_rx_cipo, reg_bsn_monitor_v2_rx_copi);
+ proc_mem_mm_bus_rd_latency(1, mm_clk);
+ rx_latency_arr(I) <= TO_UINT(reg_bsn_monitor_v2_rx_cipo.rddata(c_word_w-1 DOWNTO 0));
+ proc_common_wait_some_cycles(mm_clk, 1);
+
+ print_str(g_tb_str &
+ "Tx BSN monitor(" & NATURAL'IMAGE(I) & ") :" &
+ ", nof_sop = " & NATURAL'IMAGE(tx_nof_sop_arr(I)) &
+ ", nof_valid = " & NATURAL'IMAGE(tx_nof_valid_arr(I)) &
+ ", latency = " & NATURAL'IMAGE(tx_latency_arr(I)));
+
+ print_str(g_tb_str &
+ "Rx BSN monitor(" & NATURAL'IMAGE(I) & ") :" &
+ ", nof_sop = " & NATURAL'IMAGE(rx_nof_sop_arr(I)) &
+ ", nof_valid = " & NATURAL'IMAGE(rx_nof_valid_arr(I)) &
+ ", latency = " & NATURAL'IMAGE(rx_latency_arr(I)));
+
+ IF I = 0 THEN
+ ASSERT tx_nof_sop_arr(I) = g_bg_ctrl_first.blocks_per_sync REPORT g_tb_str & "Wrong tx nof_sop for stream (" & NATURAL'IMAGE(I) & ")" SEVERITY ERROR;
+ ASSERT rx_nof_sop_arr(I) = g_bg_ctrl_first.blocks_per_sync REPORT g_tb_str & "Wrong rx nof_sop for stream (" & NATURAL'IMAGE(I) & ")" SEVERITY ERROR;
+ ASSERT tx_nof_valid_arr(I) = c_nof_valid_first REPORT g_tb_str & "Wrong tx nof_valid for stream (" & NATURAL'IMAGE(I) & ")" SEVERITY ERROR;
+ ASSERT rx_nof_valid_arr(I) = c_nof_valid_first REPORT g_tb_str & "Wrong rx nof_valid for stream (" & NATURAL'IMAGE(I) & ")" SEVERITY ERROR;
+ ASSERT tx_latency_arr(I) = 0 REPORT g_tb_str & "Wrong tx latency for stream (" & NATURAL'IMAGE(I) & ")" SEVERITY ERROR;
+ ELSE
+ ASSERT tx_nof_sop_arr(I) = g_bg_ctrl_others.blocks_per_sync REPORT g_tb_str & "Wrong tx nof_sop for stream (" & NATURAL'IMAGE(I) & ")" SEVERITY ERROR;
+ ASSERT rx_nof_sop_arr(I) = g_bg_ctrl_others.blocks_per_sync REPORT g_tb_str & "Wrong rx nof_sop for stream (" & NATURAL'IMAGE(I) & ")" SEVERITY ERROR;
+ ASSERT tx_nof_valid_arr(I) = c_nof_valid_others REPORT g_tb_str & "Wrong tx nof_valid for stream (" & NATURAL'IMAGE(I) & ")" SEVERITY ERROR;
+ ASSERT rx_nof_valid_arr(I) = c_nof_valid_others REPORT g_tb_str & "Wrong rx nof_valid for stream (" & NATURAL'IMAGE(I) & ")" SEVERITY ERROR;
+ ASSERT rx_latency_arr(I) = 22 REPORT g_tb_str & "Wrong rx latency for stream (" & NATURAL'IMAGE(I) & ")" SEVERITY ERROR;
+ END IF;
+ END LOOP;
+
- -- End of test
- tb_end <= '1';
- WAIT;
- END PROCESS;
- END GENERATE;
+ -------------------------------------------------------------------------
+ -- End of test
+ -------------------------------------------------------------------------
+ proc_common_wait_some_cycles(mm_clk, 100);
+ tb_end <= '1';
+ WAIT;
+ END PROCESS;
-- Wire Tx to Rx
rx_udp_sosi_arr <= tx_udp_sosi_arr;
@@ -196,10 +342,10 @@ BEGIN
reg_strobe_total_count_tx_copi => reg_strobe_total_count_tx_copi,
reg_strobe_total_count_tx_cipo => reg_strobe_total_count_tx_cipo,
-- . Rx
- reg_bsn_monitor_v2_rx_copi => reg_bsn_monitor_v2_rx_copi,
- reg_bsn_monitor_v2_rx_cipo => reg_bsn_monitor_v2_rx_cipo,
- reg_strobe_total_count_rx_copi => reg_strobe_total_count_rx_copi,
- reg_strobe_total_count_rx_cipo => reg_strobe_total_count_rx_cipo
+ reg_bsn_monitor_v2_rx_copi => reg_bsn_monitor_v2_rx_copi,
+ reg_bsn_monitor_v2_rx_cipo => reg_bsn_monitor_v2_rx_cipo,
+ reg_strobe_total_count_rx_copi => reg_strobe_total_count_rx_copi,
+ reg_strobe_total_count_rx_cipo => reg_strobe_total_count_rx_cipo
);
END tb;
diff --git a/libraries/io/eth/tb/vhdl/tb_tb_eth_tester.vhd b/libraries/io/eth/tb/vhdl/tb_tb_eth_tester.vhd
index 0a737a5abf4eeda9428aa9ae3bf1096555558426..536929bfed124d547d1054b1a07cfe93661911a2 100644
--- a/libraries/io/eth/tb/vhdl/tb_tb_eth_tester.vhd
+++ b/libraries/io/eth/tb/vhdl/tb_tb_eth_tester.vhd
@@ -28,21 +28,38 @@
-- > as 3
-- > run -all
-LIBRARY IEEE;
+LIBRARY IEEE, diag_lib;
USE IEEE.std_logic_1164.ALL;
+USE diag_lib.diag_pkg.ALL;
ENTITY tb_tb_eth_tester IS
END tb_tb_eth_tester;
ARCHITECTURE tb OF tb_tb_eth_tester IS
+ CONSTANT c_bg_ctrl_rst : t_diag_block_gen_integer := func_diag_bg_ctrl_slv_to_integer(c_diag_block_gen_rst);
+ CONSTANT c_bg_ctrl_first : t_diag_block_gen_integer := ('1', '1', 50, 8, 100, 0, 30, 0); -- for first stream
+ CONSTANT c_bg_ctrl_others : t_diag_block_gen_integer := ('1', '1', 30, 8, 10, 0, 30, 0); -- for other streams
+
SIGNAL tb_end : STD_LOGIC := '0'; -- declare tb_end to avoid 'No objects found' error on 'when -label tb_end'
BEGIN
--- g_nof_streams : NATURAL := 1
+-- g_tb_index : STRING := "";
+-- g_nof_streams : NATURAL := 2;
+--
+-- -- sl: enable
+-- -- sl: enable_sync
+-- -- nat: samples_per_packet
+-- -- nat: blocks_per_sync
+-- -- nat: gapsize
+-- -- nat: mem_low_adrs
+-- -- nat: mem_high_adrs
+-- -- nat: bsn_init
+-- g_bg_ctrl_first : t_diag_block_gen_integer := ('1', '1', 50, 8, 100, 0, 30, 0); -- for first stream
+-- g_bg_ctrl_others : t_diag_block_gen_integer := ('1', '1', 30, 8, 10, 0, 30, 0) -- for other streams
- u_one_stream : ENTITY work.tb_eth_tester GENERIC MAP (1);
- u_two_streams : ENTITY work.tb_eth_tester GENERIC MAP (2);
+ u_one_stream : ENTITY work.tb_eth_tester GENERIC MAP ("tb_one: ", 1, c_bg_ctrl_first, c_bg_ctrl_rst);
+ u_multiple_streams : ENTITY work.tb_eth_tester GENERIC MAP ("tb_multiple: ", 3, c_bg_ctrl_first, c_bg_ctrl_others);
END tb;