diff --git a/libraries/io/mac_10g/hdllib.cfg b/libraries/io/mac_10g/hdllib.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..c789aa70f866ffdd38dac0faef137c179b5fa0fb
--- /dev/null
+++ b/libraries/io/mac_10g/hdllib.cfg
@@ -0,0 +1,12 @@
+hdl_lib_name = mac_10g
+hdl_library_clause_name = mac_10g_lib
+hdl_lib_uses = technology tech_mac_10g common dp
+hdl_lib_technology = 
+
+build_dir_sim = $HDL_BUILD_DIR
+build_dir_synth = $HDL_BUILD_DIR
+
+synth_files =
+    mac_10g.vhd
+
+test_bench_files =
diff --git a/libraries/io/mac_10g/mac_10g.vhd b/libraries/io/mac_10g/mac_10g.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..703361391eb4cb2a1cb4709c9fcbd9a95ca332d1
--- /dev/null
+++ b/libraries/io/mac_10g/mac_10g.vhd
@@ -0,0 +1,109 @@
+--------------------------------------------------------------------------------
+--
+-- Copyright (C) 2014
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- JIVE (Joint Institute for VLBI in Europe) <http://www.jive.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- This program is free software: you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation, either version 3 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+-- GNU General Public License for more details.
+--
+-- You should have received a copy of the GNU General Public License
+-- along with this program.  If not, see <http://www.gnu.org/licenses/>.
+--
+--------------------------------------------------------------------------------
+
+
+-- Purpose: MAC for 10 Gigabit Ethernet via XGMII
+-- Description:
+--   See description of tech_mac_10g.
+--
+--   The wrapper is made because it brings the mac_10g at the same hierarchy
+--   level as tr_xaui, which are then used in tr_10GbE. The wrapper also allows
+--   for glue logic that may be needed in future and would fit better here than
+--   in tech_mac_10g.
+--
+-- Remark:
+-- . The CSR of the MAC is renamed mac_mosi/mac_miso at this IO level, to more
+--   easily recognize it as the MM port of the MAC_10G IP.
+
+LIBRARY IEEE, common_lib, dp_lib, technology_lib, tech_mac_10g_lib;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE technology_lib.technology_pkg.ALL;
+USE technology_lib.technology_select_pkg.ALL;
+USE common_lib.common_pkg.ALL;
+USE common_lib.common_mem_pkg.ALL;
+USE common_lib.common_interface_layers_pkg.ALL;
+USE dp_lib.dp_stream_pkg.ALL;
+
+ENTITY mac_10g IS
+  GENERIC (
+    g_technology          : NATURAL := c_tech_select_default;
+    g_pre_header_padding  : BOOLEAN := FALSE
+  );
+  PORT (
+    -- MM
+    mm_clk           : IN  STD_LOGIC;
+    mm_rst           : IN  STD_LOGIC;
+    mac_mosi         : IN  t_mem_mosi;  -- MAC CSR = control status register
+    mac_miso         : OUT t_mem_miso;
+
+    -- ST
+    tx_clk           : IN  STD_LOGIC;   -- 156.25 MHz local reference
+    tx_rst           : IN  STD_LOGIC;
+    tx_snk_in        : IN  t_dp_sosi;   -- 64 bit data
+    tx_snk_out       : OUT t_dp_siso; 
+    
+    rx_clk           : IN  STD_LOGIC;   -- 156.25 MHz from rx phy
+    rx_rst           : IN  STD_LOGIC;
+    rx_src_out       : OUT t_dp_sosi;   -- 64 bit data
+    rx_src_in        : IN  t_dp_siso; 
+    
+    -- XGMII
+    xgmii_tx_data    : OUT STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0);  -- 72 bit
+    xgmii_rx_data    : IN  STD_LOGIC_VECTOR(c_xgmii_w-1 DOWNTO 0)   -- 72 bit
+  );
+END mac_10g;
+
+
+ARCHITECTURE str OF mac_10g IS
+
+BEGIN
+ 
+  u_tech_mac_10g : ENTITY tech_mac_10g_lib.tech_mac_10g
+  GENERIC MAP (
+    g_technology          => g_technology,
+    g_pre_header_padding  => g_pre_header_padding
+  )
+  PORT MAP (
+    -- MM
+    mm_clk           => mm_clk,
+    mm_rst           => mm_rst,
+    csr_mosi         => mac_mosi,
+    csr_miso         => mac_miso,
+
+    -- ST
+    tx_clk           => tx_clk,
+    tx_rst           => tx_rst,
+    tx_snk_in        => tx_snk_in,
+    tx_snk_out       => tx_snk_out,
+    
+    rx_clk           => rx_clk,
+    rx_rst           => rx_rst,
+    rx_src_out       => rx_src_out,
+    rx_src_in        => rx_src_in,
+    
+    -- XGMII
+    xgmii_tx_data    => xgmii_tx_data,
+    xgmii_rx_data    => xgmii_rx_data
+  );
+  
+END str;
+