diff --git a/boards/uniboard2/designs/unb2_test/quartus/qsys_unb2_test.qsys b/boards/uniboard2/designs/unb2_test/quartus/qsys_unb2_test.qsys
index 52996799caa8294a2c24069d4a5945cf67148b7a..3f0aba054fec17b43482f309e580cb18ed6a387c 100644
--- a/boards/uniboard2/designs/unb2_test/quartus/qsys_unb2_test.qsys
+++ b/boards/uniboard2/designs/unb2_test/quartus/qsys_unb2_test.qsys
@@ -29,7 +29,7 @@
{
datum baseAddress
{
- value = "32768";
+ value = "57344";
type = "String";
}
}
@@ -37,7 +37,7 @@
{
datum baseAddress
{
- value = "704";
+ value = "832";
type = "String";
}
}
@@ -45,7 +45,7 @@
{
datum baseAddress
{
- value = "24576";
+ value = "49152";
type = "String";
}
}
@@ -61,7 +61,7 @@
{
datum baseAddress
{
- value = "28672";
+ value = "53248";
type = "String";
}
}
@@ -69,7 +69,7 @@
{
datum baseAddress
{
- value = "640";
+ value = "768";
type = "String";
}
}
@@ -117,7 +117,7 @@
{
datum baseAddress
{
- value = "1240";
+ value = "1304";
type = "String";
}
}
@@ -162,7 +162,7 @@
{
datum baseAddress
{
- value = "1232";
+ value = "1296";
type = "String";
}
}
@@ -194,7 +194,7 @@
{
datum baseAddress
{
- value = "1152";
+ value = "1216";
type = "String";
}
}
@@ -234,7 +234,7 @@
{
datum baseAddress
{
- value = "36864";
+ value = "32768";
type = "String";
}
}
@@ -266,7 +266,7 @@
{
datum baseAddress
{
- value = "5767168";
+ value = "40960";
type = "String";
}
}
@@ -282,7 +282,7 @@
{
datum baseAddress
{
- value = "65536";
+ value = "24576";
type = "String";
}
}
@@ -314,7 +314,7 @@
{
datum baseAddress
{
- value = "832";
+ value = "640";
type = "String";
}
}
@@ -330,7 +330,7 @@
{
datum baseAddress
{
- value = "992";
+ value = "1056";
type = "String";
}
}
@@ -346,7 +346,7 @@
{
datum baseAddress
{
- value = "1024";
+ value = "1088";
type = "String";
}
}
@@ -426,7 +426,7 @@
{
datum baseAddress
{
- value = "960";
+ value = "1024";
type = "String";
}
}
@@ -442,7 +442,7 @@
{
datum baseAddress
{
- value = "928";
+ value = "992";
type = "String";
}
}
@@ -458,7 +458,7 @@
{
datum baseAddress
{
- value = "768";
+ value = "896";
type = "String";
}
}
@@ -474,7 +474,7 @@
{
datum baseAddress
{
- value = "1184";
+ value = "1248";
type = "String";
}
}
@@ -490,7 +490,7 @@
{
datum baseAddress
{
- value = "1168";
+ value = "1232";
type = "String";
}
}
@@ -506,7 +506,7 @@
{
datum baseAddress
{
- value = "1224";
+ value = "1288";
type = "String";
}
}
@@ -522,7 +522,7 @@
{
datum baseAddress
{
- value = "1216";
+ value = "1280";
type = "String";
}
}
@@ -538,7 +538,7 @@
{
datum baseAddress
{
- value = "1056";
+ value = "1120";
type = "String";
}
}
@@ -570,7 +570,7 @@
{
datum baseAddress
{
- value = "1208";
+ value = "1272";
type = "String";
}
}
@@ -586,7 +586,7 @@
{
datum baseAddress
{
- value = "1200";
+ value = "1264";
type = "String";
}
}
@@ -602,7 +602,7 @@
{
datum baseAddress
{
- value = "1088";
+ value = "1152";
type = "String";
}
}
@@ -666,7 +666,7 @@
{
datum baseAddress
{
- value = "1120";
+ value = "1184";
type = "String";
}
}
@@ -724,7 +724,7 @@
{
datum baseAddress
{
- value = "896";
+ value = "960";
type = "String";
}
}
@@ -2120,7 +2120,7 @@
<parameter name="dataAddrWidth" value="23" />
<parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
<parameter name="dataMasterHighPerformanceMapParam" value="" />
- <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_rx_seq_10gbe.mem' start='0x80' end='0x100' /><slave name='reg_diag_data_buffer_10gbe.mem' start='0x100' end='0x180' /><slave name='reg_diag_data_buffer_ddr.mem' start='0x180' end='0x200' /><slave name='reg_diag_data_buffer_1gbe.mem' start='0x200' end='0x280' /><slave name='avs_eth_1.mms_reg' start='0x280' end='0x2C0' /><slave name='avs_eth_0.mms_reg' start='0x2C0' end='0x300' /><slave name='reg_diag_tx_seq_10gbe.mem' start='0x300' end='0x340' /><slave name='reg_bsn_monitor_1GbE.mem' start='0x340' end='0x380' /><slave name='timer_0.s1' start='0x380' end='0x3A0' /><slave name='reg_diag_rx_seq_ddr.mem' start='0x3A0' end='0x3C0' /><slave name='reg_diag_rx_seq_1gbe.mem' start='0x3C0' end='0x3E0' /><slave name='reg_diag_bg_10gbe.mem' start='0x3E0' end='0x400' /><slave name='reg_diag_bg_1gbe.mem' start='0x400' end='0x420' /><slave name='reg_epcs.mem' start='0x420' end='0x440' /><slave name='reg_remu.mem' start='0x440' end='0x460' /><slave name='reg_unb_sens.mem' start='0x460' end='0x480' /><slave name='pio_wdi.s1' start='0x480' end='0x490' /><slave name='reg_diag_tx_seq_ddr.mem' start='0x490' end='0x4A0' /><slave name='reg_diag_tx_seq_1gbe.mem' start='0x4A0' end='0x4B0' /><slave name='reg_mmdp_data.mem' start='0x4B0' end='0x4B8' /><slave name='reg_mmdp_ctrl.mem' start='0x4B8' end='0x4C0' /><slave name='reg_dpmm_data.mem' start='0x4C0' end='0x4C8' /><slave name='reg_dpmm_ctrl.mem' start='0x4C8' end='0x4D0' /><slave name='pio_pps.mem' start='0x4D0' end='0x4D8' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x4D8' end='0x4E0' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_1.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' /><slave name='reg_bsn_monitor_10GbE.mem' start='0x4000' end='0x6000' /><slave name='avs_eth_0.mms_tse' start='0x6000' end='0x7000' /><slave name='avs_eth_1.mms_ram' start='0x7000' end='0x8000' /><slave name='avs_eth_0.mms_ram' start='0x8000' end='0x9000' /><slave name='ram_diag_bg_1gbe.mem' start='0x9000' end='0xA000' /><slave name='ram_diag_data_buffer_ddr.mem' start='0x10000' end='0x20000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='reg_io_ddr.mem' start='0x40000' end='0x80000' /><slave name='ram_diag_bg_10gbe.mem' start='0x80000' end='0x100000' /><slave name='reg_tr_10GbE_back1.mem' start='0x100000' end='0x200000' /><slave name='reg_tr_10GbE_qsfp_ring.mem' start='0x200000' end='0x400000' /><slave name='reg_tr_10GbE_back0.mem' start='0x400000' end='0x500000' /><slave name='ram_diag_data_buffer_10gbe.mem' start='0x500000' end='0x580000' /><slave name='ram_diag_data_buffer_1gbe.mem' start='0x580000' end='0x590000' /></address-map>]]></parameter>
+ <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' /><slave name='reg_diag_rx_seq_10gbe.mem' start='0x80' end='0x100' /><slave name='reg_diag_data_buffer_10gbe.mem' start='0x100' end='0x180' /><slave name='reg_diag_data_buffer_ddr.mem' start='0x180' end='0x200' /><slave name='reg_diag_data_buffer_1gbe.mem' start='0x200' end='0x280' /><slave name='reg_bsn_monitor_1GbE.mem' start='0x280' end='0x300' /><slave name='avs_eth_1.mms_reg' start='0x300' end='0x340' /><slave name='avs_eth_0.mms_reg' start='0x340' end='0x380' /><slave name='reg_diag_tx_seq_10gbe.mem' start='0x380' end='0x3C0' /><slave name='timer_0.s1' start='0x3C0' end='0x3E0' /><slave name='reg_diag_rx_seq_ddr.mem' start='0x3E0' end='0x400' /><slave name='reg_diag_rx_seq_1gbe.mem' start='0x400' end='0x420' /><slave name='reg_diag_bg_10gbe.mem' start='0x420' end='0x440' /><slave name='reg_diag_bg_1gbe.mem' start='0x440' end='0x460' /><slave name='reg_epcs.mem' start='0x460' end='0x480' /><slave name='reg_remu.mem' start='0x480' end='0x4A0' /><slave name='reg_unb_sens.mem' start='0x4A0' end='0x4C0' /><slave name='pio_wdi.s1' start='0x4C0' end='0x4D0' /><slave name='reg_diag_tx_seq_ddr.mem' start='0x4D0' end='0x4E0' /><slave name='reg_diag_tx_seq_1gbe.mem' start='0x4E0' end='0x4F0' /><slave name='reg_mmdp_data.mem' start='0x4F0' end='0x4F8' /><slave name='reg_mmdp_ctrl.mem' start='0x4F8' end='0x500' /><slave name='reg_dpmm_data.mem' start='0x500' end='0x508' /><slave name='reg_dpmm_ctrl.mem' start='0x508' end='0x510' /><slave name='pio_pps.mem' start='0x510' end='0x518' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x518' end='0x520' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' /><slave name='avs_eth_1.mms_tse' start='0x2000' end='0x3000' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' /><slave name='reg_bsn_monitor_10GbE.mem' start='0x4000' end='0x6000' /><slave name='ram_diag_data_buffer_ddr.mem' start='0x6000' end='0x8000' /><slave name='ram_diag_bg_1gbe.mem' start='0x8000' end='0xA000' /><slave name='ram_diag_data_buffer_1gbe.mem' start='0xA000' end='0xC000' /><slave name='avs_eth_0.mms_tse' start='0xC000' end='0xD000' /><slave name='avs_eth_1.mms_ram' start='0xD000' end='0xE000' /><slave name='avs_eth_0.mms_ram' start='0xE000' end='0xF000' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' /><slave name='reg_io_ddr.mem' start='0x40000' end='0x80000' /><slave name='ram_diag_bg_10gbe.mem' start='0x80000' end='0x100000' /><slave name='reg_tr_10GbE_back1.mem' start='0x100000' end='0x200000' /><slave name='reg_tr_10GbE_qsfp_ring.mem' start='0x200000' end='0x400000' /><slave name='reg_tr_10GbE_back0.mem' start='0x400000' end='0x500000' /><slave name='ram_diag_data_buffer_10gbe.mem' start='0x500000' end='0x580000' /></address-map>]]></parameter>
<parameter name="data_master_high_performance_paddr_base" value="0" />
<parameter name="data_master_high_performance_paddr_size" value="0" />
<parameter name="data_master_paddr_base" value="0" />
@@ -2363,7 +2363,7 @@
version="1.0"
enabled="1">
<parameter name="AUTO_SYSTEM_CLOCK_RATE" value="125000000" />
- <parameter name="g_adr_w" value="10" />
+ <parameter name="g_adr_w" value="11" />
<parameter name="g_dat_w" value="32" />
</module>
<module
@@ -2381,7 +2381,7 @@
version="1.0"
enabled="1">
<parameter name="AUTO_SYSTEM_CLOCK_RATE" value="125000000" />
- <parameter name="g_adr_w" value="14" />
+ <parameter name="g_adr_w" value="11" />
<parameter name="g_dat_w" value="32" />
</module>
<module
@@ -2390,7 +2390,7 @@
version="1.0"
enabled="1">
<parameter name="AUTO_SYSTEM_CLOCK_RATE" value="125000000" />
- <parameter name="g_adr_w" value="14" />
+ <parameter name="g_adr_w" value="11" />
<parameter name="g_dat_w" value="32" />
</module>
<module
@@ -2408,7 +2408,7 @@
version="1.0"
enabled="1">
<parameter name="AUTO_SYSTEM_CLOCK_RATE" value="125000000" />
- <parameter name="g_adr_w" value="4" />
+ <parameter name="g_adr_w" value="5" />
<parameter name="g_dat_w" value="32" />
</module>
<module
@@ -2605,7 +2605,7 @@
start="cpu_0.data_master"
end="jtag_uart_0.avalon_jtag_slave">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x04d8" />
+ <parameter name="baseAddress" value="0x0518" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2623,7 +2623,7 @@
start="cpu_0.data_master"
end="reg_unb_sens.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0460" />
+ <parameter name="baseAddress" value="0x04a0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2650,7 +2650,7 @@
start="cpu_0.data_master"
end="pio_pps.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x04d0" />
+ <parameter name="baseAddress" value="0x0510" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2668,7 +2668,7 @@
start="cpu_0.data_master"
end="reg_remu.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0440" />
+ <parameter name="baseAddress" value="0x0480" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2677,7 +2677,7 @@
start="cpu_0.data_master"
end="reg_epcs.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0420" />
+ <parameter name="baseAddress" value="0x0460" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2686,7 +2686,7 @@
start="cpu_0.data_master"
end="reg_dpmm_ctrl.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x04c8" />
+ <parameter name="baseAddress" value="0x0508" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2695,7 +2695,7 @@
start="cpu_0.data_master"
end="reg_dpmm_data.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x04c0" />
+ <parameter name="baseAddress" value="0x0500" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2704,7 +2704,7 @@
start="cpu_0.data_master"
end="reg_mmdp_ctrl.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x04b8" />
+ <parameter name="baseAddress" value="0x04f8" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2713,7 +2713,7 @@
start="cpu_0.data_master"
end="reg_mmdp_data.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x04b0" />
+ <parameter name="baseAddress" value="0x04f0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2731,7 +2731,7 @@
start="cpu_0.data_master"
end="reg_bsn_monitor_1GbE.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0340" />
+ <parameter name="baseAddress" value="0x0280" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2749,7 +2749,7 @@
start="cpu_0.data_master"
end="ram_diag_data_buffer_1gbe.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00580000" />
+ <parameter name="baseAddress" value="0xa000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2758,7 +2758,7 @@
start="cpu_0.data_master"
end="reg_diag_bg_1gbe.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0400" />
+ <parameter name="baseAddress" value="0x0440" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2767,7 +2767,7 @@
start="cpu_0.data_master"
end="ram_diag_bg_1gbe.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x9000" />
+ <parameter name="baseAddress" value="0x8000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2803,7 +2803,7 @@
start="cpu_0.data_master"
end="ram_diag_data_buffer_ddr.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00010000" />
+ <parameter name="baseAddress" value="0x6000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2848,7 +2848,7 @@
start="cpu_0.data_master"
end="reg_diag_bg_10gbe.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x03e0" />
+ <parameter name="baseAddress" value="0x0420" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2866,7 +2866,7 @@
start="cpu_0.data_master"
end="reg_diag_tx_seq_1gbe.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x04a0" />
+ <parameter name="baseAddress" value="0x04e0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2875,7 +2875,7 @@
start="cpu_0.data_master"
end="reg_diag_rx_seq_1gbe.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x03c0" />
+ <parameter name="baseAddress" value="0x0400" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2884,7 +2884,7 @@
start="cpu_0.data_master"
end="reg_diag_tx_seq_10gbe.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0300" />
+ <parameter name="baseAddress" value="0x0380" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2902,7 +2902,7 @@
start="cpu_0.data_master"
end="reg_diag_tx_seq_ddr.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0490" />
+ <parameter name="baseAddress" value="0x04d0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2911,7 +2911,7 @@
start="cpu_0.data_master"
end="reg_diag_rx_seq_ddr.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x03a0" />
+ <parameter name="baseAddress" value="0x03e0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2920,7 +2920,7 @@
start="cpu_0.data_master"
end="avs_eth_0.mms_ram">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x8000" />
+ <parameter name="baseAddress" value="0xe000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2929,7 +2929,7 @@
start="cpu_0.data_master"
end="avs_eth_1.mms_ram">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x7000" />
+ <parameter name="baseAddress" value="0xd000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2938,7 +2938,7 @@
start="cpu_0.data_master"
end="avs_eth_0.mms_reg">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x02c0" />
+ <parameter name="baseAddress" value="0x0340" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2947,7 +2947,7 @@
start="cpu_0.data_master"
end="avs_eth_1.mms_reg">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0280" />
+ <parameter name="baseAddress" value="0x0300" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2956,7 +2956,7 @@
start="cpu_0.data_master"
end="avs_eth_0.mms_tse">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x6000" />
+ <parameter name="baseAddress" value="0xc000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2983,7 +2983,7 @@
start="cpu_0.data_master"
end="pio_wdi.s1">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0480" />
+ <parameter name="baseAddress" value="0x04c0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
@@ -2992,7 +2992,7 @@
start="cpu_0.data_master"
end="timer_0.s1">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0380" />
+ <parameter name="baseAddress" value="0x03c0" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd
index b7c27b666796426a7f1d317fa19f9972f0a2e40a..7d97ac917b4cbd2b1d0fffe8d69f394ddc27d9a2 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/mmm_unb2_test.vhd
@@ -200,11 +200,13 @@ ARCHITECTURE str OF mmm_unb2_test IS
CONSTANT g_nof_streams_10GbE : NATURAL := g_nof_streams_qsfp + g_nof_streams_ring + g_nof_streams_back0 + g_nof_streams_back1;
-- Block generator
+ -- check with python: from common import *
+ -- ceil_log2(48 * 2**ceil_log2(900))
CONSTANT c_ram_diag_bg_1GbE_addr_w : NATURAL := ceil_log2(g_nof_streams_1GbE * pow2(ceil_log2(g_bg_block_size)));
CONSTANT c_ram_diag_bg_10GbE_addr_w : NATURAL := ceil_log2(g_nof_streams_10GbE * pow2(ceil_log2(g_bg_block_size)));
CONSTANT c_ram_diag_databuffer_10GbE_addr_w : NATURAL := ceil_log2(g_nof_streams_10GbE * pow2(ceil_log2(g_bg_block_size)));
CONSTANT c_ram_diag_databuffer_1GbE_addr_w : NATURAL := ceil_log2(g_nof_streams_1GbE * pow2(ceil_log2(g_bg_block_size)));
- CONSTANT c_ram_diag_databuffer_ddr_addr_w : NATURAL := ceil_log2(1 * pow2(ceil_log2(g_bg_block_size)));
+ CONSTANT c_ram_diag_databuffer_ddr_addr_w : NATURAL := ceil_log2(2 * pow2(ceil_log2(g_bg_block_size)));
-- dp_offload
-- CONSTANT c_reg_dp_offload_tx_adr_w : NATURAL := 1; -- Dev note: add to c_unb2_board_peripherals_mm_reg_default
diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd
index 7e4e34e954d1d01f037410138d7d8ca0eabf96be..94c9efe9430b1a26275502f9e1157c072068eb90 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/qsys_unb2_test_pkg.vhd
@@ -27,8 +27,7 @@ PACKAGE qsys_unb2_test_pkg IS
-----------------------------------------------------------------------------
-- this component declaration is copy-pasted from Quartus v15 QSYS builder
-----------------------------------------------------------------------------
-
- component qsys_unb2_test is
+ component qsys_unb2_test is
port (
avs_eth_0_clk_export : out std_logic; -- export
avs_eth_0_irq_export : in std_logic := '0'; -- export
@@ -91,7 +90,7 @@ PACKAGE qsys_unb2_test_pkg IS
ram_diag_bg_10gbe_reset_export : out std_logic; -- export
ram_diag_bg_10gbe_write_export : out std_logic; -- export
ram_diag_bg_10gbe_writedata_export : out std_logic_vector(31 downto 0); -- export
- ram_diag_bg_1gbe_address_export : out std_logic_vector(9 downto 0); -- export
+ ram_diag_bg_1gbe_address_export : out std_logic_vector(10 downto 0); -- export
ram_diag_bg_1gbe_clk_export : out std_logic; -- export
ram_diag_bg_1gbe_read_export : out std_logic; -- export
ram_diag_bg_1gbe_readdata_export : in std_logic_vector(31 downto 0) := (others => '0'); -- export
@@ -105,14 +104,14 @@ PACKAGE qsys_unb2_test_pkg IS
ram_diag_data_buffer_10gbe_reset_export : out std_logic; -- export
ram_diag_data_buffer_10gbe_write_export : out std_logic; -- export
ram_diag_data_buffer_10gbe_writedata_export : out std_logic_vector(31 downto 0); -- export
- ram_diag_data_buffer_1gbe_address_export : out std_logic_vector(13 downto 0); -- export
+ ram_diag_data_buffer_1gbe_address_export : out std_logic_vector(10 downto 0); -- export
ram_diag_data_buffer_1gbe_clk_export : out std_logic; -- export
ram_diag_data_buffer_1gbe_read_export : out std_logic; -- export
ram_diag_data_buffer_1gbe_readdata_export : in std_logic_vector(31 downto 0) := (others => '0'); -- export
ram_diag_data_buffer_1gbe_reset_export : out std_logic; -- export
ram_diag_data_buffer_1gbe_write_export : out std_logic; -- export
ram_diag_data_buffer_1gbe_writedata_export : out std_logic_vector(31 downto 0); -- export
- ram_diag_data_buffer_ddr_address_export : out std_logic_vector(13 downto 0); -- export
+ ram_diag_data_buffer_ddr_address_export : out std_logic_vector(10 downto 0); -- export
ram_diag_data_buffer_ddr_clk_export : out std_logic; -- export
ram_diag_data_buffer_ddr_read_export : out std_logic; -- export
ram_diag_data_buffer_ddr_readdata_export : in std_logic_vector(31 downto 0) := (others => '0'); -- export
@@ -126,7 +125,7 @@ PACKAGE qsys_unb2_test_pkg IS
reg_bsn_monitor_10gbe_reset_export : out std_logic; -- export
reg_bsn_monitor_10gbe_write_export : out std_logic; -- export
reg_bsn_monitor_10gbe_writedata_export : out std_logic_vector(31 downto 0); -- export
- reg_bsn_monitor_1gbe_address_export : out std_logic_vector(3 downto 0); -- export
+ reg_bsn_monitor_1gbe_address_export : out std_logic_vector(4 downto 0); -- export
reg_bsn_monitor_1gbe_clk_export : out std_logic; -- export
reg_bsn_monitor_1gbe_read_export : out std_logic; -- export
reg_bsn_monitor_1gbe_readdata_export : in std_logic_vector(31 downto 0) := (others => '0'); -- export
@@ -307,7 +306,7 @@ PACKAGE qsys_unb2_test_pkg IS
rom_system_info_writedata_export : out std_logic_vector(31 downto 0) -- export
);
end component qsys_unb2_test;
-
-
+
+
END qsys_unb2_test_pkg;