From 42469e0d6f9424ddcb54c3ac2a63ba7eebb034cf Mon Sep 17 00:00:00 2001 From: Jan Oudman <oudman@astron.nl> Date: Thu, 11 Jun 2020 15:44:24 +0200 Subject: [PATCH] Added the files in continued development from previous STAT-314 into L2SDP-88 branch --- libraries/dsp/st/src/vhdl/mms_st_histogram.vhd | 2 +- libraries/dsp/st/src/vhdl/st_histogram.vhd | 2 +- libraries/dsp/st/src/vhdl/st_histogram_8_april.vhd | 1 + libraries/dsp/st/src/vhdl/st_histogram_reg.vhd | 2 +- libraries/dsp/st/tb/vhdl/tb_mms_st_histogram.vhd | 2 +- libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd | 2 +- 6 files changed, 6 insertions(+), 5 deletions(-) diff --git a/libraries/dsp/st/src/vhdl/mms_st_histogram.vhd b/libraries/dsp/st/src/vhdl/mms_st_histogram.vhd index 372f518709..8472efc407 100644 --- a/libraries/dsp/st/src/vhdl/mms_st_histogram.vhd +++ b/libraries/dsp/st/src/vhdl/mms_st_histogram.vhd @@ -26,7 +26,7 @@ -- mms_st_histogram couples the st_histogram component which works entirely -- in the dp clock domain through st_histogram_reg that handles the cross -- domain conversion to the MM bus. --- +-- -- -- -------------------------------------- -- | mms_st_histogram | diff --git a/libraries/dsp/st/src/vhdl/st_histogram.vhd b/libraries/dsp/st/src/vhdl/st_histogram.vhd index 4177fdd6c4..49f9da8e02 100644 --- a/libraries/dsp/st/src/vhdl/st_histogram.vhd +++ b/libraries/dsp/st/src/vhdl/st_histogram.vhd @@ -67,7 +67,7 @@ -- read/write limitation and writing takes priority in this case -- . When a sync signal appears the RAM has to be swapped 2 cycles later so -- the first 2 cycles may not be read from the old RAM block --- +-- ------------------------------------------------------------------------------- LIBRARY IEEE, common_lib, mm_lib, technology_lib, dp_lib; diff --git a/libraries/dsp/st/src/vhdl/st_histogram_8_april.vhd b/libraries/dsp/st/src/vhdl/st_histogram_8_april.vhd index 965564ea25..c3ff7ed494 100644 --- a/libraries/dsp/st/src/vhdl/st_histogram_8_april.vhd +++ b/libraries/dsp/st/src/vhdl/st_histogram_8_april.vhd @@ -101,6 +101,7 @@ BEGIN -- . out : bin_reader_mosi (latency: 0) -- . out : bin_reader_mosi_pp (latency: 2) -- - out : rd_cnt_allowed_pp (latency: 2) + -- . out : dp_pipeline_src_out_pp (latency: 2) ----------------------------------------------------------------------------- bin_reader_mosi.rd <= snk_in.valid; -- when 1, count allowed bin_reader_mosi.address(c_adr_w-1 DOWNTO 0) <= snk_in.data(g_in_data_w-1 DOWNTO c_adr_low); diff --git a/libraries/dsp/st/src/vhdl/st_histogram_reg.vhd b/libraries/dsp/st/src/vhdl/st_histogram_reg.vhd index 98424485a4..94b5895787 100644 --- a/libraries/dsp/st/src/vhdl/st_histogram_reg.vhd +++ b/libraries/dsp/st/src/vhdl/st_histogram_reg.vhd @@ -76,7 +76,7 @@ ARCHITECTURE str OF st_histogram_reg IS -- adr_w => 1, -- dat_w => c_word_w, -- nof_dat => 1, --- init_sl => g_default_value); +-- init_sl => g_default_value); BEGIN diff --git a/libraries/dsp/st/tb/vhdl/tb_mms_st_histogram.vhd b/libraries/dsp/st/tb/vhdl/tb_mms_st_histogram.vhd index 8c74592e65..fbb57a6c0f 100644 --- a/libraries/dsp/st/tb/vhdl/tb_mms_st_histogram.vhd +++ b/libraries/dsp/st/tb/vhdl/tb_mms_st_histogram.vhd @@ -105,7 +105,7 @@ BEGIN ---------------------------------------------------------------------------- - -- Source: counter stimuli + -- Source: counter stimuli ---------------------------------------------------------------------------- p_data : PROCESS(dp_rst, dp_clk, st_histogram_snk_in) diff --git a/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd b/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd index e997850df3..36a9f7a16d 100644 --- a/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd +++ b/libraries/dsp/st/tb/vhdl/tb_st_histogram.vhd @@ -122,7 +122,7 @@ BEGIN ---------------------------------------------------------------------------- -- Source: stimuli - -- st_histogram_snk_in.data counter or toggle stimuli + -- st_histogram_snk_in.data counter or toggle or same_rw stimuli -- .valid with or without gap's in valid stimuli -- .sync sync stimuli ---------------------------------------------------------------------------- -- GitLab