From 40f5c43034ecba0b9c0e31d961524497156e8f4b Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Mon, 21 Jul 2014 09:56:08 +0000
Subject: [PATCH] Use 'tech_tse' instead of only 'tse' in item names from
tech_tse_pkg.vhd and tb_tech_tse_pkg.vhd.
---
libraries/io/eth/src/vhdl/avs_eth.vhd | 4 +-
libraries/io/eth/src/vhdl/avs_eth_coe.vhd | 4 +-
libraries/io/eth/src/vhdl/eth.vhd | 10 +-
libraries/io/eth/src/vhdl/eth_pkg.vhd | 10 +-
libraries/io/eth/tb/vhdl/tb_eth.vhd | 74 +++---
.../io/eth/tb/vhdl/tb_eth_udp_offload.vhd | 10 +-
libraries/io/eth/tb/vhdl/tb_tb_eth.vhd | 10 +-
libraries/technology/tse/tb_tech_tse.vhd | 66 +++---
libraries/technology/tse/tb_tech_tse_pkg.vhd | 221 +++++++++---------
libraries/technology/tse/tech_tse.vhd | 8 +-
libraries/technology/tse/tech_tse_pkg.vhd | 52 ++---
.../technology/tse/tech_tse_stratixiv.vhd | 60 ++---
12 files changed, 263 insertions(+), 266 deletions(-)
diff --git a/libraries/io/eth/src/vhdl/avs_eth.vhd b/libraries/io/eth/src/vhdl/avs_eth.vhd
index 98c8d722e0..06e2ef3ca3 100644
--- a/libraries/io/eth/src/vhdl/avs_eth.vhd
+++ b/libraries/io/eth/src/vhdl/avs_eth.vhd
@@ -42,7 +42,7 @@ ENTITY avs_eth IS
---------------------------------------------------------------------------
-- TSE MAC
-- . MOSI
- mms_tse_address : IN STD_LOGIC_VECTOR(c_tse_byte_addr_w-1 DOWNTO 0);
+ mms_tse_address : IN STD_LOGIC_VECTOR(c_tech_tse_byte_addr_w-1 DOWNTO 0);
mms_tse_write : IN STD_LOGIC;
mms_tse_read : IN STD_LOGIC;
mms_tse_writedata : IN STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0);
@@ -109,7 +109,7 @@ ARCHITECTURE wrap OF avs_eth IS
SIGNAL ram_sla_out : t_mem_miso;
-- LED interface
- SIGNAL tse_led : t_tse_led;
+ SIGNAL tse_led : t_tech_tse_led;
BEGIN
diff --git a/libraries/io/eth/src/vhdl/avs_eth_coe.vhd b/libraries/io/eth/src/vhdl/avs_eth_coe.vhd
index 6a52b0d78c..d7d8807f00 100644
--- a/libraries/io/eth/src/vhdl/avs_eth_coe.vhd
+++ b/libraries/io/eth/src/vhdl/avs_eth_coe.vhd
@@ -42,7 +42,7 @@ ENTITY avs_eth_coe IS
csi_mm_clk : IN STD_LOGIC;
-- TSE MAC
- mms_tse_address : IN STD_LOGIC_VECTOR(c_tse_byte_addr_w-1 DOWNTO 0);
+ mms_tse_address : IN STD_LOGIC_VECTOR(c_tech_tse_byte_addr_w-1 DOWNTO 0);
mms_tse_write : IN STD_LOGIC;
mms_tse_read : IN STD_LOGIC;
mms_tse_writedata : IN STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0);
@@ -74,7 +74,7 @@ ENTITY avs_eth_coe IS
coe_clk_export : OUT STD_LOGIC;
-- TSE MAC
- coe_tse_address_export : OUT STD_LOGIC_VECTOR(c_tse_byte_addr_w-1 DOWNTO 0);
+ coe_tse_address_export : OUT STD_LOGIC_VECTOR(c_tech_tse_byte_addr_w-1 DOWNTO 0);
coe_tse_write_export : OUT STD_LOGIC;
coe_tse_read_export : OUT STD_LOGIC;
coe_tse_writedata_export : OUT STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0);
diff --git a/libraries/io/eth/src/vhdl/eth.vhd b/libraries/io/eth/src/vhdl/eth.vhd
index c1f1c6f62b..077f4314e4 100644
--- a/libraries/io/eth/src/vhdl/eth.vhd
+++ b/libraries/io/eth/src/vhdl/eth.vhd
@@ -76,7 +76,7 @@ ENTITY eth IS
eth_rxp : IN STD_LOGIC;
-- LED interface
- tse_led : OUT t_tse_led
+ tse_led : OUT t_tech_tse_led
);
END eth;
@@ -178,13 +178,13 @@ ARCHITECTURE str OF eth IS
SIGNAL tse_tx_siso : t_dp_siso;
SIGNAL tse_tx_sosi : t_dp_sosi;
-- . MAC specific
- SIGNAL tse_tx_mac_in : t_tse_tx_mac;
- SIGNAL tse_tx_mac_out : t_tse_tx_mac;
+ SIGNAL tse_tx_mac_in : t_tech_tse_tx_mac;
+ SIGNAL tse_tx_mac_out : t_tech_tse_tx_mac;
-- . MAC Receive Stream
SIGNAL tse_rx_sosi : t_dp_sosi;
SIGNAL tse_rx_siso : t_dp_siso;
-- . MAC specific
- SIGNAL tse_rx_mac_out : t_tse_rx_mac;
+ SIGNAL tse_rx_mac_out : t_tech_tse_rx_mac;
BEGIN
@@ -277,7 +277,7 @@ BEGIN
clk => st_clk,
-- Streaming Sink
- snk_in_err => rx_adapt_sosi.err(c_tse_error_w-1 DOWNTO 0), -- preserve error field from TSE MAC stream
+ snk_in_err => rx_adapt_sosi.err(c_tech_tse_error_w-1 DOWNTO 0), -- preserve error field from TSE MAC stream
snk_in => rx_adapt_sosi,
snk_out => rx_adapt_siso,
diff --git a/libraries/io/eth/src/vhdl/eth_pkg.vhd b/libraries/io/eth/src/vhdl/eth_pkg.vhd
index de2a60c071..f8df9fb044 100644
--- a/libraries/io/eth/src/vhdl/eth_pkg.vhd
+++ b/libraries/io/eth/src/vhdl/eth_pkg.vhd
@@ -31,12 +31,12 @@ USE tech_tse_lib.tech_tse_pkg.ALL;
PACKAGE eth_pkg IS
- CONSTANT c_eth_data_w : NATURAL := c_tse_data_w; -- = c_word_w
- CONSTANT c_eth_empty_w : NATURAL := c_tse_empty_w; -- = ceil_log2(c_word_sz) = 2;
- CONSTANT c_eth_error_w : NATURAL := c_tse_error_w; -- = 6, but no error field, pass error info on via checksum or CRC /= 0 in packet word
+ CONSTANT c_eth_data_w : NATURAL := c_tech_tse_data_w; -- = c_word_w
+ CONSTANT c_eth_empty_w : NATURAL := c_tech_tse_empty_w; -- = ceil_log2(c_word_sz) = 2;
+ CONSTANT c_eth_error_w : NATURAL := c_tech_tse_error_w; -- = 6, but no error field, pass error info on via checksum or CRC /= 0 in packet word
- CONSTANT c_eth_rx_ready_latency : NATURAL := c_tse_rx_ready_latency; -- = 2 = default when FIFO is used
- CONSTANT c_eth_tx_ready_latency : NATURAL := c_tse_tx_ready_latency; -- = 0, c_tse_tx_ready_latency + 3 = TX_ALMOST_FULL
+ CONSTANT c_eth_rx_ready_latency : NATURAL := c_tech_tse_rx_ready_latency; -- = 2 = default when FIFO is used
+ CONSTANT c_eth_tx_ready_latency : NATURAL := c_tech_tse_tx_ready_latency; -- = 0, c_tech_tse_tx_ready_latency + 3 = TX_ALMOST_FULL
CONSTANT c_eth_ready_latency : NATURAL := 1; -- = 1, fixed ETH module internal RL
-- Maximum feasible frame size
diff --git a/libraries/io/eth/tb/vhdl/tb_eth.vhd b/libraries/io/eth/tb/vhdl/tb_eth.vhd
index ff9df48eb9..5454df686e 100644
--- a/libraries/io/eth/tb/vhdl/tb_eth.vhd
+++ b/libraries/io/eth/tb/vhdl/tb_eth.vhd
@@ -33,7 +33,7 @@
-- ------- -------
--
-- The tb is self checking based on:
--- . proc_tse_rx_packet() for expected header and data type
+-- . proc_tech_tse_rx_packet() for expected header and data type
-- . tx_pkt_cnt=rx_pkt_cnt > 0 must be true at the tb_end.
-- Usage:
-- > as 10
@@ -57,12 +57,12 @@ USE tech_tse_lib.tb_tech_tse_pkg.ALL;
ENTITY tb_eth IS
-- Test bench control parameters
GENERIC (
- -- g_data_type = c_tb_tse_data_type_symbols = 0
- -- g_data_type = c_tb_tse_data_type_counter = 1
- -- g_data_type = c_tb_tse_data_type_arp = 2
- -- g_data_type = c_tb_tse_data_type_ping = 3
- -- g_data_type = c_tb_tse_data_type_udp = 4
- g_data_type : NATURAL := c_tb_tse_data_type_udp
+ -- g_data_type = c_tb_tech_tse_data_type_symbols = 0
+ -- g_data_type = c_tb_tech_tse_data_type_counter = 1
+ -- g_data_type = c_tb_tech_tse_data_type_arp = 2
+ -- g_data_type = c_tb_tech_tse_data_type_ping = 3
+ -- g_data_type = c_tb_tech_tse_data_type_udp = 4
+ g_data_type : NATURAL := c_tb_tech_tse_data_type_udp
);
END tb_eth;
@@ -78,7 +78,7 @@ ARCHITECTURE tb OF tb_eth IS
-- TSE constants
CONSTANT c_promis_en : BOOLEAN := FALSE;
- CONSTANT c_tx_ready_latency : NATURAL := c_tse_tx_ready_latency; -- 0, 1 are supported, must match TSE MAC c_tse_tx_ready_latency
+ CONSTANT c_tx_ready_latency : NATURAL := c_tech_tse_tx_ready_latency; -- 0, 1 are supported, must match TSE MAC c_tech_tse_tx_ready_latency
CONSTANT c_nof_tx_not_valid : NATURAL := 0; -- when > 0 then pull tx valid low for c_nof_tx_not_valid beats during tx
-- Payload user data
@@ -94,7 +94,7 @@ ARCHITECTURE tb OF tb_eth IS
CONSTANT c_dut_src_mac_hi : NATURAL := TO_UINT(c_dut_src_mac(c_network_eth_mac_addr_w-1 DOWNTO c_word_w));
CONSTANT c_dut_src_mac_lo : NATURAL := TO_UINT(c_dut_src_mac( c_word_w-1 DOWNTO 0));
-- support only ARP and IPv4 over ETH
- CONSTANT c_dut_ethertype : NATURAL := sel_a_b(g_data_type-c_tb_tse_data_type_arp, c_network_eth_type_ip, c_network_eth_type_arp);
+ CONSTANT c_dut_ethertype : NATURAL := sel_a_b(g_data_type-c_tb_tech_tse_data_type_arp, c_network_eth_type_ip, c_network_eth_type_arp);
CONSTANT c_tx_eth_header : t_network_eth_header := (dst_mac => c_dut_src_mac,
src_mac => c_lcu_src_mac,
eth_type => TO_UVEC(c_dut_ethertype, c_network_eth_type_w));
@@ -106,7 +106,7 @@ ARCHITECTURE tb OF tb_eth IS
CONSTANT c_lcu_ip_addr : NATURAL := 16#05060708#; -- = 05:06:07:08
CONSTANT c_dut_ip_addr : NATURAL := 16#01020304#;
CONSTANT c_tb_ip_total_length : NATURAL := c_network_ip_total_length + c_tb_ip_nof_data;
- CONSTANT c_tb_ip_protocol : NATURAL := sel_a_b(g_data_type-c_tb_tse_data_type_ping, c_network_ip_protocol_udp, c_network_ip_protocol_icmp); -- support only ping protocol or UDP protocol over IP
+ CONSTANT c_tb_ip_protocol : NATURAL := sel_a_b(g_data_type-c_tb_tech_tse_data_type_ping, c_network_ip_protocol_udp, c_network_ip_protocol_icmp); -- support only ping protocol or UDP protocol over IP
CONSTANT c_tx_ip_header : t_network_ip_header := (version => TO_UVEC(c_network_ip_version, c_network_ip_version_w),
header_length => TO_UVEC(c_network_ip_header_length, c_network_ip_header_length_w),
@@ -210,7 +210,7 @@ ARCHITECTURE tb OF tb_eth IS
SIGNAL eth_psc_access : STD_LOGIC;
SIGNAL eth_txp : STD_LOGIC;
SIGNAL eth_rxp : STD_LOGIC;
- SIGNAL eth_led : t_tse_led;
+ SIGNAL eth_led : t_tech_tse_led;
-- ETH MM registers interface
SIGNAL eth_reg_miso : t_mem_miso;
@@ -238,14 +238,14 @@ ARCHITECTURE tb OF tb_eth IS
SIGNAL lcu_tx_en : STD_LOGIC := '1';
SIGNAL lcu_tx_siso : t_dp_siso;
SIGNAL lcu_tx_sosi : t_dp_sosi;
- SIGNAL lcu_tx_mac_in : t_tse_tx_mac;
- SIGNAL lcu_tx_mac_out : t_tse_tx_mac;
+ SIGNAL lcu_tx_mac_in : t_tech_tse_tx_mac;
+ SIGNAL lcu_tx_mac_out : t_tech_tse_tx_mac;
SIGNAL lcu_rx_sosi : t_dp_sosi;
SIGNAL lcu_rx_siso : t_dp_siso;
- SIGNAL lcu_rx_mac_out : t_tse_rx_mac;
+ SIGNAL lcu_rx_mac_out : t_tech_tse_rx_mac;
SIGNAL lcu_txp : STD_LOGIC;
SIGNAL lcu_rxp : STD_LOGIC;
- SIGNAL lcu_led : t_tse_led;
+ SIGNAL lcu_led : t_tech_tse_led;
-- Verification
SIGNAL tx_pkt_cnt : NATURAL := 0;
@@ -298,9 +298,9 @@ BEGIN
-- Wait for ETH init
WHILE dut_eth_init='1' LOOP WAIT UNTIL rising_edge(mm_clk); END LOOP;
-- Setup the TSE MAC
- proc_tse_setup(c_promis_en, c_tse_tx_fifo_depth, c_tse_rx_fifo_depth, c_tx_ready_latency,
- c_dut_src_mac, eth_psc_access,
- mm_clk, eth_tse_miso, eth_tse_mosi);
+ proc_tech_tse_setup(c_promis_en, c_tech_tse_tx_fifo_depth, c_tech_tse_rx_fifo_depth, c_tx_ready_latency,
+ c_dut_src_mac, eth_psc_access,
+ mm_clk, eth_tse_miso, eth_tse_mosi);
dut_tse_init <= '0';
WAIT;
END PROCESS;
@@ -369,7 +369,7 @@ BEGIN
-- write control register to enable tx
IF c_tb_reply_payload=TRUE THEN
-- . copy the received payload to the response payload (overwrite part of the default response header in case of raw ETH)
- FOR I IN func_tb_tse_header_size(g_data_type) TO TO_UINT(eth_mm_reg_control.tx_nof_words)-1 LOOP
+ FOR I IN func_tech_tse_header_size(g_data_type) TO TO_UINT(eth_mm_reg_control.tx_nof_words)-1 LOOP
proc_mem_mm_bus_rd(c_eth_ram_rx_offset+I, mm_clk, eth_ram_miso, eth_ram_mosi);
proc_mem_mm_bus_rd_latency(c_mem_ram_rd_latency, mm_clk);
proc_mem_mm_bus_wr(c_eth_ram_tx_offset+I, TO_SINT(eth_ram_miso.rddata(c_word_w-1 DOWNTO 0)), mm_clk, eth_ram_miso, eth_ram_mosi);
@@ -399,9 +399,9 @@ BEGIN
-- Wait for reset release
WHILE mm_rst='1' LOOP WAIT UNTIL rising_edge(mm_clk); END LOOP;
-- Setup the LCU TSE MAC
- proc_tse_setup(c_promis_en, c_tse_tx_fifo_depth, c_tse_rx_fifo_depth, c_tx_ready_latency,
- c_lcu_src_mac, lcu_psc_access,
- mm_clk, lcu_tse_miso, lcu_tse_mosi);
+ proc_tech_tse_setup(c_promis_en, c_tech_tse_tx_fifo_depth, c_tech_tse_rx_fifo_depth, c_tx_ready_latency,
+ c_lcu_src_mac, lcu_psc_access,
+ mm_clk, lcu_tse_miso, lcu_tse_mosi);
-- Wait for DUT init done
WHILE dut_tse_init/='0' LOOP WAIT UNTIL rising_edge(mm_clk); END LOOP;
lcu_init <= '0';
@@ -423,22 +423,22 @@ BEGIN
WHILE lcu_init/='0' LOOP WAIT UNTIL rising_edge(st_clk); END LOOP;
FOR I IN 0 TO 9 LOOP WAIT UNTIL rising_edge(st_clk); END LOOP;
--- proc_tse_tx_packet(tx_total_header, 100, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+-- proc_tech_tse_tx_packet(tx_total_header, 100, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
FOR I IN 0 TO 40 LOOP
- proc_tse_tx_packet(tx_total_header, I, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+ proc_tech_tse_tx_packet(tx_total_header, I, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
--FOR J IN 0 TO 9 LOOP WAIT UNTIL rising_edge(st_clk); END LOOP;
END LOOP;
--- proc_tse_tx_packet(tx_total_header, 104, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
--- proc_tse_tx_packet(tx_total_header, 105, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
--- proc_tse_tx_packet(tx_total_header, 1472, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
--- proc_tse_tx_packet(tx_total_header, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
--- proc_tse_tx_packet(tx_total_header, 101, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
--- proc_tse_tx_packet(tx_total_header, 1000, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
--- proc_tse_tx_packet(tx_total_header, 102, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
--- proc_tse_tx_packet(tx_total_header, 1000, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
--- proc_tse_tx_packet(tx_total_header, 103, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
--- proc_tse_tx_packet(tx_total_header, 104, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
--- proc_tse_tx_packet(tx_total_header, 105, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+-- proc_tech_tse_tx_packet(tx_total_header, 104, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+-- proc_tech_tse_tx_packet(tx_total_header, 105, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+-- proc_tech_tse_tx_packet(tx_total_header, 1472, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+-- proc_tech_tse_tx_packet(tx_total_header, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+-- proc_tech_tse_tx_packet(tx_total_header, 101, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+-- proc_tech_tse_tx_packet(tx_total_header, 1000, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+-- proc_tech_tse_tx_packet(tx_total_header, 102, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+-- proc_tech_tse_tx_packet(tx_total_header, 1000, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+-- proc_tech_tse_tx_packet(tx_total_header, 103, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+-- proc_tech_tse_tx_packet(tx_total_header, 104, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
+-- proc_tech_tse_tx_packet(tx_total_header, 105, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, lcu_tx_en, lcu_tx_siso, lcu_tx_sosi);
FOR I IN 0 TO 1500 * 5 LOOP WAIT UNTIL rising_edge(st_clk); END LOOP;
tb_end <= '1';
@@ -455,12 +455,12 @@ BEGIN
-- Verification of multiple rx packets is only supported when all packets
-- are of the same g_data_type, because the rx process can only support
- -- one expected result. The proc_tse_rx_packet does not (yet) interpret the
+ -- one expected result. The proc_tech_tse_rx_packet does not (yet) interpret the
-- actually received packet, it relies on the preset expected total_header.
-- Receive forever
WHILE TRUE LOOP
- proc_tse_rx_packet(exp_total_header, g_data_type, st_clk, lcu_rx_sosi, lcu_rx_siso);
+ proc_tech_tse_rx_packet(exp_total_header, g_data_type, st_clk, lcu_rx_sosi, lcu_rx_siso);
END LOOP;
WAIT;
diff --git a/libraries/io/eth/tb/vhdl/tb_eth_udp_offload.vhd b/libraries/io/eth/tb/vhdl/tb_eth_udp_offload.vhd
index c2063d4e3c..c847ea48c8 100644
--- a/libraries/io/eth/tb/vhdl/tb_eth_udp_offload.vhd
+++ b/libraries/io/eth/tb/vhdl/tb_eth_udp_offload.vhd
@@ -88,7 +88,7 @@ ARCHITECTURE tb OF tb_eth_udp_offload IS
CONSTANT c_lcu_ip_addr : NATURAL := 16#05060708#; -- = 05:06:07:08
CONSTANT c_dut_ip_addr : NATURAL := 16#01020304#;
CONSTANT c_tb_ip_total_length : NATURAL := c_network_ip_total_length + c_tb_ip_nof_data;
- CONSTANT c_tb_ip_protocol : NATURAL := c_network_ip_protocol_udp; --sel_a_b(g_data_type-c_tb_tse_data_type_ping, c_network_ip_protocol_udp, c_network_ip_protocol_icmp); -- support only ping protocol or UDP protocol over IP
+ CONSTANT c_tb_ip_protocol : NATURAL := c_network_ip_protocol_udp; --sel_a_b(g_data_type-c_tb_tech_tse_data_type_ping, c_network_ip_protocol_udp, c_network_ip_protocol_icmp); -- support only ping protocol or UDP protocol over IP
CONSTANT c_tx_ip_header : t_network_ip_header := (version => TO_UVEC(c_network_ip_version, c_network_ip_version_w),
header_length => TO_UVEC(c_network_ip_header_length, c_network_ip_header_length_w),
@@ -143,7 +143,7 @@ ARCHITECTURE tb OF tb_eth_udp_offload IS
-- TSE constants
CONSTANT c_promis_en : BOOLEAN := FALSE;
- CONSTANT c_tx_ready_latency : NATURAL := c_tse_tx_ready_latency; -- 0, 1 are supported, must match TSE MAC c_tse_tx_ready_latency
+ CONSTANT c_tx_ready_latency : NATURAL := c_tech_tse_tx_ready_latency; -- 0, 1 are supported, must match TSE MAC c_tech_tse_tx_ready_latency
-- ETH control
CONSTANT c_dut_control_rx_en : NATURAL := 2**c_eth_mm_reg_control_bi.rx_en;
@@ -258,9 +258,9 @@ BEGIN
-- Wait for ETH init
WHILE dut_eth_init='1' LOOP WAIT UNTIL rising_edge(mm_clk); END LOOP;
-- Setup the TSE MAC
- proc_tse_setup(c_promis_en, c_tse_tx_fifo_depth, c_tse_rx_fifo_depth, c_tx_ready_latency,
- c_dut_src_mac, eth_psc_access,
- mm_clk, eth_tse_miso, eth_tse_mosi);
+ proc_tech_tse_setup(c_promis_en, c_tech_tse_tx_fifo_depth, c_tech_tse_rx_fifo_depth, c_tx_ready_latency,
+ c_dut_src_mac, eth_psc_access,
+ mm_clk, eth_tse_miso, eth_tse_mosi);
dut_tse_init <= '0';
WAIT;
END PROCESS;
diff --git a/libraries/io/eth/tb/vhdl/tb_tb_eth.vhd b/libraries/io/eth/tb/vhdl/tb_tb_eth.vhd
index dfbcc715f9..3feea3077e 100644
--- a/libraries/io/eth/tb/vhdl/tb_tb_eth.vhd
+++ b/libraries/io/eth/tb/vhdl/tb_tb_eth.vhd
@@ -42,10 +42,10 @@ BEGIN
-- Try ETH settings : GENERIC MAP (g_data_type => )
- u_use_symbols : ENTITY work.tb_eth GENERIC MAP (c_tb_tse_data_type_symbols);
- u_use_counter : ENTITY work.tb_eth GENERIC MAP (c_tb_tse_data_type_counter);
- u_use_arp : ENTITY work.tb_eth GENERIC MAP (c_tb_tse_data_type_arp );
- u_use_ping : ENTITY work.tb_eth GENERIC MAP (c_tb_tse_data_type_ping );
- u_use_udp : ENTITY work.tb_eth GENERIC MAP (c_tb_tse_data_type_udp );
+ u_use_symbols : ENTITY work.tb_eth GENERIC MAP (c_tb_tech_tse_data_type_symbols);
+ u_use_counter : ENTITY work.tb_eth GENERIC MAP (c_tb_tech_tse_data_type_counter);
+ u_use_arp : ENTITY work.tb_eth GENERIC MAP (c_tb_tech_tse_data_type_arp );
+ u_use_ping : ENTITY work.tb_eth GENERIC MAP (c_tb_tech_tse_data_type_ping );
+ u_use_udp : ENTITY work.tb_eth GENERIC MAP (c_tb_tech_tse_data_type_udp );
END tb;
diff --git a/libraries/technology/tse/tb_tech_tse.vhd b/libraries/technology/tse/tb_tech_tse.vhd
index e000c9d7de..ac7f0d042f 100644
--- a/libraries/technology/tse/tb_tech_tse.vhd
+++ b/libraries/technology/tse/tb_tech_tse.vhd
@@ -22,7 +22,7 @@
-- Purpose: Testbench for tech_tse the Tripple Speed Ethernet IP technology wrapper.
-- Description:
-- The tb is self checking based on:
--- . proc_tse_rx_packet() for expected header and data type
+-- . proc_tech_tse_rx_packet() for expected header and data type
-- . tx_pkt_cnt=rx_pkt_cnt > 0 must be true at the tb_end.
-- Usage:
-- > as 10
@@ -44,9 +44,9 @@ USE WORK.tb_tech_tse_pkg.ALL;
ENTITY tb_tech_tse IS
-- Test bench control parameters
GENERIC (
- -- g_data_type = c_tb_tse_data_type_symbols = 0
- -- g_data_type = c_tb_tse_data_type_counter = 1
- g_data_type : NATURAL := c_tb_tse_data_type_symbols
+ -- g_data_type = c_tb_tech_tse_data_type_symbols = 0
+ -- g_data_type = c_tb_tech_tse_data_type_counter = 1
+ g_data_type : NATURAL := c_tb_tech_tse_data_type_symbols
);
END tb_tech_tse;
@@ -61,7 +61,7 @@ ARCHITECTURE tb OF tb_tech_tse IS
CONSTANT cable_delay : TIME := 12 ns;
CONSTANT c_promis_en : BOOLEAN := FALSE;
- CONSTANT c_tx_ready_latency : NATURAL := c_tse_tx_ready_latency; -- 0, 1 are supported, must match TSE MAC c_tse_tx_ready_latency
+ CONSTANT c_tx_ready_latency : NATURAL := c_tech_tse_tx_ready_latency; -- 0, 1 are supported, must match TSE MAC c_tech_tse_tx_ready_latency
CONSTANT c_nof_tx_not_valid : NATURAL := 0; -- when > 0 then pull tx valid low for c_nof_tx_not_valid beats during tx
CONSTANT c_dst_mac : STD_LOGIC_VECTOR(c_network_eth_mac_slv'RANGE) := X"10FA01020300";
@@ -97,21 +97,21 @@ ARCHITECTURE tb OF tb_tech_tse IS
SIGNAL tx_siso : t_dp_siso;
SIGNAL tx_sosi : t_dp_sosi;
-- . MAC specific
- SIGNAL tx_mac_in : t_tse_tx_mac;
- SIGNAL tx_mac_out : t_tse_tx_mac;
+ SIGNAL tx_mac_in : t_tech_tse_tx_mac;
+ SIGNAL tx_mac_out : t_tech_tse_tx_mac;
-- TSE MAC receive interface
-- . The tb is the ST sink
SIGNAL rx_sosi : t_dp_sosi;
SIGNAL rx_siso : t_dp_siso;
-- . MAC specific
- SIGNAL rx_mac_out : t_tse_rx_mac;
+ SIGNAL rx_mac_out : t_tech_tse_rx_mac;
-- TSE PHY interface
SIGNAL eth_txp : STD_LOGIC;
SIGNAL eth_rxp : STD_LOGIC;
- SIGNAL tse_led : t_tse_led;
+ SIGNAL tse_led : t_tech_tse_led;
-- Verification
SIGNAL tx_pkt_cnt : NATURAL := 0;
@@ -143,9 +143,9 @@ BEGIN
mm_rst <= '0';
FOR I IN 0 TO 9 LOOP WAIT UNTIL rising_edge(mm_clk); END LOOP;
- proc_tse_setup(c_promis_en, c_tse_tx_fifo_depth, c_tse_rx_fifo_depth, c_tx_ready_latency,
- c_src_mac, mm_psc_access,
- mm_clk, mm_miso, mm_mosi);
+ proc_tech_tse_setup(c_promis_en, c_tech_tse_tx_fifo_depth, c_tech_tse_rx_fifo_depth, c_tx_ready_latency,
+ c_src_mac, mm_psc_access,
+ mm_clk, mm_miso, mm_mosi);
mm_init <= '0';
WAIT;
END PROCESS;
@@ -175,28 +175,28 @@ BEGIN
-- . For I=1 to 46 the payload length remains 46 with padding zeros, so empty = 2
-- . For I>46 the payload length is I and empty = 4 - (I mod 4)
--- proc_tse_tx_packet(total_header_etherlen, 16, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 16, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 16, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_etherlen, 16, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 16, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 16, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
FOR I IN 0 TO 59 LOOP
- proc_tse_tx_packet(total_header_loopback, I, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+ proc_tech_tse_tx_packet(total_header_loopback, I, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
END LOOP;
--- proc_tse_tx_packet(total_header_loopback, 100, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 101, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 102, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 103, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 1499, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi); -- verify st empty
--- proc_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
--- proc_tse_tx_packet(total_header_loopback, 1501, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi); -- verify c_eth_payload_max
--- proc_tse_tx_packet(total_header_loopback, 100, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 100, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 101, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 102, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 103, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 1499, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi); -- verify st empty
+-- proc_tech_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 1500, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
+-- proc_tech_tse_tx_packet(total_header_loopback, 1501, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi); -- verify c_eth_payload_max
+-- proc_tech_tse_tx_packet(total_header_loopback, 100, g_data_type, c_tx_ready_latency, c_nof_tx_not_valid, st_clk, tx_en, tx_siso, tx_sosi);
FOR I IN 0 TO 1500 * 2 LOOP WAIT UNTIL rising_edge(st_clk); END LOOP;
tb_end <= '1';
@@ -215,7 +215,7 @@ BEGIN
-- Receive forever
WHILE TRUE LOOP
- proc_tse_rx_packet(total_header_loopback, g_data_type, st_clk, rx_sosi, rx_siso);
+ proc_tech_tse_rx_packet(total_header_loopback, g_data_type, st_clk, rx_sosi, rx_siso);
END LOOP;
WAIT;
diff --git a/libraries/technology/tse/tb_tech_tse_pkg.vhd b/libraries/technology/tse/tb_tech_tse_pkg.vhd
index 26a153f9cf..151e1826d3 100644
--- a/libraries/technology/tse/tb_tech_tse_pkg.vhd
+++ b/libraries/technology/tse/tb_tech_tse_pkg.vhd
@@ -36,91 +36,88 @@ USE WORK.tech_tse_pkg.ALL;
PACKAGE tb_tech_tse_pkg IS
-- Test bench supported packet data types
- CONSTANT c_tb_tse_data_type_symbols : NATURAL := 0;
- CONSTANT c_tb_tse_data_type_counter : NATURAL := 1;
- CONSTANT c_tb_tse_data_type_arp : NATURAL := 2;
- CONSTANT c_tb_tse_data_type_ping : NATURAL := 3; -- over IP/ICMP
- CONSTANT c_tb_tse_data_type_udp : NATURAL := 4; -- over IP
+ CONSTANT c_tb_tech_tse_data_type_symbols : NATURAL := 0;
+ CONSTANT c_tb_tech_tse_data_type_counter : NATURAL := 1;
+ CONSTANT c_tb_tech_tse_data_type_arp : NATURAL := 2;
+ CONSTANT c_tb_tech_tse_data_type_ping : NATURAL := 3; -- over IP/ICMP
+ CONSTANT c_tb_tech_tse_data_type_udp : NATURAL := 4; -- over IP
- FUNCTION func_tb_tse_header_size(data_type : NATURAL) RETURN NATURAL; -- raw ethernet: 4 header words, protocol ethernet: 11 header words
+ FUNCTION func_tech_tse_header_size(data_type : NATURAL) RETURN NATURAL; -- raw ethernet: 4 header words, protocol ethernet: 11 header words
-- Configure the TSE MAC
- PROCEDURE proc_tse_setup(CONSTANT c_promis_en : IN BOOLEAN;
- CONSTANT c_tse_tx_fifo_depth : IN NATURAL;
- CONSTANT c_tse_rx_fifo_depth : IN NATURAL;
- CONSTANT c_tx_ready_latency : IN NATURAL;
- CONSTANT src_mac : IN STD_LOGIC_VECTOR(c_network_eth_mac_slv'RANGE);
- SIGNAL psc_access : OUT STD_LOGIC;
- SIGNAL mm_clk : IN STD_LOGIC;
- SIGNAL mm_miso : IN t_mem_miso;
- SIGNAL mm_mosi : OUT t_mem_mosi);
+ PROCEDURE proc_tech_tse_setup(CONSTANT c_promis_en : IN BOOLEAN;
+ CONSTANT c_tse_tx_fifo_depth : IN NATURAL;
+ CONSTANT c_tse_rx_fifo_depth : IN NATURAL;
+ CONSTANT c_tx_ready_latency : IN NATURAL;
+ CONSTANT src_mac : IN STD_LOGIC_VECTOR(c_network_eth_mac_slv'RANGE);
+ SIGNAL psc_access : OUT STD_LOGIC;
+ SIGNAL mm_clk : IN STD_LOGIC;
+ SIGNAL mm_miso : IN t_mem_miso;
+ SIGNAL mm_mosi : OUT t_mem_mosi);
- PROCEDURE proc_tse_tx_packet(CONSTANT total_header : IN t_network_total_header;
- CONSTANT data_len : IN NATURAL; -- in symbols = octets = bytes
- CONSTANT c_data_type : IN NATURAL; -- c_tb_tse_data_type_*
- CONSTANT c_ready_latency : IN NATURAL; -- 0, 1 are supported by proc_dp_stream_ready_latency()
- CONSTANT c_nof_not_valid : IN NATURAL; -- when > 0 then pull tx valid low for c_nof_not_valid beats during tx
- SIGNAL ff_clk : IN STD_LOGIC;
- SIGNAL ff_en : IN STD_LOGIC; -- similar purpose as c_nof_not_valid, but not used so pass on signal '1'
- SIGNAL ff_src_in : IN t_dp_siso;
- SIGNAL ff_src_out : OUT t_dp_sosi);
+ PROCEDURE proc_tech_tse_tx_packet(CONSTANT total_header : IN t_network_total_header;
+ CONSTANT data_len : IN NATURAL; -- in symbols = octets = bytes
+ CONSTANT c_data_type : IN NATURAL; -- c_tb_tech_tse_data_type_*
+ CONSTANT c_ready_latency : IN NATURAL; -- 0, 1 are supported by proc_dp_stream_ready_latency()
+ CONSTANT c_nof_not_valid : IN NATURAL; -- when > 0 then pull tx valid low for c_nof_not_valid beats during tx
+ SIGNAL ff_clk : IN STD_LOGIC;
+ SIGNAL ff_en : IN STD_LOGIC; -- similar purpose as c_nof_not_valid, but not used so pass on signal '1'
+ SIGNAL ff_src_in : IN t_dp_siso;
+ SIGNAL ff_src_out : OUT t_dp_sosi);
-- Receive and verify packet from the TSE MAC
- PROCEDURE proc_tse_rx_packet(CONSTANT total_header : IN t_network_total_header;
- CONSTANT c_data_type : IN NATURAL; -- c_tb_tse_data_type_*
- SIGNAL ff_clk : IN STD_LOGIC;
- SIGNAL ff_snk_in : IN t_dp_sosi;
- SIGNAL ff_snk_out : OUT t_dp_siso);
+ PROCEDURE proc_tech_tse_rx_packet(CONSTANT total_header : IN t_network_total_header;
+ CONSTANT c_data_type : IN NATURAL; -- c_tb_tech_tse_data_type_*
+ SIGNAL ff_clk : IN STD_LOGIC;
+ SIGNAL ff_snk_in : IN t_dp_sosi;
+ SIGNAL ff_snk_out : OUT t_dp_siso);
END tb_tech_tse_pkg;
PACKAGE BODY tb_tech_tse_pkg IS
- -- LOCAL ITEMS ---------------------------------------------------------------
+ ------------------------------------------------------------------------------
+ -- LOCAL ITEMS
+ ------------------------------------------------------------------------------
+
CONSTANT c_nof_eth_beats : NATURAL := c_network_total_header_32b_eth_nof_words; -- nof words in eth part of the header
CONSTANT c_nof_hdr_beats : NATURAL := c_network_total_header_32b_nof_words; -- nof words in the total header
+ -- Use default word addressing for MAC registers according to table 4.8, 4.9
+ -- Use halfword addressing for PCS register to match table 4.17
+ FUNCTION func_map_pcs_addr(pcs_addr : NATURAL) RETURN NATURAL IS
+ BEGIN
+ RETURN pcs_addr * 2 + c_tech_tse_byte_addr_pcs_offset;
+ END func_map_pcs_addr;
+
- -- GLOBAL ITEMS --------------------------------------------------------------
+ ------------------------------------------------------------------------------
+ -- GLOBAL ITEMS
+ ------------------------------------------------------------------------------
- FUNCTION func_tb_tse_header_size(data_type : NATURAL) RETURN NATURAL IS
+ FUNCTION func_tech_tse_header_size(data_type : NATURAL) RETURN NATURAL IS
BEGIN
CASE data_type IS
- WHEN c_tb_tse_data_type_symbols => RETURN c_network_total_header_32b_eth_nof_words;
- WHEN c_tb_tse_data_type_counter => RETURN c_network_total_header_32b_eth_nof_words;
+ WHEN c_tb_tech_tse_data_type_symbols => RETURN c_network_total_header_32b_eth_nof_words;
+ WHEN c_tb_tech_tse_data_type_counter => RETURN c_network_total_header_32b_eth_nof_words;
WHEN OTHERS => NULL;
END CASE;
RETURN c_network_total_header_32b_nof_words;
- END func_tb_tse_header_size;
+ END func_tech_tse_header_size;
- ------------------------------------------------------------------------------
- -- MM bus
- ------------------------------------------------------------------------------
-
- -- Use default word addressing for MAC registers according to table 4.8, 4.9
- -- Use halfword addressing for PCS register to match table 4.17
- FUNCTION func_map_pcs_addr(pcs_addr : NATURAL) RETURN NATURAL IS
- BEGIN
- RETURN pcs_addr * 2 + c_tse_byte_addr_pcs_offset;
- END func_map_pcs_addr;
-
-
- ------------------------------------------------------------------------------
- -- Stream
- ------------------------------------------------------------------------------
-- Configure the TSE MAC
-- . The src_mac[47:0] = 0x123456789ABC for MAC address 12-34-56-78-9A-BC
- PROCEDURE proc_tse_setup(CONSTANT c_promis_en : IN BOOLEAN;
- CONSTANT c_tse_tx_fifo_depth : IN NATURAL;
- CONSTANT c_tse_rx_fifo_depth : IN NATURAL;
- CONSTANT c_tx_ready_latency : IN NATURAL;
- CONSTANT src_mac : IN STD_LOGIC_VECTOR(c_network_eth_mac_slv'RANGE);
- SIGNAL psc_access : OUT STD_LOGIC;
- SIGNAL mm_clk : IN STD_LOGIC;
- SIGNAL mm_miso : IN t_mem_miso;
- SIGNAL mm_mosi : OUT t_mem_mosi) IS
+ PROCEDURE proc_tech_tse_setup(CONSTANT c_promis_en : IN BOOLEAN;
+ CONSTANT c_tse_tx_fifo_depth : IN NATURAL;
+ CONSTANT c_tse_rx_fifo_depth : IN NATURAL;
+ CONSTANT c_tx_ready_latency : IN NATURAL;
+ CONSTANT src_mac : IN STD_LOGIC_VECTOR(c_network_eth_mac_slv'RANGE);
+ SIGNAL psc_access : OUT STD_LOGIC;
+ SIGNAL mm_clk : IN STD_LOGIC;
+ SIGNAL mm_miso : IN t_mem_miso;
+ SIGNAL mm_mosi : OUT t_mem_mosi) IS
CONSTANT c_mac0 : INTEGER := TO_SINT(hton(src_mac(47 DOWNTO 16), 4));
CONSTANT c_mac1 : INTEGER := TO_SINT(hton(src_mac(15 DOWNTO 0), 2));
BEGIN
@@ -210,32 +207,32 @@ PACKAGE BODY tb_tech_tse_pkg IS
proc_mem_mm_bus_rd(16#0EC#, mm_clk, mm_miso, mm_mosi); -- RX_CMD_STAT --> 0x02000000 : [25]=1 RX_SHIFT16
WAIT UNTIL rising_edge(mm_clk);
- END proc_tse_setup;
+ END proc_tech_tse_setup;
-- Transmit user packet
-- . Use word aligned payload data, so with half word inserted before the 14 byte header
-- . Packets can be send immediately after eachother so new sop directly after last eop
-- . The word rate is controlled by respecting ready from the MAC
- PROCEDURE proc_tse_tx_packet(CONSTANT total_header : IN t_network_total_header;
- CONSTANT data_len : IN NATURAL; -- in symbols = octets = bytes
- CONSTANT c_data_type : IN NATURAL; -- c_tb_tse_data_type_*
- CONSTANT c_ready_latency : IN NATURAL; -- 0, 1 are supported by proc_dp_stream_ready_latency()
- CONSTANT c_nof_not_valid : IN NATURAL; -- when > 0 then pull tx valid low for c_nof_not_valid beats during tx
- SIGNAL ff_clk : IN STD_LOGIC;
- SIGNAL ff_en : IN STD_LOGIC; -- similar purpose as c_nof_not_valid, but not used so pass on signal '1'
- SIGNAL ff_src_in : IN t_dp_siso;
- SIGNAL ff_src_out : OUT t_dp_sosi) IS
+ PROCEDURE proc_tech_tse_tx_packet(CONSTANT total_header : IN t_network_total_header;
+ CONSTANT data_len : IN NATURAL; -- in symbols = octets = bytes
+ CONSTANT c_data_type : IN NATURAL; -- c_tb_tech_tse_data_type_*
+ CONSTANT c_ready_latency : IN NATURAL; -- 0, 1 are supported by proc_dp_stream_ready_latency()
+ CONSTANT c_nof_not_valid : IN NATURAL; -- when > 0 then pull tx valid low for c_nof_not_valid beats during tx
+ SIGNAL ff_clk : IN STD_LOGIC;
+ SIGNAL ff_en : IN STD_LOGIC; -- similar purpose as c_nof_not_valid, but not used so pass on signal '1'
+ SIGNAL ff_src_in : IN t_dp_siso;
+ SIGNAL ff_src_out : OUT t_dp_sosi) IS
CONSTANT c_eth_header : t_network_eth_header := total_header.eth;
CONSTANT c_arp_words_arr : t_network_total_header_32b_arr := func_network_total_header_construct_arp( total_header.eth, total_header.arp);
CONSTANT c_icmp_words_arr : t_network_total_header_32b_arr := func_network_total_header_construct_icmp(total_header.eth, total_header.ip, total_header.icmp);
CONSTANT c_udp_words_arr : t_network_total_header_32b_arr := func_network_total_header_construct_udp( total_header.eth, total_header.ip, total_header.udp);
- CONSTANT c_mod : NATURAL := data_len MOD c_tse_symbols_per_beat;
- CONSTANT c_nof_data_beats : NATURAL := data_len / c_tse_symbols_per_beat + sel_a_b(c_mod, 1, 0);
- CONSTANT c_empty : NATURAL := sel_a_b(c_mod, c_tse_symbols_per_beat - c_mod, 0);
- VARIABLE v_sym : UNSIGNED(c_tse_symbol_w-1 DOWNTO 0) := (OTHERS=>'0');
- VARIABLE v_num : UNSIGNED(c_tse_data_w-1 DOWNTO 0) := (OTHERS=>'0');
+ CONSTANT c_mod : NATURAL := data_len MOD c_tech_tse_symbols_per_beat;
+ CONSTANT c_nof_data_beats : NATURAL := data_len / c_tech_tse_symbols_per_beat + sel_a_b(c_mod, 1, 0);
+ CONSTANT c_empty : NATURAL := sel_a_b(c_mod, c_tech_tse_symbols_per_beat - c_mod, 0);
+ VARIABLE v_sym : UNSIGNED(c_tech_tse_symbol_w-1 DOWNTO 0) := (OTHERS=>'0');
+ VARIABLE v_num : UNSIGNED(c_tech_tse_data_w-1 DOWNTO 0) := (OTHERS=>'0');
BEGIN
ff_src_out.empty <= TO_DP_EMPTY(0);
----------------------------------------------------------------------------
@@ -250,7 +247,7 @@ PACKAGE BODY tb_tech_tse_pkg IS
END LOOP;
----------------------------------------------------------------------------
-- ETH higher layer headers
- IF c_data_type=c_tb_tse_data_type_arp THEN
+ IF c_data_type=c_tb_tech_tse_data_type_arp THEN
FOR I IN c_nof_eth_beats TO c_nof_hdr_beats-2 LOOP
proc_dp_stream_ready_latency(c_ready_latency, ff_clk, ff_src_in.ready, ff_en, '0', '1', '0', '0', ff_src_out.sync, ff_src_out.valid, ff_src_out.sop, ff_src_out.eop);
ff_src_out.data <= RESIZE_DP_DATA(c_arp_words_arr(I));
@@ -259,31 +256,31 @@ PACKAGE BODY tb_tech_tse_pkg IS
-- . eop
ff_src_out.data <= RESIZE_DP_DATA(c_arp_words_arr(c_nof_hdr_beats-1));
proc_dp_stream_ready_latency(c_ready_latency, ff_clk, ff_src_in.ready, ff_en, '0', '1', '0', '1', ff_src_out.sync, ff_src_out.valid, ff_src_out.sop, ff_src_out.eop);
- ELSIF c_data_type=c_tb_tse_data_type_ping OR c_data_type=c_tb_tse_data_type_udp THEN
+ ELSIF c_data_type=c_tb_tech_tse_data_type_ping OR c_data_type=c_tb_tech_tse_data_type_udp THEN
FOR I IN c_nof_eth_beats TO c_nof_hdr_beats-1 LOOP
proc_dp_stream_ready_latency(c_ready_latency, ff_clk, ff_src_in.ready, ff_en, '0', '1', '0', '0', ff_src_out.sync, ff_src_out.valid, ff_src_out.sop, ff_src_out.eop);
CASE c_data_type IS
- WHEN c_tb_tse_data_type_ping => ff_src_out.data <= RESIZE_DP_DATA(c_icmp_words_arr(I));
- WHEN c_tb_tse_data_type_udp => ff_src_out.data <= RESIZE_DP_DATA(c_udp_words_arr(I));
+ WHEN c_tb_tech_tse_data_type_ping => ff_src_out.data <= RESIZE_DP_DATA(c_icmp_words_arr(I));
+ WHEN c_tb_tech_tse_data_type_udp => ff_src_out.data <= RESIZE_DP_DATA(c_udp_words_arr(I));
WHEN OTHERS => NULL;
END CASE;
END LOOP;
END IF;
----------------------------------------------------------------------------
-- Data
- IF c_data_type/=c_tb_tse_data_type_arp THEN
+ IF c_data_type/=c_tb_tech_tse_data_type_arp THEN
FOR I IN 0 TO c_nof_data_beats-1 LOOP
proc_dp_stream_ready_latency(c_ready_latency, ff_clk, ff_src_in.ready, ff_en, '0', '1', '0', '0', ff_src_out.sync, ff_src_out.valid, ff_src_out.sop, ff_src_out.eop);
CASE c_data_type IS
- WHEN c_tb_tse_data_type_counter =>
+ WHEN c_tb_tech_tse_data_type_counter =>
-- data : X"00000001", X"00000002", X"00000003", etc
v_num := v_num + 1;
ff_src_out.data <= RESIZE_DP_DATA(STD_LOGIC_VECTOR(v_num));
WHEN OTHERS =>
-- data : X"01020304", X"05060708", X"090A0B0C", etc
- FOR J IN c_tse_symbols_per_beat-1 DOWNTO 0 LOOP
+ FOR J IN c_tech_tse_symbols_per_beat-1 DOWNTO 0 LOOP
v_sym := v_sym + 1;
- ff_src_out.data((J+1)*c_tse_symbol_w-1 DOWNTO J*c_tse_symbol_w) <= STD_LOGIC_VECTOR(v_sym);
+ ff_src_out.data((J+1)*c_tech_tse_symbol_w-1 DOWNTO J*c_tech_tse_symbol_w) <= STD_LOGIC_VECTOR(v_sym);
END LOOP;
END CASE;
-- tb : pull valid low for some time during the middle of the payload
@@ -299,7 +296,7 @@ PACKAGE BODY tb_tech_tse_pkg IS
-- Overwrite empty data
ff_src_out.empty <= TO_DP_EMPTY(c_empty);
FOR J IN c_empty-1 DOWNTO 0 LOOP
- ff_src_out.data((J+1)*c_tse_symbol_w-1 DOWNTO J*c_tse_symbol_w) <= (OTHERS=>'0');
+ ff_src_out.data((J+1)*c_tech_tse_symbol_w-1 DOWNTO J*c_tech_tse_symbol_w) <= (OTHERS=>'0');
END LOOP;
END IF;
-- . eop
@@ -311,7 +308,7 @@ PACKAGE BODY tb_tech_tse_pkg IS
ff_src_out.valid <= '0';
ff_src_out.eop <= '0';
ff_src_out.empty <= TO_DP_EMPTY(0);
- END proc_tse_tx_packet;
+ END proc_tech_tse_tx_packet;
-- Receive packet
@@ -320,21 +317,21 @@ PACKAGE BODY tb_tech_tse_pkg IS
-- . The CRC32 is also passed on to the user at eop.
-- . Note that when empty/=0 then the CRC32 is not word aligned, so therefore use prev_data to be able
-- to handle part of last data word in case empty/=0 at eop
- PROCEDURE proc_tse_rx_packet(CONSTANT total_header : IN t_network_total_header;
- CONSTANT c_data_type : IN NATURAL; -- c_tb_tse_data_type_*
- SIGNAL ff_clk : IN STD_LOGIC;
- SIGNAL ff_snk_in : IN t_dp_sosi;
- SIGNAL ff_snk_out : OUT t_dp_siso) IS
+ PROCEDURE proc_tech_tse_rx_packet(CONSTANT total_header : IN t_network_total_header;
+ CONSTANT c_data_type : IN NATURAL; -- c_tb_tech_tse_data_type_*
+ SIGNAL ff_clk : IN STD_LOGIC;
+ SIGNAL ff_snk_in : IN t_dp_sosi;
+ SIGNAL ff_snk_out : OUT t_dp_siso) IS
CONSTANT c_eth_header : t_network_eth_header := total_header.eth;
CONSTANT c_arp_words_arr : t_network_total_header_32b_arr := func_network_total_header_construct_arp( total_header.eth, total_header.arp);
CONSTANT c_icmp_words_arr : t_network_total_header_32b_arr := func_network_total_header_construct_icmp(total_header.eth, total_header.ip, total_header.icmp);
CONSTANT c_udp_words_arr : t_network_total_header_32b_arr := func_network_total_header_construct_udp( total_header.eth, total_header.ip, total_header.udp);
- VARIABLE v_sym : UNSIGNED(c_tse_symbol_w-1 DOWNTO 0) := (OTHERS=>'0');
- VARIABLE v_num : UNSIGNED(c_tse_data_w-1 DOWNTO 0) := (OTHERS=>'0');
+ VARIABLE v_sym : UNSIGNED(c_tech_tse_symbol_w-1 DOWNTO 0) := (OTHERS=>'0');
+ VARIABLE v_num : UNSIGNED(c_tech_tse_data_w-1 DOWNTO 0) := (OTHERS=>'0');
VARIABLE v_empty : NATURAL;
VARIABLE v_first : BOOLEAN := TRUE;
- VARIABLE v_data : STD_LOGIC_VECTOR(c_tse_data_w-1 DOWNTO 0);
- VARIABLE v_prev_data : STD_LOGIC_VECTOR(c_tse_data_w-1 DOWNTO 0);
+ VARIABLE v_data : STD_LOGIC_VECTOR(c_tech_tse_data_w-1 DOWNTO 0);
+ VARIABLE v_prev_data : STD_LOGIC_VECTOR(c_tech_tse_data_w-1 DOWNTO 0);
BEGIN
-- Keep ff_rx_snk_out.ready='1' and ff_rx_snk_out.xon='1' all the time
ff_snk_out <= c_dp_siso_rdy;
@@ -353,7 +350,7 @@ PACKAGE BODY tb_tech_tse_pkg IS
ASSERT ff_snk_in.data(15 DOWNTO 0) = c_eth_header.eth_type REPORT "RX: Wrong ETH ethertype" SEVERITY ERROR;
----------------------------------------------------------------------------
-- Verify ETH higher layer headers
- IF c_data_type=c_tb_tse_data_type_arp THEN
+ IF c_data_type=c_tb_tech_tse_data_type_arp THEN
FOR I IN c_nof_eth_beats TO c_nof_hdr_beats-1 LOOP
proc_dp_stream_valid(ff_clk, ff_snk_in.valid);
ASSERT ff_snk_in.data(31 DOWNTO 0) = c_arp_words_arr(I) REPORT "RX: Wrong ARP response word" SEVERITY ERROR;
@@ -362,13 +359,13 @@ PACKAGE BODY tb_tech_tse_pkg IS
WHILE ff_snk_in.eop /= '1' LOOP
proc_dp_stream_valid(ff_clk, ff_snk_in.valid);
END LOOP;
- ELSIF c_data_type=c_tb_tse_data_type_ping OR c_data_type=c_tb_tse_data_type_udp THEN
+ ELSIF c_data_type=c_tb_tech_tse_data_type_ping OR c_data_type=c_tb_tech_tse_data_type_udp THEN
FOR I IN c_nof_eth_beats TO c_nof_hdr_beats-1 LOOP
proc_dp_stream_valid(ff_clk, ff_snk_in.valid);
IF I/=c_network_total_header_32b_ip_header_checksum_wi THEN -- do not verify tx ip header checksum
CASE c_data_type IS
- WHEN c_tb_tse_data_type_ping => ASSERT ff_snk_in.data(31 DOWNTO 0) = c_icmp_words_arr(I) REPORT "RX: Wrong IP/ICMP = PING response word" SEVERITY ERROR;
- WHEN c_tb_tse_data_type_udp => ASSERT ff_snk_in.data(31 DOWNTO 0) = c_udp_words_arr(I) REPORT "RX: Wrong IP/UDP response word" SEVERITY ERROR;
+ WHEN c_tb_tech_tse_data_type_ping => ASSERT ff_snk_in.data(31 DOWNTO 0) = c_icmp_words_arr(I) REPORT "RX: Wrong IP/ICMP = PING response word" SEVERITY ERROR;
+ WHEN c_tb_tech_tse_data_type_udp => ASSERT ff_snk_in.data(31 DOWNTO 0) = c_udp_words_arr(I) REPORT "RX: Wrong IP/UDP response word" SEVERITY ERROR;
WHEN OTHERS => NULL;
END CASE;
END IF;
@@ -376,16 +373,16 @@ PACKAGE BODY tb_tech_tse_pkg IS
END IF;
----------------------------------------------------------------------------
-- Verify DATA
- IF c_data_type/=c_tb_tse_data_type_arp THEN
+ IF c_data_type/=c_tb_tech_tse_data_type_arp THEN
-- . continue to eop
v_first := TRUE;
proc_dp_stream_valid(ff_clk, ff_snk_in.valid);
WHILE ff_snk_in.eop /= '1' LOOP
v_prev_data := v_data;
- v_data := ff_snk_in.data(c_tse_data_w-1 DOWNTO 0);
+ v_data := ff_snk_in.data(c_tech_tse_data_w-1 DOWNTO 0);
IF v_first = FALSE THEN
CASE c_data_type IS
- WHEN c_tb_tse_data_type_counter =>
+ WHEN c_tb_tech_tse_data_type_counter =>
-- data : X"00000001", X"00000002", X"00000003", etc
v_num := v_num + 1;
IF UNSIGNED(v_prev_data)/=0 THEN -- do not verify zero padding
@@ -393,10 +390,10 @@ PACKAGE BODY tb_tech_tse_pkg IS
END IF;
WHEN OTHERS =>
-- data : X"01020304", X"05060708", X"090A0B0C", etc
- FOR J IN c_tse_symbols_per_beat-1 DOWNTO 0 LOOP
+ FOR J IN c_tech_tse_symbols_per_beat-1 DOWNTO 0 LOOP
v_sym := v_sym + 1;
- IF UNSIGNED(v_prev_data((J+1)*c_tse_symbol_w-1 DOWNTO J*c_tse_symbol_w))/=0 THEN -- do not verify zero padding
- ASSERT UNSIGNED(v_prev_data((J+1)*c_tse_symbol_w-1 DOWNTO J*c_tse_symbol_w)) = v_sym REPORT "RX: Wrong data symbol" SEVERITY ERROR;
+ IF UNSIGNED(v_prev_data((J+1)*c_tech_tse_symbol_w-1 DOWNTO J*c_tech_tse_symbol_w))/=0 THEN -- do not verify zero padding
+ ASSERT UNSIGNED(v_prev_data((J+1)*c_tech_tse_symbol_w-1 DOWNTO J*c_tech_tse_symbol_w)) = v_sym REPORT "RX: Wrong data symbol" SEVERITY ERROR;
END IF;
END LOOP;
END CASE;
@@ -407,34 +404,34 @@ PACKAGE BODY tb_tech_tse_pkg IS
--------------------------------------------------------------------------
-- Verify last DATA and CRC32 if empty/=0 else the last word is only the CRC32
v_prev_data := v_data;
- v_data := ff_snk_in.data(c_tse_data_w-1 DOWNTO 0);
- v_empty := TO_INTEGER(UNSIGNED(ff_snk_in.empty(c_tse_empty_w-1 DOWNTO 0)));
+ v_data := ff_snk_in.data(c_tech_tse_data_w-1 DOWNTO 0);
+ v_empty := TO_INTEGER(UNSIGNED(ff_snk_in.empty(c_tech_tse_empty_w-1 DOWNTO 0)));
IF v_empty > 0 THEN
FOR J IN v_empty-1 DOWNTO 0 LOOP
- v_prev_data((J+1)*c_tse_symbol_w-1 DOWNTO J*c_tse_symbol_w) := (OTHERS=>'0');
+ v_prev_data((J+1)*c_tech_tse_symbol_w-1 DOWNTO J*c_tech_tse_symbol_w) := (OTHERS=>'0');
END LOOP;
CASE c_data_type IS
- WHEN c_tb_tse_data_type_counter =>
+ WHEN c_tb_tech_tse_data_type_counter =>
-- data : X"00000001", X"00000002", X"00000003", etc
v_num := v_num + 1;
FOR J IN v_empty-1 DOWNTO 0 LOOP
- v_num((J+1)*c_tse_symbol_w-1 DOWNTO J*c_tse_symbol_w) := (OTHERS=>'0'); -- force CRC32 symbols in last data word to 0
+ v_num((J+1)*c_tech_tse_symbol_w-1 DOWNTO J*c_tech_tse_symbol_w) := (OTHERS=>'0'); -- force CRC32 symbols in last data word to 0
END LOOP;
IF UNSIGNED(v_prev_data)/=0 THEN -- do not verify zero padding
ASSERT UNSIGNED(v_prev_data) = v_num REPORT "RX: Wrong empty data word" SEVERITY ERROR;
END IF;
WHEN OTHERS =>
-- data : X"01020304", X"05060708", X"090A0B0C", etc
- FOR J IN c_tse_symbols_per_beat-1 DOWNTO v_empty LOOP -- ignore CRC32 symbols in last data word
+ FOR J IN c_tech_tse_symbols_per_beat-1 DOWNTO v_empty LOOP -- ignore CRC32 symbols in last data word
v_sym := v_sym + 1;
- IF UNSIGNED(v_prev_data((J+1)*c_tse_symbol_w-1 DOWNTO J*c_tse_symbol_w))/=0 THEN -- do not verify zero padding
- ASSERT UNSIGNED(v_prev_data((J+1)*c_tse_symbol_w-1 DOWNTO J*c_tse_symbol_w)) = v_sym REPORT "RX: Wrong empty data symbol" SEVERITY ERROR;
+ IF UNSIGNED(v_prev_data((J+1)*c_tech_tse_symbol_w-1 DOWNTO J*c_tech_tse_symbol_w))/=0 THEN -- do not verify zero padding
+ ASSERT UNSIGNED(v_prev_data((J+1)*c_tech_tse_symbol_w-1 DOWNTO J*c_tech_tse_symbol_w)) = v_sym REPORT "RX: Wrong empty data symbol" SEVERITY ERROR;
END IF;
END LOOP;
END CASE;
END IF;
END IF;
-- No verify on CRC32 word
- END proc_tse_rx_packet;
+ END proc_tech_tse_rx_packet;
END tb_tech_tse_pkg;
diff --git a/libraries/technology/tse/tech_tse.vhd b/libraries/technology/tse/tech_tse.vhd
index f8c6f40ee1..dc647c7dae 100644
--- a/libraries/technology/tse/tech_tse.vhd
+++ b/libraries/technology/tse/tech_tse.vhd
@@ -55,21 +55,21 @@ ENTITY tech_tse IS
tx_snk_in : IN t_dp_sosi;
tx_snk_out : OUT t_dp_siso;
-- . MAC specific
- tx_mac_in : IN t_tse_tx_mac;
- tx_mac_out : OUT t_tse_tx_mac;
+ tx_mac_in : IN t_tech_tse_tx_mac;
+ tx_mac_out : OUT t_tech_tse_tx_mac;
-- MAC receive interface
-- . ST Source
rx_src_in : IN t_dp_siso;
rx_src_out : OUT t_dp_sosi;
-- . MAC specific
- rx_mac_out : OUT t_tse_rx_mac;
+ rx_mac_out : OUT t_tech_tse_rx_mac;
-- PHY interface
eth_txp : OUT STD_LOGIC;
eth_rxp : IN STD_LOGIC;
- tse_led : OUT t_tse_led
+ tse_led : OUT t_tech_tse_led
);
END tech_tse;
diff --git a/libraries/technology/tse/tech_tse_pkg.vhd b/libraries/technology/tse/tech_tse_pkg.vhd
index 996fb6f26b..030e0ea9f5 100644
--- a/libraries/technology/tse/tech_tse_pkg.vhd
+++ b/libraries/technology/tse/tech_tse_pkg.vhd
@@ -26,34 +26,34 @@ USE common_lib.common_pkg.ALL;
PACKAGE tech_tse_pkg IS
- CONSTANT c_tse_reg_addr_w : NATURAL := 8; -- = max 256 MAC registers
- CONSTANT c_tse_byte_addr_w : NATURAL := c_tse_reg_addr_w + 2;
- CONSTANT c_tse_byte_addr_pcs_offset : NATURAL := 16#200#; -- table 4.8, 4.9 in ug_ethernet.pdf
- CONSTANT c_tse_data_w : NATURAL := c_word_w; -- = 32
+ CONSTANT c_tech_tse_reg_addr_w : NATURAL := 8; -- = max 256 MAC registers
+ CONSTANT c_tech_tse_byte_addr_w : NATURAL := c_tech_tse_reg_addr_w + 2;
+ CONSTANT c_tech_tse_byte_addr_pcs_offset : NATURAL := 16#200#; -- table 4.8, 4.9 in ug_ethernet.pdf
+ CONSTANT c_tech_tse_data_w : NATURAL := c_word_w; -- = 32
- CONSTANT c_tse_symbol_w : NATURAL := c_byte_w; -- = 8
- CONSTANT c_tse_symbol_max : NATURAL := 2**c_tse_symbol_w-1; -- = 255
- CONSTANT c_tse_symbols_per_beat : NATURAL := c_tse_data_w / c_tse_symbol_w; -- = 4
+ CONSTANT c_tech_tse_symbol_w : NATURAL := c_byte_w; -- = 8
+ CONSTANT c_tech_tse_symbol_max : NATURAL := 2**c_tech_tse_symbol_w-1; -- = 255
+ CONSTANT c_tech_tse_symbols_per_beat : NATURAL := c_tech_tse_data_w / c_tech_tse_symbol_w; -- = 4
- CONSTANT c_tse_pcs_reg_addr_w : NATURAL := 5; -- = max 32 PCS registers
- CONSTANT c_tse_pcs_halfword_addr_w : NATURAL := c_tse_pcs_reg_addr_w + 1; -- table 4.17 in ug_ethernet.pdf
- CONSTANT c_tse_pcs_byte_addr_w : NATURAL := c_tse_pcs_reg_addr_w + 2;
- CONSTANT c_tse_pcs_data_w : NATURAL := c_halfword_w; -- = 16;
+ CONSTANT c_tech_tse_pcs_reg_addr_w : NATURAL := 5; -- = max 32 PCS registers
+ CONSTANT c_tech_tse_pcs_halfword_addr_w : NATURAL := c_tech_tse_pcs_reg_addr_w + 1; -- table 4.17 in ug_ethernet.pdf
+ CONSTANT c_tech_tse_pcs_byte_addr_w : NATURAL := c_tech_tse_pcs_reg_addr_w + 2;
+ CONSTANT c_tech_tse_pcs_data_w : NATURAL := c_halfword_w; -- = 16;
- CONSTANT c_tse_empty_w : NATURAL := 2;
- CONSTANT c_tse_tx_error_w : NATURAL := 1;
- CONSTANT c_tse_rx_error_w : NATURAL := 6;
- CONSTANT c_tse_error_w : NATURAL := largest(c_tse_tx_error_w, c_tse_rx_error_w);
- CONSTANT c_tse_err_stat_w : NATURAL := 18;
- CONSTANT c_tse_frm_type_w : NATURAL := 4;
+ CONSTANT c_tech_tse_empty_w : NATURAL := 2;
+ CONSTANT c_tech_tse_tx_error_w : NATURAL := 1;
+ CONSTANT c_tech_tse_rx_error_w : NATURAL := 6;
+ CONSTANT c_tech_tse_error_w : NATURAL := largest(c_tech_tse_tx_error_w, c_tech_tse_rx_error_w);
+ CONSTANT c_tech_tse_err_stat_w : NATURAL := 18;
+ CONSTANT c_tech_tse_frm_type_w : NATURAL := 4;
- CONSTANT c_tse_rx_ready_latency : NATURAL := 2; -- 2 = default when FIFO is used
- CONSTANT c_tse_tx_ready_latency : NATURAL := 1; -- c_tse_tx_ready_latency + 3 = TX_ALMOST_FULL
+ CONSTANT c_tech_tse_rx_ready_latency : NATURAL := 2; -- 2 = default when FIFO is used
+ CONSTANT c_tech_tse_tx_ready_latency : NATURAL := 1; -- c_tech_tse_tx_ready_latency + 3 = TX_ALMOST_FULL
- CONSTANT c_tse_tx_fifo_depth : NATURAL := 256; -- nof words for Tx FIFO
- CONSTANT c_tse_rx_fifo_depth : NATURAL := 256; -- nof words for Rx FIFO
+ CONSTANT c_tech_tse_tx_fifo_depth : NATURAL := 256; -- nof words for Tx FIFO
+ CONSTANT c_tech_tse_rx_fifo_depth : NATURAL := 256; -- nof words for Rx FIFO
- TYPE t_tse_tx_mac IS RECORD
+ TYPE t_tech_tse_tx_mac IS RECORD
-- Tx MAC inputs
crc_fwd : STD_LOGIC;
-- Tx MAC outputs
@@ -63,17 +63,17 @@ PACKAGE tech_tse_pkg IS
uflow : STD_LOGIC;
END RECORD;
- TYPE t_tse_rx_mac IS RECORD
+ TYPE t_tech_tse_rx_mac IS RECORD
-- Rx MAC inputs
-- Rx MAC outputs
- ethertype: STD_LOGIC_VECTOR(c_tse_err_stat_w-1 DOWNTO 0);
- frm_type : STD_LOGIC_VECTOR(c_tse_frm_type_w-1 DOWNTO 0);
+ ethertype: STD_LOGIC_VECTOR(c_tech_tse_err_stat_w-1 DOWNTO 0);
+ frm_type : STD_LOGIC_VECTOR(c_tech_tse_frm_type_w-1 DOWNTO 0);
dsav : STD_LOGIC;
a_full : STD_LOGIC;
a_empty : STD_LOGIC;
END RECORD;
- TYPE t_tse_led IS RECORD
+ TYPE t_tech_tse_led IS RECORD
an : STD_LOGIC;
link : STD_LOGIC;
disp_err : STD_LOGIC;
diff --git a/libraries/technology/tse/tech_tse_stratixiv.vhd b/libraries/technology/tse/tech_tse_stratixiv.vhd
index 4451d6637f..0b69c46c5c 100644
--- a/libraries/technology/tse/tech_tse_stratixiv.vhd
+++ b/libraries/technology/tse/tech_tse_stratixiv.vhd
@@ -55,27 +55,27 @@ ENTITY tech_tse_stratixiv IS
tx_snk_in : IN t_dp_sosi;
tx_snk_out : OUT t_dp_siso;
-- . MAC specific
- tx_mac_in : IN t_tse_tx_mac;
- tx_mac_out : OUT t_tse_tx_mac;
+ tx_mac_in : IN t_tech_tse_tx_mac;
+ tx_mac_out : OUT t_tech_tse_tx_mac;
-- MAC receive interface
-- . ST Source
rx_src_in : IN t_dp_siso;
rx_src_out : OUT t_dp_sosi;
-- . MAC specific
- rx_mac_out : OUT t_tse_rx_mac;
+ rx_mac_out : OUT t_tech_tse_rx_mac;
-- PHY interface
eth_txp : OUT STD_LOGIC;
eth_rxp : IN STD_LOGIC;
- tse_led : OUT t_tse_led
+ tse_led : OUT t_tech_tse_led
);
END tech_tse_stratixiv;
ARCHITECTURE str OF tech_tse_stratixiv IS
- SIGNAL ff_tx_mod : STD_LOGIC_VECTOR(c_tse_empty_w-1 DOWNTO 0);
+ SIGNAL ff_tx_mod : STD_LOGIC_VECTOR(c_tech_tse_empty_w-1 DOWNTO 0);
SIGNAL ff_rx_out : t_dp_sosi := c_dp_sosi_rst;
@@ -91,7 +91,7 @@ BEGIN
tx_snk_out.xon <= '1';
-- Force empty = 0 when eop = '0' to avoid TSE MAC bug of missing two bytes when empty = 2
- ff_tx_mod <= tx_snk_in.empty(c_tse_empty_w-1 DOWNTO 0) WHEN tx_snk_in.eop='1' ELSE (OTHERS=>'0');
+ ff_tx_mod <= tx_snk_in.empty(c_tech_tse_empty_w-1 DOWNTO 0) WHEN tx_snk_in.eop='1' ELSE (OTHERS=>'0');
-- Force unused bits and fields in rx_src_out to c_dp_sosi_rst to avoid confusing 'X' in wave window
rx_src_out <= ff_rx_out;
@@ -112,7 +112,7 @@ BEGIN
-- . Avalon ST
ff_tx_clk => tx_snk_clk,
ff_tx_rdy => tx_snk_out.ready,
- ff_tx_data => tx_snk_in.data(c_tse_data_w-1 DOWNTO 0),
+ ff_tx_data => tx_snk_in.data(c_tech_tse_data_w-1 DOWNTO 0),
ff_tx_wren => tx_snk_in.valid,
ff_tx_sop => tx_snk_in.sop,
ff_tx_eop => tx_snk_in.eop,
@@ -128,17 +128,17 @@ BEGIN
-- . Avalon ST
ff_rx_clk => rx_src_clk,
ff_rx_rdy => rx_src_in.ready,
- ff_rx_data => ff_rx_out.data(c_tse_data_w-1 DOWNTO 0),
+ ff_rx_data => ff_rx_out.data(c_tech_tse_data_w-1 DOWNTO 0),
ff_rx_dval => ff_rx_out.valid,
ff_rx_sop => ff_rx_out.sop,
ff_rx_eop => ff_rx_out.eop,
- ff_rx_mod => ff_rx_out.empty(c_tse_empty_w-1 DOWNTO 0),
- rx_err => ff_rx_out.err(c_tse_error_w-1 DOWNTO 0), -- [5] collision error (can only occur in half duplex mode)
- -- [4] PHY error on GMII
- -- [3] receive frame truncated due to FIFO overflow
- -- [2] CRC-32 error
- -- [1] invalid length
- -- [0] = OR of [1:5]
+ ff_rx_mod => ff_rx_out.empty(c_tech_tse_empty_w-1 DOWNTO 0),
+ rx_err => ff_rx_out.err(c_tech_tse_error_w-1 DOWNTO 0), -- [5] collision error (can only occur in half duplex mode)
+ -- [4] PHY error on GMII
+ -- [3] receive frame truncated due to FIFO overflow
+ -- [2] CRC-32 error
+ -- [1] invalid length
+ -- [0] = OR of [1:5]
-- . MAC specific
rx_err_stat => rx_mac_out.ethertype, -- [17,16] VLAN info, [15:0] Ethernet lentgh/type field
rx_frm_type => rx_mac_out.frm_type, -- [3]=VLAN, [2]=Broadcast, [1]=Multicast, [0]=Unicast
@@ -149,10 +149,10 @@ BEGIN
reset => mm_rst, -- asynchronous reset (choose synchronous to mm_clk)
-- MM control interface
clk => mm_clk,
- address => mm_sla_in.address(c_tse_byte_addr_w-1 DOWNTO 2),
- readdata => mm_sla_out.rddata(c_tse_data_w-1 DOWNTO 0),
+ address => mm_sla_in.address(c_tech_tse_byte_addr_w-1 DOWNTO 2),
+ readdata => mm_sla_out.rddata(c_tech_tse_data_w-1 DOWNTO 0),
read => mm_sla_in.rd,
- writedata => mm_sla_in.wrdata(c_tse_data_w-1 DOWNTO 0),
+ writedata => mm_sla_in.wrdata(c_tech_tse_data_w-1 DOWNTO 0),
write => mm_sla_in.wr,
waitrequest => mm_sla_out.waitrequest,
-- Status LEDs
@@ -187,7 +187,7 @@ BEGIN
-- . Avalon ST
ff_tx_clk => tx_snk_clk,
ff_tx_rdy => tx_snk_out.ready,
- ff_tx_data => tx_snk_in.data(c_tse_data_w-1 DOWNTO 0),
+ ff_tx_data => tx_snk_in.data(c_tech_tse_data_w-1 DOWNTO 0),
ff_tx_wren => tx_snk_in.valid,
ff_tx_sop => tx_snk_in.sop,
ff_tx_eop => tx_snk_in.eop,
@@ -203,17 +203,17 @@ BEGIN
-- . Avalon ST
ff_rx_clk => rx_src_clk,
ff_rx_rdy => rx_src_in.ready,
- ff_rx_data => ff_rx_out.data(c_tse_data_w-1 DOWNTO 0),
+ ff_rx_data => ff_rx_out.data(c_tech_tse_data_w-1 DOWNTO 0),
ff_rx_dval => ff_rx_out.valid,
ff_rx_sop => ff_rx_out.sop,
ff_rx_eop => ff_rx_out.eop,
- ff_rx_mod => ff_rx_out.empty(c_tse_empty_w-1 DOWNTO 0),
- rx_err => ff_rx_out.err(c_tse_error_w-1 DOWNTO 0), -- [5] collision error (can only occur in half duplex mode)
- -- [4] PHY error on GMII
- -- [3] receive frame truncated due to FIFO overflow
- -- [2] CRC-32 error
- -- [1] invalid length
- -- [0] = OR of [1:5]
+ ff_rx_mod => ff_rx_out.empty(c_tech_tse_empty_w-1 DOWNTO 0),
+ rx_err => ff_rx_out.err(c_tech_tse_error_w-1 DOWNTO 0), -- [5] collision error (can only occur in half duplex mode)
+ -- [4] PHY error on GMII
+ -- [3] receive frame truncated due to FIFO overflow
+ -- [2] CRC-32 error
+ -- [1] invalid length
+ -- [0] = OR of [1:5]
-- . MAC specific
rx_err_stat => rx_mac_out.ethertype, -- [17,16] VLAN info, [15:0] Ethernet lentgh/type field
rx_frm_type => rx_mac_out.frm_type, -- [3]=VLAN, [2]=Broadcast, [1]=Multicast, [0]=Unicast
@@ -224,10 +224,10 @@ BEGIN
reset => mm_rst, -- asynchronous reset (choose synchronous to mm_clk)
-- MM control interface
clk => mm_clk,
- address => mm_sla_in.address(c_tse_byte_addr_w-1 DOWNTO 2),
- readdata => mm_sla_out.rddata(c_tse_data_w-1 DOWNTO 0),
+ address => mm_sla_in.address(c_tech_tse_byte_addr_w-1 DOWNTO 2),
+ readdata => mm_sla_out.rddata(c_tech_tse_data_w-1 DOWNTO 0),
read => mm_sla_in.rd,
- writedata => mm_sla_in.wrdata(c_tse_data_w-1 DOWNTO 0),
+ writedata => mm_sla_in.wrdata(c_tech_tse_data_w-1 DOWNTO 0),
write => mm_sla_in.wr,
waitrequest => mm_sla_out.waitrequest,
-- ALTGX_RECONFIG
--
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