diff --git a/libraries/base/ring/src/vhdl/ring_lane.vhd b/libraries/base/ring/src/vhdl/ring_lane.vhd
index 73ab5af32b24ac3c13b5e9aabd9e6172092674ce..e0ccc75d9f3b84a0a67a5f98304032f607ddad68 100644
--- a/libraries/base/ring/src/vhdl/ring_lane.vhd
+++ b/libraries/base/ring/src/vhdl/ring_lane.vhd
@@ -92,7 +92,7 @@ END ring_lane;
 ARCHITECTURE str OF ring_lane IS
 
   CONSTANT c_lane_direction : STD_LOGIC := sel_a_b(g_lane_direction, '1', '0');
-  SIGNAL lane_info : t_lane_info;
+  SIGNAL lane_info : t_ring_lane_info;
 
 BEGIN
 
diff --git a/libraries/base/ring/src/vhdl/ring_lane_info.vhd b/libraries/base/ring/src/vhdl/ring_lane_info.vhd
index 64404d410a087d7813cc50869846790c141b316a..4cb4e6c23dc8f1e44ae312c606a33783fb644fc3 100644
--- a/libraries/base/ring/src/vhdl/ring_lane_info.vhd
+++ b/libraries/base/ring/src/vhdl/ring_lane_info.vhd
@@ -53,14 +53,14 @@ ENTITY ring_lane_info IS
     lane_direction     : IN STD_LOGIC;
 
     -- sdp info
-    lane_info          : OUT t_lane_info
+    lane_info          : OUT t_ring_lane_info
   );
 END ring_lane_info;
 
 
 ARCHITECTURE str OF ring_lane_info IS
 
-  SIGNAL lane_info_ro: t_lane_info;  -- ro = read only
+  SIGNAL lane_info_ro: t_ring_lane_info;  -- ro = read only
 
 BEGIN
 
diff --git a/libraries/base/ring/src/vhdl/ring_lane_info_reg.vhd b/libraries/base/ring/src/vhdl/ring_lane_info_reg.vhd
index 48c704142417e3ff572ea8ca378d5cf9b76ade86..584785ace3136a27538175fb94ebce48e37065ef 100644
--- a/libraries/base/ring/src/vhdl/ring_lane_info_reg.vhd
+++ b/libraries/base/ring/src/vhdl/ring_lane_info_reg.vhd
@@ -50,19 +50,19 @@ ENTITY ring_lane_info_reg IS
     reg_miso : OUT t_mem_miso;
 
     -- sdp info
-    lane_info_ro : IN  t_lane_info;  -- ro = read only
-    lane_info    : OUT t_lane_info
+    lane_info_ro : IN  t_ring_lane_info;  -- ro = read only
+    lane_info    : OUT t_ring_lane_info
   );
 END ring_lane_info_reg;
 
 
 ARCHITECTURE str OF ring_lane_info_reg IS
 
-  SIGNAL mm_fields_in  : STD_LOGIC_VECTOR(field_slv_in_len(c_lane_info_field_arr)-1 DOWNTO 0);
-  SIGNAL mm_fields_out : STD_LOGIC_VECTOR(field_slv_out_len(c_lane_info_field_arr)-1 DOWNTO 0);
+  SIGNAL mm_fields_in  : STD_LOGIC_VECTOR(field_slv_in_len(c_ring_lane_info_field_arr)-1 DOWNTO 0);
+  SIGNAL mm_fields_out : STD_LOGIC_VECTOR(field_slv_out_len(c_ring_lane_info_field_arr)-1 DOWNTO 0);
 
-  SIGNAL lane_info_rd : t_lane_info;
-  SIGNAL lane_info_wr : t_lane_info;
+  SIGNAL lane_info_rd : t_ring_lane_info;
+  SIGNAL lane_info_wr : t_ring_lane_info;
 
 BEGIN
 
@@ -81,7 +81,7 @@ BEGIN
   u_mm_fields: ENTITY mm_lib.mm_fields
   GENERIC MAP(
     g_use_slv_in_val  => FALSE,    -- use FALSE to save logic when always slv_in_val='1'
-    g_field_arr       => c_lane_info_field_arr
+    g_field_arr       => c_ring_lane_info_field_arr
   )
   PORT MAP (
     mm_clk     => mm_clk,
@@ -100,9 +100,9 @@ BEGIN
   );
 
   -- add "RO" fields to mm_fields  
-  mm_fields_in(field_hi(c_lane_info_field_arr, "lane_direction") DOWNTO field_lo(c_lane_info_field_arr, "lane_direction")) <= slv(lane_info_rd.lane_direction);
+  mm_fields_in(field_hi(c_ring_lane_info_field_arr, "lane_direction") DOWNTO field_lo(c_ring_lane_info_field_arr, "lane_direction")) <= slv(lane_info_rd.lane_direction);
 
   -- get "RW" fields from mm_fields
-  lane_info_wr.transport_nof_hops <= mm_fields_out(field_hi(c_lane_info_field_arr, "transport_nof_hops") DOWNTO field_lo(c_lane_info_field_arr, "transport_nof_hops"));
+  lane_info_wr.transport_nof_hops <= mm_fields_out(field_hi(c_ring_lane_info_field_arr, "transport_nof_hops") DOWNTO field_lo(c_ring_lane_info_field_arr, "transport_nof_hops"));
 
 END str;
diff --git a/libraries/base/ring/src/vhdl/ring_pkg.vhd b/libraries/base/ring/src/vhdl/ring_pkg.vhd
index 13d0d929bf57c5603d5c18f70f8367d519cf4d7e..41ecf785cedd835bc29d1b7270f45c6499d52560 100644
--- a/libraries/base/ring/src/vhdl/ring_pkg.vhd
+++ b/libraries/base/ring/src/vhdl/ring_pkg.vhd
@@ -35,15 +35,15 @@ USE common_lib.common_network_layers_pkg.ALL;
 
 PACKAGE ring_pkg is
 -- lane info, see https://support.astron.nl/confluence/x/jyu7Ag
-  TYPE t_lane_info IS RECORD
+  TYPE t_ring_lane_info IS RECORD
     transport_nof_hops : STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0);
     lane_direction     : STD_LOGIC; 
   END RECORD;   
 
-  CONSTANT c_lane_info_rst : t_lane_info := 
+  CONSTANT c_ring_lane_info_rst : t_ring_lane_info :=
       ( (OTHERS => '0'), '0' );  
 
-  CONSTANT c_lane_info_field_arr : t_common_field_arr(1 DOWNTO 0) := 
+  CONSTANT c_ring_lane_info_field_arr : t_common_field_arr(1 DOWNTO 0) :=
       ( (field_name_pad("transport_nof_hops"), "RW", 32, field_default(0)),
         (field_name_pad("lane_direction"),     "RO",  1, field_default(0)) );
 
diff --git a/libraries/base/ring/tb/vhdl/tb_ring_lane_info.vhd b/libraries/base/ring/tb/vhdl/tb_ring_lane_info.vhd
index 7b152204a3d02b20209eb8084ca95ed8e6b99dbf..09d06a669b4fc0b784486e4d2889a427fb98ccde 100644
--- a/libraries/base/ring/tb/vhdl/tb_ring_lane_info.vhd
+++ b/libraries/base/ring/tb/vhdl/tb_ring_lane_info.vhd
@@ -67,7 +67,7 @@ ARCHITECTURE tb OF tb_ring_lane_info IS
   -- signals used to change settings of ring_lane_info 
   SIGNAL lane_direction     : STD_LOGIC := '0'; 
 
-  SIGNAL lane_info  : t_lane_info; 
+  SIGNAL lane_info  : t_ring_lane_info;
 
   -- signals used for response of mm bus
   SIGNAL mm_natural_response : NATURAL;