diff --git a/libraries/base/common/src/vhdl/common_areset.vhd b/libraries/base/common/src/vhdl/common_areset.vhd index f2e4286f54812b5d2d7f7859494ee7bf67a572fe..a1ee86812bf3c6d3d2d53233be9f5f3043b9b7bf 100644 --- a/libraries/base/common/src/vhdl/common_areset.vhd +++ b/libraries/base/common/src/vhdl/common_areset.vhd @@ -79,29 +79,41 @@ begin -- 2009 -- Capture asynchronous reset assertion, to also support i_rst when there is -- no clk. - u_async : entity work.common_async - generic map ( - g_rst_level => c_out_rst_level, - g_delay_len => g_delay_len - ) - port map ( - rst => i_rst, - clk => clk, - din => c_out_rst_level_n, - dout => o_rst - ); + without_pipe : if g_tree_len = 0 generate + u_async : entity work.common_async + generic map ( + g_rst_level => c_out_rst_level, + g_delay_len => g_delay_len + ) + port map ( + rst => i_rst, + clk => clk, + din => c_out_rst_level_n, + dout => out_rst + ); + end generate; -- 2024 -- Pass on synchronized reset with sufficient g_tree_len to ease timing -- closure by FF duplication in out_rst tree. Keep rst = '0' to break -- combinatorial path with in_rst to ease timing closure in the reset tree - -- network. Use g_tree_len = 0 for wire out_rst <= o_rst, so no reset tree - -- as in 2009. - no_pipe : if g_tree_len = 0 generate - out_rst <= o_rst; -- wires - end generate; + -- network. Use g_tree_len = 0 for no clocked reset tree as in 2009. + -- Instantiate u_async again to keep 2009 and 2024 completely independent. + -- To avoid delta-cycle differences due to e.g. out_rst <= o_rst when + -- g_tree_len = 0, that could lead to different results in a simulation tb. + with_pipe : if g_tree_len > 0 generate + u_async : entity work.common_async + generic map ( + g_rst_level => c_out_rst_level, + g_delay_len => g_delay_len + ) + port map ( + rst => i_rst, + clk => clk, + din => c_out_rst_level_n, + dout => o_rst + ); - gen_pipe : if g_tree_len > 0 generate u_pipe : entity work.common_async generic map ( g_rst_level => c_out_rst_level,