diff --git a/applications/unb1_correlator/src/vhdl/unb1_correlator.vhd b/applications/unb1_correlator/src/vhdl/unb1_correlator.vhd index 751fd758c02db3e59d123212fbd866adade41e42..7b71ca25e223547fa4b9c81c41cd80ad456995f1 100644 --- a/applications/unb1_correlator/src/vhdl/unb1_correlator.vhd +++ b/applications/unb1_correlator/src/vhdl/unb1_correlator.vhd @@ -117,15 +117,18 @@ ARCHITECTURE str OF unb1_correlator IS -- Correlator CONSTANT c_nof_inputs : NATURAL := 10; - CONSTANT c_nof_pre_mult_folds : NATURAL := 0; + CONSTANT c_nof_pre_mult_folds : NATURAL := 4; CONSTANT c_complex_data_w : NATURAL := 16; CONSTANT c_conjugate : BOOLEAN := TRUE; CONSTANT c_nof_channels : NATURAL := 64; CONSTANT c_integration_period : NATURAL := 0; + -- Gap size on the correlator input depends on the number of folds + CONSTANT c_block_period : NATURAL := pow2(c_nof_pre_mult_folds); + -- Block generator CONSTANT c_bg_block_size : NATURAL := c_nof_channels; - CONSTANT c_bg_gapsize : NATURAL := 0; + CONSTANT c_bg_gapsize : NATURAL := c_bg_block_size*(c_block_period-1); CONSTANT c_bg_blocks_per_sync : NATURAL := 10; CONSTANT c_bg_ctrl : t_diag_block_gen := ('1', -- enable '0', -- enable_sync @@ -136,6 +139,11 @@ ARCHITECTURE str OF unb1_correlator IS TO_UVEC( c_bg_block_size-1, c_diag_bg_mem_high_adrs_w), TO_UVEC( 0, c_diag_bg_bsn_init_w)); + SIGNAL block_gen_src_out_arr : t_dp_sosi_arr(c_nof_inputs-1 DOWNTO 0); + + SIGNAL dp_fifo_sc_src_out_arr : t_dp_sosi_arr(c_nof_inputs-1 DOWNTO 0); + SIGNAL dp_fifo_sc_src_in_arr : t_dp_siso_arr(c_nof_inputs-1 DOWNTO 0); + SIGNAL correlator_snk_in_arr : t_dp_sosi_arr(c_nof_inputs-1 DOWNTO 0); SIGNAL correlator_src_out_arr : t_dp_sosi_arr(1-1 DOWNTO 0); @@ -168,9 +176,55 @@ BEGIN dp_rst => dp_rst, dp_clk => dp_clk, - out_sosi_arr => correlator_snk_in_arr + out_sosi_arr => block_gen_src_out_arr ); + ----------------------------------------------------------------------------- + -- Introduce gaps in the input stream + -- . mms_diag_block_gen does not support gaps within blocks. + -- . We'll use FIFO buffers and dp_gap to read out the FIFOs to introduce + -- gaps. + ----------------------------------------------------------------------------- + gen_dp_fifo_sc : FOR i IN 0 TO c_nof_inputs-1 GENERATE + u_dp_fifo_sc : ENTITY dp_lib.dp_fifo_sc + GENERIC MAP ( + g_data_w => 2*c_complex_data_w, + g_use_ctrl => FALSE, + g_use_complex => TRUE, + g_fifo_size => c_nof_channels, + g_fifo_af_margin => 0 + ) + PORT MAP ( + rst => dp_rst, + clk => dp_clk, + + wr_ful => OPEN, + usedw => OPEN, + rd_emp => OPEN, + + snk_out => OPEN, + snk_in => block_gen_src_out_arr(i), + src_in => dp_fifo_sc_src_in_arr(i), + src_out => dp_fifo_sc_src_out_arr(i) + ); + END GENERATE; + + gen_dp_src_out_timer : FOR i IN 0 TO c_nof_inputs-1 GENERATE + u_dp_src_out_timer : ENTITY dp_lib.dp_src_out_timer + GENERIC MAP ( + g_block_period => c_block_period + ) + PORT MAP ( + rst => dp_rst, + clk => dp_clk, + + snk_in => dp_fifo_sc_src_out_arr(i), + snk_out => dp_fifo_sc_src_in_arr(i) + ); + END GENERATE; + + correlator_snk_in_arr <= dp_fifo_sc_src_out_arr; + ----------------------------------------------------------------------------- -- Correlator -----------------------------------------------------------------------------