diff --git a/boards/uniboard2c/designs/unb2c_heater/src/vhdl/unb2c_heater.vhd b/boards/uniboard2c/designs/unb2c_heater/src/vhdl/unb2c_heater.vhd
index befb39056821d179db3f59005065a6ab1134200c..82d1e7c0cc013b50482ec1583f3a55bc79bd63dd 100644
--- a/boards/uniboard2c/designs/unb2c_heater/src/vhdl/unb2c_heater.vhd
+++ b/boards/uniboard2c/designs/unb2c_heater/src/vhdl/unb2c_heater.vhd
@@ -39,7 +39,7 @@ ENTITY unb2c_heater IS
g_sim_node_nr : NATURAL := 0;
g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF
g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF
- g_stamp_svn : NATURAL := 0; -- SVN revision -- set by QSF
+ g_revision_id : STRING := ""; -- revision ID -- set by QSF
g_factory_image : BOOLEAN := FALSE
);
PORT (
@@ -172,7 +172,7 @@ BEGIN
g_design_note => g_design_note,
g_stamp_date => g_stamp_date,
g_stamp_time => g_stamp_time,
- g_stamp_svn => g_stamp_svn,
+ g_revision_id => g_revision_id,
g_fw_version => c_fw_version,
g_mm_clk_freq => c_mm_clk_freq,
g_dp_clk_use_pll=> TRUE,
diff --git a/boards/uniboard2c/designs/unb2c_jesd/revisions/unb2c_jesd_node0/unb2c_jesd_node0.vhd b/boards/uniboard2c/designs/unb2c_jesd/revisions/unb2c_jesd_node0/unb2c_jesd_node0.vhd
index 3aee80ff60672ad9b698a03f8d6d6028e4d3970f..48db3722010c9c639d08770c23ba8894200dc37a 100644
--- a/boards/uniboard2c/designs/unb2c_jesd/revisions/unb2c_jesd_node0/unb2c_jesd_node0.vhd
+++ b/boards/uniboard2c/designs/unb2c_jesd/revisions/unb2c_jesd_node0/unb2c_jesd_node0.vhd
@@ -40,7 +40,7 @@ ENTITY unb2c_jesd_node0 IS
g_sim_node_nr : NATURAL := 0;
g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF
g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF
- g_stamp_svn : NATURAL := 0; -- SVN revision -- set by QSF
+ g_revision_id : STRING := ""; -- revision ID -- set by QSF
g_protect_addr_range: BOOLEAN := FALSE
);
PORT (
@@ -94,7 +94,7 @@ BEGIN
g_sim_node_nr => g_sim_node_nr,
g_stamp_date => g_stamp_date,
g_stamp_time => g_stamp_time,
- g_stamp_svn => g_stamp_svn,
+ g_revision_id => g_revision_id,
g_protect_addr_range => g_protect_addr_range
)
PORT MAP (
diff --git a/boards/uniboard2c/designs/unb2c_jesd/revisions/unb2c_jesd_node3/unb2c_jesd_node3.vhd b/boards/uniboard2c/designs/unb2c_jesd/revisions/unb2c_jesd_node3/unb2c_jesd_node3.vhd
index c7bdb1e3d4e7b45b39c428e713c668269ad417c2..8f2e29550d00dc45995fcab2947ca56031a9a66c 100644
--- a/boards/uniboard2c/designs/unb2c_jesd/revisions/unb2c_jesd_node3/unb2c_jesd_node3.vhd
+++ b/boards/uniboard2c/designs/unb2c_jesd/revisions/unb2c_jesd_node3/unb2c_jesd_node3.vhd
@@ -40,7 +40,7 @@ ENTITY unb2c_jesd_node3 IS
g_sim_node_nr : NATURAL := 0;
g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF
g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF
- g_stamp_svn : NATURAL := 0; -- SVN revision -- set by QSF
+ g_revision_id : STRING := ""; -- revision ID -- set by QSF
g_protect_addr_range: BOOLEAN := FALSE
);
PORT (
@@ -94,7 +94,7 @@ BEGIN
g_sim_node_nr => g_sim_node_nr,
g_stamp_date => g_stamp_date,
g_stamp_time => g_stamp_time,
- g_stamp_svn => g_stamp_svn,
+ g_revision_id => g_revision_id,
g_protect_addr_range => g_protect_addr_range
)
PORT MAP (
diff --git a/boards/uniboard2c/designs/unb2c_jesd/src/vhdl/unb2c_jesd.vhd b/boards/uniboard2c/designs/unb2c_jesd/src/vhdl/unb2c_jesd.vhd
index 0acfbcc0c2bfa4e12c81292cdb57ce53e486e78b..8d7ab65937519a5c312194a6e54ae1ba4886345c 100644
--- a/boards/uniboard2c/designs/unb2c_jesd/src/vhdl/unb2c_jesd.vhd
+++ b/boards/uniboard2c/designs/unb2c_jesd/src/vhdl/unb2c_jesd.vhd
@@ -40,7 +40,7 @@ ENTITY unb2c_jesd IS
g_sim_node_nr : NATURAL := 0;
g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF
g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF
- g_stamp_svn : NATURAL := 0; -- SVN revision -- set by QSF
+ g_revision_id : STRING := ""; -- revision ID -- set by QSF
g_factory_image : BOOLEAN := FALSE;
g_protect_addr_range: BOOLEAN := FALSE
);
@@ -195,7 +195,7 @@ BEGIN
g_design_note => g_design_note,
g_stamp_date => g_stamp_date,
g_stamp_time => g_stamp_time,
- g_stamp_svn => g_stamp_svn,
+ g_revision_id => g_revision_id,
g_fw_version => c_fw_version,
g_mm_clk_freq => c_mm_clk_freq,
g_eth_clk_freq => c_unb2c_board_eth_clk_freq_125M,
diff --git a/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/unb2c_minimal.vhd b/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/unb2c_minimal.vhd
index add44f07d9fdda3aba66fd3bbab98694108b9e50..bd2533c32eb6dd6340f021394e5a0de7fb034534 100644
--- a/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/unb2c_minimal.vhd
+++ b/boards/uniboard2c/designs/unb2c_minimal/src/vhdl/unb2c_minimal.vhd
@@ -38,7 +38,7 @@ ENTITY unb2c_minimal IS
g_sim_node_nr : NATURAL := 0;
g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF
g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF
- g_stamp_svn : NATURAL := 0; -- SVN revision -- set by QSF
+ g_revision_id : STRING := ""; -- revision id -- set by QSF
g_factory_image : BOOLEAN := TRUE;
g_protect_addr_range: BOOLEAN := FALSE
);
@@ -168,7 +168,7 @@ BEGIN
g_design_note => g_design_note,
g_stamp_date => g_stamp_date,
g_stamp_time => g_stamp_time,
- g_stamp_svn => g_stamp_svn,
+ g_revision_id => g_revision_id,
g_fw_version => c_fw_version,
g_mm_clk_freq => c_mm_clk_freq,
g_eth_clk_freq => c_unb2c_board_eth_clk_freq_125M,
diff --git a/boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_10GbE/unb2c_test_10GbE.vhd b/boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_10GbE/unb2c_test_10GbE.vhd
index 0ef8b438a84f27dad8e3dcd48cd04ab95bc9385b..9379f069547ae248551f8363d8f4589b5d7e59dd 100644
--- a/boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_10GbE/unb2c_test_10GbE.vhd
+++ b/boards/uniboard2c/designs/unb2c_test/revisions/unb2c_test_10GbE/unb2c_test_10GbE.vhd
@@ -37,7 +37,7 @@ ENTITY unb2c_test_10GbE IS
g_sim_node_nr : NATURAL := 0;
g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF
g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF
- g_stamp_svn : NATURAL := 0 -- SVN revision -- set by QSF
+ g_revision_id : STRING := 0 -- revision ID -- set by QSF
);
PORT (
-- GENERAL
@@ -120,7 +120,7 @@ BEGIN
g_sim_node_nr => g_sim_node_nr,
g_stamp_date => g_stamp_date,
g_stamp_time => g_stamp_time,
- g_stamp_svn => g_stamp_svn
+ g_revision_id => g_revision_id
)
PORT MAP (
-- GENERAL
diff --git a/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd b/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd
index c970a0adfdefb20b1630b27fe713a3eeb6b0a075..5bbefae0393816525dc605a852fdb29d5d53f58f 100644
--- a/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd
+++ b/boards/uniboard2c/designs/unb2c_test/src/vhdl/unb2c_test.vhd
@@ -47,7 +47,7 @@ ENTITY unb2c_test IS
g_sim_model_ddr : BOOLEAN := FALSE;
g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF
g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF
- g_stamp_svn : NATURAL := 0; -- SVN revision -- set by QSF
+ g_revision_id : STRING := ""; -- revision ID -- set by QSF
g_factory_image : BOOLEAN := FALSE
);
PORT (
@@ -470,7 +470,7 @@ BEGIN
g_design_note => g_design_note,
g_stamp_date => g_stamp_date,
g_stamp_time => g_stamp_time,
- g_stamp_svn => g_stamp_svn,
+ g_revision_id => g_revision_id,
g_fw_version => c_fw_version,
g_mm_clk_freq => sel_a_b(g_sim,c_unb2c_board_mm_clk_freq_25M,c_unb2c_board_mm_clk_freq_125M),
g_eth_clk_freq => c_unb2c_board_eth_clk_freq_125M,
diff --git a/boards/uniboard2c/libraries/unb2c_board/quartus/unb2c_board.qsf b/boards/uniboard2c/libraries/unb2c_board/quartus/unb2c_board.qsf
index 4f7ea6aadbeefff1674d62f686b839e236ce7479..bcaa9b0c54705d15457044040b8927dcb600ca84 100644
--- a/boards/uniboard2c/libraries/unb2c_board/quartus/unb2c_board.qsf
+++ b/boards/uniboard2c/libraries/unb2c_board/quartus/unb2c_board.qsf
@@ -311,8 +311,8 @@ set_parameter -name dbg_user_identifier 1 -to "unb2c_test:u_revision|unb2c_board
if { [info exists ::env(UNB_COMPILE_STAMPS) ] } {
set_parameter -name g_stamp_date [clock format [clock seconds] -format {%Y%m%d}]
set_parameter -name g_stamp_time [clock format [clock seconds] -format {%H%M%S}]
- post_message -type info "RADIOHDL: using GIT $::env(HDL_GIT_REVISION)"
- set_parameter -name g_stamp_svn [regsub -all {[^0-9]} [exec echo $::env(HDL_GIT_REVISION)] ""]
+ post_message -type info "RADIOHDL: using GIT $::env(HDL_GIT_REVISION_SHORT)"
+ set_parameter -name g_revision_id [regsub -all {[^0-9a-f]} [exec echo $::env(HDL_GIT_REVISION_SHORT)] ""]
}
#set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to "ctrl_unb2c_board:u_ctrl|eth:\\gen_eth:u_eth|tech_tse:u_tech_tse|tech_tse_arria10_e1sg:\\gen_ip_arria10_e1sg:u0|ip_arria10_e1sg_tse_sgmii_lvds:\\u_LVDS_tse:u_tse|ip_arria10_e1sg_tse_sgmii_lvds_altera_eth_tse_151_6kz2wlq:eth_tse_0|altera_eth_tse_pcs_pma_nf_lvds:i_tse_pcs_0|tbi_tx_d"
diff --git a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/ctrl_unb2c_board.vhd b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/ctrl_unb2c_board.vhd
index aa081006d537222d71aaa1212bd0a1699f7abc91..a999f85989155bd507bab58df4f2abaeb37e0c80 100644
--- a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/ctrl_unb2c_board.vhd
+++ b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/ctrl_unb2c_board.vhd
@@ -41,18 +41,18 @@ ENTITY ctrl_unb2c_board IS
----------------------------------------------------------------------------
-- General
----------------------------------------------------------------------------
- g_technology : NATURAL := c_tech_arria10;
- g_sim : BOOLEAN := FALSE;
- g_design_name : STRING := "UNUSED";
- g_fw_version : t_unb2c_board_fw_version := (0, 0); -- firmware version x.y
- g_stamp_date : NATURAL := 0;
- g_stamp_time : NATURAL := 0;
- g_stamp_svn : NATURAL := 0;
- g_design_note : STRING := "UNUSED";
- g_base_ip : STD_LOGIC_VECTOR(16-1 DOWNTO 0) := X"0A63"; -- Base IP address used by unb_osy: 10.99.xx.yy
- g_mm_clk_freq : NATURAL := c_unb2c_board_mm_clk_freq_125M;
- g_eth_clk_freq : NATURAL := c_unb2c_board_eth_clk_freq_125M;
- g_tse_clk_buf : BOOLEAN := FALSE;
+ g_technology : NATURAL := c_tech_arria10;
+ g_sim : BOOLEAN := FALSE;
+ g_design_name : STRING := "UNUSED";
+ g_fw_version : t_unb2c_board_fw_version := (0, 0); -- firmware version x.y
+ g_stamp_date : NATURAL := 0;
+ g_stamp_time : NATURAL := 0;
+ g_revision_id : STRING := ""; -- revision_id, commit hash (first 9 chars) or number
+ g_design_note : STRING := "UNUSED";
+ g_base_ip : STD_LOGIC_VECTOR(16-1 DOWNTO 0) := X"0A63"; -- Base IP address used by unb_osy: 10.99.xx.yy
+ g_mm_clk_freq : NATURAL := c_unb2c_board_mm_clk_freq_125M;
+ g_eth_clk_freq : NATURAL := c_unb2c_board_eth_clk_freq_125M;
+ g_tse_clk_buf : BOOLEAN := FALSE;
----------------------------------------------------------------------------
-- External CLK
@@ -251,7 +251,7 @@ END ctrl_unb2c_board;
ARCHITECTURE str OF ctrl_unb2c_board IS
- CONSTANT c_rom_version : NATURAL := 1; -- Only increment when something changes to the register map of rom_system_info.
+ CONSTANT c_rom_version : NATURAL := 2; -- Only increment when something changes to the register map of rom_system_info.
CONSTANT c_reset_len : NATURAL := 4; -- >= c_meta_delay_len from common_pkg
CONSTANT c_mm_clk_freq : NATURAL := sel_a_b(g_sim=FALSE,g_mm_clk_freq,c_unb2c_board_mm_clk_freq_10M);
@@ -492,25 +492,25 @@ BEGIN
g_fw_version => g_fw_version,
g_stamp_date => g_stamp_date,
g_stamp_time => g_stamp_time,
- g_stamp_svn => g_stamp_svn,
+ g_revision_id => g_revision_id,
g_design_note => g_design_note,
g_rom_version => c_rom_version
)
PORT MAP (
- mm_clk => i_mm_clk,
- mm_rst => i_mm_rst,
+ mm_clk => i_mm_clk,
+ mm_rst => i_mm_rst,
- hw_version => VERSION,
- id => ID,
+ hw_version => VERSION,
+ id => ID,
- reg_mosi => reg_unb_system_info_mosi,
- reg_miso => reg_unb_system_info_miso,
+ reg_mosi => reg_unb_system_info_mosi,
+ reg_miso => reg_unb_system_info_miso,
- rom_mosi => rom_unb_system_info_mosi,
- rom_miso => rom_unb_system_info_miso,
+ rom_mosi => rom_unb_system_info_mosi,
+ rom_miso => rom_unb_system_info_miso,
- chip_id => this_chip_id,
- bck_id => this_bck_id
+ chip_id => this_chip_id,
+ bck_id => this_bck_id
);
@@ -550,10 +550,10 @@ BEGIN
u_toggle : ENTITY common_lib.common_toggle
PORT MAP (
- rst => i_mm_rst,
- clk => i_mm_clk,
- in_dat => mm_pulse_s,
- out_dat => led_toggle
+ rst => i_mm_rst,
+ clk => i_mm_clk,
+ in_dat => mm_pulse_s,
+ out_dat => led_toggle
);
@@ -567,13 +567,13 @@ BEGIN
u_unb2c_board_wdi_reg : ENTITY work.unb2c_board_wdi_reg
PORT MAP (
- mm_rst => i_mm_rst,
- mm_clk => i_mm_clk,
+ mm_rst => i_mm_rst,
+ mm_clk => i_mm_clk,
- sla_in => reg_wdi_mosi,
- sla_out => reg_wdi_miso,
+ sla_in => reg_wdi_mosi,
+ sla_out => reg_wdi_miso,
- wdi_override => wdi_override
+ wdi_override => wdi_override
);
@@ -585,16 +585,16 @@ BEGIN
-- and reconfigure from that address.
u_mms_remu: ENTITY remu_lib.mms_remu
GENERIC MAP (
- g_technology => g_technology
+ g_technology => g_technology
)
PORT MAP (
- mm_rst => i_mm_rst,
- mm_clk => i_mm_clk,
+ mm_rst => i_mm_rst,
+ mm_clk => i_mm_clk,
- epcs_clk => epcs_clk,
+ epcs_clk => epcs_clk,
- remu_mosi => reg_remu_mosi,
- remu_miso => reg_remu_miso
+ remu_mosi => reg_remu_mosi,
+ remu_miso => reg_remu_miso
);
-------------------------------------------------------------------------------
diff --git a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/mms_unb2c_board_system_info.vhd b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/mms_unb2c_board_system_info.vhd
index e005592ce60054e6fb54cbc5112fa1c4b85ec151..2ff374e3e70d7752a5b9571ce3df46078c6ef6b2 100644
--- a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/mms_unb2c_board_system_info.vhd
+++ b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/mms_unb2c_board_system_info.vhd
@@ -34,9 +34,9 @@ ENTITY mms_unb2c_board_system_info IS
g_fw_version : t_unb2c_board_fw_version := c_unb2c_board_fw_version; -- firmware version x.y
g_stamp_date : NATURAL := 0;
g_stamp_time : NATURAL := 0;
- g_stamp_svn : NATURAL := 0;
+ g_revision_id : STRING := "";
g_design_note : STRING := "";
- g_rom_version : NATURAL := 1;
+ g_rom_version : NATURAL := 2;
g_aux : t_c_unb2c_board_aux := c_unb2c_board_aux -- aux contains the hardware version
);
PORT (
@@ -67,7 +67,7 @@ ARCHITECTURE str OF mms_unb2c_board_system_info IS
-- Provide different prefixes (absolute and relative) for the same path. ModelSim understands $UNB, Quartus does not.
-- Required because the work paths of ModelSim and Quartus are different.
CONSTANT c_quartus_path_prefix : STRING := "";
- CONSTANT c_modelsim_path_prefix : STRING := "$UNB/Firmware/designs/" & g_design_name & "/build/synth/quartus/";
+ CONSTANT c_modelsim_path_prefix : STRING := "$UNB/Firmware/designs/" & g_design_name & "/build/synth/quartus/"; -- TODO: change path
CONSTANT c_path_prefix : STRING := sel_a_b(g_sim, c_modelsim_path_prefix, c_quartus_path_prefix);
-- No longer supporting MIF files in sim as non-$UNB (e.g. $AARTFAAC) designs will cause path error.
@@ -90,8 +90,8 @@ BEGIN
u_unb2c_board_system_info: ENTITY work.unb2c_board_system_info
GENERIC MAP (
- g_sim => g_sim,
- g_fw_version => g_fw_version,
+ g_sim => g_sim,
+ g_fw_version => g_fw_version,
g_rom_version => g_rom_version,
g_technology => g_technology
)
@@ -109,24 +109,24 @@ BEGIN
g_design_name => g_design_name,
g_stamp_date => g_stamp_date,
g_stamp_time => g_stamp_time,
- g_stamp_svn => g_stamp_svn,
+ g_revision_id => g_revision_id,
g_design_note => g_design_note
)
PORT MAP (
- mm_rst => mm_rst,
- mm_clk => mm_clk,
+ mm_rst => mm_rst,
+ mm_clk => mm_clk,
- sla_in => reg_mosi,
- sla_out => reg_miso,
+ sla_in => reg_mosi,
+ sla_out => reg_miso,
- info => i_info
+ info => i_info
);
u_common_rom : ENTITY common_lib.common_rom
GENERIC MAP (
g_technology => g_technology,
- g_ram => c_mm_rom,
- g_init_file => c_mif_name
+ g_ram => c_mm_rom,
+ g_init_file => c_mif_name
)
PORT MAP (
rst => mm_rst,
diff --git a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_system_info.vhd b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_system_info.vhd
index c45a37c00e6de29a5dc8434df95dae74a10664c2..6eb4763be5148e45f72bddb26a3a92abda5009fa 100644
--- a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_system_info.vhd
+++ b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_system_info.vhd
@@ -35,7 +35,7 @@ ENTITY unb2c_board_system_info IS
g_sim : BOOLEAN := FALSE;
g_fw_version : t_unb2c_board_fw_version := c_unb2c_board_fw_version; -- firmware version x.y (4b.4b)
g_aux : t_c_unb2c_board_aux := c_unb2c_board_aux; -- aux contains the hardware version
- g_rom_version: NATURAL := 1;
+ g_rom_version: NATURAL := 2;
g_technology : NATURAL := c_tech_arria10
);
PORT (
diff --git a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_system_info_reg.vhd b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_system_info_reg.vhd
index 93dcc582dd75796ea0242aa1fef215bc90695de7..34b69bb9152dd49966f73533bc684efe27e9b389 100644
--- a/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_system_info_reg.vhd
+++ b/boards/uniboard2c/libraries/unb2c_board/src/vhdl/unb2c_board_system_info_reg.vhd
@@ -23,21 +23,21 @@
-- WO write only (no VHDL present to access HW in read mode)
-- WE write event (=WO)
-- WR write control, read control
--- RW read status, write control
+-- RW read status, write control
-- RC read, clear on read
-- FR FIFO read
-- FW FIFO write
--
-- wi Bits R/W Name Default Description |REG_unb2c_BOARD_SYSTEM_INFO|
-- =============================================================================
--- 0 [31..0] RO info
+-- 0 [31..0] RO info
-- 1 [7..0] RO 0
-- 2 [31..0] RO design_name
-- . .. . ..
-- 9 [31..0] RO design name
-- 10 [31..0] RO date stamp (YYYYMMDD)
-- 11 [31..0] RO time stamp (HHMMSS)
--- 12 [31..0] RO SVN stamp
+-- 12 [31..0] RO SVN stamp
-- 13 [31..0] RO note
-- . . . ..
-- 20 [31..0] RO note
@@ -55,18 +55,18 @@ ENTITY unb2c_board_system_info_reg IS
g_design_name : STRING;
g_stamp_date : NATURAL := 0;
g_stamp_time : NATURAL := 0;
- g_stamp_svn : NATURAL := 0;
+ g_revision_id : STRING;
g_design_note : STRING
);
PORT (
-- Clocks and reset
- mm_rst : IN STD_LOGIC;
+ mm_rst : IN STD_LOGIC;
mm_clk : IN STD_LOGIC;
-
- -- Memory Mapped Slave
- sla_in : IN t_mem_mosi;
- sla_out : OUT t_mem_miso;
-
+
+ -- Memory Mapped Slave
+ sla_in : IN t_mem_mosi;
+ sla_out : OUT t_mem_miso;
+
info : IN STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0)
);
END unb2c_board_system_info_reg;
@@ -76,23 +76,32 @@ ARCHITECTURE rtl OF unb2c_board_system_info_reg IS
CONSTANT c_nof_fixed_regs : NATURAL := 2; -- info, use_phy
CONSTANT c_nof_design_name_regs : NATURAL := 13; -- design_name
- CONSTANT c_nof_stamp_regs : NATURAL := 3; -- date, time, svn rev
+ CONSTANT c_nof_stamp_regs : NATURAL := 2; -- date, time
+ CONSTANT c_nof_revision_id_regs : NATURAL := 3; -- revision id, commit hash or id (hash: first 9 chars of the 40chars commit hash)
CONSTANT c_nof_design_note_regs : NATURAL := 13; -- note
- CONSTANT c_nof_regs : NATURAL := c_nof_fixed_regs + c_nof_design_name_regs + c_nof_stamp_regs + c_nof_design_note_regs;
+ CONSTANT c_info_reg : NATURAL := 0;
+ CONSTANT c_use_phy_reg : NATURAL := 1;
+ CONSTANT c_design_name_offset : NATURAL := c_nof_fixed_regs;
+ CONSTANT c_stamp_date_offset : NATURAL := c_nof_fixed_regs + c_nof_design_name_regs;
+ CONSTANT c_stamp_time_offset : NATURAL := c_nof_fixed_regs + c_nof_design_name_regs + 1;
+ CONSTANT c_revision_id_offset : NATURAL := c_nof_fixed_regs + c_nof_design_name_regs + c_nof_stamp_regs;
+ CONSTANT c_design_note_offset : NATURAL := c_nof_fixed_regs + c_nof_design_name_regs + c_nof_stamp_regs + c_nof_revision_id_regs;
+ CONSTANT c_nof_regs : NATURAL := c_nof_fixed_regs + c_nof_design_name_regs + c_nof_stamp_regs + c_nof_revision_id_regs + c_nof_design_note_regs;
CONSTANT c_mm_reg : t_c_mem := (latency => 1,
adr_w => ceil_log2(c_nof_regs),
dat_w => c_word_w, -- Use MM bus data width = c_word_w = 32 for all MM registers
nof_dat => c_nof_regs,
- init_sl => '0');
+ init_sl => '0');
CONSTANT c_use_phy_w : NATURAL := 8;
CONSTANT c_use_phy : STD_LOGIC_VECTOR(c_use_phy_w-1 DOWNTO 0) := (OTHERS=> '0'); -- Unused but keep for compatibillity
- CONSTANT c_design_name : t_slv_32_arr(0 TO c_nof_design_name_regs-1) := str_to_ascii_slv_32_arr(g_design_name, c_nof_design_name_regs);
- CONSTANT c_design_note : t_slv_32_arr(0 TO c_nof_design_note_regs-1) := str_to_ascii_slv_32_arr(g_design_note, c_nof_design_note_regs);
-
+ CONSTANT c_design_name : t_slv_32_arr(0 TO c_nof_design_name_regs-1) := str_to_ascii_slv_32_arr(g_design_name, c_nof_design_name_regs);
+ CONSTANT c_revision_id : t_slv_32_arr(0 TO c_nof_revision_id_regs-1) := str_to_ascii_slv_32_arr(g_revision_id, c_nof_revision_id_regs);
+ CONSTANT c_design_note : t_slv_32_arr(0 TO c_nof_design_note_regs-1) := str_to_ascii_slv_32_arr(g_design_note, c_nof_design_note_regs);
+
BEGIN
p_mm_reg : PROCESS (mm_rst, mm_clk)
@@ -104,34 +113,36 @@ BEGIN
ELSIF rising_edge(mm_clk) THEN
-- Read access defaults
sla_out.rdval <= '0';
-
+
-- Read access: get register value
IF sla_in.rd = '1' THEN
sla_out <= c_mem_miso_rst; -- set unused rddata bits to '0' when read
sla_out.rdval <= '1'; -- c_mm_reg.latency = 1
vA := TO_UINT(sla_in.address(c_mm_reg.adr_w-1 DOWNTO 0));
- IF vA = 0 THEN
+ IF vA = c_info_reg THEN
sla_out.rddata(c_word_w-1 DOWNTO 0) <= info;
-- Use bit 11 to indicate that we're using the MM bus (not the info SLV).
-- Using the MM bus enables user to also read use_phy, design_name etc.
sla_out.rddata(11) <= '1';
- ELSIF vA = 1 THEN
+
+ ELSIF vA = c_use_phy_reg THEN
sla_out.rddata(c_use_phy_w-1 DOWNTO 0) <= c_use_phy;
- ELSIF vA < c_nof_fixed_regs + c_nof_design_name_regs THEN
- sla_out.rddata(c_word_w-1 DOWNTO 0) <= c_design_name(vA-c_nof_fixed_regs);
- ELSIF vA = c_nof_fixed_regs + c_nof_design_name_regs THEN
+ ELSIF vA < c_design_name_offset + c_nof_design_name_regs THEN
+ sla_out.rddata(c_word_w-1 DOWNTO 0) <= c_design_name(vA - c_design_name_offset);
+
+ ELSIF vA = c_stamp_date_offset THEN
sla_out.rddata(c_word_w-1 DOWNTO 0) <= TO_UVEC(g_stamp_date, c_word_w);
- ELSIF vA = c_nof_fixed_regs + c_nof_design_name_regs+1 THEN
+ ELSIF vA = c_stamp_time_offset THEN
sla_out.rddata(c_word_w-1 DOWNTO 0) <= TO_UVEC(g_stamp_time, c_word_w);
- ELSIF vA = c_nof_fixed_regs + c_nof_design_name_regs+2 THEN
- sla_out.rddata(c_word_w-1 DOWNTO 0) <= TO_UVEC(g_stamp_svn, c_word_w);
+ ELSIF vA < c_revision_id_offset + c_nof_revision_id_regs THEN
+ sla_out.rddata(c_word_w-1 DOWNTO 0) <= c_revision_id(vA - c_revision_id_offset);
- ELSIF vA < c_nof_fixed_regs + c_nof_design_name_regs+c_nof_stamp_regs+c_nof_design_note_regs THEN
- sla_out.rddata(c_word_w-1 DOWNTO 0) <= c_design_note(vA-c_nof_fixed_regs-c_nof_design_name_regs-c_nof_stamp_regs);
+ ELSIF vA < c_design_note_offset + c_nof_design_note_regs THEN
+ sla_out.rddata(c_word_w-1 DOWNTO 0) <= c_design_note(vA - c_design_note_offset);
END IF;
@@ -139,6 +150,6 @@ BEGIN
END IF;
END PROCESS;
-
+
END rtl;