diff --git a/boards/uniboard2b/designs/unb2b_jesd/doc/README b/boards/uniboard2b/designs/unb2b_jesd/doc/README index 834b38f1d711fb31e834273dfcebd139b2cd3a1a..a8ee798172b26c69d51affd65034e1d8b8b5b3c6 100644 --- a/boards/uniboard2b/designs/unb2b_jesd/doc/README +++ b/boards/uniboard2b/designs/unb2b_jesd/doc/README @@ -1,3 +1,10 @@ +-> JESD204B core referece doc: + https://www.intel.com/content/www/us/en/programmable/documentation/bhc1411117158599.html + +-> JESD204B example design doc: + https://www.intel.com/content/www/us/en/programmable/documentation/dsy1488866740587.html#uja1488433315226 + + -> See also the doc/README files in the revision directories Quick steps to compile and use design [unb2b_jesd] in RadionHDL diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/unb2b_jesd_node0.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/unb2b_jesd_node0.vhd index 26f2d420e2b35dc8526a05e07c7ed824e63ad5f2..bc7abac851ef417315feb804c3ae425820bd7424 100644 --- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/unb2b_jesd_node0.vhd +++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node0/unb2b_jesd_node0.vhd @@ -41,7 +41,6 @@ ENTITY unb2b_jesd_node0 IS g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF g_stamp_svn : NATURAL := 0; -- SVN revision -- set by QSF - g_factory_image : BOOLEAN := TRUE; g_protect_addr_range: BOOLEAN := FALSE ); PORT ( @@ -96,7 +95,6 @@ BEGIN g_stamp_date => g_stamp_date, g_stamp_time => g_stamp_time, g_stamp_svn => g_stamp_svn, - g_factory_image => g_factory_image, g_protect_addr_range => g_protect_addr_range ) PORT MAP ( diff --git a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/unb2b_jesd_node3.vhd b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/unb2b_jesd_node3.vhd index 5899faf0a9563806d29a754ef6698a3c6b2aa078..088b8a43361758e264335b41250b1f188a3aff3e 100644 --- a/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/unb2b_jesd_node3.vhd +++ b/boards/uniboard2b/designs/unb2b_jesd/revisions/unb2b_jesd_node3/unb2b_jesd_node3.vhd @@ -41,7 +41,6 @@ ENTITY unb2b_jesd_node3 IS g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF g_stamp_svn : NATURAL := 0; -- SVN revision -- set by QSF - g_factory_image : BOOLEAN := TRUE; g_protect_addr_range: BOOLEAN := FALSE ); PORT ( @@ -96,7 +95,6 @@ BEGIN g_stamp_date => g_stamp_date, g_stamp_time => g_stamp_time, g_stamp_svn => g_stamp_svn, - g_factory_image => g_factory_image, g_protect_addr_range => g_protect_addr_range ) PORT MAP ( diff --git a/boards/uniboard2b/designs/unb2b_jesd/src/vhdl/unb2b_jesd.vhd b/boards/uniboard2b/designs/unb2b_jesd/src/vhdl/unb2b_jesd.vhd index 8a9c73c57cf06601bb8f2b3b8ff36b0faf98be44..88025f381b9a875bad50953545d0656c8e1ca0d9 100644 --- a/boards/uniboard2b/designs/unb2b_jesd/src/vhdl/unb2b_jesd.vhd +++ b/boards/uniboard2b/designs/unb2b_jesd/src/vhdl/unb2b_jesd.vhd @@ -41,7 +41,7 @@ ENTITY unb2b_jesd IS g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF g_stamp_svn : NATURAL := 0; -- SVN revision -- set by QSF - g_factory_image : BOOLEAN := TRUE; + g_factory_image : BOOLEAN := FALSE; g_protect_addr_range: BOOLEAN := FALSE ); PORT (