diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/doc/README b/applications/lofar2/designs/lofar2_unb2b_adc/doc/README
new file mode 100644
index 0000000000000000000000000000000000000000..35b46c0a8b12d15e66e308319a5ffd0bdacd5997
--- /dev/null
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/doc/README
@@ -0,0 +1,26 @@
+Quick steps to compile
+----------------------
+
+
+-> In case of a new installation, the IP's have to be generated for Arria10.
+ cd ~/git/hdl
+ . init_hdl.sh
+ compile_altera_simlibs unb2b
+ generate_ip_libs unb2b
+
+-> For compilation it might be necessary to check the .vhd file:
+ $RADIOHDL_WORK/libraries/technology/technology_select_pkg.vhd
+
+-> Make sure you have set up the RadioHDL/trunk/tools/quartus/set_quartus script correctly to use quartus 17 for unb2b.
+
+-> Make sure you use the modified avs2_eth_coe_hw.tcl (see attachment of this e-mail), this file is placed in RadioHDL/trunk/libraries/io/eth/src/vhdl.
+
+1. Start with the Oneclick Commands:
+ cd ~/git/hdl
+ . init_hdl.sh
+ quartus_config unb2b
+
+# 2. Generate MMM for QSYS:
+ run_qsys_pro unb2b unb2b_minimal
+
+3. -> From here either continue to Modelsim (simulation) or Quartus (synthesis)
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/quartus/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.ip b/applications/lofar2/designs/lofar2_unb2b_adc/quartus/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_common_mm_2.ip
similarity index 96%
rename from applications/lofar2/designs/lofar2_unb2b_adc/quartus/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.ip
rename to applications/lofar2/designs/lofar2_unb2b_adc/quartus/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_common_mm_2.ip
index ce78f0e5d55e90957689e280865f0b02ebec53a4..3203cad1f51187913855d3ac4db4ef6cc2324f95 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/quartus/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.ip
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/quartus/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_common_mm_2.ip
@@ -1,8 +1,8 @@
<?xml version="1.0" ?>
<ipxact:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact2014/extensions" xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014">
<ipxact:vendor>ASTRON</ipxact:vendor>
- <ipxact:library>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd</ipxact:library>
- <ipxact:name>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd</ipxact:name>
+ <ipxact:library>qsys_lofar2_unb2b_adc_avs_common_mm_2</ipxact:library>
+ <ipxact:name>avs_common_mm_2</ipxact:name>
<ipxact:version>1.0</ipxact:version>
<ipxact:busInterfaces>
<ipxact:busInterface>
@@ -139,7 +139,7 @@
<ipxact:parameter parameterId="addressSpan" type="string">
<ipxact:name>addressSpan</ipxact:name>
<ipxact:displayName>Address span</ipxact:displayName>
- <ipxact:value>262144</ipxact:value>
+ <ipxact:value>8</ipxact:value>
</ipxact:parameter>
<ipxact:parameter parameterId="addressUnits" type="string">
<ipxact:name>addressUnits</ipxact:name>
@@ -664,12 +664,7 @@
<ipxact:name>avs_mem_address</ipxact:name>
<ipxact:wire>
<ipxact:direction>in</ipxact:direction>
- <ipxact:vectors>
- <ipxact:vector>
- <ipxact:left>0</ipxact:left>
- <ipxact:right>15</ipxact:right>
- </ipxact:vector>
- </ipxact:vectors>
+ <ipxact:vectors></ipxact:vectors>
<ipxact:wireTypeDefs>
<ipxact:wireTypeDef>
<ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
@@ -770,12 +765,7 @@
<ipxact:name>coe_address_export</ipxact:name>
<ipxact:wire>
<ipxact:direction>out</ipxact:direction>
- <ipxact:vectors>
- <ipxact:vector>
- <ipxact:left>0</ipxact:left>
- <ipxact:right>15</ipxact:right>
- </ipxact:vector>
- </ipxact:vectors>
+ <ipxact:vectors></ipxact:vectors>
<ipxact:wireTypeDefs>
<ipxact:wireTypeDef>
<ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
@@ -851,7 +841,7 @@
<ipxact:vendorExtensions>
<altera:entity_info>
<ipxact:vendor>ASTRON</ipxact:vendor>
- <ipxact:library>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd</ipxact:library>
+ <ipxact:library>qsys_lofar2_unb2b_adc_avs_common_mm_2</ipxact:library>
<ipxact:name>avs_common_mm</ipxact:name>
<ipxact:version>1.0</ipxact:version>
</altera:entity_info>
@@ -860,7 +850,7 @@
<ipxact:parameter parameterId="g_adr_w" type="int">
<ipxact:name>g_adr_w</ipxact:name>
<ipxact:displayName>g_adr_w</ipxact:displayName>
- <ipxact:value>16</ipxact:value>
+ <ipxact:value>1</ipxact:value>
</ipxact:parameter>
<ipxact:parameter parameterId="g_dat_w" type="int">
<ipxact:name>g_dat_w</ipxact:name>
@@ -909,7 +899,7 @@
type = "String";
}
}
- element ram_diag_data_buffer_jesd
+ element avs_common_mm_2
{
}
}
@@ -997,7 +987,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>16</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -1066,7 +1056,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>262144</value>
+ <value>8</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -1295,7 +1285,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>16</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -1462,11 +1452,11 @@
<consumedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x40000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+ <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x8' datawidth='32' /&gt;&lt;/address-map&gt;</value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>18</value>
+ <value>3</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -1494,38 +1484,38 @@
</ipxact:parameters>
</altera:altera_system_parameters>
<altera:altera_interface_boundary>
- <altera:interface_mapping altera:name="address" altera:internal="qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.address" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="address" altera:internal="avs_common_mm_2.address" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="clk" altera:internal="qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.clk" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="clk" altera:internal="avs_common_mm_2.clk" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="mem" altera:internal="qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.mem" altera:type="avalon" altera:dir="end">
+ <altera:interface_mapping altera:name="mem" altera:internal="avs_common_mm_2.mem" altera:type="avalon" altera:dir="end">
<altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
<altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
<altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
<altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
<altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="read" altera:internal="qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.read" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="read" altera:internal="avs_common_mm_2.read" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="readdata" altera:internal="qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.readdata" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="readdata" altera:internal="avs_common_mm_2.readdata" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="reset" altera:internal="qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.reset" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="reset" altera:internal="avs_common_mm_2.reset" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="system" altera:internal="qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.system" altera:type="clock" altera:dir="end">
+ <altera:interface_mapping altera:name="system" altera:internal="avs_common_mm_2.system" altera:type="clock" altera:dir="end">
<altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="system_reset" altera:internal="qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.system_reset" altera:type="reset" altera:dir="end">
+ <altera:interface_mapping altera:name="system_reset" altera:internal="avs_common_mm_2.system_reset" altera:type="reset" altera:dir="end">
<altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="write" altera:internal="qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.write" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="write" altera:internal="avs_common_mm_2.write" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="writedata" altera:internal="qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.writedata" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="writedata" altera:internal="avs_common_mm_2.writedata" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
</altera:interface_mapping>
</altera:altera_interface_boundary>
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/quartus/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.ip b/applications/lofar2/designs/lofar2_unb2b_adc/quartus/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.ip
deleted file mode 100644
index d4d5677707e4c859b0e86d7246a89cf0a0f252a5..0000000000000000000000000000000000000000
--- a/applications/lofar2/designs/lofar2_unb2b_adc/quartus/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.ip
+++ /dev/null
@@ -1,1535 +0,0 @@
-<?xml version="1.0" ?>
-<ipxact:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact2014/extensions" xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014">
- <ipxact:vendor>ASTRON</ipxact:vendor>
- <ipxact:library>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd</ipxact:library>
- <ipxact:name>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd</ipxact:name>
- <ipxact:version>1.0</ipxact:version>
- <ipxact:busInterfaces>
- <ipxact:busInterface>
- <ipxact:name>system</ipxact:name>
- <ipxact:busType vendor="altera" library="altera" name="clock" version="19.4"></ipxact:busType>
- <ipxact:abstractionTypes>
- <ipxact:abstractionType>
- <ipxact:abstractionRef vendor="altera" library="altera" name="clock" version="19.4"></ipxact:abstractionRef>
- <ipxact:portMaps>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>clk</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>csi_system_clk</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- </ipxact:portMaps>
- </ipxact:abstractionType>
- </ipxact:abstractionTypes>
- <ipxact:slave></ipxact:slave>
- <ipxact:parameters>
- <ipxact:parameter parameterId="clockRate" type="longint">
- <ipxact:name>clockRate</ipxact:name>
- <ipxact:displayName>Clock rate</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="externallyDriven" type="bit">
- <ipxact:name>externallyDriven</ipxact:name>
- <ipxact:displayName>Externally driven</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="ptfSchematicName" type="string">
- <ipxact:name>ptfSchematicName</ipxact:name>
- <ipxact:displayName>PTF schematic name</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- </ipxact:busInterface>
- <ipxact:busInterface>
- <ipxact:name>system_reset</ipxact:name>
- <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
- <ipxact:abstractionTypes>
- <ipxact:abstractionType>
- <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
- <ipxact:portMaps>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>reset</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>csi_system_reset</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- </ipxact:portMaps>
- </ipxact:abstractionType>
- </ipxact:abstractionTypes>
- <ipxact:slave></ipxact:slave>
- <ipxact:parameters>
- <ipxact:parameter parameterId="associatedClock" type="string">
- <ipxact:name>associatedClock</ipxact:name>
- <ipxact:displayName>Associated clock</ipxact:displayName>
- <ipxact:value>system</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="synchronousEdges" type="string">
- <ipxact:name>synchronousEdges</ipxact:name>
- <ipxact:displayName>Synchronous edges</ipxact:displayName>
- <ipxact:value>DEASSERT</ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- </ipxact:busInterface>
- <ipxact:busInterface>
- <ipxact:name>mem</ipxact:name>
- <ipxact:busType vendor="altera" library="altera" name="avalon" version="19.4"></ipxact:busType>
- <ipxact:abstractionTypes>
- <ipxact:abstractionType>
- <ipxact:abstractionRef vendor="altera" library="altera" name="avalon" version="19.4"></ipxact:abstractionRef>
- <ipxact:portMaps>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>address</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>avs_mem_address</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>write</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>avs_mem_write</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>writedata</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>avs_mem_writedata</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>read</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>avs_mem_read</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>readdata</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>avs_mem_readdata</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- </ipxact:portMaps>
- </ipxact:abstractionType>
- </ipxact:abstractionTypes>
- <ipxact:slave></ipxact:slave>
- <ipxact:parameters>
- <ipxact:parameter parameterId="addressAlignment" type="string">
- <ipxact:name>addressAlignment</ipxact:name>
- <ipxact:displayName>Slave addressing</ipxact:displayName>
- <ipxact:value>DYNAMIC</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="addressGroup" type="int">
- <ipxact:name>addressGroup</ipxact:name>
- <ipxact:displayName>Address group</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="addressSpan" type="string">
- <ipxact:name>addressSpan</ipxact:name>
- <ipxact:displayName>Address span</ipxact:displayName>
- <ipxact:value>16384</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="addressUnits" type="string">
- <ipxact:name>addressUnits</ipxact:name>
- <ipxact:displayName>Address units</ipxact:displayName>
- <ipxact:value>WORDS</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="alwaysBurstMaxBurst" type="bit">
- <ipxact:name>alwaysBurstMaxBurst</ipxact:name>
- <ipxact:displayName>Always burst maximum burst</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="associatedClock" type="string">
- <ipxact:name>associatedClock</ipxact:name>
- <ipxact:displayName>Associated clock</ipxact:displayName>
- <ipxact:value>system</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="associatedReset" type="string">
- <ipxact:name>associatedReset</ipxact:name>
- <ipxact:displayName>Associated reset</ipxact:displayName>
- <ipxact:value>system_reset</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="bitsPerSymbol" type="int">
- <ipxact:name>bitsPerSymbol</ipxact:name>
- <ipxact:displayName>Bits per symbol</ipxact:displayName>
- <ipxact:value>8</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="bridgedAddressOffset" type="string">
- <ipxact:name>bridgedAddressOffset</ipxact:name>
- <ipxact:displayName>Bridged Address Offset</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="bridgesToMaster" type="string">
- <ipxact:name>bridgesToMaster</ipxact:name>
- <ipxact:displayName>Bridges to master</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="burstOnBurstBoundariesOnly" type="bit">
- <ipxact:name>burstOnBurstBoundariesOnly</ipxact:name>
- <ipxact:displayName>Burst on burst boundaries only</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="burstcountUnits" type="string">
- <ipxact:name>burstcountUnits</ipxact:name>
- <ipxact:displayName>Burstcount units</ipxact:displayName>
- <ipxact:value>WORDS</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="constantBurstBehavior" type="bit">
- <ipxact:name>constantBurstBehavior</ipxact:name>
- <ipxact:displayName>Constant burst behavior</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="explicitAddressSpan" type="string">
- <ipxact:name>explicitAddressSpan</ipxact:name>
- <ipxact:displayName>Explicit address span</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="holdTime" type="int">
- <ipxact:name>holdTime</ipxact:name>
- <ipxact:displayName>Hold</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="interleaveBursts" type="bit">
- <ipxact:name>interleaveBursts</ipxact:name>
- <ipxact:displayName>Interleave bursts</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="isBigEndian" type="bit">
- <ipxact:name>isBigEndian</ipxact:name>
- <ipxact:displayName>Big endian</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="isFlash" type="bit">
- <ipxact:name>isFlash</ipxact:name>
- <ipxact:displayName>Flash memory</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="isMemoryDevice" type="bit">
- <ipxact:name>isMemoryDevice</ipxact:name>
- <ipxact:displayName>Memory device</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="isNonVolatileStorage" type="bit">
- <ipxact:name>isNonVolatileStorage</ipxact:name>
- <ipxact:displayName>Non-volatile storage</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="linewrapBursts" type="bit">
- <ipxact:name>linewrapBursts</ipxact:name>
- <ipxact:displayName>Linewrap bursts</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="maximumPendingReadTransactions" type="int">
- <ipxact:name>maximumPendingReadTransactions</ipxact:name>
- <ipxact:displayName>Maximum pending read transactions</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="maximumPendingWriteTransactions" type="int">
- <ipxact:name>maximumPendingWriteTransactions</ipxact:name>
- <ipxact:displayName>Maximum pending write transactions</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="minimumReadLatency" type="int">
- <ipxact:name>minimumReadLatency</ipxact:name>
- <ipxact:displayName>minimumReadLatency</ipxact:displayName>
- <ipxact:value>1</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="minimumResponseLatency" type="int">
- <ipxact:name>minimumResponseLatency</ipxact:name>
- <ipxact:displayName>Minimum response latency</ipxact:displayName>
- <ipxact:value>1</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="minimumUninterruptedRunLength" type="int">
- <ipxact:name>minimumUninterruptedRunLength</ipxact:name>
- <ipxact:displayName>Minimum uninterrupted run length</ipxact:displayName>
- <ipxact:value>1</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="prSafe" type="bit">
- <ipxact:name>prSafe</ipxact:name>
- <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="printableDevice" type="bit">
- <ipxact:name>printableDevice</ipxact:name>
- <ipxact:displayName>Can receive stdout/stderr</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="readLatency" type="int">
- <ipxact:name>readLatency</ipxact:name>
- <ipxact:displayName>Read latency</ipxact:displayName>
- <ipxact:value>1</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="readWaitStates" type="int">
- <ipxact:name>readWaitStates</ipxact:name>
- <ipxact:displayName>Read wait states</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="readWaitTime" type="int">
- <ipxact:name>readWaitTime</ipxact:name>
- <ipxact:displayName>Read wait</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="registerIncomingSignals" type="bit">
- <ipxact:name>registerIncomingSignals</ipxact:name>
- <ipxact:displayName>Register incoming signals</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="registerOutgoingSignals" type="bit">
- <ipxact:name>registerOutgoingSignals</ipxact:name>
- <ipxact:displayName>Register outgoing signals</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="setupTime" type="int">
- <ipxact:name>setupTime</ipxact:name>
- <ipxact:displayName>Setup</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="timingUnits" type="string">
- <ipxact:name>timingUnits</ipxact:name>
- <ipxact:displayName>Timing units</ipxact:displayName>
- <ipxact:value>Cycles</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="transparentBridge" type="bit">
- <ipxact:name>transparentBridge</ipxact:name>
- <ipxact:displayName>Transparent bridge</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="waitrequestAllowance" type="int">
- <ipxact:name>waitrequestAllowance</ipxact:name>
- <ipxact:displayName>Waitrequest allowance</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="wellBehavedWaitrequest" type="bit">
- <ipxact:name>wellBehavedWaitrequest</ipxact:name>
- <ipxact:displayName>Well-behaved waitrequest</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="writeLatency" type="int">
- <ipxact:name>writeLatency</ipxact:name>
- <ipxact:displayName>Write latency</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="writeWaitStates" type="int">
- <ipxact:name>writeWaitStates</ipxact:name>
- <ipxact:displayName>Write wait states</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="writeWaitTime" type="int">
- <ipxact:name>writeWaitTime</ipxact:name>
- <ipxact:displayName>Write wait</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- <ipxact:vendorExtensions>
- <altera:altera_assignments>
- <ipxact:parameters>
- <ipxact:parameter parameterId="embeddedsw.configuration.isFlash" type="string">
- <ipxact:name>embeddedsw.configuration.isFlash</ipxact:name>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="embeddedsw.configuration.isMemoryDevice" type="string">
- <ipxact:name>embeddedsw.configuration.isMemoryDevice</ipxact:name>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="embeddedsw.configuration.isNonVolatileStorage" type="string">
- <ipxact:name>embeddedsw.configuration.isNonVolatileStorage</ipxact:name>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="embeddedsw.configuration.isPrintableDevice" type="string">
- <ipxact:name>embeddedsw.configuration.isPrintableDevice</ipxact:name>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- </altera:altera_assignments>
- </ipxact:vendorExtensions>
- </ipxact:busInterface>
- <ipxact:busInterface>
- <ipxact:name>reset</ipxact:name>
- <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
- <ipxact:abstractionTypes>
- <ipxact:abstractionType>
- <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
- <ipxact:portMaps>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>export</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>coe_reset_export</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- </ipxact:portMaps>
- </ipxact:abstractionType>
- </ipxact:abstractionTypes>
- <ipxact:slave></ipxact:slave>
- <ipxact:parameters>
- <ipxact:parameter parameterId="associatedClock" type="string">
- <ipxact:name>associatedClock</ipxact:name>
- <ipxact:displayName>associatedClock</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="associatedReset" type="string">
- <ipxact:name>associatedReset</ipxact:name>
- <ipxact:displayName>associatedReset</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="prSafe" type="bit">
- <ipxact:name>prSafe</ipxact:name>
- <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- </ipxact:busInterface>
- <ipxact:busInterface>
- <ipxact:name>clk</ipxact:name>
- <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
- <ipxact:abstractionTypes>
- <ipxact:abstractionType>
- <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
- <ipxact:portMaps>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>export</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>coe_clk_export</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- </ipxact:portMaps>
- </ipxact:abstractionType>
- </ipxact:abstractionTypes>
- <ipxact:slave></ipxact:slave>
- <ipxact:parameters>
- <ipxact:parameter parameterId="associatedClock" type="string">
- <ipxact:name>associatedClock</ipxact:name>
- <ipxact:displayName>associatedClock</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="associatedReset" type="string">
- <ipxact:name>associatedReset</ipxact:name>
- <ipxact:displayName>associatedReset</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="prSafe" type="bit">
- <ipxact:name>prSafe</ipxact:name>
- <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- </ipxact:busInterface>
- <ipxact:busInterface>
- <ipxact:name>address</ipxact:name>
- <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
- <ipxact:abstractionTypes>
- <ipxact:abstractionType>
- <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
- <ipxact:portMaps>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>export</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>coe_address_export</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- </ipxact:portMaps>
- </ipxact:abstractionType>
- </ipxact:abstractionTypes>
- <ipxact:slave></ipxact:slave>
- <ipxact:parameters>
- <ipxact:parameter parameterId="associatedClock" type="string">
- <ipxact:name>associatedClock</ipxact:name>
- <ipxact:displayName>associatedClock</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="associatedReset" type="string">
- <ipxact:name>associatedReset</ipxact:name>
- <ipxact:displayName>associatedReset</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="prSafe" type="bit">
- <ipxact:name>prSafe</ipxact:name>
- <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- </ipxact:busInterface>
- <ipxact:busInterface>
- <ipxact:name>write</ipxact:name>
- <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
- <ipxact:abstractionTypes>
- <ipxact:abstractionType>
- <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
- <ipxact:portMaps>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>export</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>coe_write_export</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- </ipxact:portMaps>
- </ipxact:abstractionType>
- </ipxact:abstractionTypes>
- <ipxact:slave></ipxact:slave>
- <ipxact:parameters>
- <ipxact:parameter parameterId="associatedClock" type="string">
- <ipxact:name>associatedClock</ipxact:name>
- <ipxact:displayName>associatedClock</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="associatedReset" type="string">
- <ipxact:name>associatedReset</ipxact:name>
- <ipxact:displayName>associatedReset</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="prSafe" type="bit">
- <ipxact:name>prSafe</ipxact:name>
- <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- </ipxact:busInterface>
- <ipxact:busInterface>
- <ipxact:name>writedata</ipxact:name>
- <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
- <ipxact:abstractionTypes>
- <ipxact:abstractionType>
- <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
- <ipxact:portMaps>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>export</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>coe_writedata_export</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- </ipxact:portMaps>
- </ipxact:abstractionType>
- </ipxact:abstractionTypes>
- <ipxact:slave></ipxact:slave>
- <ipxact:parameters>
- <ipxact:parameter parameterId="associatedClock" type="string">
- <ipxact:name>associatedClock</ipxact:name>
- <ipxact:displayName>associatedClock</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="associatedReset" type="string">
- <ipxact:name>associatedReset</ipxact:name>
- <ipxact:displayName>associatedReset</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="prSafe" type="bit">
- <ipxact:name>prSafe</ipxact:name>
- <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- </ipxact:busInterface>
- <ipxact:busInterface>
- <ipxact:name>read</ipxact:name>
- <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
- <ipxact:abstractionTypes>
- <ipxact:abstractionType>
- <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
- <ipxact:portMaps>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>export</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>coe_read_export</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- </ipxact:portMaps>
- </ipxact:abstractionType>
- </ipxact:abstractionTypes>
- <ipxact:slave></ipxact:slave>
- <ipxact:parameters>
- <ipxact:parameter parameterId="associatedClock" type="string">
- <ipxact:name>associatedClock</ipxact:name>
- <ipxact:displayName>associatedClock</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="associatedReset" type="string">
- <ipxact:name>associatedReset</ipxact:name>
- <ipxact:displayName>associatedReset</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="prSafe" type="bit">
- <ipxact:name>prSafe</ipxact:name>
- <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- </ipxact:busInterface>
- <ipxact:busInterface>
- <ipxact:name>readdata</ipxact:name>
- <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
- <ipxact:abstractionTypes>
- <ipxact:abstractionType>
- <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
- <ipxact:portMaps>
- <ipxact:portMap>
- <ipxact:logicalPort>
- <ipxact:name>export</ipxact:name>
- </ipxact:logicalPort>
- <ipxact:physicalPort>
- <ipxact:name>coe_readdata_export</ipxact:name>
- </ipxact:physicalPort>
- </ipxact:portMap>
- </ipxact:portMaps>
- </ipxact:abstractionType>
- </ipxact:abstractionTypes>
- <ipxact:slave></ipxact:slave>
- <ipxact:parameters>
- <ipxact:parameter parameterId="associatedClock" type="string">
- <ipxact:name>associatedClock</ipxact:name>
- <ipxact:displayName>associatedClock</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="associatedReset" type="string">
- <ipxact:name>associatedReset</ipxact:name>
- <ipxact:displayName>associatedReset</ipxact:displayName>
- <ipxact:value></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="prSafe" type="bit">
- <ipxact:name>prSafe</ipxact:name>
- <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- </ipxact:busInterface>
- </ipxact:busInterfaces>
- <ipxact:model>
- <ipxact:views>
- <ipxact:view>
- <ipxact:name>QUARTUS_SYNTH</ipxact:name>
- <ipxact:envIdentifier>:quartus.altera.com:</ipxact:envIdentifier>
- <ipxact:componentInstantiationRef>QUARTUS_SYNTH</ipxact:componentInstantiationRef>
- </ipxact:view>
- </ipxact:views>
- <ipxact:instantiations>
- <ipxact:componentInstantiation>
- <ipxact:name>QUARTUS_SYNTH</ipxact:name>
- <ipxact:moduleName>avs_common_mm</ipxact:moduleName>
- <ipxact:fileSetRef>
- <ipxact:localName>QUARTUS_SYNTH</ipxact:localName>
- </ipxact:fileSetRef>
- <ipxact:parameters></ipxact:parameters>
- </ipxact:componentInstantiation>
- </ipxact:instantiations>
- <ipxact:ports>
- <ipxact:port>
- <ipxact:name>csi_system_clk</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>in</ipxact:direction>
- <ipxact:vectors></ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>csi_system_reset</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>in</ipxact:direction>
- <ipxact:vectors></ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>avs_mem_address</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>in</ipxact:direction>
- <ipxact:vectors>
- <ipxact:vector>
- <ipxact:left>0</ipxact:left>
- <ipxact:right>11</ipxact:right>
- </ipxact:vector>
- </ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>avs_mem_write</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>in</ipxact:direction>
- <ipxact:vectors></ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>avs_mem_writedata</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>in</ipxact:direction>
- <ipxact:vectors>
- <ipxact:vector>
- <ipxact:left>0</ipxact:left>
- <ipxact:right>31</ipxact:right>
- </ipxact:vector>
- </ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>avs_mem_read</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>in</ipxact:direction>
- <ipxact:vectors></ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>avs_mem_readdata</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>out</ipxact:direction>
- <ipxact:vectors>
- <ipxact:vector>
- <ipxact:left>0</ipxact:left>
- <ipxact:right>31</ipxact:right>
- </ipxact:vector>
- </ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>coe_reset_export</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>out</ipxact:direction>
- <ipxact:vectors></ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>coe_clk_export</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>out</ipxact:direction>
- <ipxact:vectors></ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>coe_address_export</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>out</ipxact:direction>
- <ipxact:vectors>
- <ipxact:vector>
- <ipxact:left>0</ipxact:left>
- <ipxact:right>11</ipxact:right>
- </ipxact:vector>
- </ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>coe_write_export</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>out</ipxact:direction>
- <ipxact:vectors></ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>coe_writedata_export</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>out</ipxact:direction>
- <ipxact:vectors>
- <ipxact:vector>
- <ipxact:left>0</ipxact:left>
- <ipxact:right>31</ipxact:right>
- </ipxact:vector>
- </ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>coe_read_export</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>out</ipxact:direction>
- <ipxact:vectors></ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- <ipxact:port>
- <ipxact:name>coe_readdata_export</ipxact:name>
- <ipxact:wire>
- <ipxact:direction>in</ipxact:direction>
- <ipxact:vectors>
- <ipxact:vector>
- <ipxact:left>0</ipxact:left>
- <ipxact:right>31</ipxact:right>
- </ipxact:vector>
- </ipxact:vectors>
- <ipxact:wireTypeDefs>
- <ipxact:wireTypeDef>
- <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
- <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
- </ipxact:wireTypeDef>
- </ipxact:wireTypeDefs>
- </ipxact:wire>
- </ipxact:port>
- </ipxact:ports>
- </ipxact:model>
- <ipxact:vendorExtensions>
- <altera:entity_info>
- <ipxact:vendor>ASTRON</ipxact:vendor>
- <ipxact:library>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd</ipxact:library>
- <ipxact:name>avs_common_mm</ipxact:name>
- <ipxact:version>1.0</ipxact:version>
- </altera:entity_info>
- <altera:altera_module_parameters>
- <ipxact:parameters>
- <ipxact:parameter parameterId="g_adr_w" type="int">
- <ipxact:name>g_adr_w</ipxact:name>
- <ipxact:displayName>g_adr_w</ipxact:displayName>
- <ipxact:value>12</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="g_dat_w" type="int">
- <ipxact:name>g_dat_w</ipxact:name>
- <ipxact:displayName>g_dat_w</ipxact:displayName>
- <ipxact:value>32</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="AUTO_SYSTEM_CLOCK_RATE" type="longint">
- <ipxact:name>AUTO_SYSTEM_CLOCK_RATE</ipxact:name>
- <ipxact:displayName>Auto CLOCK_RATE</ipxact:displayName>
- <ipxact:value>100000000</ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- </altera:altera_module_parameters>
- <altera:altera_system_parameters>
- <ipxact:parameters>
- <ipxact:parameter parameterId="device" type="string">
- <ipxact:name>device</ipxact:name>
- <ipxact:displayName>Device</ipxact:displayName>
- <ipxact:value>10AX115U2F45E1SG</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="deviceFamily" type="string">
- <ipxact:name>deviceFamily</ipxact:name>
- <ipxact:displayName>Device family</ipxact:displayName>
- <ipxact:value>Arria 10</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="deviceSpeedGrade" type="string">
- <ipxact:name>deviceSpeedGrade</ipxact:name>
- <ipxact:displayName>Device Speed Grade</ipxact:displayName>
- <ipxact:value>1</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="generationId" type="int">
- <ipxact:name>generationId</ipxact:name>
- <ipxact:displayName>Generation Id</ipxact:displayName>
- <ipxact:value>0</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="bonusData" type="string">
- <ipxact:name>bonusData</ipxact:name>
- <ipxact:displayName>bonusData</ipxact:displayName>
- <ipxact:value>bonusData
-{
- element $system
- {
- datum _originalDeviceFamily
- {
- value = "Arria 10";
- type = "String";
- }
- }
- element qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd
- {
- }
-}
-</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="hideFromIPCatalog" type="bit">
- <ipxact:name>hideFromIPCatalog</ipxact:name>
- <ipxact:displayName>Hide from IP Catalog</ipxact:displayName>
- <ipxact:value>false</ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="lockedInterfaceDefinition" type="string">
- <ipxact:name>lockedInterfaceDefinition</ipxact:name>
- <ipxact:displayName>lockedInterfaceDefinition</ipxact:displayName>
- <ipxact:value><boundaryDefinition>
- <interfaces>
- <interface>
- <name>system</name>
- <type>clock</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>clockRate</key>
- <value>0</value>
- </entry>
- <entry>
- <key>externallyDriven</key>
- <value>false</value>
- </entry>
- <entry>
- <key>ptfSchematicName</key>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>system_reset</name>
- <type>reset</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>system</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>mem</name>
- <type>avalon</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>avs_mem_address</name>
- <role>address</role>
- <direction>Input</direction>
- <width>12</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- <port>
- <name>avs_mem_write</name>
- <role>write</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- <port>
- <name>avs_mem_writedata</name>
- <role>writedata</role>
- <direction>Input</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- <port>
- <name>avs_mem_read</name>
- <role>read</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- <port>
- <name>avs_mem_readdata</name>
- <role>readdata</role>
- <direction>Output</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>embeddedsw.configuration.isFlash</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isMemoryDevice</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isNonVolatileStorage</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isPrintableDevice</key>
- <value>0</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>addressAlignment</key>
- <value>DYNAMIC</value>
- </entry>
- <entry>
- <key>addressGroup</key>
- <value>0</value>
- </entry>
- <entry>
- <key>addressSpan</key>
- <value>16384</value>
- </entry>
- <entry>
- <key>addressUnits</key>
- <value>WORDS</value>
- </entry>
- <entry>
- <key>alwaysBurstMaxBurst</key>
- <value>false</value>
- </entry>
- <entry>
- <key>associatedClock</key>
- <value>system</value>
- </entry>
- <entry>
- <key>associatedReset</key>
- <value>system_reset</value>
- </entry>
- <entry>
- <key>bitsPerSymbol</key>
- <value>8</value>
- </entry>
- <entry>
- <key>bridgedAddressOffset</key>
- <value>0</value>
- </entry>
- <entry>
- <key>bridgesToMaster</key>
- </entry>
- <entry>
- <key>burstOnBurstBoundariesOnly</key>
- <value>false</value>
- </entry>
- <entry>
- <key>burstcountUnits</key>
- <value>WORDS</value>
- </entry>
- <entry>
- <key>constantBurstBehavior</key>
- <value>false</value>
- </entry>
- <entry>
- <key>explicitAddressSpan</key>
- <value>0</value>
- </entry>
- <entry>
- <key>holdTime</key>
- <value>0</value>
- </entry>
- <entry>
- <key>interleaveBursts</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isBigEndian</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isFlash</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isMemoryDevice</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isNonVolatileStorage</key>
- <value>false</value>
- </entry>
- <entry>
- <key>linewrapBursts</key>
- <value>false</value>
- </entry>
- <entry>
- <key>maximumPendingReadTransactions</key>
- <value>0</value>
- </entry>
- <entry>
- <key>maximumPendingWriteTransactions</key>
- <value>0</value>
- </entry>
- <entry>
- <key>minimumReadLatency</key>
- <value>1</value>
- </entry>
- <entry>
- <key>minimumResponseLatency</key>
- <value>1</value>
- </entry>
- <entry>
- <key>minimumUninterruptedRunLength</key>
- <value>1</value>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- <entry>
- <key>printableDevice</key>
- <value>false</value>
- </entry>
- <entry>
- <key>readLatency</key>
- <value>1</value>
- </entry>
- <entry>
- <key>readWaitStates</key>
- <value>0</value>
- </entry>
- <entry>
- <key>readWaitTime</key>
- <value>0</value>
- </entry>
- <entry>
- <key>registerIncomingSignals</key>
- <value>false</value>
- </entry>
- <entry>
- <key>registerOutgoingSignals</key>
- <value>false</value>
- </entry>
- <entry>
- <key>setupTime</key>
- <value>0</value>
- </entry>
- <entry>
- <key>timingUnits</key>
- <value>Cycles</value>
- </entry>
- <entry>
- <key>transparentBridge</key>
- <value>false</value>
- </entry>
- <entry>
- <key>waitrequestAllowance</key>
- <value>0</value>
- </entry>
- <entry>
- <key>wellBehavedWaitrequest</key>
- <value>false</value>
- </entry>
- <entry>
- <key>writeLatency</key>
- <value>0</value>
- </entry>
- <entry>
- <key>writeWaitStates</key>
- <value>0</value>
- </entry>
- <entry>
- <key>writeWaitTime</key>
- <value>0</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_reset_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>clk</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_clk_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>address</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_address_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>12</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>write</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_write_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>writedata</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_writedata_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>read</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_read_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>readdata</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_readdata_export</name>
- <role>export</role>
- <direction>Input</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- </interfaces>
-</boundaryDefinition></ipxact:value>
- </ipxact:parameter>
- <ipxact:parameter parameterId="systemInfos" type="string">
- <ipxact:name>systemInfos</ipxact:name>
- <ipxact:displayName>systemInfos</ipxact:displayName>
- <ipxact:value><systemInfosDefinition>
- <connPtSystemInfos>
- <entry>
- <key>mem</key>
- <value>
- <connectionPointName>mem</connectionPointName>
- <suppliedSystemInfos/>
- <consumedSystemInfos>
- <entry>
- <key>ADDRESS_MAP</key>
- <value>&lt;address-map&gt;&lt;slave name='mem' start='0x0' end='0x4000' datawidth='32' /&gt;&lt;/address-map&gt;</value>
- </entry>
- <entry>
- <key>ADDRESS_WIDTH</key>
- <value>14</value>
- </entry>
- <entry>
- <key>MAX_SLAVE_DATA_WIDTH</key>
- <value>32</value>
- </entry>
- </consumedSystemInfos>
- </value>
- </entry>
- <entry>
- <key>system</key>
- <value>
- <connectionPointName>system</connectionPointName>
- <suppliedSystemInfos>
- <entry>
- <key>CLOCK_RATE</key>
- <value>100000000</value>
- </entry>
- </suppliedSystemInfos>
- <consumedSystemInfos/>
- </value>
- </entry>
- </connPtSystemInfos>
-</systemInfosDefinition></ipxact:value>
- </ipxact:parameter>
- </ipxact:parameters>
- </altera:altera_system_parameters>
- <altera:altera_interface_boundary>
- <altera:interface_mapping altera:name="address" altera:internal="qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.address" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="clk" altera:internal="qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.clk" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="mem" altera:internal="qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.mem" altera:type="avalon" altera:dir="end">
- <altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
- <altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
- <altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
- <altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
- <altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="read" altera:internal="qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.read" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="readdata" altera:internal="qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.readdata" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="reset" altera:internal="qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.reset" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="system" altera:internal="qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.system" altera:type="clock" altera:dir="end">
- <altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="system_reset" altera:internal="qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.system_reset" altera:type="reset" altera:dir="end">
- <altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="write" altera:internal="qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.write" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="writedata" altera:internal="qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.writedata" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
- </altera:interface_mapping>
- </altera:altera_interface_boundary>
- <altera:altera_has_warnings>false</altera:altera_has_warnings>
- <altera:altera_has_errors>false</altera:altera_has_errors>
- </ipxact:vendorExtensions>
-</ipxact:component>
\ No newline at end of file
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/quartus/lofar2_unb2b_adc.sdc b/applications/lofar2/designs/lofar2_unb2b_adc/quartus/lofar2_unb2b_adc.sdc
index c8a94bcfde100798fd4e56e1050bac3fa577c2f8..465b38505311433fb219ac64c0d589af84c86db1 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/quartus/lofar2_unb2b_adc.sdc
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/quartus/lofar2_unb2b_adc.sdc
@@ -50,6 +50,7 @@ create_clock -period 100Mhz [get_ports {CLKUSR}]
create_clock -period 644.53125Mhz [get_ports {SA_CLK}]
create_clock -period 644.53125Mhz [get_ports {SB_CLK}]
create_clock -period 200MHz -name {BCK_REF_CLK} { BCK_REF_CLK }
+#create_clock -period 100MHz -name {BCK_REF_CLK} { BCK_REF_CLK }
derive_pll_clocks
derive_clock_uncertainty
@@ -98,4 +99,5 @@ set_false_path -from [get_clocks {*core_pll|frame_clk}] -to [get_clocks {*xcvr_f
# Constraint on the SYSREF input pin
# Adjust this to account for any board trace difference between SYSREF and REFCLK
-set_input_delay -clock BCK_REF_CLK 0 [get_ports JESD204B_SYSREF]
\ No newline at end of file
+# See page 150: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_jesd204b.pdf
+set_input_delay -clock BCK_REF_CLK 0 [get_ports JESD204B_SYSREF]
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/quartus/qsys_lofar2_unb2b_adc.qsys b/applications/lofar2/designs/lofar2_unb2b_adc/quartus/qsys_lofar2_unb2b_adc.qsys
index 4c14db56aa5e96f27af5b705fd9df43419bef9f3..3e1b57d221efa3871a4131b3537aaa52652c1d71 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/quartus/qsys_lofar2_unb2b_adc.qsys
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/quartus/qsys_lofar2_unb2b_adc.qsys
@@ -22,7 +22,7 @@
{
datum baseAddress
{
- value = "16384";
+ value = "262144";
type = "String";
}
}
@@ -70,7 +70,7 @@
{
datum _sortIndex
{
- value = "21";
+ value = "22";
type = "int";
}
}
@@ -78,7 +78,7 @@
{
datum baseAddress
{
- value = "262144";
+ value = "49152";
type = "String";
}
}
@@ -94,7 +94,7 @@
{
datum baseAddress
{
- value = "952";
+ value = "12800";
type = "String";
}
}
@@ -127,6 +127,22 @@
type = "String";
}
}
+ element pio_jesd_ctrl
+ {
+ datum _sortIndex
+ {
+ value = "13";
+ type = "int";
+ }
+ }
+ element pio_jesd_ctrl.mem
+ {
+ datum baseAddress
+ {
+ value = "12296";
+ type = "String";
+ }
+ }
element pio_pps
{
datum _sortIndex
@@ -136,7 +152,7 @@
}
datum sopceditor_expanded
{
- value = "0";
+ value = "1";
type = "boolean";
}
}
@@ -144,7 +160,7 @@
{
datum baseAddress
{
- value = "944";
+ value = "12536";
type = "String";
}
}
@@ -157,7 +173,7 @@
}
datum sopceditor_expanded
{
- value = "0";
+ value = "1";
type = "boolean";
}
}
@@ -181,7 +197,7 @@
{
datum baseAddress
{
- value = "896";
+ value = "12304";
type = "String";
}
}
@@ -189,7 +205,7 @@
{
datum _sortIndex
{
- value = "31";
+ value = "32";
type = "int";
}
}
@@ -197,7 +213,7 @@
{
datum baseAddress
{
- value = "458752";
+ value = "16384";
type = "String";
}
}
@@ -205,7 +221,7 @@
{
datum _sortIndex
{
- value = "29";
+ value = "30";
type = "int";
}
}
@@ -217,27 +233,11 @@
type = "String";
}
}
- element ram_diag_data_buffer_jesd
- {
- datum _sortIndex
- {
- value = "33";
- type = "int";
- }
- }
- element ram_diag_data_buffer_jesd.mem
- {
- datum baseAddress
- {
- value = "524288";
- type = "String";
- }
- }
element ram_wg
{
datum _sortIndex
{
- value = "27";
+ value = "28";
type = "int";
}
}
@@ -245,7 +245,7 @@
{
datum baseAddress
{
- value = "327680";
+ value = "65536";
type = "String";
}
}
@@ -253,7 +253,7 @@
{
datum _sortIndex
{
- value = "30";
+ value = "31";
type = "int";
}
}
@@ -261,7 +261,7 @@
{
datum baseAddress
{
- value = "425984";
+ value = "512";
type = "String";
}
}
@@ -269,7 +269,7 @@
{
datum _sortIndex
{
- value = "22";
+ value = "23";
type = "int";
}
}
@@ -277,7 +277,7 @@
{
datum baseAddress
{
- value = "294912";
+ value = "1024";
type = "String";
}
}
@@ -285,7 +285,7 @@
{
datum _sortIndex
{
- value = "25";
+ value = "26";
type = "int";
}
}
@@ -293,7 +293,7 @@
{
datum baseAddress
{
- value = "311568";
+ value = "12496";
type = "String";
}
}
@@ -301,7 +301,7 @@
{
datum _sortIndex
{
- value = "24";
+ value = "25";
type = "int";
}
}
@@ -309,7 +309,7 @@
{
datum baseAddress
{
- value = "311552";
+ value = "12480";
type = "String";
}
}
@@ -317,7 +317,7 @@
{
datum _sortIndex
{
- value = "28";
+ value = "29";
type = "int";
}
}
@@ -325,23 +325,7 @@
{
datum baseAddress
{
- value = "409600";
- type = "String";
- }
- }
- element reg_diag_data_buffer_jesd
- {
- datum _sortIndex
- {
- value = "32";
- type = "int";
- }
- }
- element reg_diag_data_buffer_jesd.mem
- {
- datum baseAddress
- {
- value = "393216";
+ value = "32768";
type = "String";
}
}
@@ -349,7 +333,7 @@
{
datum _sortIndex
{
- value = "26";
+ value = "27";
type = "int";
}
}
@@ -357,7 +341,7 @@
{
datum baseAddress
{
- value = "311584";
+ value = "12352";
type = "String";
}
}
@@ -365,7 +349,7 @@
{
datum _sortIndex
{
- value = "16";
+ value = "17";
type = "int";
}
datum sopceditor_expanded
@@ -378,7 +362,7 @@
{
datum baseAddress
{
- value = "936";
+ value = "12528";
type = "String";
}
}
@@ -386,7 +370,7 @@
{
datum _sortIndex
{
- value = "17";
+ value = "18";
type = "int";
}
datum sopceditor_expanded
@@ -399,7 +383,7 @@
{
datum baseAddress
{
- value = "928";
+ value = "12520";
type = "String";
}
}
@@ -407,7 +391,7 @@
{
datum _sortIndex
{
- value = "15";
+ value = "16";
type = "int";
}
datum sopceditor_expanded
@@ -420,7 +404,7 @@
{
datum baseAddress
{
- value = "832";
+ value = "12416";
type = "String";
}
}
@@ -436,7 +420,7 @@
{
datum baseAddress
{
- value = "800";
+ value = "12384";
type = "String";
}
}
@@ -444,7 +428,7 @@
{
datum _sortIndex
{
- value = "20";
+ value = "21";
type = "int";
}
datum sopceditor_expanded
@@ -465,7 +449,7 @@
{
datum _sortIndex
{
- value = "18";
+ value = "19";
type = "int";
}
datum sopceditor_expanded
@@ -478,7 +462,7 @@
{
datum baseAddress
{
- value = "920";
+ value = "12512";
type = "String";
}
}
@@ -486,7 +470,7 @@
{
datum _sortIndex
{
- value = "19";
+ value = "20";
type = "int";
}
datum sopceditor_expanded
@@ -499,7 +483,7 @@
{
datum baseAddress
{
- value = "912";
+ value = "12504";
type = "String";
}
}
@@ -507,7 +491,7 @@
{
datum _sortIndex
{
- value = "14";
+ value = "15";
type = "int";
}
datum sopceditor_expanded
@@ -520,7 +504,7 @@
{
datum baseAddress
{
- value = "864";
+ value = "12448";
type = "String";
}
}
@@ -536,7 +520,7 @@
{
datum baseAddress
{
- value = "256";
+ value = "768";
type = "String";
}
}
@@ -552,7 +536,7 @@
{
datum baseAddress
{
- value = "512";
+ value = "12544";
type = "String";
}
}
@@ -560,7 +544,7 @@
{
datum _sortIndex
{
- value = "13";
+ value = "14";
type = "int";
}
datum sopceditor_expanded
@@ -586,7 +570,7 @@
{
datum _sortIndex
{
- value = "23";
+ value = "24";
type = "int";
}
}
@@ -594,7 +578,7 @@
{
datum baseAddress
{
- value = "311296";
+ value = "256";
type = "String";
}
}
@@ -636,7 +620,7 @@
{
datum baseAddress
{
- value = "768";
+ value = "12320";
type = "String";
}
}
@@ -802,6 +786,41 @@
internal="jesd204b.writedata"
type="conduit"
dir="end" />
+ <interface
+ name="pio_jesd_ctrl_address"
+ internal="pio_jesd_ctrl.address"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="pio_jesd_ctrl_clk"
+ internal="pio_jesd_ctrl.clk"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="pio_jesd_ctrl_read"
+ internal="pio_jesd_ctrl.read"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="pio_jesd_ctrl_readdata"
+ internal="pio_jesd_ctrl.readdata"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="pio_jesd_ctrl_reset"
+ internal="pio_jesd_ctrl.reset"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="pio_jesd_ctrl_write"
+ internal="pio_jesd_ctrl.write"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="pio_jesd_ctrl_writedata"
+ internal="pio_jesd_ctrl.writedata"
+ type="conduit"
+ dir="end" />
<interface
name="pio_pps_address"
internal="pio_pps.address"
@@ -939,41 +958,6 @@
internal="ram_diag_data_buffer_bsn.writedata"
type="conduit"
dir="end" />
- <interface
- name="ram_diag_data_buf_jesd_address"
- internal="ram_diag_data_buffer_jesd.address"
- type="conduit"
- dir="end" />
- <interface
- name="ram_diag_data_buf_jesd_clk"
- internal="ram_diag_data_buffer_jesd.clk"
- type="conduit"
- dir="end" />
- <interface
- name="ram_diag_data_buf_jesd_read"
- internal="ram_diag_data_buffer_jesd.read"
- type="conduit"
- dir="end" />
- <interface
- name="ram_diag_data_buf_jesd_readdata"
- internal="ram_diag_data_buffer_jesd.readdata"
- type="conduit"
- dir="end" />
- <interface
- name="ram_diag_data_buf_jesd_reset"
- internal="ram_diag_data_buffer_jesd.reset"
- type="conduit"
- dir="end" />
- <interface
- name="ram_diag_data_buf_jesd_write"
- internal="ram_diag_data_buffer_jesd.write"
- type="conduit"
- dir="end" />
- <interface
- name="ram_diag_data_buf_jesd_writedata"
- internal="ram_diag_data_buffer_jesd.writedata"
- type="conduit"
- dir="end" />
<interface
name="ram_wg_address"
internal="ram_wg.address"
@@ -1168,41 +1152,6 @@
internal="reg_diag_data_buffer_bsn.writedata"
type="conduit"
dir="end" />
- <interface
- name="reg_diag_data_buf_jesd_address"
- internal="reg_diag_data_buffer_jesd.address"
- type="conduit"
- dir="end" />
- <interface
- name="reg_diag_data_buf_jesd_clk"
- internal="reg_diag_data_buffer_jesd.clk"
- type="conduit"
- dir="end" />
- <interface
- name="reg_diag_data_buf_jesd_read"
- internal="reg_diag_data_buffer_jesd.read"
- type="conduit"
- dir="end" />
- <interface
- name="reg_diag_data_buf_jesd_readdata"
- internal="reg_diag_data_buffer_jesd.readdata"
- type="conduit"
- dir="end" />
- <interface
- name="reg_diag_data_buf_jesd_reset"
- internal="reg_diag_data_buffer_jesd.reset"
- type="conduit"
- dir="end" />
- <interface
- name="reg_diag_data_buf_jesd_write"
- internal="reg_diag_data_buffer_jesd.write"
- type="conduit"
- dir="end" />
- <interface
- name="reg_diag_data_buf_jesd_writedata"
- internal="reg_diag_data_buffer_jesd.writedata"
- type="conduit"
- dir="end" />
<interface
name="reg_dp_shiftram_address"
internal="reg_dp_shiftram.address"
@@ -4628,7 +4577,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_eth_0.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_eth_0.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -5018,7 +4967,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_clk_0.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_clk_0.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -6213,11 +6162,11 @@
<consumedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value></value>
+ <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='avs_eth_0.mms_reg' start='0x80' end='0xC0' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0xC0' end='0x100' datawidth='32' /><slave name='reg_wg.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x200' end='0x300' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x300' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x400' end='0x800' datawidth='32' /><slave name='rom_system_info.mem' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='pio_jesd_ctrl.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='reg_dp_shiftram.mem' start='0x3040' end='0x3060' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x3060' end='0x3080' datawidth='32' /><slave name='reg_epcs.mem' start='0x3080' end='0x30A0' datawidth='32' /><slave name='reg_remu.mem' start='0x30A0' end='0x30C0' datawidth='32' /><slave name='reg_bsn_source.mem' start='0x30C0' end='0x30D0' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x30D0' end='0x30D8' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x30D8' end='0x30E0' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x30E0' end='0x30E8' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x30E8' end='0x30F0' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x30F0' end='0x30F8' datawidth='32' /><slave name='pio_pps.mem' start='0x30F8' end='0x3100' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x3200' end='0x3208' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_aduh_monitor.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='reg_diag_data_buffer_bsn.mem' start='0x8000' end='0xC000' datawidth='32' /><slave name='jesd204b.mem' start='0xC000' end='0x10000' datawidth='32' /><slave name='ram_wg.mem' start='0x10000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x40000' end='0x41000' datawidth='32' /><slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>1</value>
+ <value>24</value>
</entry>
</consumedSystemInfos>
</value>
@@ -6251,11 +6200,11 @@
<consumedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value></value>
+ <value><address-map><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>1</value>
+ <value>18</value>
</entry>
</consumedSystemInfos>
</value>
@@ -6312,22 +6261,14 @@
</parameters>
</interface>
<interface>
- <name>reset</name>
- <type>reset</type>
- <isStart>false</isStart>
+ <name>custom_instruction_master</name>
+ <type>nios_custom_instruction</type>
+ <isStart>true</isStart>
<ports>
<port>
- <name>reset_n</name>
- <role>reset_n</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- <port>
- <name>reset_req</name>
- <role>reset_req</role>
- <direction>Input</direction>
+ <name>dummy_ci_port</name>
+ <role>readra</role>
+ <direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -6339,12 +6280,32 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
- <value>clk</value>
+ <key>CIName</key>
+ <value></value>
</entry>
<entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
+ <key>addressWidth</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>clockCycle</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>enabled</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maxAddressWidth</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>opcodeExtension</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>sharedCombinationalAndMulticycle</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
@@ -6355,12 +6316,12 @@
<isStart>true</isStart>
<ports>
<port>
- <name>d_address</name>
- <role>address</role>
- <direction>Output</direction>
- <width>24</width>
+ <name>d_waitrequest</name>
+ <role>waitrequest</role>
+ <direction>Input</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
<name>d_byteenable</name>
@@ -6379,28 +6340,28 @@
<vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>d_readdata</name>
- <role>readdata</role>
- <direction>Input</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- <port>
- <name>d_waitrequest</name>
- <role>waitrequest</role>
- <direction>Input</direction>
+ <name>d_write</name>
+ <role>write</role>
+ <direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>d_write</name>
- <role>write</role>
+ <name>d_address</name>
+ <role>address</role>
<direction>Output</direction>
- <width>1</width>
+ <width>24</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>d_readdata</name>
+ <role>readdata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
<name>d_writedata</name>
@@ -6568,37 +6529,69 @@
</parameters>
</interface>
<interface>
- <name>instruction_master</name>
+ <name>debug_mem_slave</name>
<type>avalon</type>
- <isStart>true</isStart>
+ <isStart>false</isStart>
<ports>
<port>
- <name>i_address</name>
+ <name>debug_mem_slave_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>debug_mem_slave_byteenable</name>
+ <role>byteenable</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>debug_mem_slave_address</name>
<role>address</role>
- <direction>Output</direction>
- <width>18</width>
+ <direction>Input</direction>
+ <width>9</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
- <name>i_read</name>
- <role>read</role>
- <direction>Output</direction>
+ <name>debug_mem_slave_debugaccess</name>
+ <role>debugaccess</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>i_readdata</name>
+ <name>debug_mem_slave_readdata</name>
<role>readdata</role>
- <direction>Input</direction>
+ <direction>Output</direction>
<width>32</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
- <name>i_waitrequest</name>
+ <name>debug_mem_slave_waitrequest</name>
<role>waitrequest</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>debug_mem_slave_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>debug_mem_slave_write</name>
+ <role>write</role>
<direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
@@ -6606,24 +6599,54 @@
</port>
</ports>
<assignments>
- <assignmentValueMap/>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.hideDevice</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>qsys.ui.connect</key>
+ <value>instruction_master,data_master</value>
+ </entry>
+ </assignmentValueMap>
</assignments>
<parameters>
<parameterValueMap>
<entry>
- <key>adaptsTo</key>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
</entry>
<entry>
<key>addressGroup</key>
- <value>1</value>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>2048</value>
</entry>
<entry>
<key>addressUnits</key>
- <value>SYMBOLS</value>
+ <value>WORDS</value>
</entry>
<entry>
<key>alwaysBurstMaxBurst</key>
- <value>true</value>
+ <value>false</value>
</entry>
<entry>
<key>associatedClock</key>
@@ -6638,28 +6661,27 @@
<value>8</value>
</entry>
<entry>
- <key>burstOnBurstBoundariesOnly</key>
- <value>false</value>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
</entry>
<entry>
- <key>burstcountUnits</key>
- <value>WORDS</value>
+ <key>bridgesToMaster</key>
</entry>
<entry>
- <key>constantBurstBehavior</key>
+ <key>burstOnBurstBoundariesOnly</key>
<value>false</value>
</entry>
<entry>
- <key>dBSBigEndian</key>
- <value>false</value>
+ <key>burstcountUnits</key>
+ <value>WORDS</value>
</entry>
<entry>
- <key>doStreamReads</key>
+ <key>constantBurstBehavior</key>
<value>false</value>
</entry>
<entry>
- <key>doStreamWrites</key>
- <value>false</value>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
</entry>
<entry>
<key>holdTime</key>
@@ -6670,28 +6692,24 @@
<value>false</value>
</entry>
<entry>
- <key>isAsynchronous</key>
+ <key>isBigEndian</key>
<value>false</value>
</entry>
<entry>
- <key>isBigEndian</key>
+ <key>isFlash</key>
<value>false</value>
</entry>
<entry>
- <key>isReadable</key>
- <value>false</value>
+ <key>isMemoryDevice</key>
+ <value>true</value>
</entry>
<entry>
- <key>isWriteable</key>
+ <key>isNonVolatileStorage</key>
<value>false</value>
</entry>
<entry>
<key>linewrapBursts</key>
- <value>true</value>
- </entry>
- <entry>
- <key>maxAddressWidth</key>
- <value>32</value>
+ <value>false</value>
</entry>
<entry>
<key>maximumPendingReadTransactions</key>
@@ -6709,21 +6727,33 @@
<key>minimumResponseLatency</key>
<value>1</value>
</entry>
+ <entry>
+ <key>minimumUninterruptedRunLength</key>
+ <value>1</value>
+ </entry>
<entry>
<key>prSafe</key>
<value>false</value>
</entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
+ </entry>
<entry>
<key>readLatency</key>
<value>0</value>
</entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>1</value>
+ </entry>
<entry>
<key>readWaitTime</key>
<value>1</value>
</entry>
<entry>
<key>registerIncomingSignals</key>
- <value>false</value>
+ <value>true</value>
</entry>
<entry>
<key>registerOutgoingSignals</key>
@@ -6738,53 +6768,28 @@
<value>Cycles</value>
</entry>
<entry>
- <key>waitrequestAllowance</key>
- <value>0</value>
+ <key>transparentBridge</key>
+ <value>false</value>
</entry>
<entry>
- <key>writeWaitTime</key>
+ <key>waitrequestAllowance</key>
<value>0</value>
</entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>irq</name>
- <type>interrupt</type>
- <isStart>true</isStart>
- <ports>
- <port>
- <name>irq</name>
- <role>irq</role>
- <direction>Input</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedAddressablePoint</key>
- <value>qsys_lofar2_unb2b_adc_cpu_0.data_master</value>
- </entry>
<entry>
- <key>associatedClock</key>
- <value>clk</value>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
</entry>
<entry>
- <key>associatedReset</key>
- <value>reset</value>
+ <key>writeLatency</key>
+ <value>0</value>
</entry>
<entry>
- <key>irqMap</key>
+ <key>writeWaitStates</key>
+ <value>0</value>
</entry>
<entry>
- <key>irqScheme</key>
- <value>INDIVIDUAL_REQUESTS</value>
+ <key>writeWaitTime</key>
+ <value>0</value>
</entry>
</parameterValueMap>
</parameters>
@@ -6827,112 +6832,62 @@
</parameters>
</interface>
<interface>
- <name>debug_mem_slave</name>
+ <name>instruction_master</name>
<type>avalon</type>
- <isStart>false</isStart>
+ <isStart>true</isStart>
<ports>
<port>
- <name>debug_mem_slave_address</name>
- <role>address</role>
- <direction>Input</direction>
- <width>9</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- <port>
- <name>debug_mem_slave_byteenable</name>
- <role>byteenable</role>
+ <name>i_readdata</name>
+ <role>readdata</role>
<direction>Input</direction>
- <width>4</width>
+ <width>32</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
- <name>debug_mem_slave_debugaccess</name>
- <role>debugaccess</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- <port>
- <name>debug_mem_slave_read</name>
- <role>read</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- <port>
- <name>debug_mem_slave_readdata</name>
- <role>readdata</role>
+ <name>i_address</name>
+ <role>address</role>
<direction>Output</direction>
- <width>32</width>
+ <width>18</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
- <name>debug_mem_slave_waitrequest</name>
- <role>waitrequest</role>
+ <name>i_read</name>
+ <role>read</role>
<direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>debug_mem_slave_write</name>
- <role>write</role>
+ <name>i_waitrequest</name>
+ <role>waitrequest</role>
<direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
- <port>
- <name>debug_mem_slave_writedata</name>
- <role>writedata</role>
- <direction>Input</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
</ports>
<assignments>
- <assignmentValueMap>
- <entry>
- <key>embeddedsw.configuration.hideDevice</key>
- <value>1</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isMemoryDevice</key>
- <value>true</value>
- </entry>
- <entry>
- <key>qsys.ui.connect</key>
- <value>instruction_master,data_master</value>
- </entry>
- </assignmentValueMap>
+ <assignmentValueMap/>
</assignments>
<parameters>
<parameterValueMap>
<entry>
- <key>addressAlignment</key>
- <value>DYNAMIC</value>
+ <key>adaptsTo</key>
</entry>
<entry>
<key>addressGroup</key>
- <value>0</value>
- </entry>
- <entry>
- <key>addressSpan</key>
- <value>2048</value>
+ <value>1</value>
</entry>
<entry>
<key>addressUnits</key>
- <value>WORDS</value>
+ <value>SYMBOLS</value>
</entry>
<entry>
<key>alwaysBurstMaxBurst</key>
- <value>false</value>
+ <value>true</value>
</entry>
<entry>
<key>associatedClock</key>
@@ -6946,13 +6901,6 @@
<key>bitsPerSymbol</key>
<value>8</value>
</entry>
- <entry>
- <key>bridgedAddressOffset</key>
- <value>0</value>
- </entry>
- <entry>
- <key>bridgesToMaster</key>
- </entry>
<entry>
<key>burstOnBurstBoundariesOnly</key>
<value>false</value>
@@ -6966,8 +6914,16 @@
<value>false</value>
</entry>
<entry>
- <key>explicitAddressSpan</key>
- <value>0</value>
+ <key>dBSBigEndian</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>doStreamReads</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>doStreamWrites</key>
+ <value>false</value>
</entry>
<entry>
<key>holdTime</key>
@@ -6978,24 +6934,28 @@
<value>false</value>
</entry>
<entry>
- <key>isBigEndian</key>
+ <key>isAsynchronous</key>
<value>false</value>
</entry>
<entry>
- <key>isFlash</key>
+ <key>isBigEndian</key>
<value>false</value>
</entry>
<entry>
- <key>isMemoryDevice</key>
- <value>true</value>
+ <key>isReadable</key>
+ <value>false</value>
</entry>
<entry>
- <key>isNonVolatileStorage</key>
+ <key>isWriteable</key>
<value>false</value>
</entry>
<entry>
<key>linewrapBursts</key>
- <value>false</value>
+ <value>true</value>
+ </entry>
+ <entry>
+ <key>maxAddressWidth</key>
+ <value>32</value>
</entry>
<entry>
<key>maximumPendingReadTransactions</key>
@@ -7013,33 +6973,21 @@
<key>minimumResponseLatency</key>
<value>1</value>
</entry>
- <entry>
- <key>minimumUninterruptedRunLength</key>
- <value>1</value>
- </entry>
<entry>
<key>prSafe</key>
<value>false</value>
</entry>
- <entry>
- <key>printableDevice</key>
- <value>false</value>
- </entry>
<entry>
<key>readLatency</key>
<value>0</value>
</entry>
- <entry>
- <key>readWaitStates</key>
- <value>1</value>
- </entry>
<entry>
<key>readWaitTime</key>
<value>1</value>
</entry>
<entry>
<key>registerIncomingSignals</key>
- <value>true</value>
+ <value>false</value>
</entry>
<entry>
<key>registerOutgoingSignals</key>
@@ -7053,26 +7001,10 @@
<key>timingUnits</key>
<value>Cycles</value>
</entry>
- <entry>
- <key>transparentBridge</key>
- <value>false</value>
- </entry>
<entry>
<key>waitrequestAllowance</key>
<value>0</value>
</entry>
- <entry>
- <key>wellBehavedWaitrequest</key>
- <value>false</value>
- </entry>
- <entry>
- <key>writeLatency</key>
- <value>0</value>
- </entry>
- <entry>
- <key>writeWaitStates</key>
- <value>0</value>
- </entry>
<entry>
<key>writeWaitTime</key>
<value>0</value>
@@ -7081,17 +7013,17 @@
</parameters>
</interface>
<interface>
- <name>custom_instruction_master</name>
- <type>nios_custom_instruction</type>
+ <name>irq</name>
+ <type>interrupt</type>
<isStart>true</isStart>
<ports>
<port>
- <name>dummy_ci_port</name>
- <role>readra</role>
- <direction>Output</direction>
- <width>1</width>
+ <name>irq</name>
+ <role>irq</role>
+ <direction>Input</direction>
+ <width>32</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -7100,32 +7032,61 @@
<parameters>
<parameterValueMap>
<entry>
- <key>CIName</key>
- <value></value>
+ <key>associatedAddressablePoint</key>
+ <value>cpu_0.data_master</value>
</entry>
<entry>
- <key>addressWidth</key>
- <value>8</value>
+ <key>associatedClock</key>
+ <value>clk</value>
</entry>
<entry>
- <key>clockCycle</key>
- <value>0</value>
+ <key>associatedReset</key>
+ <value>reset</value>
</entry>
<entry>
- <key>enabled</key>
- <value>false</value>
+ <key>irqMap</key>
</entry>
<entry>
- <key>maxAddressWidth</key>
- <value>8</value>
+ <key>irqScheme</key>
+ <value>INDIVIDUAL_REQUESTS</value>
</entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>reset_req</name>
+ <role>reset_req</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
<entry>
- <key>opcodeExtension</key>
- <value>0</value>
+ <key>associatedClock</key>
+ <value>clk</value>
</entry>
<entry>
- <key>sharedCombinationalAndMulticycle</key>
- <value>false</value>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
</entry>
</parameterValueMap>
</parameters>
@@ -7156,7 +7117,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_cpu_0.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_cpu_0.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap>
<entry>
@@ -8498,7 +8459,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_jesd204b.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_jesd204b.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -9513,7 +9474,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_jtag_uart_0.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_jtag_uart_0.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap>
<entry>
@@ -10285,7 +10246,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_onchip_memory2_0.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_onchip_memory2_0.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap>
<entry>
@@ -10389,7 +10350,7 @@
<parameter name="svInterfaceDefinition" value="" />
</module>
<module
- name="pio_pps"
+ name="pio_jesd_ctrl"
kind="altera_generic_component"
version="1.0"
enabled="1">
@@ -10397,17 +10358,17 @@
<boundary>
<interfaces>
<interface>
- <name>address</name>
- <type>conduit</type>
+ <name>system</name>
+ <type>clock</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_address_export</name>
- <role>export</role>
- <direction>Output</direction>
+ <name>csi_system_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -10416,27 +10377,28 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
+ <key>clockRate</key>
+ <value>0</value>
</entry>
<entry>
- <key>associatedReset</key>
+ <key>externallyDriven</key>
+ <value>false</value>
</entry>
<entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>clk</name>
- <type>conduit</type>
+ <name>system_reset</name>
+ <type>reset</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_clk_export</name>
- <role>export</role>
- <direction>Output</direction>
+ <name>csi_system_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -10449,13 +10411,11 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
+ <value>system</value>
</entry>
<entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
</entry>
</parameterValueMap>
</parameters>
@@ -10695,12 +10655,12 @@
</parameters>
</interface>
<interface>
- <name>read</name>
+ <name>reset</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_read_export</name>
+ <name>coe_reset_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -10727,17 +10687,17 @@
</parameters>
</interface>
<interface>
- <name>readdata</name>
+ <name>clk</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_readdata_export</name>
+ <name>coe_clk_export</name>
<role>export</role>
- <direction>Input</direction>
- <width>32</width>
+ <direction>Output</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -10759,17 +10719,17 @@
</parameters>
</interface>
<interface>
- <name>reset</name>
+ <name>address</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_reset_export</name>
+ <name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -10791,14 +10751,14 @@
</parameters>
</interface>
<interface>
- <name>system</name>
- <type>clock</type>
+ <name>write</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
+ <name>coe_write_export</name>
+ <role>export</role>
+ <direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -10810,31 +10770,30 @@
<parameters>
<parameterValueMap>
<entry>
- <key>clockRate</key>
- <value>0</value>
+ <key>associatedClock</key>
</entry>
<entry>
- <key>externallyDriven</key>
- <value>false</value>
+ <key>associatedReset</key>
</entry>
<entry>
- <key>ptfSchematicName</key>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>system_reset</name>
- <type>reset</type>
+ <name>writedata</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
+ <name>coe_writedata_export</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>32</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -10844,22 +10803,24 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
- <value>system</value>
</entry>
<entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>write</name>
+ <name>read</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_write_export</name>
+ <name>coe_read_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -10886,14 +10847,14 @@
</parameters>
</interface>
<interface>
- <name>writedata</name>
+ <name>readdata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_writedata_export</name>
+ <name>coe_readdata_export</name>
<role>export</role>
- <direction>Output</direction>
+ <direction>Input</direction>
<width>32</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
@@ -10977,17 +10938,17 @@
<parameter name="defaultBoundary"><![CDATA[<boundaryDefinition>
<interfaces>
<interface>
- <name>address</name>
- <type>conduit</type>
+ <name>system</name>
+ <type>clock</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_address_export</name>
- <role>export</role>
- <direction>Output</direction>
+ <name>csi_system_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -10996,27 +10957,28 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
+ <key>clockRate</key>
+ <value>0</value>
</entry>
<entry>
- <key>associatedReset</key>
+ <key>externallyDriven</key>
+ <value>false</value>
</entry>
<entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>clk</name>
- <type>conduit</type>
+ <name>system_reset</name>
+ <type>reset</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_clk_export</name>
- <role>export</role>
- <direction>Output</direction>
+ <name>csi_system_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -11029,13 +10991,11 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
+ <value>system</value>
</entry>
<entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
</entry>
</parameterValueMap>
</parameters>
@@ -11275,12 +11235,12 @@
</parameters>
</interface>
<interface>
- <name>read</name>
+ <name>reset</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_read_export</name>
+ <name>coe_reset_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -11307,17 +11267,17 @@
</parameters>
</interface>
<interface>
- <name>readdata</name>
+ <name>clk</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_readdata_export</name>
+ <name>coe_clk_export</name>
<role>export</role>
- <direction>Input</direction>
- <width>32</width>
+ <direction>Output</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -11339,17 +11299,17 @@
</parameters>
</interface>
<interface>
- <name>reset</name>
+ <name>address</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_reset_export</name>
+ <name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -11371,14 +11331,14 @@
</parameters>
</interface>
<interface>
- <name>system</name>
- <type>clock</type>
+ <name>write</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
+ <name>coe_write_export</name>
+ <role>export</role>
+ <direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -11390,31 +11350,30 @@
<parameters>
<parameterValueMap>
<entry>
- <key>clockRate</key>
- <value>0</value>
+ <key>associatedClock</key>
</entry>
<entry>
- <key>externallyDriven</key>
- <value>false</value>
+ <key>associatedReset</key>
</entry>
<entry>
- <key>ptfSchematicName</key>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>system_reset</name>
- <type>reset</type>
+ <name>writedata</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
+ <name>coe_writedata_export</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>32</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -11424,22 +11383,24 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
- <value>system</value>
</entry>
<entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>write</name>
+ <name>read</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_write_export</name>
+ <name>coe_read_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -11466,14 +11427,14 @@
</parameters>
</interface>
<interface>
- <name>writedata</name>
+ <name>readdata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_writedata_export</name>
+ <name>coe_readdata_export</name>
<role>export</role>
- <direction>Output</direction>
+ <direction>Input</direction>
<width>32</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
@@ -11500,37 +11461,37 @@
</interfaces>
</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_pio_pps</hdlLibraryName>
+ <hdlLibraryName>qsys_lofar2_unb2b_adc_avs_common_mm_2</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_pio_pps</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_pps</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_avs_common_mm_2</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_avs_common_mm_2</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_pio_pps</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_pps</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_avs_common_mm_2</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_avs_common_mm_2</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_pio_pps</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_pps</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_avs_common_mm_2</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_avs_common_mm_2</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_pio_pps.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_common_mm_2.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
<module
- name="pio_system_info"
+ name="pio_pps"
kind="altera_generic_component"
version="1.0"
enabled="1">
@@ -11546,7 +11507,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>5</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -11610,7 +11571,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>5</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -11679,7 +11640,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>128</value>
+ <value>8</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -12085,11 +12046,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x80' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x8' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>7</value>
+ <value>3</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -12126,7 +12087,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>5</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -12190,7 +12151,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>5</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -12259,7 +12220,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>128</value>
+ <value>8</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -12641,37 +12602,37 @@
</interfaces>
</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_pio_system_info</hdlLibraryName>
+ <hdlLibraryName>qsys_lofar2_unb2b_adc_pio_pps</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_pio_system_info</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_system_info</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_pio_pps</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_pps</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_pio_system_info</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_system_info</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_pio_pps</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_pps</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_pio_system_info</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_system_info</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_pio_pps</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_pps</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_pio_system_info.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_pio_pps.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
<module
- name="pio_wdi"
+ name="pio_system_info"
kind="altera_generic_component"
version="1.0"
enabled="1">
@@ -12679,1105 +12640,17 @@
<boundary>
<interfaces>
<interface>
- <name>clk</name>
- <type>clock</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>clk</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>clockRate</key>
- <value>0</value>
- </entry>
- <entry>
- <key>externallyDriven</key>
- <value>false</value>
- </entry>
- <entry>
- <key>ptfSchematicName</key>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>external_connection</name>
+ <name>address</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>out_port</name>
+ <name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>1</width>
+ <width>5</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset</name>
- <type>reset</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>reset_n</name>
- <role>reset_n</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>s1</name>
- <type>avalon</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>address</name>
- <role>address</role>
- <direction>Input</direction>
- <width>2</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- <port>
- <name>write_n</name>
- <role>write_n</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- <port>
- <name>writedata</name>
- <role>writedata</role>
- <direction>Input</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- <port>
- <name>chipselect</name>
- <role>chipselect</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- <port>
- <name>readdata</name>
- <role>readdata</role>
- <direction>Output</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>embeddedsw.configuration.isFlash</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isMemoryDevice</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isNonVolatileStorage</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isPrintableDevice</key>
- <value>0</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>addressAlignment</key>
- <value>NATIVE</value>
- </entry>
- <entry>
- <key>addressGroup</key>
- <value>0</value>
- </entry>
- <entry>
- <key>addressSpan</key>
- <value>4</value>
- </entry>
- <entry>
- <key>addressUnits</key>
- <value>WORDS</value>
- </entry>
- <entry>
- <key>alwaysBurstMaxBurst</key>
- <value>false</value>
- </entry>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>associatedReset</key>
- <value>reset</value>
- </entry>
- <entry>
- <key>bitsPerSymbol</key>
- <value>8</value>
- </entry>
- <entry>
- <key>bridgedAddressOffset</key>
- <value>0</value>
- </entry>
- <entry>
- <key>bridgesToMaster</key>
- </entry>
- <entry>
- <key>burstOnBurstBoundariesOnly</key>
- <value>false</value>
- </entry>
- <entry>
- <key>burstcountUnits</key>
- <value>WORDS</value>
- </entry>
- <entry>
- <key>constantBurstBehavior</key>
- <value>false</value>
- </entry>
- <entry>
- <key>explicitAddressSpan</key>
- <value>0</value>
- </entry>
- <entry>
- <key>holdTime</key>
- <value>0</value>
- </entry>
- <entry>
- <key>interleaveBursts</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isBigEndian</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isFlash</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isMemoryDevice</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isNonVolatileStorage</key>
- <value>false</value>
- </entry>
- <entry>
- <key>linewrapBursts</key>
- <value>false</value>
- </entry>
- <entry>
- <key>maximumPendingReadTransactions</key>
- <value>0</value>
- </entry>
- <entry>
- <key>maximumPendingWriteTransactions</key>
- <value>0</value>
- </entry>
- <entry>
- <key>minimumReadLatency</key>
- <value>1</value>
- </entry>
- <entry>
- <key>minimumResponseLatency</key>
- <value>1</value>
- </entry>
- <entry>
- <key>minimumUninterruptedRunLength</key>
- <value>1</value>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- <entry>
- <key>printableDevice</key>
- <value>false</value>
- </entry>
- <entry>
- <key>readLatency</key>
- <value>0</value>
- </entry>
- <entry>
- <key>readWaitStates</key>
- <value>1</value>
- </entry>
- <entry>
- <key>readWaitTime</key>
- <value>1</value>
- </entry>
- <entry>
- <key>registerIncomingSignals</key>
- <value>false</value>
- </entry>
- <entry>
- <key>registerOutgoingSignals</key>
- <value>false</value>
- </entry>
- <entry>
- <key>setupTime</key>
- <value>0</value>
- </entry>
- <entry>
- <key>timingUnits</key>
- <value>Cycles</value>
- </entry>
- <entry>
- <key>transparentBridge</key>
- <value>false</value>
- </entry>
- <entry>
- <key>waitrequestAllowance</key>
- <value>0</value>
- </entry>
- <entry>
- <key>wellBehavedWaitrequest</key>
- <value>false</value>
- </entry>
- <entry>
- <key>writeLatency</key>
- <value>0</value>
- </entry>
- <entry>
- <key>writeWaitStates</key>
- <value>0</value>
- </entry>
- <entry>
- <key>writeWaitTime</key>
- <value>0</value>
- </entry>
- </parameterValueMap>
- </parameters>
- <cmsisInfo>
- <cmsisSrcFileContents><?xml version="1.0" encoding="utf-8"?>
-<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd" >
- <peripherals>
- <peripheral>
- <name>altera_avalon_pio</name><baseAddress>0x00000000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>32</size>
- <usage>registers</usage>
- </addressBlock>
- <registers>
- <register>
- <name>DATA</name>
- <displayName>Data</displayName>
- <description>Reading from data returns the value present at the input ports. If the PIO core hardware is configured in output-only mode, reading from data returns an undefined value. Writing to data stores the value to a register that drives the output ports. If the PIO core hardware is configured in input-only mode, writing to data has no effect. If the PIO core hardware is in bidirectional mode, the registered value appears on an output port only when the corresponding bit in the direction register is set to 1 (output).</description>
- <addressOffset>0x0</addressOffset>
- <size>32</size>
- <access>read-write</access>
- <resetValue>0x0</resetValue>
- <resetMask>0xffffffff</resetMask>
- <fields>
- <field><name>data</name>
- <description>Reads: Data value currently on PIO inputs. Writes: New value to drive on PIO outputs.</description>
- <bitOffset>0x0</bitOffset>
- <bitWidth>32</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>DIRECTION</name>
- <displayName>Direction</displayName>
- <description>The direction register controls the data direction for each PIO port, assuming the port is bidirectional. When bit n in direction is set to 1, port n drives out the value in the corresponding bit of the data register The direction register only exists when the PIO core hardware is configured in bidirectional mode. The mode (input, output, or bidirectional) is specified at system generation time, and cannot be changed at runtime. In input-only or output-only mode, the direction register does not exist. In this case, reading direction returns an undefined value, writing direction has no effect. After reset, all bits of direction are 0, so that all bidirectional I/O ports are configured as inputs. If those PIO ports are connected to device pins, the pins are held in a high-impedance state. In bi-directional mode, to change the direction of the PIO port, reprogram the direction register.</description>
- <addressOffset>0x4</addressOffset>
- <size>32</size>
- <access>read-write</access>
- <resetValue>0x0</resetValue>
- <resetMask>0xffffffff</resetMask>
- <fields>
- <field><name>direction</name>
- <description>Individual direction control for each I/O port. A value of 0 sets the direction to input; 1 sets the direction to output.</description>
- <bitOffset>0x0</bitOffset>
- <bitWidth>32</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>IRQ_MASK</name>
- <displayName>Interrupt mask</displayName>
- <description>Setting a bit in the interruptmask register to 1 enables interrupts for the corresponding PIO input port. Interrupt behavior depends on the hardware configuration of the PIO core. The interruptmask register only exists when the hardware is configured to generate IRQs. If the core cannot generate IRQs, reading interruptmask returns an undefined value, and writing to interruptmask has no effect. After reset, all bits of interruptmask are zero, so that interrupts are disabled for all PIO ports.</description>
- <addressOffset>0x8</addressOffset>
- <size>32</size>
- <access>read-write</access>
- <resetValue>0x0</resetValue>
- <resetMask>0xffffffff</resetMask>
- <fields>
- <field><name>interruptmask</name>
- <description>IRQ enable/disable for each input port. Setting a bit to 1 enables interrupts for the corresponding port.</description>
- <bitOffset>0x0</bitOffset>
- <bitWidth>32</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>EDGE_CAP</name>
- <displayName>Edge capture</displayName>
- <description>Bit n in the edgecapture register is set to 1 whenever an edge is detected on input port n. An Avalon-MM master peripheral can read the edgecapture register to determine if an edge has occurred on any of the PIO input ports. If the option Enable bit-clearing for edge capture register is turned off, writing any value to the edgecapture register clears all bits in the register. Otherwise, writing a 1 to a particular bit in the register clears only that bit. The type of edge(s) to detect is fixed in hardware at system generation time. The edgecapture register only exists when the hardware is configured to capture edges. If the core is not configured to capture edges, reading from edgecapture returns an undefined value, and writing to edgecapture has no effect.</description>
- <addressOffset>0xc</addressOffset>
- <size>32</size>
- <access>read-write</access>
- <resetValue>0x0</resetValue>
- <resetMask>0xffffffff</resetMask>
- <fields>
- <field><name>edgecapture</name>
- <description>Edge detection for each input port.</description>
- <bitOffset>0x0</bitOffset>
- <bitWidth>32</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>SET_BIT</name>
- <displayName>Outset</displayName>
- <description>You can use the outset register to set individual bits of the output port. For example, to set bit 6 of the output port, write 0x40 to the outset register. This register is only present when the option Enable individual bit set/clear output register is turned on.</description>
- <addressOffset>0x10</addressOffset>
- <size>32</size>
- <access>write-only</access>
- <resetValue>0x0</resetValue>
- <resetMask>0xffffffff</resetMask>
- <fields>
- <field><name>outset</name>
- <description>Specifies which bit of the output port to set.</description>
- <bitOffset>0x0</bitOffset>
- <bitWidth>32</bitWidth>
- <access>write-only</access>
- </field>
- </fields>
- </register>
- <register>
- <name>CLEAR_BITS</name>
- <displayName>Outclear</displayName>
- <description>You can use the outclear register to clear individual bits of the output port. For example, writing 0x08 to the outclear register clears bit 3 of the output port. This register is only present when the option Enable individual bit set/clear output register is turned on.</description>
- <addressOffset>0x14</addressOffset>
- <size>32</size>
- <access>write-only</access>
- <resetValue>0x0</resetValue>
- <resetMask>0xffffffff</resetMask>
- <fields>
- <field><name>outclear</name>
- <description>Specifies which output bit to clear.</description>
- <bitOffset>0x0</bitOffset>
- <bitWidth>32</bitWidth>
- <access>write-only</access>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- </peripherals>
-</device> </cmsisSrcFileContents>
- <addressGroup></addressGroup>
- <cmsisVars/>
- </cmsisInfo>
- </interface>
- </interfaces>
- </boundary>
- <originalModuleInfo>
- <className>altera_avalon_pio</className>
- <version>19.1.0</version>
- <displayName>PIO (Parallel I/O) Intel FPGA IP</displayName>
- </originalModuleInfo>
- <systemInfoParameterDescriptors>
- <descriptors>
- <descriptor>
- <parameterDefaultValue>0</parameterDefaultValue>
- <parameterName>clockRate</parameterName>
- <parameterType>java.lang.Long</parameterType>
- <systemInfoArgs>clk</systemInfoArgs>
- <systemInfotype>CLOCK_RATE</systemInfotype>
- </descriptor>
- </descriptors>
- </systemInfoParameterDescriptors>
- <systemInfos>
- <connPtSystemInfos>
- <entry>
- <key>clk</key>
- <value>
- <connectionPointName>clk</connectionPointName>
- <suppliedSystemInfos/>
- <consumedSystemInfos>
- <entry>
- <key>CLOCK_RATE</key>
- <value>100000000</value>
- </entry>
- </consumedSystemInfos>
- </value>
- </entry>
- <entry>
- <key>s1</key>
- <value>
- <connectionPointName>s1</connectionPointName>
- <suppliedSystemInfos>
- <entry>
- <key>ADDRESS_MAP</key>
- <value><address-map><slave name='s1' start='0x0' end='0x10' datawidth='32' /></address-map></value>
- </entry>
- <entry>
- <key>ADDRESS_WIDTH</key>
- <value>4</value>
- </entry>
- <entry>
- <key>MAX_SLAVE_DATA_WIDTH</key>
- <value>32</value>
- </entry>
- </suppliedSystemInfos>
- <consumedSystemInfos/>
- </value>
- </entry>
- </connPtSystemInfos>
- </systemInfos>
-</componentDefinition>]]></parameter>
- <parameter name="defaultBoundary"><![CDATA[<boundaryDefinition>
- <interfaces>
- <interface>
- <name>clk</name>
- <type>clock</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>clk</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>clockRate</key>
- <value>0</value>
- </entry>
- <entry>
- <key>externallyDriven</key>
- <value>false</value>
- </entry>
- <entry>
- <key>ptfSchematicName</key>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>external_connection</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>out_port</name>
- <role>export</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset</name>
- <type>reset</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>reset_n</name>
- <role>reset_n</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>s1</name>
- <type>avalon</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>address</name>
- <role>address</role>
- <direction>Input</direction>
- <width>2</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- <port>
- <name>write_n</name>
- <role>write_n</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- <port>
- <name>writedata</name>
- <role>writedata</role>
- <direction>Input</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- <port>
- <name>chipselect</name>
- <role>chipselect</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- <port>
- <name>readdata</name>
- <role>readdata</role>
- <direction>Output</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>embeddedsw.configuration.isFlash</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isMemoryDevice</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isNonVolatileStorage</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isPrintableDevice</key>
- <value>0</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>addressAlignment</key>
- <value>NATIVE</value>
- </entry>
- <entry>
- <key>addressGroup</key>
- <value>0</value>
- </entry>
- <entry>
- <key>addressSpan</key>
- <value>4</value>
- </entry>
- <entry>
- <key>addressUnits</key>
- <value>WORDS</value>
- </entry>
- <entry>
- <key>alwaysBurstMaxBurst</key>
- <value>false</value>
- </entry>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>associatedReset</key>
- <value>reset</value>
- </entry>
- <entry>
- <key>bitsPerSymbol</key>
- <value>8</value>
- </entry>
- <entry>
- <key>bridgedAddressOffset</key>
- <value>0</value>
- </entry>
- <entry>
- <key>bridgesToMaster</key>
- </entry>
- <entry>
- <key>burstOnBurstBoundariesOnly</key>
- <value>false</value>
- </entry>
- <entry>
- <key>burstcountUnits</key>
- <value>WORDS</value>
- </entry>
- <entry>
- <key>constantBurstBehavior</key>
- <value>false</value>
- </entry>
- <entry>
- <key>explicitAddressSpan</key>
- <value>0</value>
- </entry>
- <entry>
- <key>holdTime</key>
- <value>0</value>
- </entry>
- <entry>
- <key>interleaveBursts</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isBigEndian</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isFlash</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isMemoryDevice</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isNonVolatileStorage</key>
- <value>false</value>
- </entry>
- <entry>
- <key>linewrapBursts</key>
- <value>false</value>
- </entry>
- <entry>
- <key>maximumPendingReadTransactions</key>
- <value>0</value>
- </entry>
- <entry>
- <key>maximumPendingWriteTransactions</key>
- <value>0</value>
- </entry>
- <entry>
- <key>minimumReadLatency</key>
- <value>1</value>
- </entry>
- <entry>
- <key>minimumResponseLatency</key>
- <value>1</value>
- </entry>
- <entry>
- <key>minimumUninterruptedRunLength</key>
- <value>1</value>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- <entry>
- <key>printableDevice</key>
- <value>false</value>
- </entry>
- <entry>
- <key>readLatency</key>
- <value>0</value>
- </entry>
- <entry>
- <key>readWaitStates</key>
- <value>1</value>
- </entry>
- <entry>
- <key>readWaitTime</key>
- <value>1</value>
- </entry>
- <entry>
- <key>registerIncomingSignals</key>
- <value>false</value>
- </entry>
- <entry>
- <key>registerOutgoingSignals</key>
- <value>false</value>
- </entry>
- <entry>
- <key>setupTime</key>
- <value>0</value>
- </entry>
- <entry>
- <key>timingUnits</key>
- <value>Cycles</value>
- </entry>
- <entry>
- <key>transparentBridge</key>
- <value>false</value>
- </entry>
- <entry>
- <key>waitrequestAllowance</key>
- <value>0</value>
- </entry>
- <entry>
- <key>wellBehavedWaitrequest</key>
- <value>false</value>
- </entry>
- <entry>
- <key>writeLatency</key>
- <value>0</value>
- </entry>
- <entry>
- <key>writeWaitStates</key>
- <value>0</value>
- </entry>
- <entry>
- <key>writeWaitTime</key>
- <value>0</value>
- </entry>
- </parameterValueMap>
- </parameters>
- <cmsisInfo>
- <cmsisSrcFileContents><?xml version="1.0" encoding="utf-8"?>
-<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd" >
- <peripherals>
- <peripheral>
- <name>altera_avalon_pio</name><baseAddress>0x00000000</baseAddress>
- <addressBlock>
- <offset>0x0</offset>
- <size>32</size>
- <usage>registers</usage>
- </addressBlock>
- <registers>
- <register>
- <name>DATA</name>
- <displayName>Data</displayName>
- <description>Reading from data returns the value present at the input ports. If the PIO core hardware is configured in output-only mode, reading from data returns an undefined value. Writing to data stores the value to a register that drives the output ports. If the PIO core hardware is configured in input-only mode, writing to data has no effect. If the PIO core hardware is in bidirectional mode, the registered value appears on an output port only when the corresponding bit in the direction register is set to 1 (output).</description>
- <addressOffset>0x0</addressOffset>
- <size>32</size>
- <access>read-write</access>
- <resetValue>0x0</resetValue>
- <resetMask>0xffffffff</resetMask>
- <fields>
- <field><name>data</name>
- <description>Reads: Data value currently on PIO inputs. Writes: New value to drive on PIO outputs.</description>
- <bitOffset>0x0</bitOffset>
- <bitWidth>32</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>DIRECTION</name>
- <displayName>Direction</displayName>
- <description>The direction register controls the data direction for each PIO port, assuming the port is bidirectional. When bit n in direction is set to 1, port n drives out the value in the corresponding bit of the data register The direction register only exists when the PIO core hardware is configured in bidirectional mode. The mode (input, output, or bidirectional) is specified at system generation time, and cannot be changed at runtime. In input-only or output-only mode, the direction register does not exist. In this case, reading direction returns an undefined value, writing direction has no effect. After reset, all bits of direction are 0, so that all bidirectional I/O ports are configured as inputs. If those PIO ports are connected to device pins, the pins are held in a high-impedance state. In bi-directional mode, to change the direction of the PIO port, reprogram the direction register.</description>
- <addressOffset>0x4</addressOffset>
- <size>32</size>
- <access>read-write</access>
- <resetValue>0x0</resetValue>
- <resetMask>0xffffffff</resetMask>
- <fields>
- <field><name>direction</name>
- <description>Individual direction control for each I/O port. A value of 0 sets the direction to input; 1 sets the direction to output.</description>
- <bitOffset>0x0</bitOffset>
- <bitWidth>32</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>IRQ_MASK</name>
- <displayName>Interrupt mask</displayName>
- <description>Setting a bit in the interruptmask register to 1 enables interrupts for the corresponding PIO input port. Interrupt behavior depends on the hardware configuration of the PIO core. The interruptmask register only exists when the hardware is configured to generate IRQs. If the core cannot generate IRQs, reading interruptmask returns an undefined value, and writing to interruptmask has no effect. After reset, all bits of interruptmask are zero, so that interrupts are disabled for all PIO ports.</description>
- <addressOffset>0x8</addressOffset>
- <size>32</size>
- <access>read-write</access>
- <resetValue>0x0</resetValue>
- <resetMask>0xffffffff</resetMask>
- <fields>
- <field><name>interruptmask</name>
- <description>IRQ enable/disable for each input port. Setting a bit to 1 enables interrupts for the corresponding port.</description>
- <bitOffset>0x0</bitOffset>
- <bitWidth>32</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>EDGE_CAP</name>
- <displayName>Edge capture</displayName>
- <description>Bit n in the edgecapture register is set to 1 whenever an edge is detected on input port n. An Avalon-MM master peripheral can read the edgecapture register to determine if an edge has occurred on any of the PIO input ports. If the option Enable bit-clearing for edge capture register is turned off, writing any value to the edgecapture register clears all bits in the register. Otherwise, writing a 1 to a particular bit in the register clears only that bit. The type of edge(s) to detect is fixed in hardware at system generation time. The edgecapture register only exists when the hardware is configured to capture edges. If the core is not configured to capture edges, reading from edgecapture returns an undefined value, and writing to edgecapture has no effect.</description>
- <addressOffset>0xc</addressOffset>
- <size>32</size>
- <access>read-write</access>
- <resetValue>0x0</resetValue>
- <resetMask>0xffffffff</resetMask>
- <fields>
- <field><name>edgecapture</name>
- <description>Edge detection for each input port.</description>
- <bitOffset>0x0</bitOffset>
- <bitWidth>32</bitWidth>
- <access>read-write</access>
- </field>
- </fields>
- </register>
- <register>
- <name>SET_BIT</name>
- <displayName>Outset</displayName>
- <description>You can use the outset register to set individual bits of the output port. For example, to set bit 6 of the output port, write 0x40 to the outset register. This register is only present when the option Enable individual bit set/clear output register is turned on.</description>
- <addressOffset>0x10</addressOffset>
- <size>32</size>
- <access>write-only</access>
- <resetValue>0x0</resetValue>
- <resetMask>0xffffffff</resetMask>
- <fields>
- <field><name>outset</name>
- <description>Specifies which bit of the output port to set.</description>
- <bitOffset>0x0</bitOffset>
- <bitWidth>32</bitWidth>
- <access>write-only</access>
- </field>
- </fields>
- </register>
- <register>
- <name>CLEAR_BITS</name>
- <displayName>Outclear</displayName>
- <description>You can use the outclear register to clear individual bits of the output port. For example, writing 0x08 to the outclear register clears bit 3 of the output port. This register is only present when the option Enable individual bit set/clear output register is turned on.</description>
- <addressOffset>0x14</addressOffset>
- <size>32</size>
- <access>write-only</access>
- <resetValue>0x0</resetValue>
- <resetMask>0xffffffff</resetMask>
- <fields>
- <field><name>outclear</name>
- <description>Specifies which output bit to clear.</description>
- <bitOffset>0x0</bitOffset>
- <bitWidth>32</bitWidth>
- <access>write-only</access>
- </field>
- </fields>
- </register>
- </registers>
- </peripheral>
- </peripherals>
-</device> </cmsisSrcFileContents>
- <addressGroup></addressGroup>
- <cmsisVars/>
- </cmsisInfo>
- </interface>
- </interfaces>
-</boundaryDefinition>]]></parameter>
- <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_pio_wdi</hdlLibraryName>
- <fileSets>
- <fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_pio_wdi</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_wdi</fileSetFixedName>
- <fileSetKind>QUARTUS_SYNTH</fileSetKind>
- <fileSetFiles/>
- </fileSet>
- <fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_pio_wdi</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_wdi</fileSetFixedName>
- <fileSetKind>SIM_VERILOG</fileSetKind>
- <fileSetFiles/>
- </fileSet>
- <fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_pio_wdi</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_wdi</fileSetFixedName>
- <fileSetKind>SIM_VHDL</fileSetKind>
- <fileSetFiles/>
- </fileSet>
- </fileSets>
-</generationInfoDefinition>]]></parameter>
- <parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_pio_wdi.ip</parameter>
- <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
- <assignmentValueMap>
- <entry>
- <key>embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.CMacro.CAPTURE</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.CMacro.DATA_WIDTH</key>
- <value>1</value>
- </entry>
- <entry>
- <key>embeddedsw.CMacro.DO_TEST_BENCH_WIRING</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.CMacro.DRIVEN_SIM_VALUE</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.CMacro.EDGE_TYPE</key>
- <value>NONE</value>
- </entry>
- <entry>
- <key>embeddedsw.CMacro.FREQ</key>
- <value>100000000</value>
- </entry>
- <entry>
- <key>embeddedsw.CMacro.HAS_IN</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.CMacro.HAS_OUT</key>
- <value>1</value>
- </entry>
- <entry>
- <key>embeddedsw.CMacro.HAS_TRI</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.CMacro.IRQ_TYPE</key>
- <value>NONE</value>
- </entry>
- <entry>
- <key>embeddedsw.CMacro.RESET_VALUE</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.dts.compatible</key>
- <value>altr,pio-1.0</value>
- </entry>
- <entry>
- <key>embeddedsw.dts.group</key>
- <value>gpio</value>
- </entry>
- <entry>
- <key>embeddedsw.dts.name</key>
- <value>pio</value>
- </entry>
- <entry>
- <key>embeddedsw.dts.params.altr,gpio-bank-width</key>
- <value>1</value>
- </entry>
- <entry>
- <key>embeddedsw.dts.params.resetvalue</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.dts.vendor</key>
- <value>altr</value>
- </entry>
- </assignmentValueMap>
-</assignmentDefinition>]]></parameter>
- <parameter name="svInterfaceDefinition" value="" />
- </module>
- <module
- name="ram_aduh_monitor"
- kind="altera_generic_component"
- version="1.0"
- enabled="1">
- <parameter name="componentDefinition"><![CDATA[<componentDefinition>
- <boundary>
- <interfaces>
- <interface>
- <name>address</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_address_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>12</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -13839,7 +12712,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>12</width>
+ <width>5</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -13908,7 +12781,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>16384</value>
+ <value>128</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -14314,11 +13187,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x4000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x80' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>14</value>
+ <value>7</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -14355,7 +13228,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>12</width>
+ <width>5</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -14419,7 +13292,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>12</width>
+ <width>5</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -14488,7 +13361,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>16384</value>
+ <value>128</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -14870,37 +13743,37 @@
</interfaces>
</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</hdlLibraryName>
+ <hdlLibraryName>qsys_lofar2_unb2b_adc_pio_system_info</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_pio_system_info</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_system_info</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_pio_system_info</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_system_info</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_pio_system_info</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_system_info</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_aduh_monitor.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_pio_system_info.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
<module
- name="ram_diag_data_buffer_bsn"
+ name="pio_wdi"
kind="altera_generic_component"
version="1.0"
enabled="1">
@@ -14908,17 +13781,17 @@
<boundary>
<interfaces>
<interface>
- <name>address</name>
- <type>conduit</type>
+ <name>clk</name>
+ <type>clock</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_address_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>21</width>
+ <name>clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -14927,25 +13800,26 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
+ <key>clockRate</key>
+ <value>0</value>
</entry>
<entry>
- <key>associatedReset</key>
+ <key>externallyDriven</key>
+ <value>false</value>
</entry>
<entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>clk</name>
+ <name>external_connection</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_clk_export</name>
+ <name>out_port</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -14972,28 +13846,58 @@
</parameters>
</interface>
<interface>
- <name>mem</name>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>s1</name>
<type>avalon</type>
<isStart>false</isStart>
<ports>
<port>
- <name>avs_mem_address</name>
+ <name>address</name>
<role>address</role>
<direction>Input</direction>
- <width>21</width>
+ <width>2</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
- <name>avs_mem_write</name>
- <role>write</role>
+ <name>write_n</name>
+ <role>write_n</role>
<direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>avs_mem_writedata</name>
+ <name>writedata</name>
<role>writedata</role>
<direction>Input</direction>
<width>32</width>
@@ -15001,15 +13905,15 @@
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
- <name>avs_mem_read</name>
- <role>read</role>
+ <name>chipselect</name>
+ <role>chipselect</role>
<direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>avs_mem_readdata</name>
+ <name>readdata</name>
<role>readdata</role>
<direction>Output</direction>
<width>32</width>
@@ -15041,7 +13945,7 @@
<parameterValueMap>
<entry>
<key>addressAlignment</key>
- <value>DYNAMIC</value>
+ <value>NATIVE</value>
</entry>
<entry>
<key>addressGroup</key>
@@ -15049,7 +13953,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>8388608</value>
+ <value>4</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -15061,11 +13965,11 @@
</entry>
<entry>
<key>associatedClock</key>
- <value>system</value>
+ <value>clk</value>
</entry>
<entry>
<key>associatedReset</key>
- <value>system_reset</value>
+ <value>reset</value>
</entry>
<entry>
<key>bitsPerSymbol</key>
@@ -15152,15 +14056,15 @@
</entry>
<entry>
<key>readLatency</key>
- <value>1</value>
+ <value>0</value>
</entry>
<entry>
<key>readWaitStates</key>
- <value>0</value>
+ <value>1</value>
</entry>
<entry>
<key>readWaitTime</key>
- <value>0</value>
+ <value>1</value>
</entry>
<entry>
<key>registerIncomingSignals</key>
@@ -15204,244 +14108,148 @@
</entry>
</parameterValueMap>
</parameters>
- </interface>
- <interface>
- <name>read</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_read_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>readdata</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_readdata_export</name>
- <role>export</role>
- <direction>Input</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_reset_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>system</name>
- <type>clock</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>clockRate</key>
- <value>0</value>
- </entry>
- <entry>
- <key>externallyDriven</key>
- <value>false</value>
- </entry>
- <entry>
- <key>ptfSchematicName</key>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>system_reset</name>
- <type>reset</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>system</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>write</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_write_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>writedata</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_writedata_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
+ <cmsisInfo>
+ <cmsisSrcFileContents><?xml version="1.0" encoding="utf-8"?>
+<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd" >
+ <peripherals>
+ <peripheral>
+ <name>altera_avalon_pio</name><baseAddress>0x00000000</baseAddress>
+ <addressBlock>
+ <offset>0x0</offset>
+ <size>32</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <registers>
+ <register>
+ <name>DATA</name>
+ <displayName>Data</displayName>
+ <description>Reading from data returns the value present at the input ports. If the PIO core hardware is configured in output-only mode, reading from data returns an undefined value. Writing to data stores the value to a register that drives the output ports. If the PIO core hardware is configured in input-only mode, writing to data has no effect. If the PIO core hardware is in bidirectional mode, the registered value appears on an output port only when the corresponding bit in the direction register is set to 1 (output).</description>
+ <addressOffset>0x0</addressOffset>
+ <size>32</size>
+ <access>read-write</access>
+ <resetValue>0x0</resetValue>
+ <resetMask>0xffffffff</resetMask>
+ <fields>
+ <field><name>data</name>
+ <description>Reads: Data value currently on PIO inputs. Writes: New value to drive on PIO outputs.</description>
+ <bitOffset>0x0</bitOffset>
+ <bitWidth>32</bitWidth>
+ <access>read-write</access>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DIRECTION</name>
+ <displayName>Direction</displayName>
+ <description>The direction register controls the data direction for each PIO port, assuming the port is bidirectional. When bit n in direction is set to 1, port n drives out the value in the corresponding bit of the data register The direction register only exists when the PIO core hardware is configured in bidirectional mode. The mode (input, output, or bidirectional) is specified at system generation time, and cannot be changed at runtime. In input-only or output-only mode, the direction register does not exist. In this case, reading direction returns an undefined value, writing direction has no effect. After reset, all bits of direction are 0, so that all bidirectional I/O ports are configured as inputs. If those PIO ports are connected to device pins, the pins are held in a high-impedance state. In bi-directional mode, to change the direction of the PIO port, reprogram the direction register.</description>
+ <addressOffset>0x4</addressOffset>
+ <size>32</size>
+ <access>read-write</access>
+ <resetValue>0x0</resetValue>
+ <resetMask>0xffffffff</resetMask>
+ <fields>
+ <field><name>direction</name>
+ <description>Individual direction control for each I/O port. A value of 0 sets the direction to input; 1 sets the direction to output.</description>
+ <bitOffset>0x0</bitOffset>
+ <bitWidth>32</bitWidth>
+ <access>read-write</access>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>IRQ_MASK</name>
+ <displayName>Interrupt mask</displayName>
+ <description>Setting a bit in the interruptmask register to 1 enables interrupts for the corresponding PIO input port. Interrupt behavior depends on the hardware configuration of the PIO core. The interruptmask register only exists when the hardware is configured to generate IRQs. If the core cannot generate IRQs, reading interruptmask returns an undefined value, and writing to interruptmask has no effect. After reset, all bits of interruptmask are zero, so that interrupts are disabled for all PIO ports.</description>
+ <addressOffset>0x8</addressOffset>
+ <size>32</size>
+ <access>read-write</access>
+ <resetValue>0x0</resetValue>
+ <resetMask>0xffffffff</resetMask>
+ <fields>
+ <field><name>interruptmask</name>
+ <description>IRQ enable/disable for each input port. Setting a bit to 1 enables interrupts for the corresponding port.</description>
+ <bitOffset>0x0</bitOffset>
+ <bitWidth>32</bitWidth>
+ <access>read-write</access>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EDGE_CAP</name>
+ <displayName>Edge capture</displayName>
+ <description>Bit n in the edgecapture register is set to 1 whenever an edge is detected on input port n. An Avalon-MM master peripheral can read the edgecapture register to determine if an edge has occurred on any of the PIO input ports. If the option Enable bit-clearing for edge capture register is turned off, writing any value to the edgecapture register clears all bits in the register. Otherwise, writing a 1 to a particular bit in the register clears only that bit. The type of edge(s) to detect is fixed in hardware at system generation time. The edgecapture register only exists when the hardware is configured to capture edges. If the core is not configured to capture edges, reading from edgecapture returns an undefined value, and writing to edgecapture has no effect.</description>
+ <addressOffset>0xc</addressOffset>
+ <size>32</size>
+ <access>read-write</access>
+ <resetValue>0x0</resetValue>
+ <resetMask>0xffffffff</resetMask>
+ <fields>
+ <field><name>edgecapture</name>
+ <description>Edge detection for each input port.</description>
+ <bitOffset>0x0</bitOffset>
+ <bitWidth>32</bitWidth>
+ <access>read-write</access>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SET_BIT</name>
+ <displayName>Outset</displayName>
+ <description>You can use the outset register to set individual bits of the output port. For example, to set bit 6 of the output port, write 0x40 to the outset register. This register is only present when the option Enable individual bit set/clear output register is turned on.</description>
+ <addressOffset>0x10</addressOffset>
+ <size>32</size>
+ <access>write-only</access>
+ <resetValue>0x0</resetValue>
+ <resetMask>0xffffffff</resetMask>
+ <fields>
+ <field><name>outset</name>
+ <description>Specifies which bit of the output port to set.</description>
+ <bitOffset>0x0</bitOffset>
+ <bitWidth>32</bitWidth>
+ <access>write-only</access>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CLEAR_BITS</name>
+ <displayName>Outclear</displayName>
+ <description>You can use the outclear register to clear individual bits of the output port. For example, writing 0x08 to the outclear register clears bit 3 of the output port. This register is only present when the option Enable individual bit set/clear output register is turned on.</description>
+ <addressOffset>0x14</addressOffset>
+ <size>32</size>
+ <access>write-only</access>
+ <resetValue>0x0</resetValue>
+ <resetMask>0xffffffff</resetMask>
+ <fields>
+ <field><name>outclear</name>
+ <description>Specifies which output bit to clear.</description>
+ <bitOffset>0x0</bitOffset>
+ <bitWidth>32</bitWidth>
+ <access>write-only</access>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ </peripherals>
+</device> </cmsisSrcFileContents>
+ <addressGroup></addressGroup>
+ <cmsisVars/>
+ </cmsisInfo>
</interface>
</interfaces>
</boundary>
<originalModuleInfo>
- <className>avs_common_mm</className>
- <version>1.0</version>
- <displayName>avs_common_mm</displayName>
+ <className>altera_avalon_pio</className>
+ <version>19.1.0</version>
+ <displayName>PIO (Parallel I/O) Intel FPGA IP</displayName>
</originalModuleInfo>
<systemInfoParameterDescriptors>
<descriptors>
<descriptor>
- <parameterDefaultValue>-1</parameterDefaultValue>
- <parameterName>AUTO_SYSTEM_CLOCK_RATE</parameterName>
+ <parameterDefaultValue>0</parameterDefaultValue>
+ <parameterName>clockRate</parameterName>
<parameterType>java.lang.Long</parameterType>
- <systemInfoArgs>system</systemInfoArgs>
+ <systemInfoArgs>clk</systemInfoArgs>
<systemInfotype>CLOCK_RATE</systemInfotype>
</descriptor>
</descriptors>
@@ -15449,17 +14257,30 @@
<systemInfos>
<connPtSystemInfos>
<entry>
- <key>mem</key>
+ <key>clk</key>
<value>
- <connectionPointName>mem</connectionPointName>
+ <connectionPointName>clk</connectionPointName>
+ <suppliedSystemInfos/>
+ <consumedSystemInfos>
+ <entry>
+ <key>CLOCK_RATE</key>
+ <value>100000000</value>
+ </entry>
+ </consumedSystemInfos>
+ </value>
+ </entry>
+ <entry>
+ <key>s1</key>
+ <value>
+ <connectionPointName>s1</connectionPointName>
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x800000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='s1' start='0x0' end='0x10' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>23</value>
+ <value>4</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -15469,36 +14290,23 @@
<consumedSystemInfos/>
</value>
</entry>
- <entry>
- <key>system</key>
- <value>
- <connectionPointName>system</connectionPointName>
- <suppliedSystemInfos/>
- <consumedSystemInfos>
- <entry>
- <key>CLOCK_RATE</key>
- <value>100000000</value>
- </entry>
- </consumedSystemInfos>
- </value>
- </entry>
</connPtSystemInfos>
</systemInfos>
</componentDefinition>]]></parameter>
<parameter name="defaultBoundary"><![CDATA[<boundaryDefinition>
<interfaces>
<interface>
- <name>address</name>
- <type>conduit</type>
+ <name>clk</name>
+ <type>clock</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_address_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>21</width>
+ <name>clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -15507,25 +14315,26 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
+ <key>clockRate</key>
+ <value>0</value>
</entry>
<entry>
- <key>associatedReset</key>
+ <key>externallyDriven</key>
+ <value>false</value>
</entry>
<entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>clk</name>
+ <name>external_connection</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_clk_export</name>
+ <name>out_port</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -15552,28 +14361,58 @@
</parameters>
</interface>
<interface>
- <name>mem</name>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>s1</name>
<type>avalon</type>
<isStart>false</isStart>
<ports>
<port>
- <name>avs_mem_address</name>
+ <name>address</name>
<role>address</role>
<direction>Input</direction>
- <width>21</width>
+ <width>2</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
- <name>avs_mem_write</name>
- <role>write</role>
+ <name>write_n</name>
+ <role>write_n</role>
<direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>avs_mem_writedata</name>
+ <name>writedata</name>
<role>writedata</role>
<direction>Input</direction>
<width>32</width>
@@ -15581,15 +14420,15 @@
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
<port>
- <name>avs_mem_read</name>
- <role>read</role>
+ <name>chipselect</name>
+ <role>chipselect</role>
<direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
</port>
<port>
- <name>avs_mem_readdata</name>
+ <name>readdata</name>
<role>readdata</role>
<direction>Output</direction>
<width>32</width>
@@ -15621,7 +14460,7 @@
<parameterValueMap>
<entry>
<key>addressAlignment</key>
- <value>DYNAMIC</value>
+ <value>NATIVE</value>
</entry>
<entry>
<key>addressGroup</key>
@@ -15629,7 +14468,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>8388608</value>
+ <value>4</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -15641,11 +14480,11 @@
</entry>
<entry>
<key>associatedClock</key>
- <value>system</value>
+ <value>clk</value>
</entry>
<entry>
<key>associatedReset</key>
- <value>system_reset</value>
+ <value>reset</value>
</entry>
<entry>
<key>bitsPerSymbol</key>
@@ -15732,15 +14571,15 @@
</entry>
<entry>
<key>readLatency</key>
- <value>1</value>
+ <value>0</value>
</entry>
<entry>
<key>readWaitStates</key>
- <value>0</value>
+ <value>1</value>
</entry>
<entry>
<key>readWaitTime</key>
- <value>0</value>
+ <value>1</value>
</entry>
<entry>
<key>registerIncomingSignals</key>
@@ -15784,264 +14623,245 @@
</entry>
</parameterValueMap>
</parameters>
- </interface>
- <interface>
- <name>read</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_read_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>readdata</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_readdata_export</name>
- <role>export</role>
- <direction>Input</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_reset_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>system</name>
- <type>clock</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>clockRate</key>
- <value>0</value>
- </entry>
- <entry>
- <key>externallyDriven</key>
- <value>false</value>
- </entry>
- <entry>
- <key>ptfSchematicName</key>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>system_reset</name>
- <type>reset</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>system</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>write</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_write_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>writedata</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_writedata_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
+ <cmsisInfo>
+ <cmsisSrcFileContents><?xml version="1.0" encoding="utf-8"?>
+<device schemaVersion="1.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd" >
+ <peripherals>
+ <peripheral>
+ <name>altera_avalon_pio</name><baseAddress>0x00000000</baseAddress>
+ <addressBlock>
+ <offset>0x0</offset>
+ <size>32</size>
+ <usage>registers</usage>
+ </addressBlock>
+ <registers>
+ <register>
+ <name>DATA</name>
+ <displayName>Data</displayName>
+ <description>Reading from data returns the value present at the input ports. If the PIO core hardware is configured in output-only mode, reading from data returns an undefined value. Writing to data stores the value to a register that drives the output ports. If the PIO core hardware is configured in input-only mode, writing to data has no effect. If the PIO core hardware is in bidirectional mode, the registered value appears on an output port only when the corresponding bit in the direction register is set to 1 (output).</description>
+ <addressOffset>0x0</addressOffset>
+ <size>32</size>
+ <access>read-write</access>
+ <resetValue>0x0</resetValue>
+ <resetMask>0xffffffff</resetMask>
+ <fields>
+ <field><name>data</name>
+ <description>Reads: Data value currently on PIO inputs. Writes: New value to drive on PIO outputs.</description>
+ <bitOffset>0x0</bitOffset>
+ <bitWidth>32</bitWidth>
+ <access>read-write</access>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>DIRECTION</name>
+ <displayName>Direction</displayName>
+ <description>The direction register controls the data direction for each PIO port, assuming the port is bidirectional. When bit n in direction is set to 1, port n drives out the value in the corresponding bit of the data register The direction register only exists when the PIO core hardware is configured in bidirectional mode. The mode (input, output, or bidirectional) is specified at system generation time, and cannot be changed at runtime. In input-only or output-only mode, the direction register does not exist. In this case, reading direction returns an undefined value, writing direction has no effect. After reset, all bits of direction are 0, so that all bidirectional I/O ports are configured as inputs. If those PIO ports are connected to device pins, the pins are held in a high-impedance state. In bi-directional mode, to change the direction of the PIO port, reprogram the direction register.</description>
+ <addressOffset>0x4</addressOffset>
+ <size>32</size>
+ <access>read-write</access>
+ <resetValue>0x0</resetValue>
+ <resetMask>0xffffffff</resetMask>
+ <fields>
+ <field><name>direction</name>
+ <description>Individual direction control for each I/O port. A value of 0 sets the direction to input; 1 sets the direction to output.</description>
+ <bitOffset>0x0</bitOffset>
+ <bitWidth>32</bitWidth>
+ <access>read-write</access>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>IRQ_MASK</name>
+ <displayName>Interrupt mask</displayName>
+ <description>Setting a bit in the interruptmask register to 1 enables interrupts for the corresponding PIO input port. Interrupt behavior depends on the hardware configuration of the PIO core. The interruptmask register only exists when the hardware is configured to generate IRQs. If the core cannot generate IRQs, reading interruptmask returns an undefined value, and writing to interruptmask has no effect. After reset, all bits of interruptmask are zero, so that interrupts are disabled for all PIO ports.</description>
+ <addressOffset>0x8</addressOffset>
+ <size>32</size>
+ <access>read-write</access>
+ <resetValue>0x0</resetValue>
+ <resetMask>0xffffffff</resetMask>
+ <fields>
+ <field><name>interruptmask</name>
+ <description>IRQ enable/disable for each input port. Setting a bit to 1 enables interrupts for the corresponding port.</description>
+ <bitOffset>0x0</bitOffset>
+ <bitWidth>32</bitWidth>
+ <access>read-write</access>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>EDGE_CAP</name>
+ <displayName>Edge capture</displayName>
+ <description>Bit n in the edgecapture register is set to 1 whenever an edge is detected on input port n. An Avalon-MM master peripheral can read the edgecapture register to determine if an edge has occurred on any of the PIO input ports. If the option Enable bit-clearing for edge capture register is turned off, writing any value to the edgecapture register clears all bits in the register. Otherwise, writing a 1 to a particular bit in the register clears only that bit. The type of edge(s) to detect is fixed in hardware at system generation time. The edgecapture register only exists when the hardware is configured to capture edges. If the core is not configured to capture edges, reading from edgecapture returns an undefined value, and writing to edgecapture has no effect.</description>
+ <addressOffset>0xc</addressOffset>
+ <size>32</size>
+ <access>read-write</access>
+ <resetValue>0x0</resetValue>
+ <resetMask>0xffffffff</resetMask>
+ <fields>
+ <field><name>edgecapture</name>
+ <description>Edge detection for each input port.</description>
+ <bitOffset>0x0</bitOffset>
+ <bitWidth>32</bitWidth>
+ <access>read-write</access>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>SET_BIT</name>
+ <displayName>Outset</displayName>
+ <description>You can use the outset register to set individual bits of the output port. For example, to set bit 6 of the output port, write 0x40 to the outset register. This register is only present when the option Enable individual bit set/clear output register is turned on.</description>
+ <addressOffset>0x10</addressOffset>
+ <size>32</size>
+ <access>write-only</access>
+ <resetValue>0x0</resetValue>
+ <resetMask>0xffffffff</resetMask>
+ <fields>
+ <field><name>outset</name>
+ <description>Specifies which bit of the output port to set.</description>
+ <bitOffset>0x0</bitOffset>
+ <bitWidth>32</bitWidth>
+ <access>write-only</access>
+ </field>
+ </fields>
+ </register>
+ <register>
+ <name>CLEAR_BITS</name>
+ <displayName>Outclear</displayName>
+ <description>You can use the outclear register to clear individual bits of the output port. For example, writing 0x08 to the outclear register clears bit 3 of the output port. This register is only present when the option Enable individual bit set/clear output register is turned on.</description>
+ <addressOffset>0x14</addressOffset>
+ <size>32</size>
+ <access>write-only</access>
+ <resetValue>0x0</resetValue>
+ <resetMask>0xffffffff</resetMask>
+ <fields>
+ <field><name>outclear</name>
+ <description>Specifies which output bit to clear.</description>
+ <bitOffset>0x0</bitOffset>
+ <bitWidth>32</bitWidth>
+ <access>write-only</access>
+ </field>
+ </fields>
+ </register>
+ </registers>
+ </peripheral>
+ </peripherals>
+</device> </cmsisSrcFileContents>
+ <addressGroup></addressGroup>
+ <cmsisVars/>
+ </cmsisInfo>
</interface>
</interfaces>
</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</hdlLibraryName>
+ <hdlLibraryName>qsys_lofar2_unb2b_adc_pio_wdi</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_pio_wdi</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_wdi</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_pio_wdi</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_wdi</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_pio_wdi</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_pio_wdi</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_pio_wdi.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
- <assignmentValueMap/>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.CMacro.BIT_CLEARING_EDGE_REGISTER</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.CMacro.BIT_MODIFYING_OUTPUT_REGISTER</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.CMacro.CAPTURE</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.CMacro.DATA_WIDTH</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.CMacro.DO_TEST_BENCH_WIRING</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.CMacro.DRIVEN_SIM_VALUE</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.CMacro.EDGE_TYPE</key>
+ <value>NONE</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.CMacro.FREQ</key>
+ <value>100000000</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.CMacro.HAS_IN</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.CMacro.HAS_OUT</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.CMacro.HAS_TRI</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.CMacro.IRQ_TYPE</key>
+ <value>NONE</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.CMacro.RESET_VALUE</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.dts.compatible</key>
+ <value>altr,pio-1.0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.dts.group</key>
+ <value>gpio</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.dts.name</key>
+ <value>pio</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.dts.params.altr,gpio-bank-width</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.dts.params.resetvalue</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.dts.vendor</key>
+ <value>altr</value>
+ </entry>
+ </assignmentValueMap>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
<module
- name="ram_diag_data_buffer_jesd"
+ name="ram_aduh_monitor"
kind="altera_generic_component"
version="1.0"
enabled="1">
@@ -16057,7 +14877,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>16</width>
+ <width>12</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -16121,7 +14941,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>16</width>
+ <width>12</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -16190,7 +15010,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>262144</value>
+ <value>16384</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -16596,11 +15416,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x40000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x4000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>18</value>
+ <value>14</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -16637,7 +15457,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>16</width>
+ <width>12</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -16701,7 +15521,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>16</width>
+ <width>12</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -16770,7 +15590,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>262144</value>
+ <value>16384</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -17152,37 +15972,37 @@
</interfaces>
</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd</hdlLibraryName>
+ <hdlLibraryName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_aduh_monitor</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_aduh_monitor.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
<module
- name="ram_wg"
+ name="ram_diag_data_buffer_bsn"
kind="altera_generic_component"
version="1.0"
enabled="1">
@@ -17190,17 +16010,17 @@
<boundary>
<interfaces>
<interface>
- <name>system</name>
- <type>clock</type>
+ <name>address</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
+ <name>coe_address_export</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>21</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -17209,28 +16029,27 @@
<parameters>
<parameterValueMap>
<entry>
- <key>clockRate</key>
- <value>0</value>
+ <key>associatedClock</key>
</entry>
<entry>
- <key>externallyDriven</key>
- <value>false</value>
+ <key>associatedReset</key>
</entry>
<entry>
- <key>ptfSchematicName</key>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>system_reset</name>
- <type>reset</type>
+ <name>clk</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
+ <name>coe_clk_export</name>
+ <role>export</role>
+ <direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -17243,11 +16062,13 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
- <value>system</value>
</entry>
<entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
@@ -17261,7 +16082,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>14</width>
+ <width>21</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -17330,7 +16151,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>65536</value>
+ <value>8388608</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -17487,12 +16308,12 @@
</parameters>
</interface>
<interface>
- <name>reset</name>
+ <name>read</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_reset_export</name>
+ <name>coe_read_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -17519,17 +16340,17 @@
</parameters>
</interface>
<interface>
- <name>clk</name>
+ <name>readdata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_clk_export</name>
+ <name>coe_readdata_export</name>
<role>export</role>
- <direction>Output</direction>
- <width>1</width>
+ <direction>Input</direction>
+ <width>32</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -17551,17 +16372,17 @@
</parameters>
</interface>
<interface>
- <name>address</name>
+ <name>reset</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_address_export</name>
+ <name>coe_reset_export</name>
<role>export</role>
<direction>Output</direction>
- <width>14</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -17583,14 +16404,14 @@
</parameters>
</interface>
<interface>
- <name>write</name>
- <type>conduit</type>
+ <name>system</name>
+ <type>clock</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_write_export</name>
- <role>export</role>
- <direction>Output</direction>
+ <name>csi_system_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -17602,30 +16423,31 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
+ <key>clockRate</key>
+ <value>0</value>
</entry>
<entry>
- <key>associatedReset</key>
+ <key>externallyDriven</key>
+ <value>false</value>
</entry>
<entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>writedata</name>
- <type>conduit</type>
+ <name>system_reset</name>
+ <type>reset</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_writedata_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>32</width>
+ <name>csi_system_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -17635,24 +16457,22 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
+ <value>system</value>
</entry>
<entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>read</name>
+ <name>write</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_read_export</name>
+ <name>coe_write_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -17679,14 +16499,14 @@
</parameters>
</interface>
<interface>
- <name>readdata</name>
+ <name>writedata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_readdata_export</name>
+ <name>coe_writedata_export</name>
<role>export</role>
- <direction>Input</direction>
+ <direction>Output</direction>
<width>32</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
@@ -17737,11 +16557,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x10000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x800000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>16</value>
+ <value>23</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -17770,17 +16590,17 @@
<parameter name="defaultBoundary"><![CDATA[<boundaryDefinition>
<interfaces>
<interface>
- <name>system</name>
- <type>clock</type>
+ <name>address</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
+ <name>coe_address_export</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>21</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -17789,28 +16609,27 @@
<parameters>
<parameterValueMap>
<entry>
- <key>clockRate</key>
- <value>0</value>
+ <key>associatedClock</key>
</entry>
<entry>
- <key>externallyDriven</key>
- <value>false</value>
+ <key>associatedReset</key>
</entry>
<entry>
- <key>ptfSchematicName</key>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>system_reset</name>
- <type>reset</type>
+ <name>clk</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
+ <name>coe_clk_export</name>
+ <role>export</role>
+ <direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -17823,11 +16642,13 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
- <value>system</value>
</entry>
<entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
@@ -17841,7 +16662,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>14</width>
+ <width>21</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -17910,7 +16731,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>65536</value>
+ <value>8388608</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -18067,12 +16888,12 @@
</parameters>
</interface>
<interface>
- <name>reset</name>
+ <name>read</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_reset_export</name>
+ <name>coe_read_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -18099,17 +16920,17 @@
</parameters>
</interface>
<interface>
- <name>clk</name>
+ <name>readdata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_clk_export</name>
+ <name>coe_readdata_export</name>
<role>export</role>
- <direction>Output</direction>
- <width>1</width>
+ <direction>Input</direction>
+ <width>32</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -18131,17 +16952,17 @@
</parameters>
</interface>
<interface>
- <name>address</name>
+ <name>reset</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_address_export</name>
+ <name>coe_reset_export</name>
<role>export</role>
<direction>Output</direction>
- <width>14</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -18163,14 +16984,14 @@
</parameters>
</interface>
<interface>
- <name>write</name>
- <type>conduit</type>
+ <name>system</name>
+ <type>clock</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_write_export</name>
- <role>export</role>
- <direction>Output</direction>
+ <name>csi_system_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -18182,30 +17003,61 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
+ <key>clockRate</key>
+ <value>0</value>
</entry>
<entry>
- <key>associatedReset</key>
+ <key>externallyDriven</key>
+ <value>false</value>
</entry>
<entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>writedata</name>
+ <name>system_reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csi_system_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>system</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>write</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_writedata_export</name>
+ <name>coe_write_export</name>
<role>export</role>
<direction>Output</direction>
- <width>32</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -18227,46 +17079,14 @@
</parameters>
</interface>
<interface>
- <name>read</name>
+ <name>writedata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_read_export</name>
+ <name>coe_writedata_export</name>
<role>export</role>
<direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>readdata</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>coe_readdata_export</name>
- <role>export</role>
- <direction>Input</direction>
<width>32</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
@@ -18293,37 +17113,37 @@
</interfaces>
</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_ram_wg</hdlLibraryName>
+ <hdlLibraryName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_ram_wg</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_wg</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_ram_wg</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_wg</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_ram_wg</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_wg</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_wg.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
<module
- name="reg_aduh_monitor"
+ name="ram_wg"
kind="altera_generic_component"
version="1.0"
enabled="1">
@@ -18331,17 +17151,17 @@
<boundary>
<interfaces>
<interface>
- <name>address</name>
- <type>conduit</type>
+ <name>system</name>
+ <type>clock</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_address_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>6</width>
+ <name>csi_system_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -18350,27 +17170,28 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
+ <key>clockRate</key>
+ <value>0</value>
</entry>
<entry>
- <key>associatedReset</key>
+ <key>externallyDriven</key>
+ <value>false</value>
</entry>
<entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>clk</name>
- <type>conduit</type>
+ <name>system_reset</name>
+ <type>reset</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_clk_export</name>
- <role>export</role>
- <direction>Output</direction>
+ <name>csi_system_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -18383,13 +17204,11 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
+ <value>system</value>
</entry>
<entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
</entry>
</parameterValueMap>
</parameters>
@@ -18403,7 +17222,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>6</width>
+ <width>14</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -18472,7 +17291,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>256</value>
+ <value>65536</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -18629,12 +17448,12 @@
</parameters>
</interface>
<interface>
- <name>read</name>
+ <name>reset</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_read_export</name>
+ <name>coe_reset_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -18661,17 +17480,17 @@
</parameters>
</interface>
<interface>
- <name>readdata</name>
+ <name>clk</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_readdata_export</name>
+ <name>coe_clk_export</name>
<role>export</role>
- <direction>Input</direction>
- <width>32</width>
+ <direction>Output</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -18693,17 +17512,17 @@
</parameters>
</interface>
<interface>
- <name>reset</name>
+ <name>address</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_reset_export</name>
+ <name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>1</width>
+ <width>14</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -18725,14 +17544,14 @@
</parameters>
</interface>
<interface>
- <name>system</name>
- <type>clock</type>
+ <name>write</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
+ <name>coe_write_export</name>
+ <role>export</role>
+ <direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -18744,31 +17563,30 @@
<parameters>
<parameterValueMap>
<entry>
- <key>clockRate</key>
- <value>0</value>
+ <key>associatedClock</key>
</entry>
<entry>
- <key>externallyDriven</key>
- <value>false</value>
+ <key>associatedReset</key>
</entry>
<entry>
- <key>ptfSchematicName</key>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>system_reset</name>
- <type>reset</type>
+ <name>writedata</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
+ <name>coe_writedata_export</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>32</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -18778,22 +17596,24 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
- <value>system</value>
</entry>
<entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>write</name>
+ <name>read</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_write_export</name>
+ <name>coe_read_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -18820,14 +17640,14 @@
</parameters>
</interface>
<interface>
- <name>writedata</name>
+ <name>readdata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_writedata_export</name>
+ <name>coe_readdata_export</name>
<role>export</role>
- <direction>Output</direction>
+ <direction>Input</direction>
<width>32</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
@@ -18878,11 +17698,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x100' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x10000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>8</value>
+ <value>16</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -18911,17 +17731,17 @@
<parameter name="defaultBoundary"><![CDATA[<boundaryDefinition>
<interfaces>
<interface>
- <name>address</name>
- <type>conduit</type>
+ <name>system</name>
+ <type>clock</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_address_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>6</width>
+ <name>csi_system_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -18930,27 +17750,28 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
+ <key>clockRate</key>
+ <value>0</value>
</entry>
<entry>
- <key>associatedReset</key>
+ <key>externallyDriven</key>
+ <value>false</value>
</entry>
<entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>clk</name>
- <type>conduit</type>
+ <name>system_reset</name>
+ <type>reset</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_clk_export</name>
- <role>export</role>
- <direction>Output</direction>
+ <name>csi_system_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -18963,13 +17784,11 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
+ <value>system</value>
</entry>
<entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
</entry>
</parameterValueMap>
</parameters>
@@ -18983,7 +17802,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>6</width>
+ <width>14</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -19052,7 +17871,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>256</value>
+ <value>65536</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -19209,12 +18028,12 @@
</parameters>
</interface>
<interface>
- <name>read</name>
+ <name>reset</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_read_export</name>
+ <name>coe_reset_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -19241,15 +18060,47 @@
</parameters>
</interface>
<interface>
- <name>readdata</name>
+ <name>clk</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_readdata_export</name>
+ <name>coe_clk_export</name>
<role>export</role>
- <direction>Input</direction>
- <width>32</width>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>address</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>coe_address_export</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>14</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -19273,12 +18124,12 @@
</parameters>
</interface>
<interface>
- <name>reset</name>
+ <name>write</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_reset_export</name>
+ <name>coe_write_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -19305,17 +18156,17 @@
</parameters>
</interface>
<interface>
- <name>system</name>
- <type>clock</type>
+ <name>writedata</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
+ <name>coe_writedata_export</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>32</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -19324,56 +18175,25 @@
<parameters>
<parameterValueMap>
<entry>
- <key>clockRate</key>
- <value>0</value>
- </entry>
- <entry>
- <key>externallyDriven</key>
- <value>false</value>
+ <key>associatedClock</key>
</entry>
<entry>
- <key>ptfSchematicName</key>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>system_reset</name>
- <type>reset</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>system</value>
+ <key>associatedReset</key>
</entry>
<entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>write</name>
+ <name>read</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_write_export</name>
+ <name>coe_read_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -19400,14 +18220,14 @@
</parameters>
</interface>
<interface>
- <name>writedata</name>
+ <name>readdata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_writedata_export</name>
+ <name>coe_readdata_export</name>
<role>export</role>
- <direction>Output</direction>
+ <direction>Input</direction>
<width>32</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
@@ -19434,37 +18254,37 @@
</interfaces>
</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</hdlLibraryName>
+ <hdlLibraryName>qsys_lofar2_unb2b_adc_ram_wg</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_ram_wg</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_wg</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_ram_wg</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_wg</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_ram_wg</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_ram_wg</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_aduh_monitor.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_wg.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
<module
- name="reg_bsn_monitor_input"
+ name="reg_aduh_monitor"
kind="altera_generic_component"
version="1.0"
enabled="1">
@@ -19472,17 +18292,17 @@
<boundary>
<interfaces>
<interface>
- <name>system</name>
- <type>clock</type>
+ <name>address</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
+ <name>coe_address_export</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>6</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -19491,28 +18311,27 @@
<parameters>
<parameterValueMap>
<entry>
- <key>clockRate</key>
- <value>0</value>
+ <key>associatedClock</key>
</entry>
<entry>
- <key>externallyDriven</key>
- <value>false</value>
+ <key>associatedReset</key>
</entry>
<entry>
- <key>ptfSchematicName</key>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>system_reset</name>
- <type>reset</type>
+ <name>clk</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
+ <name>coe_clk_export</name>
+ <role>export</role>
+ <direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -19525,11 +18344,13 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
- <value>system</value>
</entry>
<entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
@@ -19543,7 +18364,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>8</width>
+ <width>6</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -19612,7 +18433,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>1024</value>
+ <value>256</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -19769,12 +18590,12 @@
</parameters>
</interface>
<interface>
- <name>reset</name>
+ <name>read</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_reset_export</name>
+ <name>coe_read_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -19801,17 +18622,17 @@
</parameters>
</interface>
<interface>
- <name>clk</name>
+ <name>readdata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_clk_export</name>
+ <name>coe_readdata_export</name>
<role>export</role>
- <direction>Output</direction>
- <width>1</width>
+ <direction>Input</direction>
+ <width>32</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -19833,17 +18654,17 @@
</parameters>
</interface>
<interface>
- <name>address</name>
+ <name>reset</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_address_export</name>
+ <name>coe_reset_export</name>
<role>export</role>
<direction>Output</direction>
- <width>8</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -19865,14 +18686,14 @@
</parameters>
</interface>
<interface>
- <name>write</name>
- <type>conduit</type>
+ <name>system</name>
+ <type>clock</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_write_export</name>
- <role>export</role>
- <direction>Output</direction>
+ <name>csi_system_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -19884,30 +18705,31 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
+ <key>clockRate</key>
+ <value>0</value>
</entry>
<entry>
- <key>associatedReset</key>
+ <key>externallyDriven</key>
+ <value>false</value>
</entry>
<entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>writedata</name>
- <type>conduit</type>
+ <name>system_reset</name>
+ <type>reset</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_writedata_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>32</width>
+ <name>csi_system_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -19917,24 +18739,22 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
+ <value>system</value>
</entry>
<entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>read</name>
+ <name>write</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_read_export</name>
+ <name>coe_write_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -19961,14 +18781,14 @@
</parameters>
</interface>
<interface>
- <name>readdata</name>
+ <name>writedata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_readdata_export</name>
+ <name>coe_writedata_export</name>
<role>export</role>
- <direction>Input</direction>
+ <direction>Output</direction>
<width>32</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
@@ -20019,11 +18839,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x400' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x100' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>10</value>
+ <value>8</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -20052,17 +18872,17 @@
<parameter name="defaultBoundary"><![CDATA[<boundaryDefinition>
<interfaces>
<interface>
- <name>system</name>
- <type>clock</type>
+ <name>address</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
+ <name>coe_address_export</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>6</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -20071,28 +18891,27 @@
<parameters>
<parameterValueMap>
<entry>
- <key>clockRate</key>
- <value>0</value>
+ <key>associatedClock</key>
</entry>
<entry>
- <key>externallyDriven</key>
- <value>false</value>
+ <key>associatedReset</key>
</entry>
<entry>
- <key>ptfSchematicName</key>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>system_reset</name>
- <type>reset</type>
+ <name>clk</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
+ <name>coe_clk_export</name>
+ <role>export</role>
+ <direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -20105,11 +18924,13 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
- <value>system</value>
</entry>
<entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
@@ -20123,7 +18944,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>8</width>
+ <width>6</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -20192,7 +19013,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>1024</value>
+ <value>256</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -20349,12 +19170,12 @@
</parameters>
</interface>
<interface>
- <name>reset</name>
+ <name>read</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_reset_export</name>
+ <name>coe_read_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -20381,17 +19202,17 @@
</parameters>
</interface>
<interface>
- <name>clk</name>
+ <name>readdata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_clk_export</name>
+ <name>coe_readdata_export</name>
<role>export</role>
- <direction>Output</direction>
- <width>1</width>
+ <direction>Input</direction>
+ <width>32</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -20413,17 +19234,17 @@
</parameters>
</interface>
<interface>
- <name>address</name>
+ <name>reset</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_address_export</name>
+ <name>coe_reset_export</name>
<role>export</role>
<direction>Output</direction>
- <width>8</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -20445,14 +19266,14 @@
</parameters>
</interface>
<interface>
- <name>write</name>
- <type>conduit</type>
+ <name>system</name>
+ <type>clock</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_write_export</name>
- <role>export</role>
- <direction>Output</direction>
+ <name>csi_system_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -20464,30 +19285,31 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
+ <key>clockRate</key>
+ <value>0</value>
</entry>
<entry>
- <key>associatedReset</key>
+ <key>externallyDriven</key>
+ <value>false</value>
</entry>
<entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>writedata</name>
- <type>conduit</type>
+ <name>system_reset</name>
+ <type>reset</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_writedata_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>32</width>
+ <name>csi_system_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -20497,24 +19319,22 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
+ <value>system</value>
</entry>
<entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>read</name>
+ <name>write</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_read_export</name>
+ <name>coe_write_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -20541,14 +19361,14 @@
</parameters>
</interface>
<interface>
- <name>readdata</name>
+ <name>writedata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_readdata_export</name>
+ <name>coe_writedata_export</name>
<role>export</role>
- <direction>Input</direction>
+ <direction>Output</direction>
<width>32</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
@@ -20575,37 +19395,37 @@
</interfaces>
</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</hdlLibraryName>
+ <hdlLibraryName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_aduh_monitor</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_bsn_monitor_input.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_aduh_monitor.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
<module
- name="reg_bsn_scheduler"
+ name="reg_bsn_monitor_input"
kind="altera_generic_component"
version="1.0"
enabled="1">
@@ -20684,7 +19504,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>1</width>
+ <width>8</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -20753,7 +19573,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>8</value>
+ <value>1024</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -20982,7 +19802,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>1</width>
+ <width>8</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -21160,11 +19980,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x8' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x400' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>3</value>
+ <value>10</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -21264,7 +20084,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>1</width>
+ <width>8</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -21333,7 +20153,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>8</value>
+ <value>1024</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -21562,7 +20382,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>1</width>
+ <width>8</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -21716,37 +20536,37 @@
</interfaces>
</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</hdlLibraryName>
+ <hdlLibraryName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_monitor_input</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_bsn_scheduler.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_bsn_monitor_input.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
<module
- name="reg_bsn_source"
+ name="reg_bsn_scheduler"
kind="altera_generic_component"
version="1.0"
enabled="1">
@@ -21825,7 +20645,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>2</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -21894,7 +20714,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>16</value>
+ <value>8</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -22123,7 +20943,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>2</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -22301,11 +21121,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x10' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x8' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>4</value>
+ <value>3</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -22405,7 +21225,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>2</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -22474,7 +21294,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>16</value>
+ <value>8</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -22703,7 +21523,7 @@
<name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>2</width>
+ <width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -22857,37 +21677,37 @@
</interfaces>
</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_reg_bsn_source</hdlLibraryName>
+ <hdlLibraryName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_source</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_source</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_source</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_source</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_source</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_source</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_scheduler</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_bsn_source.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_bsn_scheduler.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
<module
- name="reg_diag_data_buffer_bsn"
+ name="reg_bsn_source"
kind="altera_generic_component"
version="1.0"
enabled="1">
@@ -22895,17 +21715,17 @@
<boundary>
<interfaces>
<interface>
- <name>address</name>
- <type>conduit</type>
+ <name>system</name>
+ <type>clock</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_address_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>12</width>
+ <name>csi_system_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -22914,27 +21734,28 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
+ <key>clockRate</key>
+ <value>0</value>
</entry>
<entry>
- <key>associatedReset</key>
+ <key>externallyDriven</key>
+ <value>false</value>
</entry>
<entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>clk</name>
- <type>conduit</type>
+ <name>system_reset</name>
+ <type>reset</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_clk_export</name>
- <role>export</role>
- <direction>Output</direction>
+ <name>csi_system_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -22947,13 +21768,11 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
+ <value>system</value>
</entry>
<entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
</entry>
</parameterValueMap>
</parameters>
@@ -22967,7 +21786,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>12</width>
+ <width>2</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -23036,7 +21855,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>16384</value>
+ <value>16</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -23193,12 +22012,12 @@
</parameters>
</interface>
<interface>
- <name>read</name>
+ <name>reset</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_read_export</name>
+ <name>coe_reset_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -23225,17 +22044,17 @@
</parameters>
</interface>
<interface>
- <name>readdata</name>
+ <name>clk</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_readdata_export</name>
+ <name>coe_clk_export</name>
<role>export</role>
- <direction>Input</direction>
- <width>32</width>
+ <direction>Output</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -23257,17 +22076,17 @@
</parameters>
</interface>
<interface>
- <name>reset</name>
+ <name>address</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_reset_export</name>
+ <name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>1</width>
+ <width>2</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -23289,14 +22108,14 @@
</parameters>
</interface>
<interface>
- <name>system</name>
- <type>clock</type>
+ <name>write</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
+ <name>coe_write_export</name>
+ <role>export</role>
+ <direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -23308,61 +22127,30 @@
<parameters>
<parameterValueMap>
<entry>
- <key>clockRate</key>
- <value>0</value>
- </entry>
- <entry>
- <key>externallyDriven</key>
- <value>false</value>
+ <key>associatedClock</key>
</entry>
<entry>
- <key>ptfSchematicName</key>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>system_reset</name>
- <type>reset</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>system</value>
+ <key>associatedReset</key>
</entry>
<entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>write</name>
+ <name>writedata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_write_export</name>
+ <name>coe_writedata_export</name>
<role>export</role>
<direction>Output</direction>
- <width>1</width>
+ <width>32</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -23384,14 +22172,46 @@
</parameters>
</interface>
<interface>
- <name>writedata</name>
+ <name>read</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_writedata_export</name>
+ <name>coe_read_export</name>
<role>export</role>
<direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>readdata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>coe_readdata_export</name>
+ <role>export</role>
+ <direction>Input</direction>
<width>32</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
@@ -23442,11 +22262,11 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='mem' start='0x0' end='0x4000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='mem' start='0x0' end='0x10' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
- <value>14</value>
+ <value>4</value>
</entry>
<entry>
<key>MAX_SLAVE_DATA_WIDTH</key>
@@ -23475,17 +22295,17 @@
<parameter name="defaultBoundary"><![CDATA[<boundaryDefinition>
<interfaces>
<interface>
- <name>address</name>
- <type>conduit</type>
+ <name>system</name>
+ <type>clock</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_address_export</name>
- <role>export</role>
- <direction>Output</direction>
- <width>12</width>
+ <name>csi_system_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -23494,27 +22314,28 @@
<parameters>
<parameterValueMap>
<entry>
- <key>associatedClock</key>
+ <key>clockRate</key>
+ <value>0</value>
</entry>
<entry>
- <key>associatedReset</key>
+ <key>externallyDriven</key>
+ <value>false</value>
</entry>
<entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>ptfSchematicName</key>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>clk</name>
- <type>conduit</type>
+ <name>system_reset</name>
+ <type>reset</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_clk_export</name>
- <role>export</role>
- <direction>Output</direction>
+ <name>csi_system_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -23527,13 +22348,11 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
+ <value>system</value>
</entry>
<entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
</entry>
</parameterValueMap>
</parameters>
@@ -23547,7 +22366,7 @@
<name>avs_mem_address</name>
<role>address</role>
<direction>Input</direction>
- <width>12</width>
+ <width>2</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
@@ -23616,7 +22435,7 @@
</entry>
<entry>
<key>addressSpan</key>
- <value>16384</value>
+ <value>16</value>
</entry>
<entry>
<key>addressUnits</key>
@@ -23773,12 +22592,12 @@
</parameters>
</interface>
<interface>
- <name>read</name>
+ <name>reset</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_read_export</name>
+ <name>coe_reset_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -23805,17 +22624,17 @@
</parameters>
</interface>
<interface>
- <name>readdata</name>
+ <name>clk</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_readdata_export</name>
+ <name>coe_clk_export</name>
<role>export</role>
- <direction>Input</direction>
- <width>32</width>
+ <direction>Output</direction>
+ <width>1</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ <vhdlType>STD_LOGIC</vhdlType>
</port>
</ports>
<assignments>
@@ -23837,17 +22656,17 @@
</parameters>
</interface>
<interface>
- <name>reset</name>
+ <name>address</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_reset_export</name>
+ <name>coe_address_export</name>
<role>export</role>
<direction>Output</direction>
- <width>1</width>
+ <width>2</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -23869,14 +22688,14 @@
</parameters>
</interface>
<interface>
- <name>system</name>
- <type>clock</type>
+ <name>write</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_clk</name>
- <role>clk</role>
- <direction>Input</direction>
+ <name>coe_write_export</name>
+ <role>export</role>
+ <direction>Output</direction>
<width>1</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC</vhdlType>
@@ -23888,31 +22707,30 @@
<parameters>
<parameterValueMap>
<entry>
- <key>clockRate</key>
- <value>0</value>
+ <key>associatedClock</key>
</entry>
<entry>
- <key>externallyDriven</key>
- <value>false</value>
+ <key>associatedReset</key>
</entry>
<entry>
- <key>ptfSchematicName</key>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>system_reset</name>
- <type>reset</type>
+ <name>writedata</name>
+ <type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>csi_system_reset</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
+ <name>coe_writedata_export</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>32</width>
<lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
</port>
</ports>
<assignments>
@@ -23922,22 +22740,24 @@
<parameterValueMap>
<entry>
<key>associatedClock</key>
- <value>system</value>
</entry>
<entry>
- <key>synchronousEdges</key>
- <value>DEASSERT</value>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
</entry>
</parameterValueMap>
</parameters>
</interface>
<interface>
- <name>write</name>
+ <name>read</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_write_export</name>
+ <name>coe_read_export</name>
<role>export</role>
<direction>Output</direction>
<width>1</width>
@@ -23964,14 +22784,14 @@
</parameters>
</interface>
<interface>
- <name>writedata</name>
+ <name>readdata</name>
<type>conduit</type>
<isStart>false</isStart>
<ports>
<port>
- <name>coe_writedata_export</name>
+ <name>coe_readdata_export</name>
<role>export</role>
- <direction>Output</direction>
+ <direction>Input</direction>
<width>32</width>
<lowerBound>0</lowerBound>
<vhdlType>STD_LOGIC_VECTOR</vhdlType>
@@ -23998,37 +22818,37 @@
</interfaces>
</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</hdlLibraryName>
+ <hdlLibraryName>qsys_lofar2_unb2b_adc_reg_bsn_source</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_source</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_source</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_source</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_source</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_bsn_source</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_bsn_source</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_bsn_source.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
<module
- name="reg_diag_data_buffer_jesd"
+ name="reg_diag_data_buffer_bsn"
kind="altera_generic_component"
version="1.0"
enabled="1">
@@ -25139,30 +23959,30 @@
</interfaces>
</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd</hdlLibraryName>
+ <hdlLibraryName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd</fileSetName>
- <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd</fileSetFixedName>
+ <fileSetName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</fileSetName>
+ <fileSetFixedName>qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -26303,7 +25123,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_dp_shiftram.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_dp_shiftram.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -27444,7 +26264,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_dpmm_ctrl.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_dpmm_ctrl.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -28585,7 +27405,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_dpmm_data.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_dpmm_data.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -29726,7 +28546,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_epcs.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_epcs.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -30867,7 +29687,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_fpga_temp_sens.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_fpga_temp_sens.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -32008,7 +30828,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_fpga_voltage_sens.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_fpga_voltage_sens.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -33149,7 +31969,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_mmdp_ctrl.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_mmdp_ctrl.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -34290,7 +33110,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_mmdp_data.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_mmdp_data.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -35431,7 +34251,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_remu.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_remu.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -36572,7 +35392,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_unb_pmbus.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_unb_pmbus.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -37713,7 +36533,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_unb_sens.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_unb_sens.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -38854,7 +37674,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_wdi.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_wdi.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -39995,7 +38815,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_wg.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_wg.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -41136,7 +39956,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_rom_system_info.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_rom_system_info.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
@@ -42387,7 +41207,7 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">../../../../../build/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_timer_0.ip</parameter>
+ <parameter name="logicalView">../lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_timer_0.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap>
<entry>
@@ -42452,7 +41272,7 @@
start="cpu_0.data_master"
end="jtag_uart_0.avalon_jtag_slave">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x03b8" />
+ <parameter name="baseAddress" value="0x3200" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42492,7 +41312,7 @@
start="cpu_0.data_master"
end="reg_unb_sens.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0200" />
+ <parameter name="baseAddress" value="0x3100" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42552,7 +41372,7 @@
start="cpu_0.data_master"
end="pio_pps.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x03b0" />
+ <parameter name="baseAddress" value="0x30f8" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42592,7 +41412,7 @@
start="cpu_0.data_master"
end="reg_remu.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0360" />
+ <parameter name="baseAddress" value="0x30a0" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42612,7 +41432,7 @@
start="cpu_0.data_master"
end="reg_epcs.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0340" />
+ <parameter name="baseAddress" value="0x3080" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42632,7 +41452,7 @@
start="cpu_0.data_master"
end="reg_dpmm_ctrl.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x03a8" />
+ <parameter name="baseAddress" value="0x30f0" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42652,7 +41472,7 @@
start="cpu_0.data_master"
end="reg_dpmm_data.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x03a0" />
+ <parameter name="baseAddress" value="0x30e8" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42672,7 +41492,7 @@
start="cpu_0.data_master"
end="reg_mmdp_ctrl.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0398" />
+ <parameter name="baseAddress" value="0x30e0" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42692,7 +41512,7 @@
start="cpu_0.data_master"
end="reg_mmdp_data.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0390" />
+ <parameter name="baseAddress" value="0x30d8" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42712,7 +41532,7 @@
start="cpu_0.data_master"
end="reg_fpga_temp_sens.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0320" />
+ <parameter name="baseAddress" value="0x3060" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42732,7 +41552,7 @@
start="cpu_0.data_master"
end="reg_unb_pmbus.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0100" />
+ <parameter name="baseAddress" value="0x0300" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42772,7 +41592,7 @@
start="cpu_0.data_master"
end="jesd204b.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00040000" />
+ <parameter name="baseAddress" value="0xc000" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42792,7 +41612,7 @@
start="cpu_0.data_master"
end="reg_bsn_monitor_input.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00048000" />
+ <parameter name="baseAddress" value="0x0400" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42812,7 +41632,7 @@
start="cpu_0.data_master"
end="reg_bsn_source.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0004c100" />
+ <parameter name="baseAddress" value="0x30c0" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42832,7 +41652,7 @@
start="cpu_0.data_master"
end="reg_bsn_scheduler.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0004c110" />
+ <parameter name="baseAddress" value="0x30d0" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42852,7 +41672,7 @@
start="cpu_0.data_master"
end="reg_dp_shiftram.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0004c120" />
+ <parameter name="baseAddress" value="0x3040" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42872,7 +41692,7 @@
start="cpu_0.data_master"
end="ram_wg.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00050000" />
+ <parameter name="baseAddress" value="0x00010000" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42892,7 +41712,7 @@
start="cpu_0.data_master"
end="reg_diag_data_buffer_bsn.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00064000" />
+ <parameter name="baseAddress" value="0x8000" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42932,7 +41752,7 @@
start="cpu_0.data_master"
end="reg_aduh_monitor.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00068000" />
+ <parameter name="baseAddress" value="0x0200" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42952,7 +41772,7 @@
start="cpu_0.data_master"
end="ram_aduh_monitor.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00070000" />
+ <parameter name="baseAddress" value="0x4000" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -42972,27 +41792,7 @@
start="cpu_0.data_master"
end="reg_wg.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0004c000" />
- <parameter name="defaultConnection" value="false" />
- <parameter name="domainAlias" value="" />
- <parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
- <parameter name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
- <parameter name="qsys_mm.enableEccProtection" value="FALSE" />
- <parameter name="qsys_mm.enableInstrumentation" value="FALSE" />
- <parameter name="qsys_mm.insertDefaultSlave" value="FALSE" />
- <parameter name="qsys_mm.interconnectResetSource" value="DEFAULT" />
- <parameter name="qsys_mm.interconnectType" value="STANDARD" />
- <parameter name="qsys_mm.maxAdditionalLatency" value="1" />
- <parameter name="qsys_mm.syncResets" value="FALSE" />
- <parameter name="qsys_mm.widthAdapterImplementation" value="GENERIC_CONVERTER" />
- </connection>
- <connection
- kind="avalon"
- version="19.4"
- start="cpu_0.data_master"
- end="reg_diag_data_buffer_jesd.mem">
- <parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00060000" />
+ <parameter name="baseAddress" value="0x0100" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -43010,9 +41810,9 @@
kind="avalon"
version="19.4"
start="cpu_0.data_master"
- end="ram_diag_data_buffer_jesd.mem">
+ end="pio_jesd_ctrl.mem">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00080000" />
+ <parameter name="baseAddress" value="0x3008" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -43032,7 +41832,7 @@
start="cpu_0.data_master"
end="avs_eth_0.mms_ram">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x4000" />
+ <parameter name="baseAddress" value="0x00040000" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -43112,7 +41912,7 @@
start="cpu_0.data_master"
end="pio_wdi.s1">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0380" />
+ <parameter name="baseAddress" value="0x3010" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -43132,7 +41932,7 @@
start="cpu_0.data_master"
end="timer_0.s1">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x0300" />
+ <parameter name="baseAddress" value="0x3020" />
<parameter name="defaultConnection" value="false" />
<parameter name="domainAlias" value="" />
<parameter name="qsys_mm.burstAdapterImplementation" value="GENERIC_CONVERTER" />
@@ -43211,7 +42011,6 @@
version="19.4"
start="clk_0.clk"
end="pio_system_info.system" />
- <connection kind="clock" version="19.4" start="clk_0.clk" end="pio_pps.system" />
<connection kind="clock" version="19.4" start="clk_0.clk" end="reg_wdi.system" />
<connection kind="clock" version="19.4" start="clk_0.clk" end="reg_remu.system" />
<connection kind="clock" version="19.4" start="clk_0.clk" end="reg_epcs.system" />
@@ -43293,16 +42092,12 @@
start="clk_0.clk"
end="ram_aduh_monitor.system" />
<connection kind="clock" version="19.4" start="clk_0.clk" end="reg_wg.system" />
+ <connection kind="clock" version="19.4" start="clk_0.clk" end="pio_pps.system" />
<connection
kind="clock"
version="19.4"
start="clk_0.clk"
- end="reg_diag_data_buffer_jesd.system" />
- <connection
- kind="clock"
- version="19.4"
- start="clk_0.clk"
- end="ram_diag_data_buffer_jesd.system" />
+ end="pio_jesd_ctrl.system" />
<connection
kind="interrupt"
version="19.4"
@@ -43475,12 +42270,7 @@
kind="reset"
version="19.4"
start="clk_0.clk_reset"
- end="reg_diag_data_buffer_jesd.system_reset" />
- <connection
- kind="reset"
- version="19.4"
- start="clk_0.clk_reset"
- end="ram_diag_data_buffer_jesd.system_reset" />
+ end="pio_jesd_ctrl.system_reset" />
<connection
kind="reset"
version="19.4"
@@ -43581,4 +42371,64 @@
version="19.4"
start="cpu_0.debug_reset_request"
end="reg_fpga_voltage_sens.system_reset" />
+ <connection
+ kind="reset"
+ version="19.4"
+ start="cpu_0.debug_reset_request"
+ end="jesd204b.system_reset" />
+ <connection
+ kind="reset"
+ version="19.4"
+ start="cpu_0.debug_reset_request"
+ end="ram_aduh_monitor.system_reset" />
+ <connection
+ kind="reset"
+ version="19.4"
+ start="cpu_0.debug_reset_request"
+ end="ram_diag_data_buffer_bsn.system_reset" />
+ <connection
+ kind="reset"
+ version="19.4"
+ start="cpu_0.debug_reset_request"
+ end="ram_wg.system_reset" />
+ <connection
+ kind="reset"
+ version="19.4"
+ start="cpu_0.debug_reset_request"
+ end="reg_aduh_monitor.system_reset" />
+ <connection
+ kind="reset"
+ version="19.4"
+ start="cpu_0.debug_reset_request"
+ end="reg_bsn_monitor_input.system_reset" />
+ <connection
+ kind="reset"
+ version="19.4"
+ start="cpu_0.debug_reset_request"
+ end="reg_bsn_scheduler.system_reset" />
+ <connection
+ kind="reset"
+ version="19.4"
+ start="cpu_0.debug_reset_request"
+ end="reg_bsn_source.system_reset" />
+ <connection
+ kind="reset"
+ version="19.4"
+ start="cpu_0.debug_reset_request"
+ end="reg_diag_data_buffer_bsn.system_reset" />
+ <connection
+ kind="reset"
+ version="19.4"
+ start="cpu_0.debug_reset_request"
+ end="reg_dp_shiftram.system_reset" />
+ <connection
+ kind="reset"
+ version="19.4"
+ start="cpu_0.debug_reset_request"
+ end="reg_wg.system_reset" />
+ <connection
+ kind="reset"
+ version="19.4"
+ start="cpu_0.debug_reset_request"
+ end="pio_jesd_ctrl.system_reset" />
</system>
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_6ch_200MHz/hdllib.cfg b/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_6ch_200MHz/hdllib.cfg
new file mode 100644
index 0000000000000000000000000000000000000000..0490ed1c0fe211f77864771afc0cee7eb9e36bb3
--- /dev/null
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_6ch_200MHz/hdllib.cfg
@@ -0,0 +1,78 @@
+hdl_lib_name = lofar2_unb2b_adc_6ch_200MHz
+hdl_library_clause_name = lofar2_unb2b_adc_6ch_200MHz_lib
+hdl_lib_uses_synth = common mm technology unb2b_board lofar2_unb2b_adc
+hdl_lib_uses_sim =
+hdl_lib_technology = ip_arria10_e1sg
+
+ synth_files =
+ lofar2_unb2b_adc_6ch_200MHz.vhd
+
+test_bench_files =
+ tb_lofar2_unb2b_adc_6ch_200MHz.vhd
+
+regression_test_vhdl =
+ tb_lofar2_unb2b_adc_6ch_200MHz.vhd
+
+
+[modelsim_project_file]
+modelsim_copy_files =
+
+
+[quartus_project_file]
+synth_top_level_entity =
+
+quartus_copy_files =
+ ../../quartus .
+
+quartus_qsf_files =
+ $RADIOHDL_WORK/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.qsf
+
+quartus_sdc_files =
+ ../../quartus/lofar2_unb2b_adc.sdc
+
+quartus_tcl_files =
+ ../../quartus/lofar2_unb2b_adc_pins.tcl
+
+quartus_vhdl_files =
+
+quartus_qip_files =
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc_6ch_200MHz/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc.qip
+
+quartus_ip_files =
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_eth_0.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_common_mm_0.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_common_mm_1.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_common_mm_2.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_clk_0.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_cpu_0.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_jtag_uart_0.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_onchip_memory2_0.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_pio_pps.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_pio_system_info.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_pio_wdi.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_dpmm_ctrl.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_dpmm_data.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_epcs.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_fpga_temp_sens.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_fpga_voltage_sens.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_mmdp_ctrl.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_mmdp_data.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_remu.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_unb_pmbus.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_unb_sens.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_wdi.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_rom_system_info.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_timer_0.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_bsn_monitor_input.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_wg.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_aduh_monitor.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_bsn_source.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_bsn_scheduler.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_dp_shiftram.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_wg.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_aduh_monitor.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_jesd204b.ip
+
+nios2_app_userflags = -DCOMPILE_FOR_GEN2_UNB2
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_6ch_200MHz/lofar2_unb2b_adc_6ch_200MHz.vhd b/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_6ch_200MHz/lofar2_unb2b_adc_6ch_200MHz.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..80a9ef2e5b4f2ae7c04c209cda350c096c01b289
--- /dev/null
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_6ch_200MHz/lofar2_unb2b_adc_6ch_200MHz.vhd
@@ -0,0 +1,165 @@
+-------------------------------------------------------------------------------
+--
+-- Copyright 2020
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- Licensed under the Apache License, Version 2.0 (the "License");
+-- you may not use this file except in compliance with the License.
+-- You may obtain a copy of the License at
+--
+-- http://www.apache.org/licenses/LICENSE-2.0
+--
+-- Unless required by applicable law or agreed to in writing, software
+-- distributed under the License is distributed on an "AS IS" BASIS,
+-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+-- See the License for the specific language governing permissions and
+-- limitations under the License.
+--
+-------------------------------------------------------------------------------
+
+-- Author : J Hargreaves
+-- Purpose:
+-- Wrapper for full adc input test design
+-- Description:
+-- Unb2b version for lab testing
+-- Contains complete AIT input stage with 12 ADC streams
+
+
+LIBRARY IEEE, common_lib, unb2b_board_lib, technology_lib, diag_lib, dp_lib, tech_jesd204b_lib, lofar2_unb2b_adc_lib;
+USE IEEE.STD_LOGIC_1164.ALL;
+USE IEEE.NUMERIC_STD.ALL;
+USE common_lib.common_pkg.ALL;
+USE common_lib.common_mem_pkg.ALL;
+USE technology_lib.technology_pkg.ALL;
+USE unb2b_board_lib.unb2b_board_pkg.ALL;
+USE diag_lib.diag_pkg.ALL;
+USE dp_lib.dp_stream_pkg.ALL;
+
+ENTITY lofar2_unb2b_adc_6ch_200MHz IS
+ GENERIC (
+ g_design_name : STRING := "lofar2_unb2b_adc_6ch_200MHz";
+ g_design_note : STRING := "Lofar2 with 6 ADC input streams";
+ g_jesd_freq : STRING := "200MHz";
+ g_sim : BOOLEAN := FALSE; --Overridden by TB
+ g_sim_unb_nr : NATURAL := 0;
+ g_sim_node_nr : NATURAL := 0;
+ g_stamp_date : NATURAL := 0; -- Date (YYYYMMDD) -- set by QSF
+ g_stamp_time : NATURAL := 0; -- Time (HHMMSS) -- set by QSF
+ g_revision_id : STRING := "" -- revision ID -- set by QSF
+ );
+ PORT (
+ -- GENERAL
+ CLK : IN STD_LOGIC; -- System Clock
+ PPS : IN STD_LOGIC; -- System Sync
+ WDI : OUT STD_LOGIC; -- Watchdog Clear
+ INTA : INOUT STD_LOGIC; -- FPGA interconnect line
+ INTB : INOUT STD_LOGIC; -- FPGA interconnect line
+
+ -- Others
+ VERSION : IN STD_LOGIC_VECTOR(c_unb2b_board_aux.version_w-1 DOWNTO 0);
+ ID : IN STD_LOGIC_VECTOR(c_unb2b_board_aux.id_w-1 DOWNTO 0);
+ TESTIO : INOUT STD_LOGIC_VECTOR(c_unb2b_board_aux.testio_w-1 DOWNTO 0);
+
+ -- I2C Interface to Sensors
+ SENS_SC : INOUT STD_LOGIC;
+ SENS_SD : INOUT STD_LOGIC;
+
+ PMBUS_SC : INOUT STD_LOGIC;
+ PMBUS_SD : INOUT STD_LOGIC;
+ PMBUS_ALERT : IN STD_LOGIC := '0';
+
+ -- 1GbE Control Interface
+ ETH_CLK : IN STD_LOGIC;
+ ETH_SGIN : IN STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 DOWNTO 0);
+ ETH_SGOUT : OUT STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 DOWNTO 0);
+
+ -- LEDs
+ QSFP_LED : OUT STD_LOGIC_VECTOR(c_unb2b_board_tr_qsfp_nof_leds-1 DOWNTO 0);
+
+ -- back transceivers (note only 6 are used in unb2b)
+ BCK_RX : IN STD_LOGIC_VECTOR(c_unb2b_board_nof_tr_jesd204b + c_unb2b_board_start_tr_jesd204b-1 downto c_unb2b_board_nof_tr_jesd204b);
+ BCK_REF_CLK : IN STD_LOGIC; -- Use as JESD204B_REFCLK
+
+ -- jesd204b syncronization signals (2 syncs)
+ JESD204B_SYSREF : IN STD_LOGIC;
+ JESD204B_SYNC_N : OUT STD_LOGIC_VECTOR(c_unb2b_board_nof_sync_jesd204b-1 DOWNTO 0)
+ );
+END lofar2_unb2b_adc_6ch_200MHz;
+
+ARCHITECTURE str OF lofar2_unb2b_adc_6ch_200MHz IS
+
+ SIGNAL JESD204B_SERIAL_DATA : STD_LOGIC_VECTOR((c_unb2b_board_tr_jesd204b.bus_w*c_unb2b_board_tr_jesd204b.nof_bus)-1 downto 0);
+ SIGNAL jesd204b_sync_n_arr : STD_LOGIC_VECTOR((c_unb2b_board_tr_jesd204b.bus_w*c_unb2b_board_tr_jesd204b.nof_bus)-1 downto 0);
+ SIGNAL JESD204B_REFCLK : STD_LOGIC;
+
+
+BEGIN
+
+ -- Mapping between JESD signal names and UNB2B pin/schematic names
+ JESD204B_REFCLK <= BCK_REF_CLK;
+ JESD204B_SERIAL_DATA(0) <= BCK_RX(42);
+ JESD204B_SERIAL_DATA(1) <= BCK_RX(43);
+ JESD204B_SERIAL_DATA(2) <= BCK_RX(44);
+ JESD204B_SERIAL_DATA(3) <= BCK_RX(45);
+ JESD204B_SERIAL_DATA(4) <= BCK_RX(46);
+ JESD204B_SERIAL_DATA(5) <= BCK_RX(47);
+ JESD204B_SERIAL_DATA(6) <= '0';
+ JESD204B_SERIAL_DATA(7) <= '0';
+ JESD204B_SERIAL_DATA(8) <= '0';
+ JESD204B_SERIAL_DATA(9) <= '0';
+ JESD204B_SERIAL_DATA(10) <= '0';
+ JESD204B_SERIAL_DATA(11) <= '0';
+ JESD204B_SYNC_N(c_unb2b_board_nof_sync_jesd204b-1 DOWNTO 0) <= jesd204b_sync_n_arr(c_unb2b_board_nof_sync_jesd204b-1 DOWNTO 0);
+
+
+ u_revision : ENTITY lofar2_unb2b_adc_lib.lofar2_unb2b_adc
+ GENERIC MAP (
+ g_design_name => g_design_name,
+ g_design_note => g_design_note,
+ g_jesd_freq => g_jesd_freq,
+ g_sim => g_sim,
+ g_sim_unb_nr => g_sim_unb_nr,
+ g_sim_node_nr => g_sim_node_nr,
+ g_stamp_date => g_stamp_date,
+ g_stamp_time => g_stamp_time,
+ g_revision_id => g_revision_id
+ )
+ PORT MAP (
+ -- GENERAL
+ CLK => CLK,
+ PPS => PPS,
+ WDI => WDI,
+ INTA => INTA,
+ INTB => INTB,
+
+ -- Others
+ VERSION => VERSION,
+ ID => ID,
+ TESTIO => TESTIO,
+
+ -- I2C Interface to Sensors
+ SENS_SC => SENS_SC,
+ SENS_SD => SENS_SD,
+
+ PMBUS_SC => PMBUS_SC,
+ PMBUS_SD => PMBUS_SD,
+ PMBUS_ALERT => PMBUS_ALERT,
+
+ -- 1GbE Control Interface
+ ETH_clk => ETH_clk,
+ ETH_SGIN => ETH_SGIN,
+ ETH_SGOUT => ETH_SGOUT,
+
+ -- LEDs
+ QSFP_LED => QSFP_LED,
+
+ -- back transceivers
+ JESD204B_SERIAL_DATA => JESD204B_SERIAL_DATA,
+ JESD204B_REFCLK => JESD204B_REFCLK,
+
+ -- jesd204b syncronization signals
+ JESD204B_SYSREF => JESD204B_SYSREF,
+ JESD204B_SYNC_N => jesd204b_sync_n_arr
+ );
+END str;
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_6ch_200MHz/tb_lofar2_unb2b_adc_6ch_200MHz.vhd b/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_6ch_200MHz/tb_lofar2_unb2b_adc_6ch_200MHz.vhd
new file mode 100644
index 0000000000000000000000000000000000000000..67e80c575eea11673294cabdf75bd27ffdfd3684
--- /dev/null
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_6ch_200MHz/tb_lofar2_unb2b_adc_6ch_200MHz.vhd
@@ -0,0 +1,165 @@
+-------------------------------------------------------------------------------
+--
+-- Copyright 2020
+-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
+-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
+--
+-- Licensed under the Apache License, Version 2.0 (the "License");
+-- you may not use this file except in compliance with the License.
+-- You may obtain a copy of the License at
+--
+-- http://www.apache.org/licenses/LICENSE-2.0
+--
+-- Unless required by applicable law or agreed to in writing, software
+-- distributed under the License is distributed on an "AS IS" BASIS,
+-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+-- See the License for the specific language governing permissions and
+-- limitations under the License.
+--
+-------------------------------------------------------------------------------
+
+
+-- Author: Jonathan Hargreaves
+-- Purpose: Tb to show that lofar2_unb2b_adc_6ch_200MHz can simulate
+-- Description:
+-- This is a compile-only test bench
+-- Usage:
+-- Load sim # check that design can load in vsim
+-- > as 10 # check that the hierarchy for g_design_name is complete
+-- > run -a # check that design can simulate some us without error
+
+LIBRARY IEEE, common_lib, unb2b_board_lib, i2c_lib;
+USE IEEE.std_logic_1164.ALL;
+USE IEEE.numeric_std.ALL;
+USE common_lib.common_pkg.ALL;
+USE unb2b_board_lib.unb2b_board_pkg.ALL;
+USE common_lib.tb_common_pkg.ALL;
+
+ENTITY tb_lofar2_unb2b_adc_6ch_200MHz IS
+END tb_lofar2_unb2b_adc_6ch_200MHz;
+
+ARCHITECTURE tb OF tb_lofar2_unb2b_adc_6ch_200MHz IS
+
+ CONSTANT c_sim : BOOLEAN := TRUE;
+ CONSTANT c_unb_nr : NATURAL := 0; -- UniBoard 0
+ CONSTANT c_node_nr : NATURAL := 0; -- Back node 3
+ CONSTANT c_id : STD_LOGIC_VECTOR(7 DOWNTO 0) := "00000000";
+ CONSTANT c_version : STD_LOGIC_VECTOR(1 DOWNTO 0) := "00";
+ CONSTANT c_fw_version : t_unb2b_board_fw_version := (1, 0);
+
+ CONSTANT c_eth_clk_period : TIME := 8 ns; -- 125 MHz XO on UniBoard
+ CONSTANT c_ext_clk_period : TIME := 5 ns;
+ CONSTANT c_bck_ref_clk_period : TIME := 5 ns;
+ CONSTANT c_pps_period : NATURAL := 1000;
+
+ -- Tb
+ SIGNAL tb_end : STD_LOGIC := '0';
+ SIGNAL sim_done : STD_LOGIC := '0';
+
+ -- DUT
+ SIGNAL ext_clk : STD_LOGIC := '0';
+ SIGNAL pps : STD_LOGIC := '0';
+ SIGNAL pps_rst : STD_LOGIC := '0';
+
+ SIGNAL WDI : STD_LOGIC;
+ SIGNAL INTA : STD_LOGIC;
+ SIGNAL INTB : STD_LOGIC;
+
+ SIGNAL eth_clk : STD_LOGIC := '0';
+ SIGNAL eth_txp : STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 downto 0);
+ SIGNAL eth_rxp : STD_LOGIC_VECTOR(c_unb2b_board_nof_eth-1 downto 0);
+
+ SIGNAL sens_scl : STD_LOGIC;
+ SIGNAL sens_sda : STD_LOGIC;
+ SIGNAL pmbus_scl : STD_LOGIC;
+ SIGNAL pmbus_sda : STD_LOGIC;
+
+ -- back transceivers
+ SIGNAL bck_rx : STD_LOGIC_VECTOR(c_unb2b_board_nof_tr_jesd204b + c_unb2b_board_start_tr_jesd204b-1 downto c_unb2b_board_nof_tr_jesd204b);
+ SIGNAL bck_ref_clk : STD_LOGIC := '1';
+
+ -- jesd204b syncronization signals
+ SIGNAL jesd204b_sysref : STD_LOGIC;
+ SIGNAL jesd204b_sync_n : STD_LOGIC_VECTOR(c_unb2b_board_nof_sync_jesd204b-1 DOWNTO 0);
+
+
+BEGIN
+
+
+ ----------------------------------------------------------------------------
+ -- System setup
+ ----------------------------------------------------------------------------
+ ext_clk <= NOT ext_clk AFTER c_ext_clk_period/2; -- External clock (200 MHz)
+ eth_clk <= NOT eth_clk AFTER c_eth_clk_period/2; -- Ethernet ref clock (125 MHz)
+ bck_ref_clk <= NOT bck_ref_clk AFTER c_bck_ref_clk_period/2; -- JESD sample clock (200MHz)
+
+ INTA <= 'H'; -- pull up
+ INTB <= 'H'; -- pull up
+
+ sens_scl <= 'H'; -- pull up
+ sens_sda <= 'H'; -- pull up
+ pmbus_scl <= 'H'; -- pull up
+ pmbus_sda <= 'H'; -- pull up
+
+ ------------------------------------------------------------------------------
+ -- External PPS
+ ------------------------------------------------------------------------------
+ proc_common_gen_pulse(1, c_pps_period, '1', pps_rst, ext_clk, pps);
+ jesd204b_sysref <= pps;
+
+ ------------------------------------------------------------------------------
+ -- DUT
+ ------------------------------------------------------------------------------
+ u_lofar_unb2b_adc_6ch_200MHz : ENTITY work.lofar2_unb2b_adc_6ch_200MHz
+ GENERIC MAP (
+ g_sim => c_sim,
+ g_sim_unb_nr => c_unb_nr,
+ g_sim_node_nr => c_node_nr
+ )
+ PORT MAP (
+ -- GENERAL
+ CLK => ext_clk,
+ PPS => pps,
+ WDI => WDI,
+ INTA => INTA,
+ INTB => INTB,
+
+ -- Others
+ VERSION => c_version,
+ ID => c_id,
+ TESTIO => open,
+
+ -- I2C Interface to Sensors
+ SENS_SC => sens_scl,
+ SENS_SD => sens_sda,
+
+ PMBUS_SC => pmbus_scl,
+ PMBUS_SD => pmbus_sda,
+ PMBUS_ALERT => open,
+
+ -- 1GbE Control Interface
+ ETH_CLK => eth_clk,
+ ETH_SGIN => eth_rxp,
+ ETH_SGOUT => eth_txp,
+
+ -- LEDs
+ QSFP_LED => open,
+
+ -- back transceivers
+ BCK_RX => bck_rx,
+ BCK_REF_CLK => bck_ref_clk,
+
+ -- jesd204b syncronization signals
+ JESD204B_SYSREF => jesd204b_sysref,
+ JESD204B_SYNC_N => jesd204b_sync_n
+ );
+
+
+ ------------------------------------------------------------------------------
+ -- Simulation end
+ ------------------------------------------------------------------------------
+ sim_done <= '0', '1' AFTER 1 us;
+
+ proc_common_stop_simulation(TRUE, ext_clk, sim_done, tb_end);
+
+END tb;
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_full/hdllib.cfg b/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_full/hdllib.cfg
index 2ff14c70560c6c1414e2350ad4597b9e633ada80..2edaaa62557d3216749a6fc2459b25a6d53c6c5b 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_full/hdllib.cfg
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/revisions/lofar2_unb2b_adc_full/hdllib.cfg
@@ -31,10 +31,8 @@ quartus_copy_files =
quartus_qsf_files =
$RADIOHDL_WORK/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.qsf
-# use lofar2_unb2b_adc.sdc instead because BCK_REF_CLK is 200MHz, not 644.33MHz.
quartus_sdc_files =
../../quartus/lofar2_unb2b_adc.sdc
- #$RADIOHDL_WORK/boards/uniboard2b/libraries/unb2b_board/quartus/unb2b_board.sdc
quartus_tcl_files =
../../quartus/lofar2_unb2b_adc_pins.tcl
@@ -48,6 +46,7 @@ quartus_ip_files =
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_eth_0.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_common_mm_0.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_common_mm_1.ip
+ $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_avs_common_mm_2.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_clk_0.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_cpu_0.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_jtag_uart_0.ip
@@ -71,14 +70,12 @@ quartus_ip_files =
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_bsn_monitor_input.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_wg.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_aduh_monitor.ip
- $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_diag_data_buffer_jesd.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_diag_data_buffer_bsn.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_bsn_source.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_bsn_scheduler.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_reg_dp_shiftram.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_wg.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_aduh_monitor.ip
- $RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_diag_data_buffer_jesd.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_ram_diag_data_buffer_bsn.ip
$RADIOHDL_BUILD_DIR/unb2b/quartus/lofar2_unb2b_adc/ip/qsys_lofar2_unb2b_adc/qsys_lofar2_unb2b_adc_jesd204b.ip
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc.vhd b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc.vhd
index e9804142486e8b8942567ae8ea5a913163848140..7ea39b8512ee0fe70ff874ee345277a1ef339513 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc.vhd
@@ -42,6 +42,7 @@ ENTITY lofar2_unb2b_adc IS
GENERIC (
g_design_name : STRING := "lofar2_unb2b_adc";
g_design_note : STRING := "UNUSED";
+ g_jesd_freq : STRING := "200MHz";
g_technology : NATURAL := c_tech_arria10_e1sg;
g_buf_nof_data : NATURAL := 1024;
g_sim : BOOLEAN := FALSE; --Overridden by TB
@@ -104,7 +105,7 @@ ARCHITECTURE str OF lofar2_unb2b_adc IS
-- Firmware version x.y
CONSTANT c_fw_version : t_unb2b_board_fw_version := (1, 1);
CONSTANT c_mm_clk_freq : NATURAL := c_unb2b_board_mm_clk_freq_100M;
- CONSTANT c_lofar2_sample_clk_freq : NATURAL := 200 * 10**6; -- alternate 160MHz. TODO: Use to check PPS
+
-- System
SIGNAL cs_sim : STD_LOGIC;
@@ -117,6 +118,8 @@ ARCHITECTURE str OF lofar2_unb2b_adc IS
SIGNAL dp_pps : STD_LOGIC;
SIGNAL dp_rst : STD_LOGIC;
SIGNAL dp_clk : STD_LOGIC;
+ SIGNAL jesd_mm_rst : STD_LOGIC;
+ SIGNAL jesd_dp_rst : STD_LOGIC;
-- PIOs
SIGNAL pout_wdi : STD_LOGIC;
@@ -205,12 +208,6 @@ ARCHITECTURE str OF lofar2_unb2b_adc IS
SIGNAL reg_bsn_monitor_input_mosi : t_mem_mosi;
SIGNAL reg_bsn_monitor_input_miso : t_mem_miso;
- -- Data buffer raw
- SIGNAL ram_diag_data_buf_jesd_mosi: t_mem_mosi;
- SIGNAL ram_diag_data_buf_jesd_miso: t_mem_miso;
- SIGNAL reg_diag_data_buf_jesd_mosi: t_mem_mosi;
- SIGNAL reg_diag_data_buf_jesd_miso: t_mem_miso;
-
-- Data buffer bsn
SIGNAL ram_diag_data_buf_bsn_mosi : t_mem_mosi;
SIGNAL ram_diag_data_buf_bsn_miso : t_mem_miso;
@@ -229,7 +226,9 @@ ARCHITECTURE str OF lofar2_unb2b_adc IS
SIGNAL alt_sosi_arr : t_dp_sosi_arr(c_nof_streams-1 DOWNTO 0);
-
+ -- JESD control
+ SIGNAL jesd_ctrl_mosi : t_mem_mosi := c_mem_mosi_rst;
+ SIGNAL jesd_ctrl_miso : t_mem_miso := c_mem_miso_rst;
BEGIN
@@ -374,6 +373,10 @@ BEGIN
-- PIOs
pout_wdi => pout_wdi,
+ -- Jesd reset control
+ jesd_ctrl_mosi => jesd_ctrl_mosi,
+ jesd_ctrl_miso => jesd_ctrl_miso,
+
-- mm interfaces for control
reg_wdi_mosi => reg_wdi_mosi,
reg_wdi_miso => reg_wdi_miso,
@@ -428,10 +431,6 @@ BEGIN
ram_wg_miso => ram_wg_miso,
reg_bsn_monitor_input_mosi => reg_bsn_monitor_input_mosi,
reg_bsn_monitor_input_miso => reg_bsn_monitor_input_miso,
- ram_diag_data_buf_jesd_mosi => ram_diag_data_buf_jesd_mosi,
- ram_diag_data_buf_jesd_miso => ram_diag_data_buf_jesd_miso,
- reg_diag_data_buf_jesd_mosi => reg_diag_data_buf_jesd_mosi,
- reg_diag_data_buf_jesd_miso => reg_diag_data_buf_jesd_miso,
ram_diag_data_buf_bsn_mosi => ram_diag_data_buf_bsn_mosi,
ram_diag_data_buf_bsn_miso => ram_diag_data_buf_bsn_miso,
reg_diag_data_buf_bsn_mosi => reg_diag_data_buf_bsn_mosi,
@@ -442,25 +441,26 @@ BEGIN
reg_aduh_monitor_miso => reg_aduh_monitor_miso
);
-
+
-----------------------------------------------------------------------------
-- node_adc_input_and_timing (AIT)
-- .Contains JESD receiver, bsn source and associated data buffers, diagnostics and statistics
-----------------------------------------------------------------------------
-
+
u_ait: ENTITY work.node_adc_input_and_timing
GENERIC MAP(
g_technology => g_technology,
g_nof_streams => c_nof_streams,
+ g_jesd_freq => g_jesd_freq,
g_sim => g_sim
)
PORT MAP(
-- clocks and resets
mm_clk => mm_clk,
- mm_rst => mm_rst,
+ mm_rst => mm_rst,
dp_clk => dp_clk,
dp_rst => dp_rst,
-
+
-- mm control buses
jesd204b_mosi => jesd204b_mosi,
jesd204b_miso => jesd204b_miso,
@@ -476,10 +476,6 @@ BEGIN
ram_wg_miso => ram_wg_miso,
reg_bsn_monitor_input_mosi => reg_bsn_monitor_input_mosi,
reg_bsn_monitor_input_miso => reg_bsn_monitor_input_miso,
- ram_diag_data_buf_jesd_mosi => ram_diag_data_buf_jesd_mosi,
- ram_diag_data_buf_jesd_miso => ram_diag_data_buf_jesd_miso,
- reg_diag_data_buf_jesd_mosi => reg_diag_data_buf_jesd_mosi,
- reg_diag_data_buf_jesd_miso => reg_diag_data_buf_jesd_miso,
ram_diag_data_buf_bsn_mosi => ram_diag_data_buf_bsn_mosi,
ram_diag_data_buf_bsn_miso => ram_diag_data_buf_bsn_miso,
reg_diag_data_buf_bsn_mosi => reg_diag_data_buf_bsn_mosi,
@@ -488,6 +484,8 @@ BEGIN
ram_aduh_monitor_miso => ram_aduh_monitor_miso,
reg_aduh_monitor_mosi => reg_aduh_monitor_mosi,
reg_aduh_monitor_miso => reg_aduh_monitor_miso,
+ jesd_ctrl_mosi => jesd_ctrl_mosi,
+ jesd_ctrl_miso => jesd_ctrl_miso,
-- Jesd external IOs
jesd204b_serial_data => JESD204B_SERIAL_DATA,
@@ -499,5 +497,29 @@ BEGIN
out_sosi_arr => alt_sosi_arr
);
+ u_front_led : ENTITY unb2b_board_lib.unb2b_board_qsfp_leds
+ GENERIC MAP (
+ g_sim => g_sim,
+ g_factory_image => g_factory_image,
+ g_nof_qsfp => c_unb2b_board_tr_qsfp.nof_bus,
+ g_pulse_us => 1000 / (10**9 / c_mm_clk_freq) -- nof clk cycles to get us period
+ )
+ PORT MAP (
+ rst => mm_rst,
+ clk => mm_clk,
+ green_led_arr => qsfp_green_led_arr,
+ red_led_arr => qsfp_red_led_arr
+ );
+
+ u_front_io : ENTITY unb2b_board_lib.unb2b_board_front_io
+ GENERIC MAP (
+ g_nof_qsfp_bus => c_unb2b_board_tr_qsfp.nof_bus
+ )
+ PORT MAP (
+ green_led_arr => qsfp_green_led_arr,
+ red_led_arr => qsfp_red_led_arr,
+ QSFP_LED => QSFP_LED
+ );
+
-END str;
\ No newline at end of file
+END str;
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd
index fc8463eea473048d1e0e849e4cf13cc592863185..f9de5b5d8be745b5a2348e4113b6f97eb8b5501b 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/lofar2_unb2b_adc_pkg.vhd
@@ -53,6 +53,7 @@ PACKAGE BODY lofar2_unb2b_adc_pkg IS
BEGIN
IF g_design_name = "lofar2_unb2b_adc_one_node" THEN RETURN c_one_node;
ELSIF g_design_name = "lofar2_unb2b_adc_full" THEN RETURN c_full;
+ ELSIF g_design_name = "lofar2_unb2b_adc_6ch_200MHz" THEN RETURN c_full;
ELSE RETURN c_one_node;
END IF;
END;
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/mmm_lofar2_unb2b_adc.vhd b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/mmm_lofar2_unb2b_adc.vhd
index 5e3180df8598e0a17ff45dc088d295d0ef51e1e1..4b605b24e00aa67ef7805372f7507793bd8db54e 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/mmm_lofar2_unb2b_adc.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/mmm_lofar2_unb2b_adc.vhd
@@ -103,6 +103,10 @@ ENTITY mmm_lofar2_unb2b_adc IS
jesd204b_mosi : OUT t_mem_mosi;
jesd204b_miso : IN t_mem_miso;
+ -- Jesd reset control
+ jesd_ctrl_mosi : OUT t_mem_mosi;
+ jesd_ctrl_miso : IN t_mem_miso;
+
-- Dp shiftram
reg_dp_shiftram_mosi : OUT t_mem_mosi;
reg_dp_shiftram_miso : IN t_mem_miso;
@@ -125,12 +129,6 @@ ENTITY mmm_lofar2_unb2b_adc IS
ram_wg_mosi : OUT t_mem_mosi;
ram_wg_miso : IN t_mem_miso;
- -- JESD databuffer
- ram_diag_data_buf_jesd_mosi : OUT t_mem_mosi;
- ram_diag_data_buf_jesd_miso : IN t_mem_miso;
- reg_diag_data_buf_jesd_mosi : OUT t_mem_mosi;
- reg_diag_data_buf_jesd_miso : IN t_mem_miso;
-
-- Bsn databuffer
ram_diag_data_buf_bsn_mosi : OUT t_mem_mosi;
ram_diag_data_buf_bsn_miso : IN t_mem_miso;
@@ -207,11 +205,6 @@ BEGIN
u_mm_file_ram_wg : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "RAM_WG")
PORT MAP(mm_rst, mm_clk, ram_wg_mosi, ram_wg_miso );
- u_mm_file_ram_diag_data_buf_jesd : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "RAM_DIAG_DATA_BUF_JESD")
- PORT MAP(mm_rst, mm_clk, ram_diag_data_buf_jesd_mosi, ram_diag_data_buf_jesd_miso );
- u_mm_file_reg_diag_data_buf_jesd : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_DIAG_DATA_BUF_JESD")
- PORT MAP(mm_rst, mm_clk, reg_diag_data_buf_jesd_mosi, reg_diag_data_buf_jesd_miso );
-
u_mm_file_ram_diag_data_buf_bsn : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "RAM_DIAG_DATA_BUF_BSN")
PORT MAP(mm_rst, mm_clk, ram_diag_data_buf_bsn_mosi, ram_diag_data_buf_bsn_miso );
u_mm_file_reg_diag_data_buf_bsn : mm_file GENERIC MAP(mmf_unb_file_prefix(g_sim_unb_nr, c_sim_node_nr, c_sim_node_type) & "REG_DIAG_DATA_BUF_BSN")
@@ -244,6 +237,7 @@ BEGIN
-- the_pio_wdi: toggled by NIOS II application unb_osy. Connects to WDI via ctrl_unb2b_board.
pio_wdi_external_connection_export => pout_wdi,
+
avs_eth_0_reset_export => eth1g_mm_rst,
avs_eth_0_clk_export => OPEN,
avs_eth_0_tse_address_export => eth1g_tse_mosi.address(c_unb2b_board_peripherals_mm_reg_default.reg_tse_adr_w-1 DOWNTO 0),
@@ -348,6 +342,14 @@ BEGIN
jesd204b_read_export => jesd204b_mosi.rd,
jesd204b_readdata_export => jesd204b_miso.rddata(c_word_w-1 DOWNTO 0),
+ pio_jesd_ctrl_reset_export => OPEN,
+ pio_jesd_ctrl_clk_export => OPEN,
+ pio_jesd_ctrl_address_export => jesd_ctrl_mosi.address(0 downto 0),
+ pio_jesd_ctrl_write_export => jesd_ctrl_mosi.wr,
+ pio_jesd_ctrl_writedata_export => jesd_ctrl_mosi.wrdata(c_word_w-1 DOWNTO 0),
+ pio_jesd_ctrl_read_export => jesd_ctrl_mosi.rd,
+ pio_jesd_ctrl_readdata_export => jesd_ctrl_miso.rddata(c_word_w-1 DOWNTO 0),
+
reg_bsn_monitor_input_address_export => reg_bsn_monitor_input_mosi.address(7 DOWNTO 0),
reg_bsn_monitor_input_clk_export => OPEN,
reg_bsn_monitor_input_read_export => reg_bsn_monitor_input_mosi.rd,
@@ -454,22 +456,6 @@ BEGIN
reg_diag_data_buf_bsn_read_export => reg_diag_data_buf_bsn_mosi.rd,
reg_diag_data_buf_bsn_readdata_export => reg_diag_data_buf_bsn_miso.rddata(c_word_w-1 DOWNTO 0),
- ram_diag_data_buf_jesd_clk_export => OPEN,
- ram_diag_data_buf_jesd_reset_export => OPEN,
- ram_diag_data_buf_jesd_address_export => ram_diag_data_buf_jesd_mosi.address(16-1 DOWNTO 0),
- ram_diag_data_buf_jesd_write_export => ram_diag_data_buf_jesd_mosi.wr,
- ram_diag_data_buf_jesd_writedata_export => ram_diag_data_buf_jesd_mosi.wrdata(c_word_w-1 DOWNTO 0),
- ram_diag_data_buf_jesd_read_export => ram_diag_data_buf_jesd_mosi.rd,
- ram_diag_data_buf_jesd_readdata_export => ram_diag_data_buf_jesd_miso.rddata(c_word_w-1 DOWNTO 0),
-
- reg_diag_data_buf_jesd_reset_export => OPEN,
- reg_diag_data_buf_jesd_clk_export => OPEN,
- reg_diag_data_buf_jesd_address_export => reg_diag_data_buf_jesd_mosi.address(12-1 DOWNTO 0),
- reg_diag_data_buf_jesd_write_export => reg_diag_data_buf_jesd_mosi.wr,
- reg_diag_data_buf_jesd_writedata_export => reg_diag_data_buf_jesd_mosi.wrdata(c_word_w-1 DOWNTO 0),
- reg_diag_data_buf_jesd_read_export => reg_diag_data_buf_jesd_mosi.rd,
- reg_diag_data_buf_jesd_readdata_export => reg_diag_data_buf_jesd_miso.rddata(c_word_w-1 DOWNTO 0),
-
ram_aduh_monitor_clk_export => OPEN,
ram_aduh_monitor_reset_export => OPEN,
ram_aduh_monitor_address_export => ram_aduh_monitor_mosi.address(12-1 DOWNTO 0),
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/node_adc_input_and_timing.vhd b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/node_adc_input_and_timing.vhd
index 63314b3c208ba00ab1a9b3eefd30c1bbba771cca..8b1fd257b00d9900b3a2a5f9a52e7540b3d5497b 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/node_adc_input_and_timing.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/node_adc_input_and_timing.vhd
@@ -18,7 +18,7 @@
--
-------------------------------------------------------------------------------
--- Author : J Hargreaves
+-- Authors : J Hargreaves, L Hiemstra
-- Purpose:
-- AIT - ADC (Jesd) receiver, input, timing and associated diagnostic blocks
-- Description:
@@ -41,6 +41,7 @@ USE work.lofar2_unb2b_adc_pkg.ALL;
ENTITY node_adc_input_and_timing IS
GENERIC (
g_technology : NATURAL := c_tech_arria10_e1sg;
+ g_jesd_freq : STRING := "200MHz";
g_buf_nof_data : NATURAL := 131072; --8192; --1024;
g_nof_streams : NATURAL := 12;
g_nof_sync_n : NATURAL := 4; -- Three ADCs per RCU share a sync
@@ -55,6 +56,7 @@ ENTITY node_adc_input_and_timing IS
dp_clk : IN STD_LOGIC;
dp_rst : IN STD_LOGIC;
+
-- mm control buses
-- JESD
jesd204b_mosi : IN t_mem_mosi := c_mem_mosi_rst;
@@ -100,6 +102,10 @@ ENTITY node_adc_input_and_timing IS
reg_aduh_monitor_mosi : IN t_mem_mosi;
reg_aduh_monitor_miso : OUT t_mem_miso;
+ -- JESD control
+ jesd_ctrl_mosi : IN t_mem_mosi;
+ jesd_ctrl_miso : OUT t_mem_miso;
+
-- JESD io signals
jesd204b_serial_data : IN STD_LOGIC_VECTOR((c_unb2b_board_tr_jesd204b.bus_w*c_unb2b_board_tr_jesd204b.nof_bus)-1 downto 0);
jesd204b_refclk : IN STD_LOGIC;
@@ -115,13 +121,13 @@ END node_adc_input_and_timing;
ARCHITECTURE str OF node_adc_input_and_timing IS
- -- Firmware version x.y
- CONSTANT c_fw_version : t_unb2b_board_fw_version := (1, 1);
- CONSTANT c_mm_clk_freq : NATURAL := c_unb2b_board_mm_clk_freq_100M;
- CONSTANT c_lofar2_sample_clk_freq : NATURAL := 200 * 10**6; -- alternate 160MHz. TODO: Use to check PPS
-
CONSTANT c_nof_streams_jesd204b : NATURAL := 12; -- IP is set up for 12 streams
- CONSTANT c_nof_streams_db : NATURAL := 2; -- Streams of raw samples to record in db
+
+ CONSTANT c_mm_jesd_ctrl_reg : t_c_mem := (latency => 1,
+ adr_w => 1,
+ dat_w => c_word_w,
+ nof_dat => 1,
+ init_sl => '0');
-- Waveform Generator
CONSTANT c_wg_buf_directory : STRING := "data/";
@@ -155,16 +161,32 @@ ARCHITECTURE str OF node_adc_input_and_timing IS
SIGNAL rx_sosi_arr : t_dp_sosi_arr(c_nof_streams_jesd204b-1 DOWNTO 0);
SIGNAL dp_shiftram_snk_in_arr : t_dp_sosi_arr(c_nof_streams_jesd204b-1 DOWNTO 0);
SIGNAL ant_sosi_arr : t_dp_sosi_arr(c_nof_streams_jesd204b-1 DOWNTO 0);
- SIGNAL diag_data_buf_snk_in_arr : t_dp_sosi_arr(c_nof_streams_db-1 DOWNTO 0);
SIGNAL bs_sosi : t_dp_sosi;
SIGNAL wg_sosi_arr : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
SIGNAL mux_sosi_arr : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
SIGNAL nxt_mux_sosi_arr : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
SIGNAL st_sosi_arr : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
+ SIGNAL mm_rst_internal : STD_LOGIC;
+ SIGNAL mm_jesd_ctrl_reg : STD_LOGIC_VECTOR(c_word_w-1 DOWNTO 0);
+ SIGNAL jesd204b_disable_arr : STD_LOGIC_VECTOR(g_nof_streams-1 DOWNTO 0);
+ SIGNAL jesd204b_reset : STD_LOGIC;
BEGIN
+ -- The node AIT is reset at power up by mm_rst and under software control by jesd204b_reset.
+ -- The mm_rst internal will cause a reset on the rx_rst by the reset sequencer in the u_jesd204b.
+ -- The MM jesd204b_reset is intended for node AIT resynchronisation tests of the u_jesd204b.
+ -- The MM jesd204b_reset should not be applied in an SDP application, because this will cause
+ -- a disturbance in the block timing of the out_sosi_arr(i).sync,bsn,sop,eop. The other logic
+ -- in an SDP application assumes that the block timing of the out_sosi_arr(i) only contains
+ -- complete blocks, so from sop to eop.
+
+ mm_rst_internal <= mm_rst OR mm_jesd_ctrl_reg(31);
+ gen_jesd_disable : FOR I IN 0 TO c_nof_streams_jesd204b-1 GENERATE
+ jesd204b_disable_arr(i) <= mm_jesd_ctrl_reg(i);
+ END GENERATE;
+
-----------------------------------------------------------------------------
-- JESD204B IP (ADC Handler)
-----------------------------------------------------------------------------
@@ -173,7 +195,8 @@ BEGIN
GENERIC MAP(
g_sim => g_sim,
g_nof_streams => c_nof_streams_jesd204b,
- g_nof_sync_n => g_nof_sync_n
+ g_nof_sync_n => g_nof_sync_n,
+ g_jesd_freq => g_jesd_freq
)
PORT MAP(
jesd204b_refclk => JESD204B_REFCLK,
@@ -184,10 +207,12 @@ BEGIN
rx_clk => rx_clk,
rx_rst => rx_rst,
rx_sysref => rx_sysref,
+
+ jesd204b_disable_arr => jesd204b_disable_arr,
-- MM
mm_clk => mm_clk,
- mm_rst => mm_rst,
+ mm_rst => mm_rst_internal,
jesd204b_mosi => jesd204b_mosi,
jesd204b_miso => jesd204b_miso,
@@ -198,43 +223,6 @@ BEGIN
);
- gen_jesd_mon_in : FOR i IN 0 TO c_nof_streams_db-1 GENERATE
- diag_data_buf_snk_in_arr(i).data(c_data_w-1 downto 0) <= rx_sosi_arr(i).data(c_data_w-1 downto 0);
- diag_data_buf_snk_in_arr(i).valid <= rx_sosi_arr(i).valid;
- diag_data_buf_snk_in_arr(i).sop <= '0';
- diag_data_buf_snk_in_arr(i).eop <= '0';
- diag_data_buf_snk_in_arr(i).err <= (OTHERS=>'0');
- END GENERATE;
-
-
- -----------------------------------------------------------------------------
- -- Diagnostic Data Buffer (Records 1024 raw ADC samples after the PPS)
- -- ToDo: Remove this JESD DB when the second (BSN) data buffer is working correctly
- -----------------------------------------------------------------------------
-
- u_diag_data_buffer : ENTITY diag_lib.mms_diag_data_buffer
- GENERIC MAP (
- g_technology => g_technology,
- g_nof_streams => c_nof_streams_db,
- g_data_w => c_data_w,
- g_buf_nof_data => 1024,
- g_buf_use_sync => TRUE -- when TRUE start filling the buffer at the in_sync, else after the last word was read
- )
- PORT MAP (
- mm_rst => mm_rst,
- mm_clk => mm_clk,
- dp_rst => rx_rst,
- dp_clk => rx_clk,
-
- ram_data_buf_mosi => ram_diag_data_buf_jesd_mosi,
- ram_data_buf_miso => ram_diag_data_buf_jesd_miso,
- reg_data_buf_mosi => reg_diag_data_buf_jesd_mosi,
- reg_data_buf_miso => reg_diag_data_buf_jesd_miso,
-
- in_sosi_arr => diag_data_buf_snk_in_arr,
- in_sync => rx_sysref
- );
-
-----------------------------------------------------------------------------
-- Time delay: dp_shiftram
-- . copied from unb1_bn_capture_input (apertif)
@@ -262,7 +250,7 @@ BEGIN
dp_rst => rx_rst,
dp_clk => rx_clk,
- mm_rst => mm_rst,
+ mm_rst => mm_rst_internal,
mm_clk => mm_clk,
sync_in => bs_sosi.sync,
@@ -287,7 +275,7 @@ BEGIN
)
PORT MAP (
-- Clocks and reset
- mm_rst => mm_rst,
+ mm_rst => mm_rst_internal,
mm_clk => mm_clk,
dp_rst => rx_rst,
dp_clk => rx_clk,
@@ -308,7 +296,7 @@ BEGIN
)
PORT MAP (
-- Memory-mapped clock domain
- mm_rst => mm_rst,
+ mm_rst => mm_rst_internal,
mm_clk => mm_clk,
reg_mosi => reg_bsn_scheduler_wg_mosi,
@@ -345,7 +333,7 @@ BEGIN
)
PORT MAP (
-- Memory-mapped clock domain
- mm_rst => mm_rst,
+ mm_rst => mm_rst_internal,
mm_clk => mm_clk,
reg_mosi => reg_wg_mosi,
@@ -414,7 +402,7 @@ BEGIN
)
PORT MAP (
-- Memory-mapped clock domain
- mm_rst => mm_rst,
+ mm_rst => mm_rst_internal,
mm_clk => mm_clk,
reg_mosi => reg_bsn_monitor_input_mosi,
reg_miso => reg_bsn_monitor_input_miso,
@@ -441,7 +429,7 @@ BEGIN
)
PORT MAP (
-- Memory-mapped clock domain
- mm_rst => mm_rst,
+ mm_rst => mm_rst_internal,
mm_clk => mm_clk,
reg_mosi => reg_aduh_monitor_mosi, -- read only access to the signal path data mean sum and power sum registers
@@ -470,7 +458,7 @@ BEGIN
g_buf_use_sync => TRUE -- when TRUE start filling the buffer at the in_sync, else after the last word was read
)
PORT MAP (
- mm_rst => mm_rst,
+ mm_rst => mm_rst_internal,
mm_clk => mm_clk,
dp_rst => rx_rst,
dp_clk => rx_clk,
@@ -510,4 +498,28 @@ BEGIN
);
END GENERATE;
+ -----------------------------------------------------------------------------
+ -- JESD Control register
+ -----------------------------------------------------------------------------
+ u_mm_jesd_ctrl_reg : ENTITY common_lib.common_reg_r_w
+ GENERIC MAP (
+ g_reg => c_mm_jesd_ctrl_reg,
+ g_init_reg => (OTHERS => '0')
+ )
+ PORT MAP (
+ rst => mm_rst,
+ clk => mm_clk,
+ -- control side
+ wr_en => jesd_ctrl_mosi.wr,
+ wr_adr => jesd_ctrl_mosi.address(c_mm_jesd_ctrl_reg.adr_w-1 DOWNTO 0),
+ wr_dat => jesd_ctrl_mosi.wrdata(c_mm_jesd_ctrl_reg.dat_w-1 DOWNTO 0),
+ rd_en => jesd_ctrl_mosi.rd,
+ rd_adr => jesd_ctrl_mosi.address(c_mm_jesd_ctrl_reg.adr_w-1 DOWNTO 0),
+ rd_dat => jesd_ctrl_miso.rddata(c_mm_jesd_ctrl_reg.dat_w-1 DOWNTO 0),
+ rd_val => OPEN,
+ -- data side
+ out_reg => mm_jesd_ctrl_reg,
+ in_reg => mm_jesd_ctrl_reg
+ );
+
END str;
diff --git a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd
index a2b690117989b8108e02c4e6d774048cb43393fb..b93e68987c8065ded3f9970770c8f3a25c68b115 100644
--- a/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_adc/src/vhdl/qsys_lofar2_unb2b_adc_pkg.vhd
@@ -200,20 +200,6 @@ PACKAGE qsys_lofar2_unb2b_adc_pkg IS
rom_system_info_reset_export : out std_logic; -- export
rom_system_info_write_export : out std_logic; -- export
rom_system_info_writedata_export : out std_logic_vector(31 downto 0); -- export
- ram_diag_data_buf_jesd_address_export : out std_logic_vector(15 downto 0); -- export
- ram_diag_data_buf_jesd_clk_export : out std_logic; -- export
- ram_diag_data_buf_jesd_read_export : out std_logic; -- export
- ram_diag_data_buf_jesd_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
- ram_diag_data_buf_jesd_reset_export : out std_logic; -- export
- ram_diag_data_buf_jesd_write_export : out std_logic; -- export
- ram_diag_data_buf_jesd_writedata_export : out std_logic_vector(31 downto 0); -- export
- reg_diag_data_buf_jesd_address_export : out std_logic_vector(11 downto 0); -- export
- reg_diag_data_buf_jesd_clk_export : out std_logic; -- export
- reg_diag_data_buf_jesd_read_export : out std_logic; -- export
- reg_diag_data_buf_jesd_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
- reg_diag_data_buf_jesd_reset_export : out std_logic; -- export
- reg_diag_data_buf_jesd_write_export : out std_logic; -- export
- reg_diag_data_buf_jesd_writedata_export : out std_logic_vector(31 downto 0); -- export
ram_aduh_monitor_address_export : out std_logic_vector(11 downto 0); -- export
ram_aduh_monitor_clk_export : out std_logic; -- export
ram_aduh_monitor_read_export : out std_logic; -- export
@@ -241,7 +227,14 @@ PACKAGE qsys_lofar2_unb2b_adc_pkg IS
reg_diag_data_buf_bsn_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X'); -- export
reg_diag_data_buf_bsn_reset_export : out std_logic; -- export
reg_diag_data_buf_bsn_write_export : out std_logic; -- export
- reg_diag_data_buf_bsn_writedata_export : out std_logic_vector(31 downto 0) -- export
+ reg_diag_data_buf_bsn_writedata_export : out std_logic_vector(31 downto 0); -- export
+ pio_jesd_ctrl_reset_export : out std_logic; -- export
+ pio_jesd_ctrl_clk_export : out std_logic; -- export
+ pio_jesd_ctrl_address_export : out std_logic_vector(0 downto 0); -- export
+ pio_jesd_ctrl_write_export : out std_logic; -- export
+ pio_jesd_ctrl_writedata_export : out std_logic_vector(31 downto 0); -- export
+ pio_jesd_ctrl_read_export : out std_logic; -- export
+ pio_jesd_ctrl_readdata_export : in std_logic_vector(31 downto 0) := (others => 'X') -- export
);
end component qsys_lofar2_unb2b_adc;
diff --git a/libraries/technology/ip_arria10_e1sg/generate-all-ip.sh b/libraries/technology/ip_arria10_e1sg/generate-all-ip.sh
new file mode 100755
index 0000000000000000000000000000000000000000..c35c6f1060310afcc7e7171bd10195cc48abcdb7
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/generate-all-ip.sh
@@ -0,0 +1,21 @@
+#!/bin/bash
+
+files=`find $RADIOHDL_WORK/libraries/technology/ip_arria10_e1sg -name 'generate_ip.sh' `
+
+echo -e "About to generate the following IP blocks:\n$files\n"
+
+for f in $files ; do
+ cd `dirname $f`
+
+ echo
+ echo -n "Entering directory: "
+ pwd
+ echo
+
+ rm -rf generated
+ ./`basename $f`
+
+ cd -
+done
+
+echo "Done"
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/hdllib.cfg b/libraries/technology/ip_arria10_e1sg/jesd204b/hdllib.cfg
index f65bebd26358236e542192a4438a76f0cd0401a0..35a6630c98968019bd2e993aaf47081bd9c60288 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/hdllib.cfg
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/hdllib.cfg
@@ -18,16 +18,16 @@ modelsim_compile_ip_files =
[quartus_project_file]
quartus_qip_files =
- $RADIOHDL_BUILD_DIR/<buildset_name>/qsys-generate/ip_arria10_e1sg_jesd204b_rx/ip_arria10_e1sg_jesd204b_rx.qip
- $RADIOHDL_BUILD_DIR/<buildset_name>/qsys-generate/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.qip
+ $RADIOHDL_BUILD_DIR/<buildset_name>/qsys-generate/ip_arria10_e1sg_jesd204b_rx_200MHz/ip_arria10_e1sg_jesd204b_rx_200MHz.qip
+ $RADIOHDL_BUILD_DIR/<buildset_name>/qsys-generate/ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz/ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.qip
$RADIOHDL_BUILD_DIR/<buildset_name>/qsys-generate/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.qip
$RADIOHDL_BUILD_DIR/<buildset_name>/qsys-generate/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qip
$RADIOHDL_BUILD_DIR/<buildset_name>/qsys-generate/ip_arria10_e1sg_jesd204b_tx/ip_arria10_e1sg_jesd204b_tx.qip
[generate_ip_libs]
qsys-generate_ip_files =
- ip_arria10_e1sg_jesd204b_rx.ip
- ip_arria10_e1sg_jesd204b_rx_core_pll.ip
+ ip_arria10_e1sg_jesd204b_rx_200MHz.ip
+ ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.ip
ip_arria10_e1sg_jesd204b_rx_reset_seq.ip
ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip
ip_arria10_e1sg_jesd204b_tx.ip
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b.vhd b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b.vhd
index 2289cd9135b573f87772681d0644a82eb03dafe1..d57dddde374e5dcca8eaab2f35dd22a9b6b50e68 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b.vhd
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b.vhd
@@ -20,7 +20,7 @@
--
--------------------------------------------------------------------------------
-
+-- Authors : J Hargreaves, L Hiemstra
-- Purpose: Combine IP components needed to create a JESD204B interface
-- Initially supports RX_ONLY for receiving data from an ADC
-- Description
@@ -28,7 +28,6 @@
-- The sync_n signals are gated together to form g_nof_sync_n outputs
--
---LIBRARY IEEE, common_lib, dp_lib, technology_lib, ip_arria10_e1sg_jesd204b_rx, ip_arria10_e1sg_jesd204b_rx_reset_seq, ip_arria10_e1sg_jesd204b_rx_core_pll, ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12;
LIBRARY IEEE, common_lib, dp_lib, technology_lib, ip_arria10_e1sg_jesd204b_lib;
USE IEEE.STD_LOGIC_1164.ALL;
USE technology_lib.technology_pkg.ALL;
@@ -42,7 +41,8 @@ ENTITY ip_arria10_e1sg_jesd204b IS
g_sim : BOOLEAN := FALSE;
g_nof_streams : NATURAL := 1;
g_nof_sync_n : NATURAL := 1;
- g_direction : STRING := "RX_ONLY" -- "TX_RX", "TX_ONLY", "RX_ONLY"
+ g_direction : STRING := "RX_ONLY"; -- "TX_RX", "TX_ONLY", "RX_ONLY"
+ g_jesd_freq : STRING := "200MHz"
);
PORT (
-- JESD204B external signals
@@ -59,6 +59,7 @@ ENTITY ip_arria10_e1sg_jesd204b IS
-- MM Control
mm_clk : IN STD_LOGIC;
mm_rst : IN STD_LOGIC;
+ jesd204b_disable_arr : IN STD_LOGIC_VECTOR(g_nof_streams-1 DOWNTO 0);
jesd204b_mosi : IN t_mem_mosi; -- mm control
jesd204b_miso : OUT t_mem_miso;
@@ -116,6 +117,8 @@ ARCHITECTURE str OF ip_arria10_e1sg_jesd204b IS
SIGNAL jesd204b_sysref_2 : STD_LOGIC;
SIGNAL jesd204b_sysref_frameclk_1 : STD_LOGIC;
SIGNAL jesd204b_sysref_frameclk_2 : STD_LOGIC;
+ SIGNAL jesd204b_sysref_linkclk_1 : STD_LOGIC;
+ SIGNAL jesd204b_sysref_linkclk_2 : STD_LOGIC;
-- Data path
SIGNAL jesd204b_rx_link_data_arr : STD_LOGIC_VECTOR(c_jesd204b_rx_data_w*g_nof_streams-1 DOWNTO 0);
@@ -123,13 +126,14 @@ ARCHITECTURE str OF ip_arria10_e1sg_jesd204b IS
SIGNAL jesd204b_rx_somf_arr : STD_LOGIC_VECTOR(c_jesd204b_rx_somf_w*g_nof_streams-1 DOWNTO 0);
SIGNAL jesd204b_sync_n_internal_arr : STD_LOGIC_VECTOR(g_nof_streams-1 DOWNTO 0); -- output to control ADC initialization/syncronization phase
+ SIGNAL jesd204b_sync_n_enabled_arr : STD_LOGIC_VECTOR(g_nof_streams-1 DOWNTO 0); -- output to control ADC initialization/syncronization phase
SIGNAL jesd204b_sync_n_combined_arr : STD_LOGIC_VECTOR(g_nof_streams-1 DOWNTO 0); -- output to control ADC initialization/syncronization phase
-- Component declarations for the IP blocks
- component ip_arria10_e1sg_jesd204b_rx is
+ component ip_arria10_e1sg_jesd204b_rx_200MHz is
port (
alldev_lane_aligned : in std_logic := 'X'; -- export
csr_cf : out std_logic_vector(4 downto 0); -- export
@@ -178,9 +182,9 @@ ARCHITECTURE str OF ip_arria10_e1sg_jesd204b IS
somf : out std_logic_vector(c_jesd204b_rx_somf_w-1 downto 0); -- export
sysref : in std_logic := 'X' -- export
);
- end component ip_arria10_e1sg_jesd204b_rx;
+ end component ip_arria10_e1sg_jesd204b_rx_200MHz;
- component ip_arria10_e1sg_jesd204b_rx_core_pll is
+ component ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz is
port (
locked : out std_logic; -- export
outclk_0 : out std_logic; -- clk
@@ -188,7 +192,7 @@ ARCHITECTURE str OF ip_arria10_e1sg_jesd204b IS
refclk : in std_logic := 'X'; -- clk
rst : in std_logic := 'X' -- reset
);
- end component ip_arria10_e1sg_jesd204b_rx_core_pll;
+ end component ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz;
component ip_arria10_e1sg_jesd204b_rx_reset_seq is
port (
@@ -230,7 +234,8 @@ ARCHITECTURE str OF ip_arria10_e1sg_jesd204b IS
BEGIN
-
+ -- The mm_rst resets the MM interface, but is also used to reset the JESD IP reset sequencer.
+ -- Therefore a reset of mm_rst effectively resets the entire ip_arria10_e1sg_jesd204b and causes a reset on the rx_rst output.
rx_clk <= rxframe_clk;
rx_rst <= not core_pll_locked;
@@ -253,63 +258,65 @@ BEGIN
-- The JESD204 IP (rx only)
-----------------------------------------------------------------------------
- u_ip_arria10_e1sg_jesd204b_rx : ip_arria10_e1sg_jesd204b_rx
- PORT MAP
- (
- alldev_lane_aligned => dev_lane_aligned_arr(i),
- csr_cf => OPEN,
- csr_cs => OPEN,
- csr_f => OPEN,
- csr_hd => OPEN,
- csr_k => OPEN,
- csr_l => OPEN,
- csr_lane_powerdown => rx_csr_lane_powerdown_arr(i downto i),
- csr_m => OPEN,
- csr_n => OPEN,
- csr_np => OPEN,
- csr_rx_testmode => OPEN,
- csr_s => OPEN,
- dev_lane_aligned => dev_lane_aligned_arr(i),
- dev_sync_n => jesd204b_sync_n_internal_arr(i),
- jesd204_rx_avs_chipselect => '1', --jesd204b_mosi_arr(i).chipselect,
- jesd204_rx_avs_address => jesd204b_mosi_arr(i).address(c_jesd204b_mm_addr_w-1 downto 0),
- jesd204_rx_avs_read => jesd204b_mosi_arr(i).rd,
- jesd204_rx_avs_readdata => jesd204b_miso_arr(i).rddata(31 downto 0),
- jesd204_rx_avs_waitrequest => jesd204b_miso_arr(i).waitrequest,
- jesd204_rx_avs_write => jesd204b_mosi_arr(i).wr,
- jesd204_rx_avs_writedata => jesd204b_mosi_arr(i).wrdata(31 downto 0),
- jesd204_rx_avs_clk => jesd204b_avs_clk, --mm_clk,
- jesd204_rx_avs_rst_n => rx_avs_rst_n_arr(i), -- Todo: Check if this could use mm_rst,
- jesd204_rx_dlb_data => (others => '0'), -- debug/loopback testing
- jesd204_rx_dlb_data_valid => (others => '0'), -- debug/loopback testing
- jesd204_rx_dlb_disperr => (others => '0'), -- debug/loopback testing
- jesd204_rx_dlb_errdetect => (others => '0'), -- debug/loopback testing
- jesd204_rx_dlb_kchar_data => (others => '0'), -- debug/loopback testing
- jesd204_rx_frame_error => '0', -- jesd204_rx_frame_error.export
- jesd204_rx_int => OPEN, -- Connected to status IO in example design
- jesd204_rx_link_data => jesd204b_rx_link_data_arr(i*c_jesd204b_rx_data_w+c_jesd204b_rx_data_w-1 DOWNTO i*c_jesd204b_rx_data_w),
- jesd204_rx_link_valid => jesd204b_rx_link_valid_arr(i),
- jesd204_rx_link_ready => '1',
- pll_ref_clk => jesd204b_refclk, -- Aka device_clock, same as reference for the link/frame clock IOPLL (Intel JESD204B-UG p63)
- rx_analogreset => rx_analogreset_arr(I DOWNTO I),
- rx_cal_busy => rx_cal_busy_arr(I DOWNTO I),
- rx_digitalreset => rx_digitalreset_arr(I DOWNTO I),
- rx_islockedtodata => rx_islockedtodata_arr(I DOWNTO I),
- rx_serial_data => serial_rx_arr(i downto i),
- rxlink_clk => rxlink_clk, -- TODO: still not clear if this should be 100MHz or 200MHz (Intel JESD204B-UG p63)
- rxlink_rst_n_reset_n => rxlink_rst_n_arr(i), -- Assoc with rxlink_clk (Intel JESD204B-UG p69)
- rxphy_clk => OPEN, -- Not used in Subclass 0 (Intel JESD204B-UG p63)
- sof => OPEN,
- somf => jesd204b_rx_somf_arr(c_jesd204b_rx_somf_w*i+c_jesd204b_rx_somf_w-1 downto c_jesd204b_rx_somf_w*i),
- sysref => jesd204b_sysref_2
- );
+ gen_jesd204b_rx_freqsel : IF g_jesd_freq = "200MHz" GENERATE
+ u_ip_arria10_e1sg_jesd204b_rx_200MHz : ip_arria10_e1sg_jesd204b_rx_200MHz
+ PORT MAP
+ (
+ alldev_lane_aligned => dev_lane_aligned_arr(i),
+ csr_cf => OPEN,
+ csr_cs => OPEN,
+ csr_f => OPEN,
+ csr_hd => OPEN,
+ csr_k => OPEN,
+ csr_l => OPEN,
+ csr_lane_powerdown => rx_csr_lane_powerdown_arr(i downto i),
+ csr_m => OPEN,
+ csr_n => OPEN,
+ csr_np => OPEN,
+ csr_rx_testmode => OPEN,
+ csr_s => OPEN,
+ dev_lane_aligned => dev_lane_aligned_arr(i),
+ dev_sync_n => jesd204b_sync_n_internal_arr(i),
+ jesd204_rx_avs_chipselect => '1',
+ jesd204_rx_avs_address => jesd204b_mosi_arr(i).address(c_jesd204b_mm_addr_w-1 downto 0),
+ jesd204_rx_avs_read => jesd204b_mosi_arr(i).rd,
+ jesd204_rx_avs_readdata => jesd204b_miso_arr(i).rddata(31 downto 0),
+ jesd204_rx_avs_waitrequest => jesd204b_miso_arr(i).waitrequest,
+ jesd204_rx_avs_write => jesd204b_mosi_arr(i).wr,
+ jesd204_rx_avs_writedata => jesd204b_mosi_arr(i).wrdata(31 downto 0),
+ jesd204_rx_avs_clk => jesd204b_avs_clk,
+ jesd204_rx_avs_rst_n => rx_avs_rst_n_arr(i),
+ jesd204_rx_dlb_data => (others => '0'), -- debug/loopback testing
+ jesd204_rx_dlb_data_valid => (others => '0'), -- debug/loopback testing
+ jesd204_rx_dlb_disperr => (others => '0'), -- debug/loopback testing
+ jesd204_rx_dlb_errdetect => (others => '0'), -- debug/loopback testing
+ jesd204_rx_dlb_kchar_data => (others => '0'), -- debug/loopback testing
+ jesd204_rx_frame_error => '0', -- jesd204_rx_frame_error.export
+ jesd204_rx_int => OPEN, -- Connected to status IO in example design
+ jesd204_rx_link_data => jesd204b_rx_link_data_arr(i*c_jesd204b_rx_data_w+c_jesd204b_rx_data_w-1 DOWNTO i*c_jesd204b_rx_data_w),
+ jesd204_rx_link_valid => jesd204b_rx_link_valid_arr(i),
+ jesd204_rx_link_ready => '1',
+ pll_ref_clk => jesd204b_refclk, -- Aka device_clock, same as reference for the link/frame clock IOPLL (Intel JESD204B-UG p63)
+ rx_analogreset => rx_analogreset_arr(I DOWNTO I),
+ rx_cal_busy => rx_cal_busy_arr(I DOWNTO I),
+ rx_digitalreset => rx_digitalreset_arr(I DOWNTO I),
+ rx_islockedtodata => rx_islockedtodata_arr(I DOWNTO I),
+ rx_serial_data => serial_rx_arr(i downto i),
+ rxlink_clk => rxlink_clk,
+ rxlink_rst_n_reset_n => rxlink_rst_n_arr(i), -- Assoc with rxlink_clk (Intel JESD204B-UG p69)
+ rxphy_clk => OPEN, -- Not used in Subclass 0 (Intel JESD204B-UG p63)
+ sof => OPEN,
+ somf => jesd204b_rx_somf_arr(c_jesd204b_rx_somf_w*i+c_jesd204b_rx_somf_w-1 downto c_jesd204b_rx_somf_w*i),
+ sysref => jesd204b_sysref_2
+ );
+ END GENERATE;
-----------------------------------------------------------------------------
-- Reset sequencer for each channel
-----------------------------------------------------------------------------
u_ip_arria10_e1sg_jesd204b_rx_reset_seq : ip_arria10_e1sg_jesd204b_rx_reset_seq
PORT MAP (
- av_address => reset_seq_mosi_arr(i).address(7 downto 0), -- in std_logic_vector(7 downto 0) := (others => '0');
+ av_address => reset_seq_mosi_arr(i).address(7 downto 0),
av_readdata => reset_seq_miso_arr(i).rddata(31 downto 0),
av_read => reset_seq_mosi_arr(i).rd,
av_writedata => reset_seq_mosi_arr(i).wrdata(31 downto 0),
@@ -322,7 +329,7 @@ BEGIN
reset5_dsrt_qual => rx_xcvr_ready_in_arr(i),
reset_in0 => mm_rst,
reset_out0 => pll_reset_arr(i), -- Use channel 0 to reset the core pll
- reset_out1 => xcvr_rst_arr(i), -- Use channel 0 to reset the transceiver reset controller
+ reset_out1 => xcvr_rst_arr(i), -- Use channel 1 to reset the transceiver reset controller
reset_out2 => open,
reset_out3 => open,
reset_out4 => open,
@@ -331,7 +338,6 @@ BEGIN
reset_out7 => rxframe_rst_arr(i)
);
- --rx_xcvr_ready_in_arr(i) <= rx_csr_lane_powerdown_arr(i) OR xcvr_rst_ctrl_rx_ready_arr(i);
rx_xcvr_ready_in_arr(i) <= '1' when rx_csr_lane_powerdown_arr(i)='1' OR xcvr_rst_ctrl_rx_ready_arr(i)='1' else '0';
-- Invert thr active-low resets
@@ -351,6 +357,7 @@ BEGIN
rx_src_out_arr(i).data(c_jesd204b_rx_framer_data_w-1 downto 0) <= (OTHERS => '0');
rx_src_out_arr(i).channel(c_jesd204b_rx_framer_somf_w-1 downto 0) <= (OTHERS => '0');
f2_div1_cnt_arr(i) <= '0';
+ rx_src_out_arr(i).valid <= '0';
ELSE
rx_src_out_arr(i).valid <= jesd204b_rx_link_valid_arr(i);
IF jesd204b_rx_link_valid_arr(i) = '0' THEN
@@ -374,6 +381,8 @@ BEGIN
-----------------------------------------------------------------------------
-- Reclock sysref and the sync_n output
+ -- See: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_jesd204b.pdf
+ -- Figure 25, page 151
-----------------------------------------------------------------------------
p_reclocksysref : PROCESS (rxlink_clk, core_pll_locked)
BEGIN
@@ -390,8 +399,9 @@ BEGIN
END IF;
END PROCESS;
+
-----------------------------------------------------------------------------
- -- Capture sysref on the frame clock for export
+ -- Move sysref from rxlink_clk to rxframe_clk
-----------------------------------------------------------------------------
p_rx_sysref : PROCESS (rxframe_clk, core_pll_locked)
BEGIN
@@ -401,8 +411,8 @@ BEGIN
rx_sysref <= '0';
ELSE
IF rising_edge(rxframe_clk) THEN
- jesd204b_sysref_frameclk_1 <= jesd204b_sysref;
- jesd204b_sysref_frameclk_2 <= jesd204b_sysref_frameclk_1;
+ jesd204b_sysref_frameclk_1 <= jesd204b_sysref_2; -- sysref from rxlink_clk domain
+ jesd204b_sysref_frameclk_2 <= jesd204b_sysref_linkclk_1;
IF jesd204b_sysref_frameclk_1 = '1' and jesd204b_sysref_frameclk_2 = '0' THEN
rx_sysref <= '1';
ELSE
@@ -414,14 +424,16 @@ BEGIN
-- IOPLL in source synchronous or normal mode. (Intel JESD204B-UG p66)
- u_ip_arria10_e1sg_jesd204b_rx_corepll : ip_arria10_e1sg_jesd204b_rx_core_pll
- PORT MAP (
- locked => core_pll_locked,
- outclk_0 => rxlink_clk,
- outclk_1 => rxframe_clk,
- refclk => jesd204b_refclk,
- rst => pll_reset_arr(0)
- );
+ gen_jesd204b_rx_corepll_freqsel : IF g_jesd_freq = "200MHz" GENERATE
+ u_ip_arria10_e1sg_jesd204b_rx_corepll_200MHz : ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz
+ PORT MAP (
+ locked => core_pll_locked,
+ outclk_0 => rxlink_clk, -- out 100 MHz
+ outclk_1 => rxframe_clk, -- out 200 MHz
+ refclk => jesd204b_refclk, -- in 200 MHz
+ rst => pll_reset_arr(0)
+ );
+ END GENERATE;
p_pll_locked_reg : PROCESS (mm_rst, mm_clk)
BEGIN
@@ -451,12 +463,22 @@ BEGIN
END GENERATE;
+ gen_enable_sync_n : FOR i IN 0 TO g_nof_streams-1 GENERATE
+ -- The sync_n_enabled output is active '0'. For disabled signal inputs the sync_n_enabled output is forced to '1', so that for the disabled (= inactive = not used)
+ -- signal inputs the sync_n_internal from the JESD IP will not pull sync_n_enabled low.
+ -- The purpose of being able to disable inactive signal inputs is that this avoids that one inactive signal input will cause all signal inputs in a group that share
+ -- the sync_n_combined to become unavailable (see gen_group_sync_n).
+
+
+ -- For disabled channels (in jesd204b_disable_arr), the SYNC_N output will not be used
+ jesd204b_sync_n_enabled_arr(i) <= jesd204b_sync_n_internal_arr(i) OR jesd204b_disable_arr(i);
+ END GENERATE;
-----------------------------------------------------------------------------
-- Group the SYNC_N outputs
-----------------------------------------------------------------------------
gen_group_sync_n : FOR i IN 0 TO g_nof_sync_n-1 GENERATE
- jesd204b_sync_n_combined_arr(i) <= vector_and(jesd204b_sync_n_internal_arr(c_nof_sync_n_per_group*i+c_nof_sync_n_per_group-1 downto c_nof_sync_n_per_group*i));
+ jesd204b_sync_n_combined_arr(i) <= vector_and(jesd204b_sync_n_enabled_arr(c_nof_sync_n_per_group*i+c_nof_sync_n_per_group-1 downto c_nof_sync_n_per_group*i));
END GENERATE;
-----------------------------------------------------------------------------
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx.ip b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx.ip
deleted file mode 100644
index adc7fbd2625d7d8f925c9d9a4526888b27e1492b..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx.ip
+++ /dev/null
@@ -1,3276 +0,0 @@
-<?xml version="1.0" ?>
-<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
- <spirit:vendor>Intel Corporation</spirit:vendor>
- <spirit:library>ip_arria10_e1sg_jesd204b_rx</spirit:library>
- <spirit:name>jesd204_0</spirit:name>
- <spirit:version>18.0</spirit:version>
- <spirit:busInterfaces>
- <spirit:busInterface>
- <spirit:name>alldev_lane_aligned</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>alldev_lane_aligned</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>csr_cf</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>csr_cf</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>csr_cs</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>csr_cs</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>csr_f</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>csr_f</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
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- <spirit:busInterface>
- <spirit:name>csr_hd</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>csr_hd</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>csr_k</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
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- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>csr_k</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
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- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
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- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>csr_l</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
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- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
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- <spirit:name>associatedReset</spirit:name>
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- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
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- </spirit:parameters>
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- <spirit:name>csr_lane_powerdown</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
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- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>csr_lane_powerdown</spirit:name>
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- </spirit:portMap>
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- <spirit:displayName>associatedClock</spirit:displayName>
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- <spirit:name>associatedReset</spirit:name>
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- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
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- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
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- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
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- <spirit:name>csr_m</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>csr_m</spirit:name>
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- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
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- <altera:altera_assignments>
- <spirit:parameters>
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- <spirit:name>ui.blockdiagram.direction</spirit:name>
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- <spirit:slave></spirit:slave>
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- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>csr_n</spirit:name>
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- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
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- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
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- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
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- </spirit:busInterface>
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- <spirit:name>csr_np</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
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- <spirit:physicalPort>
- <spirit:name>csr_np</spirit:name>
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- <spirit:parameters>
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- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>csr_rx_testmode</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>csr_rx_testmode</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>csr_s</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>csr_s</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>dev_lane_aligned</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>dev_lane_aligned</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>dev_sync_n</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>dev_sync_n</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>jesd204_rx_avs</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>chipselect</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_avs_chipselect</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>address</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_avs_address</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>read</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_avs_read</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>readdata</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_avs_readdata</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>waitrequest</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_avs_waitrequest</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>write</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_avs_write</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>writedata</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_avs_writedata</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>addressAlignment</spirit:name>
- <spirit:displayName>Slave addressing</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>addressGroup</spirit:name>
- <spirit:displayName>Address group</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>addressSpan</spirit:name>
- <spirit:displayName>Address span</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="addressSpan">1024</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>addressUnits</spirit:name>
- <spirit:displayName>Address units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="addressUnits">WORDS</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>alwaysBurstMaxBurst</spirit:name>
- <spirit:displayName>Always burst maximum burst</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">jesd204_rx_avs_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>Associated reset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset">jesd204_rx_avs_rst_n</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bitsPerSymbol</spirit:name>
- <spirit:displayName>Bits per symbol</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bridgedAddressOffset</spirit:name>
- <spirit:displayName>Bridged Address Offset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bridgesToMaster</spirit:name>
- <spirit:displayName>Bridges to master</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
- <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>burstcountUnits</spirit:name>
- <spirit:displayName>Burstcount units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="burstcountUnits">WORDS</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>constantBurstBehavior</spirit:name>
- <spirit:displayName>Constant burst behavior</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>explicitAddressSpan</spirit:name>
- <spirit:displayName>Explicit address span</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>holdTime</spirit:name>
- <spirit:displayName>Hold</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>interleaveBursts</spirit:name>
- <spirit:displayName>Interleave bursts</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>isBigEndian</spirit:name>
- <spirit:displayName>Big endian</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>isFlash</spirit:name>
- <spirit:displayName>Flash memory</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>isMemoryDevice</spirit:name>
- <spirit:displayName>Memory device</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>isNonVolatileStorage</spirit:name>
- <spirit:displayName>Non-volatile storage</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>linewrapBursts</spirit:name>
- <spirit:displayName>Linewrap bursts</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>maximumPendingReadTransactions</spirit:name>
- <spirit:displayName>Maximum pending read transactions</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>maximumPendingWriteTransactions</spirit:name>
- <spirit:displayName>Maximum pending write transactions</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>minimumReadLatency</spirit:name>
- <spirit:displayName>minimumReadLatency</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>minimumResponseLatency</spirit:name>
- <spirit:displayName>Minimum response latency</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>minimumUninterruptedRunLength</spirit:name>
- <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>printableDevice</spirit:name>
- <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>readLatency</spirit:name>
- <spirit:displayName>Read latency</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>readWaitStates</spirit:name>
- <spirit:displayName>Read wait states</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="readWaitStates">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>readWaitTime</spirit:name>
- <spirit:displayName>Read wait</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="readWaitTime">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>registerIncomingSignals</spirit:name>
- <spirit:displayName>Register incoming signals</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>registerOutgoingSignals</spirit:name>
- <spirit:displayName>Register outgoing signals</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>setupTime</spirit:name>
- <spirit:displayName>Setup</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>timingUnits</spirit:name>
- <spirit:displayName>Timing units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>transparentBridge</spirit:name>
- <spirit:displayName>Transparent bridge</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>waitrequestAllowance</spirit:name>
- <spirit:displayName>Waitrequest allowance</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>wellBehavedWaitrequest</spirit:name>
- <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>writeLatency</spirit:name>
- <spirit:displayName>Write latency</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>writeWaitStates</spirit:name>
- <spirit:displayName>Write wait states</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>writeWaitTime</spirit:name>
- <spirit:displayName>Write wait</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
- <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
- <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
- <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
- <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>jesd204_rx_avs_clk</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>clk</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_avs_clk</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>clockRate</spirit:name>
- <spirit:displayName>Clock rate</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>externallyDriven</spirit:name>
- <spirit:displayName>Externally driven</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ptfSchematicName</spirit:name>
- <spirit:displayName>PTF schematic name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>jesd204_rx_avs_rst_n</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset_n</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_avs_rst_n</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">jesd204_rx_avs_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">DEASSERT</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>jesd204_rx_dlb_data</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_dlb_data</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>jesd204_rx_dlb_data_valid</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_dlb_data_valid</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>jesd204_rx_dlb_disperr</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_dlb_disperr</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>jesd204_rx_dlb_errdetect</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_dlb_errdetect</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>jesd204_rx_dlb_kchar_data</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_dlb_kchar_data</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>jesd204_rx_frame_error</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_frame_error</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>jesd204_rx_int</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="interrupt" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>irq</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_int</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedAddressablePoint</spirit:name>
- <spirit:displayName>Associated addressable interface</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">ip_arria10_e1sg_jesd204b_rx.jesd204_rx_avs</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">jesd204_rx_avs_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>Associated reset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset">jesd204_rx_avs_rst_n</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bridgedReceiverOffset</spirit:name>
- <spirit:displayName>Bridged receiver offset</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="bridgedReceiverOffset">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bridgesToReceiver</spirit:name>
- <spirit:displayName>Bridges to receiver</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="bridgesToReceiver"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>irqScheme</spirit:name>
- <spirit:displayName>Interrupt scheme</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="irqScheme">NONE</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>jesd204_rx_link</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon_streaming" spirit:version="18.0"></spirit:busType>
- <spirit:master></spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>data</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_link_data</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>valid</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_link_valid</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>ready</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>jesd204_rx_link_ready</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">rxlink_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset">rxlink_rst_n</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>beatsPerCycle</spirit:name>
- <spirit:displayName>Beats Per Cycle</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="beatsPerCycle">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>dataBitsPerSymbol</spirit:name>
- <spirit:displayName>Data bits per symbol</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="dataBitsPerSymbol">32</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>emptyWithinPacket</spirit:name>
- <spirit:displayName>emptyWithinPacket</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="emptyWithinPacket">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>errorDescriptor</spirit:name>
- <spirit:displayName>Error descriptor</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="errorDescriptor"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>firstSymbolInHighOrderBits</spirit:name>
- <spirit:displayName>First Symbol In High-Order Bits</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="firstSymbolInHighOrderBits">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>highOrderSymbolAtMSB</spirit:name>
- <spirit:displayName>highOrderSymbolAtMSB</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="highOrderSymbolAtMSB">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>maxChannel</spirit:name>
- <spirit:displayName>Maximum channel</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="maxChannel">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>packetDescription</spirit:name>
- <spirit:displayName>Packet description </spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="packetDescription"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>readyAllowance</spirit:name>
- <spirit:displayName>Ready allowance</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="readyAllowance">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>readyLatency</spirit:name>
- <spirit:displayName>Ready latency</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="readyLatency">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>symbolsPerBeat</spirit:name>
- <spirit:displayName>Symbols per beat </spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="symbolsPerBeat">1</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>pll_ref_clk</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>clk</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>pll_ref_clk</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>clockRate</spirit:name>
- <spirit:displayName>Clock rate</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>externallyDriven</spirit:name>
- <spirit:displayName>Externally driven</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ptfSchematicName</spirit:name>
- <spirit:displayName>PTF schematic name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>rx_analogreset</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>rx_analogreset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rx_analogreset</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>rx_cal_busy</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>rx_cal_busy</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rx_cal_busy</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>rx_digitalreset</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>rx_digitalreset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rx_digitalreset</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>rx_islockedtodata</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>rx_is_lockedtodata</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rx_islockedtodata</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>rx_serial_data</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>rx_serial_data</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rx_serial_data</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>rxlink_clk</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>clk</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rxlink_clk</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>clockRate</spirit:name>
- <spirit:displayName>Clock rate</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>externallyDriven</spirit:name>
- <spirit:displayName>Externally driven</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ptfSchematicName</spirit:name>
- <spirit:displayName>PTF schematic name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>rxlink_rst_n</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset_n</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rxlink_rst_n_reset_n</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">rxlink_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
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- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>jesd204_rx_link_ready</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>pll_ref_clk</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rx_analogreset</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rx_cal_busy</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rx_digitalreset</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rx_islockedtodata</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rx_serial_data</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rxlink_clk</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rxlink_rst_n_reset_n</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rxphy_clk</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>sof</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left>0</spirit:left>
- <spirit:right>3</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>somf</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left>0</spirit:left>
- <spirit:right>3</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>sysref</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- </spirit:ports>
- </spirit:model>
- <spirit:vendorExtensions>
- <altera:entity_info>
- <spirit:vendor>Intel Corporation</spirit:vendor>
- <spirit:library>ip_arria10_e1sg_jesd204b_rx</spirit:library>
- <spirit:name>altera_jesd204</spirit:name>
- <spirit:version>18.0</spirit:version>
- </altera:entity_info>
- <altera:altera_module_parameters>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>wrapper_opt</spirit:name>
- <spirit:displayName>Jesd204b wrapper</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="wrapper_opt">base_phy</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>sdc_constraint</spirit:name>
- <spirit:displayName>Set constraint for sdc</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="sdc_constraint">1.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DEVICE_FAMILY</spirit:name>
- <spirit:displayName>Device family</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="DEVICE_FAMILY">Arria 10</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>part_trait_dp</spirit:name>
- <spirit:displayName>Device Part</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="part_trait_dp">10AX115U2F45E1SG</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DATA_PATH</spirit:name>
- <spirit:displayName>Data path</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="DATA_PATH">RX</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SUBCLASSV</spirit:name>
- <spirit:displayName>Jesd204b subclass</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="SUBCLASSV">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>lane_rate</spirit:name>
- <spirit:displayName>Data rate</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="lane_rate">4000.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PCS_CONFIG</spirit:name>
- <spirit:displayName>PCS Option</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="PCS_CONFIG">JESD_PCS_CFG1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_type</spirit:name>
- <spirit:displayName>PLL Type</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_type">CMU</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bonded_mode</spirit:name>
- <spirit:displayName>Bonding Mode </spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="bonded_mode">bonded</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>REFCLK_FREQ</spirit:name>
- <spirit:displayName>PLL/CDR Reference Clock Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="REFCLK_FREQ">200.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_analog_voltage</spirit:name>
- <spirit:displayName>VCCR_GXB and VCCT_GXB supply voltage for the Transceiver</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_analog_voltage">1_0V</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bitrev_en</spirit:name>
- <spirit:displayName>Enable Bit reversal and Byte reversal</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="bitrev_en">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_reconfig_enable</spirit:name>
- <spirit:displayName>Enable Transceiver Dynamic Reconfiguration</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="pll_reconfig_enable">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>rcfg_jtag_enable</spirit:name>
- <spirit:displayName>Enable Altera Debug Master Endpoint</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="rcfg_jtag_enable">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>rcfg_shared</spirit:name>
- <spirit:displayName>Share Reconfiguration Interface</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="rcfg_shared">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>rcfg_enable_split_interface</spirit:name>
- <spirit:displayName>Provide Separate Reconfiguration Interface for Each Channel</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="rcfg_enable_split_interface">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>set_capability_reg_enable</spirit:name>
- <spirit:displayName>Enable Capability Registers</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="set_capability_reg_enable">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>set_user_identifier</spirit:name>
- <spirit:displayName>Set user-defined IP identifier</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="set_user_identifier">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>set_csr_soft_logic_enable</spirit:name>
- <spirit:displayName>Enable Control and Status Registers</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="set_csr_soft_logic_enable">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>set_prbs_soft_logic_enable</spirit:name>
- <spirit:displayName>Enable PRBS Soft Accumulators</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="set_prbs_soft_logic_enable">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>L</spirit:name>
- <spirit:displayName>Lanes per converter device (L)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="L">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>M</spirit:name>
- <spirit:displayName>Converters per device (M)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="M">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>GUI_EN_CFG_F</spirit:name>
- <spirit:displayName>Enable manual F configuration</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="GUI_EN_CFG_F">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>GUI_CFG_F</spirit:name>
- <spirit:displayName>Octets per frame (F)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="GUI_CFG_F">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>F</spirit:name>
- <spirit:displayName>Octets per frame (F)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="F">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>N</spirit:name>
- <spirit:displayName>Converter resolution (N)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="N">14</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>N_PRIME</spirit:name>
- <spirit:displayName>Transmitted bits per sample (N')</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="N_PRIME">16</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>S</spirit:name>
- <spirit:displayName>Samples per converter per frame (S)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="S">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>K</spirit:name>
- <spirit:displayName>Frames per multiframe (K)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="K">32</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SCR</spirit:name>
- <spirit:displayName>Enable scramble (SCR)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="SCR">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CS</spirit:name>
- <spirit:displayName>Control Bits (CS)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="CS">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CF</spirit:name>
- <spirit:displayName>Control Words (CF)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="CF">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>HD</spirit:name>
- <spirit:displayName>High Density user data format (HD)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="HD">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ECC_EN</spirit:name>
- <spirit:displayName>Enable Error Code Correction (ECC_EN)</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="ECC_EN">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DLB_TEST</spirit:name>
- <spirit:displayName>Enable Digital Loop Back Test (DLB_TEST)</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="DLB_TEST">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PHADJ</spirit:name>
- <spirit:displayName>Phase adjustment request (PHADJ)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="PHADJ">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ADJCNT</spirit:name>
- <spirit:displayName>Adjustment resolution step count (ADJCNT)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ADJCNT">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ADJDIR</spirit:name>
- <spirit:displayName>Direction of adjustment (ADJDIR)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ADJDIR">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>OPTIMIZE</spirit:name>
- <spirit:displayName>CSR Programmability</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="OPTIMIZE">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DID</spirit:name>
- <spirit:displayName>Device ID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DID">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BID</spirit:name>
- <spirit:displayName>Bank ID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="BID">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LID0</spirit:name>
- <spirit:displayName>Lane0 ID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="LID0">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FCHK0</spirit:name>
- <spirit:displayName>Lane0 checksum</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="FCHK0">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LID1</spirit:name>
- <spirit:displayName>Lane1 ID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="LID1">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FCHK1</spirit:name>
- <spirit:displayName>Lane1 checksum</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="FCHK1">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LID2</spirit:name>
- <spirit:displayName>Lane2 ID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="LID2">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FCHK2</spirit:name>
- <spirit:displayName>Lane2 checksum</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="FCHK2">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LID3</spirit:name>
- <spirit:displayName>Lane3 ID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="LID3">3</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FCHK3</spirit:name>
- <spirit:displayName>Lane3 checksum</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="FCHK3">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LID4</spirit:name>
- <spirit:displayName>Lane4 ID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="LID4">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FCHK4</spirit:name>
- <spirit:displayName>Lane4 checksum</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="FCHK4">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LID5</spirit:name>
- <spirit:displayName>Lane5 ID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="LID5">5</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FCHK5</spirit:name>
- <spirit:displayName>Lane5 checksum</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="FCHK5">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LID6</spirit:name>
- <spirit:displayName>Lane6 ID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="LID6">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FCHK6</spirit:name>
- <spirit:displayName>Lane6 checksum</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="FCHK6">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LID7</spirit:name>
- <spirit:displayName>Lane7 ID</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="LID7">7</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FCHK7</spirit:name>
- <spirit:displayName>Lane7 checksum</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="FCHK7">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>d_refclk_freq</spirit:name>
- <spirit:displayName>PLL/CDR Reference Clock Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="d_refclk_freq">200.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>JESDV</spirit:name>
- <spirit:displayName>JESDV</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="JESDV">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PMA_WIDTH</spirit:name>
- <spirit:displayName>PMA_WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="PMA_WIDTH">32</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SER_SIZE</spirit:name>
- <spirit:displayName>SER_SIZE</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="SER_SIZE">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>FK</spirit:name>
- <spirit:displayName>FK</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="FK">64</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RES1</spirit:name>
- <spirit:displayName>RES1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="RES1">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RES2</spirit:name>
- <spirit:displayName>RES2</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="RES2">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BIT_REVERSAL</spirit:name>
- <spirit:displayName>BIT_REVERSAL</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="BIT_REVERSAL">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>BYTE_REVERSAL</spirit:name>
- <spirit:displayName>BYTE_REVERSAL</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="BYTE_REVERSAL">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ALIGNMENT_PATTERN</spirit:name>
- <spirit:displayName>ALIGNMENT_PATTERN</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ALIGNMENT_PATTERN">658812</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PULSE_WIDTH</spirit:name>
- <spirit:displayName>PULSE_WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="PULSE_WIDTH">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LS_FIFO_DEPTH</spirit:name>
- <spirit:displayName>LS_FIFO_DEPTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="LS_FIFO_DEPTH">32</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LS_FIFO_WIDTHU</spirit:name>
- <spirit:displayName>LS_FIFO_WIDTHU</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="LS_FIFO_WIDTHU">5</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>UNUSED_TX_PARALLEL_WIDTH</spirit:name>
- <spirit:displayName>UNUSED_TX_PARALLEL_WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="UNUSED_TX_PARALLEL_WIDTH">92</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>UNUSED_RX_PARALLEL_WIDTH</spirit:name>
- <spirit:displayName>UNUSED_RX_PARALLEL_WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="UNUSED_RX_PARALLEL_WIDTH">72</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>XCVR_PLL_LOCKED_WIDTH</spirit:name>
- <spirit:displayName>XCVR_PLL_LOCKED_WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="XCVR_PLL_LOCKED_WIDTH">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RECONFIG_ADDRESS_WIDTH</spirit:name>
- <spirit:displayName>RECONFIG_ADDRESS_WIDTH</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="RECONFIG_ADDRESS_WIDTH">10</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DEPTH_PIPE</spirit:name>
- <spirit:displayName>Pipeline stages for link_clk domain reset signal</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DEPTH_PIPE">3</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>xcvr_ip</spirit:name>
- <spirit:displayName>xcvr_ip</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="xcvr_ip">ltile</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>die_types</spirit:name>
- <spirit:displayName>die_types</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="die_types"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>die_revisions</spirit:name>
- <spirit:displayName>die_revisions</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="die_revisions"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>support_c1</spirit:name>
- <spirit:displayName>support_c1</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="support_c1">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>support_c2</spirit:name>
- <spirit:displayName>support_c2</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="support_c2">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>support_c3</spirit:name>
- <spirit:displayName>support_c3</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="support_c3">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>crete_tile_status</spirit:name>
- <spirit:displayName>Transceiver Tile</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="crete_tile_status">ltile</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_user_crete_tile</spirit:name>
- <spirit:displayName>Transceiver Tile</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_user_crete_tile">etile</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TEST_COMPONENTS_EN</spirit:name>
- <spirit:displayName>Add Test Components</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="TEST_COMPONENTS_EN">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TERMINATE_RECONFIG_EN</spirit:name>
- <spirit:displayName>Terminate Reconfig Signals</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="TERMINATE_RECONFIG_EN">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ED_TYPE</spirit:name>
- <spirit:displayName>Select Design</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ED_TYPE">NONE</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ED_FILESET_SIM</spirit:name>
- <spirit:displayName>Simulation</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="ED_FILESET_SIM">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ED_FILESET_SYNTH</spirit:name>
- <spirit:displayName>Synthesis</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="ED_FILESET_SYNTH">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ED_HDL_FORMAT_SIM</spirit:name>
- <spirit:displayName>HDL Format</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ED_HDL_FORMAT_SIM">VERILOG</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ED_SIM_PAT_TESTMODE</spirit:name>
- <spirit:displayName>Test pattern</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ED_SIM_PAT_TESTMODE">PRBS_7</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ED_HDL_FORMAT_SYNTH</spirit:name>
- <spirit:displayName>HDL Format</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ED_HDL_FORMAT_SYNTH">VERILOG</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ED_DEV_KIT</spirit:name>
- <spirit:displayName>Select Board</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ED_DEV_KIT">NONE</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>GUI_ED_DEV_KIT</spirit:name>
- <spirit:displayName>Select Board</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="GUI_ED_DEV_KIT">None</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ED_SINGLE_REFCLK</spirit:name>
- <spirit:displayName>Single reference clock (Advanced users only. Not recommended.)</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="ED_SINGLE_REFCLK">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ED_3WIRE_SPI</spirit:name>
- <spirit:displayName>Generate 3-wire SPI module</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="ED_3WIRE_SPI">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SELECT_CUSTOM_DEVICE</spirit:name>
- <spirit:displayName>Change Target Device</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="SELECT_CUSTOM_DEVICE">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>AUTO_DEVICE</spirit:name>
- <spirit:displayName>Auto DEVICE</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="AUTO_DEVICE">10AX115U2F45E1SG</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>AUTO_DEVICE_SPEEDGRADE</spirit:name>
- <spirit:displayName>Auto DEVICE_SPEEDGRADE</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="AUTO_DEVICE_SPEEDGRADE">1</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_module_parameters>
- <altera:altera_system_parameters>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>device</spirit:name>
- <spirit:displayName>Device</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>deviceFamily</spirit:name>
- <spirit:displayName>Device family</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>deviceSpeedGrade</spirit:name>
- <spirit:displayName>Device Speed Grade</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>generationId</spirit:name>
- <spirit:displayName>Generation Id</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bonusData</spirit:name>
- <spirit:displayName>bonusData</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="bonusData">bonusData
-{
- element jesd204_0
- {
- datum _sortIndex
- {
- value = "0";
- type = "int";
- }
- }
-}
-</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hideFromIPCatalog</spirit:name>
- <spirit:displayName>Hide from IP Catalog</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>lockedInterfaceDefinition</spirit:name>
- <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>systemInfos</spirit:name>
- <spirit:displayName>systemInfos</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
- <connPtSystemInfos>
- <entry>
- <key>jesd204_rx_avs</key>
- <value>
- <connectionPointName>jesd204_rx_avs</connectionPointName>
- <suppliedSystemInfos/>
- <consumedSystemInfos>
- <entry>
- <key>ADDRESS_MAP</key>
- <value><address-map><slave name='jesd204_rx_avs' start='0x0' end='0x400' datawidth='32' /></address-map></value>
- </entry>
- <entry>
- <key>ADDRESS_WIDTH</key>
- <value>10</value>
- </entry>
- <entry>
- <key>MAX_SLAVE_DATA_WIDTH</key>
- <value>32</value>
- </entry>
- </consumedSystemInfos>
- </value>
- </entry>
- </connPtSystemInfos>
-</systemInfosDefinition>]]></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_system_parameters>
- <altera:altera_interface_boundary>
- <altera:interface_mapping altera:name="alldev_lane_aligned" altera:internal="jesd204_0.alldev_lane_aligned" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="alldev_lane_aligned" altera:internal="alldev_lane_aligned"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_cf" altera:internal="jesd204_0.csr_cf" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="csr_cf" altera:internal="csr_cf"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_cs" altera:internal="jesd204_0.csr_cs" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="csr_cs" altera:internal="csr_cs"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_f" altera:internal="jesd204_0.csr_f" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="csr_f" altera:internal="csr_f"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_hd" altera:internal="jesd204_0.csr_hd" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="csr_hd" altera:internal="csr_hd"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_k" altera:internal="jesd204_0.csr_k" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="csr_k" altera:internal="csr_k"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_l" altera:internal="jesd204_0.csr_l" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="csr_l" altera:internal="csr_l"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_lane_powerdown" altera:internal="jesd204_0.csr_lane_powerdown" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="csr_lane_powerdown" altera:internal="csr_lane_powerdown"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_m" altera:internal="jesd204_0.csr_m" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="csr_m" altera:internal="csr_m"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_n" altera:internal="jesd204_0.csr_n" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="csr_n" altera:internal="csr_n"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_np" altera:internal="jesd204_0.csr_np" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="csr_np" altera:internal="csr_np"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_rx_testmode" altera:internal="jesd204_0.csr_rx_testmode" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="csr_rx_testmode" altera:internal="csr_rx_testmode"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_s" altera:internal="jesd204_0.csr_s" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="csr_s" altera:internal="csr_s"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_tx_testmode" altera:internal="jesd204_0.csr_tx_testmode"></altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_tx_testpattern_a" altera:internal="jesd204_0.csr_tx_testpattern_a"></altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_tx_testpattern_b" altera:internal="jesd204_0.csr_tx_testpattern_b"></altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_tx_testpattern_c" altera:internal="jesd204_0.csr_tx_testpattern_c"></altera:interface_mapping>
- <altera:interface_mapping altera:name="csr_tx_testpattern_d" altera:internal="jesd204_0.csr_tx_testpattern_d"></altera:interface_mapping>
- <altera:interface_mapping altera:name="dev_lane_aligned" altera:internal="jesd204_0.dev_lane_aligned" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="dev_lane_aligned" altera:internal="dev_lane_aligned"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="dev_sync_n" altera:internal="jesd204_0.dev_sync_n" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="dev_sync_n" altera:internal="dev_sync_n"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_rx_avs" altera:internal="jesd204_0.jesd204_rx_avs" altera:type="avalon" altera:dir="end">
- <altera:port_mapping altera:name="jesd204_rx_avs_address" altera:internal="jesd204_rx_avs_address"></altera:port_mapping>
- <altera:port_mapping altera:name="jesd204_rx_avs_chipselect" altera:internal="jesd204_rx_avs_chipselect"></altera:port_mapping>
- <altera:port_mapping altera:name="jesd204_rx_avs_read" altera:internal="jesd204_rx_avs_read"></altera:port_mapping>
- <altera:port_mapping altera:name="jesd204_rx_avs_readdata" altera:internal="jesd204_rx_avs_readdata"></altera:port_mapping>
- <altera:port_mapping altera:name="jesd204_rx_avs_waitrequest" altera:internal="jesd204_rx_avs_waitrequest"></altera:port_mapping>
- <altera:port_mapping altera:name="jesd204_rx_avs_write" altera:internal="jesd204_rx_avs_write"></altera:port_mapping>
- <altera:port_mapping altera:name="jesd204_rx_avs_writedata" altera:internal="jesd204_rx_avs_writedata"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_rx_avs_clk" altera:internal="jesd204_0.jesd204_rx_avs_clk" altera:type="clock" altera:dir="end">
- <altera:port_mapping altera:name="jesd204_rx_avs_clk" altera:internal="jesd204_rx_avs_clk"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_rx_avs_rst_n" altera:internal="jesd204_0.jesd204_rx_avs_rst_n" altera:type="reset" altera:dir="end">
- <altera:port_mapping altera:name="jesd204_rx_avs_rst_n" altera:internal="jesd204_rx_avs_rst_n"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_rx_dlb_data" altera:internal="jesd204_0.jesd204_rx_dlb_data" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="jesd204_rx_dlb_data" altera:internal="jesd204_rx_dlb_data"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_rx_dlb_data_valid" altera:internal="jesd204_0.jesd204_rx_dlb_data_valid" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="jesd204_rx_dlb_data_valid" altera:internal="jesd204_rx_dlb_data_valid"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_rx_dlb_disperr" altera:internal="jesd204_0.jesd204_rx_dlb_disperr" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="jesd204_rx_dlb_disperr" altera:internal="jesd204_rx_dlb_disperr"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_rx_dlb_errdetect" altera:internal="jesd204_0.jesd204_rx_dlb_errdetect" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="jesd204_rx_dlb_errdetect" altera:internal="jesd204_rx_dlb_errdetect"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_rx_dlb_kchar_data" altera:internal="jesd204_0.jesd204_rx_dlb_kchar_data" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="jesd204_rx_dlb_kchar_data" altera:internal="jesd204_rx_dlb_kchar_data"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_rx_frame_error" altera:internal="jesd204_0.jesd204_rx_frame_error" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="jesd204_rx_frame_error" altera:internal="jesd204_rx_frame_error"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_rx_int" altera:internal="jesd204_0.jesd204_rx_int" altera:type="interrupt" altera:dir="end">
- <altera:port_mapping altera:name="jesd204_rx_int" altera:internal="jesd204_rx_int"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_rx_link" altera:internal="jesd204_0.jesd204_rx_link" altera:type="avalon_streaming" altera:dir="start">
- <altera:port_mapping altera:name="jesd204_rx_link_data" altera:internal="jesd204_rx_link_data"></altera:port_mapping>
- <altera:port_mapping altera:name="jesd204_rx_link_ready" altera:internal="jesd204_rx_link_ready"></altera:port_mapping>
- <altera:port_mapping altera:name="jesd204_rx_link_valid" altera:internal="jesd204_rx_link_valid"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_tx_avs" altera:internal="jesd204_0.jesd204_tx_avs"></altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_tx_avs_clk" altera:internal="jesd204_0.jesd204_tx_avs_clk"></altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_tx_avs_rst_n" altera:internal="jesd204_0.jesd204_tx_avs_rst_n"></altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_tx_dlb_data" altera:internal="jesd204_0.jesd204_tx_dlb_data"></altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_tx_dlb_kchar_data" altera:internal="jesd204_0.jesd204_tx_dlb_kchar_data"></altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_tx_frame_error" altera:internal="jesd204_0.jesd204_tx_frame_error"></altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_tx_frame_ready" altera:internal="jesd204_0.jesd204_tx_frame_ready"></altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_tx_int" altera:internal="jesd204_0.jesd204_tx_int"></altera:interface_mapping>
- <altera:interface_mapping altera:name="jesd204_tx_link" altera:internal="jesd204_0.jesd204_tx_link"></altera:interface_mapping>
- <altera:interface_mapping altera:name="mdev_sync_n" altera:internal="jesd204_0.mdev_sync_n"></altera:interface_mapping>
- <altera:interface_mapping altera:name="pll_locked" altera:internal="jesd204_0.pll_locked"></altera:interface_mapping>
- <altera:interface_mapping altera:name="pll_ref_clk" altera:internal="jesd204_0.pll_ref_clk" altera:type="clock" altera:dir="end">
- <altera:port_mapping altera:name="pll_ref_clk" altera:internal="pll_ref_clk"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_analogreset" altera:internal="jesd204_0.rx_analogreset" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="rx_analogreset" altera:internal="rx_analogreset"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_cal_busy" altera:internal="jesd204_0.rx_cal_busy" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="rx_cal_busy" altera:internal="rx_cal_busy"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_csr_cf" altera:internal="jesd204_0.rx_csr_cf"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_csr_cs" altera:internal="jesd204_0.rx_csr_cs"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_csr_f" altera:internal="jesd204_0.rx_csr_f"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_csr_hd" altera:internal="jesd204_0.rx_csr_hd"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_csr_k" altera:internal="jesd204_0.rx_csr_k"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_csr_l" altera:internal="jesd204_0.rx_csr_l"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_csr_lane_powerdown" altera:internal="jesd204_0.rx_csr_lane_powerdown"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_csr_m" altera:internal="jesd204_0.rx_csr_m"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_csr_n" altera:internal="jesd204_0.rx_csr_n"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_csr_np" altera:internal="jesd204_0.rx_csr_np"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_csr_s" altera:internal="jesd204_0.rx_csr_s"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_dev_sync_n" altera:internal="jesd204_0.rx_dev_sync_n"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_digitalreset" altera:internal="jesd204_0.rx_digitalreset" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="rx_digitalreset" altera:internal="rx_digitalreset"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_islockedtodata" altera:internal="jesd204_0.rx_islockedtodata" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="rx_islockedtodata" altera:internal="rx_islockedtodata"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_pll_ref_clk" altera:internal="jesd204_0.rx_pll_ref_clk"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_serial_data" altera:internal="jesd204_0.rx_serial_data" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="rx_serial_data" altera:internal="rx_serial_data"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_seriallpbken" altera:internal="jesd204_0.rx_seriallpbken"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_sof" altera:internal="jesd204_0.rx_sof"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_somf" altera:internal="jesd204_0.rx_somf"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rx_sysref" altera:internal="jesd204_0.rx_sysref"></altera:interface_mapping>
- <altera:interface_mapping altera:name="rxlink_clk" altera:internal="jesd204_0.rxlink_clk" altera:type="clock" altera:dir="end">
- <altera:port_mapping altera:name="rxlink_clk" altera:internal="rxlink_clk"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="rxlink_rst_n" altera:internal="jesd204_0.rxlink_rst_n" altera:type="reset" altera:dir="end">
- <altera:port_mapping altera:name="rxlink_rst_n_reset_n" altera:internal="rxlink_rst_n_reset_n"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="rxphy_clk" altera:internal="jesd204_0.rxphy_clk" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="rxphy_clk" altera:internal="rxphy_clk"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="sof" altera:internal="jesd204_0.sof" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="sof" altera:internal="sof"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="somf" altera:internal="jesd204_0.somf" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="somf" altera:internal="somf"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="sync_n" altera:internal="jesd204_0.sync_n"></altera:interface_mapping>
- <altera:interface_mapping altera:name="sysref" altera:internal="jesd204_0.sysref" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="sysref" altera:internal="sysref"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_analogreset" altera:internal="jesd204_0.tx_analogreset"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_bonding_clocks_ch0" altera:internal="jesd204_0.tx_bonding_clocks_ch0"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_bonding_clocks_ch1" altera:internal="jesd204_0.tx_bonding_clocks_ch1"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_cal_busy" altera:internal="jesd204_0.tx_cal_busy"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_csr_cf" altera:internal="jesd204_0.tx_csr_cf"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_csr_cs" altera:internal="jesd204_0.tx_csr_cs"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_csr_f" altera:internal="jesd204_0.tx_csr_f"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_csr_hd" altera:internal="jesd204_0.tx_csr_hd"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_csr_k" altera:internal="jesd204_0.tx_csr_k"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_csr_l" altera:internal="jesd204_0.tx_csr_l"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_csr_lane_powerdown" altera:internal="jesd204_0.tx_csr_lane_powerdown"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_csr_m" altera:internal="jesd204_0.tx_csr_m"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_csr_n" altera:internal="jesd204_0.tx_csr_n"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_csr_np" altera:internal="jesd204_0.tx_csr_np"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_csr_s" altera:internal="jesd204_0.tx_csr_s"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_dev_sync_n" altera:internal="jesd204_0.tx_dev_sync_n"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_digitalreset" altera:internal="jesd204_0.tx_digitalreset"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_serial_data" altera:internal="jesd204_0.tx_serial_data"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_somf" altera:internal="jesd204_0.tx_somf"></altera:interface_mapping>
- <altera:interface_mapping altera:name="tx_sysref" altera:internal="jesd204_0.tx_sysref"></altera:interface_mapping>
- <altera:interface_mapping altera:name="txlink_clk" altera:internal="jesd204_0.txlink_clk"></altera:interface_mapping>
- <altera:interface_mapping altera:name="txlink_rst_n" altera:internal="jesd204_0.txlink_rst_n"></altera:interface_mapping>
- <altera:interface_mapping altera:name="txphy_clk" altera:internal="jesd204_0.txphy_clk"></altera:interface_mapping>
- </altera:altera_interface_boundary>
- <altera:altera_has_warnings>false</altera:altera_has_warnings>
- <altera:altera_has_errors>false</altera:altera_has_errors>
- </spirit:vendorExtensions>
-</spirit:component>
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz.ip b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz.ip
new file mode 100644
index 0000000000000000000000000000000000000000..02bb23216d2903b6d91eb451973df594b7f0f8fd
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz.ip
@@ -0,0 +1,5732 @@
+<?xml version="1.0" ?>
+<ipxact:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact2014/extensions" xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014">
+ <ipxact:vendor>Intel Corporation</ipxact:vendor>
+ <ipxact:library>ip_arria10_e1sg_jesd204b_rx</ipxact:library>
+ <ipxact:name>jesd204_0</ipxact:name>
+ <ipxact:version>19.2.0</ipxact:version>
+ <ipxact:busInterfaces>
+ <ipxact:busInterface>
+ <ipxact:name>rxlink_clk</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="clock" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="clock" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>clk</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rxlink_clk</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="clockRate" type="longint">
+ <ipxact:name>clockRate</ipxact:name>
+ <ipxact:displayName>Clock rate</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="externallyDriven" type="bit">
+ <ipxact:name>externallyDriven</ipxact:name>
+ <ipxact:displayName>Externally driven</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ptfSchematicName" type="string">
+ <ipxact:name>ptfSchematicName</ipxact:name>
+ <ipxact:displayName>PTF schematic name</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rxlink_rst_n</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset_n</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rxlink_rst_n_reset_n</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>rxlink_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>DEASSERT</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_avs_clk</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="clock" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="clock" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>clk</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_clk</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="clockRate" type="longint">
+ <ipxact:name>clockRate</ipxact:name>
+ <ipxact:displayName>Clock rate</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="externallyDriven" type="bit">
+ <ipxact:name>externallyDriven</ipxact:name>
+ <ipxact:displayName>Externally driven</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ptfSchematicName" type="string">
+ <ipxact:name>ptfSchematicName</ipxact:name>
+ <ipxact:displayName>PTF schematic name</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_avs_rst_n</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset_n</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_rst_n</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>jesd204_rx_avs_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>DEASSERT</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_avs</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="avalon" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="avalon" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>chipselect</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_chipselect</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>address</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_address</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>read</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_read</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>readdata</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_readdata</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>waitrequest</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_waitrequest</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>write</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_write</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>writedata</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_writedata</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="addressAlignment" type="string">
+ <ipxact:name>addressAlignment</ipxact:name>
+ <ipxact:displayName>Slave addressing</ipxact:displayName>
+ <ipxact:value>DYNAMIC</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="addressGroup" type="int">
+ <ipxact:name>addressGroup</ipxact:name>
+ <ipxact:displayName>Address group</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="addressSpan" type="string">
+ <ipxact:name>addressSpan</ipxact:name>
+ <ipxact:displayName>Address span</ipxact:displayName>
+ <ipxact:value>1024</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="addressUnits" type="string">
+ <ipxact:name>addressUnits</ipxact:name>
+ <ipxact:displayName>Address units</ipxact:displayName>
+ <ipxact:value>WORDS</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="alwaysBurstMaxBurst" type="bit">
+ <ipxact:name>alwaysBurstMaxBurst</ipxact:name>
+ <ipxact:displayName>Always burst maximum burst</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>jesd204_rx_avs_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>Associated reset</ipxact:displayName>
+ <ipxact:value>jesd204_rx_avs_rst_n</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bitsPerSymbol" type="int">
+ <ipxact:name>bitsPerSymbol</ipxact:name>
+ <ipxact:displayName>Bits per symbol</ipxact:displayName>
+ <ipxact:value>8</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bridgedAddressOffset" type="string">
+ <ipxact:name>bridgedAddressOffset</ipxact:name>
+ <ipxact:displayName>Bridged Address Offset</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bridgesToMaster" type="string">
+ <ipxact:name>bridgesToMaster</ipxact:name>
+ <ipxact:displayName>Bridges to master</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="burstOnBurstBoundariesOnly" type="bit">
+ <ipxact:name>burstOnBurstBoundariesOnly</ipxact:name>
+ <ipxact:displayName>Burst on burst boundaries only</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="burstcountUnits" type="string">
+ <ipxact:name>burstcountUnits</ipxact:name>
+ <ipxact:displayName>Burstcount units</ipxact:displayName>
+ <ipxact:value>WORDS</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="constantBurstBehavior" type="bit">
+ <ipxact:name>constantBurstBehavior</ipxact:name>
+ <ipxact:displayName>Constant burst behavior</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="explicitAddressSpan" type="string">
+ <ipxact:name>explicitAddressSpan</ipxact:name>
+ <ipxact:displayName>Explicit address span</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="holdTime" type="int">
+ <ipxact:name>holdTime</ipxact:name>
+ <ipxact:displayName>Hold</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="interleaveBursts" type="bit">
+ <ipxact:name>interleaveBursts</ipxact:name>
+ <ipxact:displayName>Interleave bursts</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="isBigEndian" type="bit">
+ <ipxact:name>isBigEndian</ipxact:name>
+ <ipxact:displayName>Big endian</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="isFlash" type="bit">
+ <ipxact:name>isFlash</ipxact:name>
+ <ipxact:displayName>Flash memory</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="isMemoryDevice" type="bit">
+ <ipxact:name>isMemoryDevice</ipxact:name>
+ <ipxact:displayName>Memory device</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="isNonVolatileStorage" type="bit">
+ <ipxact:name>isNonVolatileStorage</ipxact:name>
+ <ipxact:displayName>Non-volatile storage</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="linewrapBursts" type="bit">
+ <ipxact:name>linewrapBursts</ipxact:name>
+ <ipxact:displayName>Linewrap bursts</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="maximumPendingReadTransactions" type="int">
+ <ipxact:name>maximumPendingReadTransactions</ipxact:name>
+ <ipxact:displayName>Maximum pending read transactions</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="maximumPendingWriteTransactions" type="int">
+ <ipxact:name>maximumPendingWriteTransactions</ipxact:name>
+ <ipxact:displayName>Maximum pending write transactions</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="minimumReadLatency" type="int">
+ <ipxact:name>minimumReadLatency</ipxact:name>
+ <ipxact:displayName>minimumReadLatency</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="minimumResponseLatency" type="int">
+ <ipxact:name>minimumResponseLatency</ipxact:name>
+ <ipxact:displayName>Minimum response latency</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="minimumUninterruptedRunLength" type="int">
+ <ipxact:name>minimumUninterruptedRunLength</ipxact:name>
+ <ipxact:displayName>Minimum uninterrupted run length</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="printableDevice" type="bit">
+ <ipxact:name>printableDevice</ipxact:name>
+ <ipxact:displayName>Can receive stdout/stderr</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readLatency" type="int">
+ <ipxact:name>readLatency</ipxact:name>
+ <ipxact:displayName>Read latency</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readWaitStates" type="int">
+ <ipxact:name>readWaitStates</ipxact:name>
+ <ipxact:displayName>Read wait states</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readWaitTime" type="int">
+ <ipxact:name>readWaitTime</ipxact:name>
+ <ipxact:displayName>Read wait</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="registerIncomingSignals" type="bit">
+ <ipxact:name>registerIncomingSignals</ipxact:name>
+ <ipxact:displayName>Register incoming signals</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="registerOutgoingSignals" type="bit">
+ <ipxact:name>registerOutgoingSignals</ipxact:name>
+ <ipxact:displayName>Register outgoing signals</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="setupTime" type="int">
+ <ipxact:name>setupTime</ipxact:name>
+ <ipxact:displayName>Setup</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="timingUnits" type="string">
+ <ipxact:name>timingUnits</ipxact:name>
+ <ipxact:displayName>Timing units</ipxact:displayName>
+ <ipxact:value>Cycles</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="transparentBridge" type="bit">
+ <ipxact:name>transparentBridge</ipxact:name>
+ <ipxact:displayName>Transparent bridge</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="waitrequestAllowance" type="int">
+ <ipxact:name>waitrequestAllowance</ipxact:name>
+ <ipxact:displayName>Waitrequest allowance</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="wellBehavedWaitrequest" type="bit">
+ <ipxact:name>wellBehavedWaitrequest</ipxact:name>
+ <ipxact:displayName>Well-behaved waitrequest</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="writeLatency" type="int">
+ <ipxact:name>writeLatency</ipxact:name>
+ <ipxact:displayName>Write latency</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="writeWaitStates" type="int">
+ <ipxact:name>writeWaitStates</ipxact:name>
+ <ipxact:displayName>Write wait states</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="writeWaitTime" type="int">
+ <ipxact:name>writeWaitTime</ipxact:name>
+ <ipxact:displayName>Write wait</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="embeddedsw.configuration.isFlash" type="string">
+ <ipxact:name>embeddedsw.configuration.isFlash</ipxact:name>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="embeddedsw.configuration.isMemoryDevice" type="string">
+ <ipxact:name>embeddedsw.configuration.isMemoryDevice</ipxact:name>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="embeddedsw.configuration.isNonVolatileStorage" type="string">
+ <ipxact:name>embeddedsw.configuration.isNonVolatileStorage</ipxact:name>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="embeddedsw.configuration.isPrintableDevice" type="string">
+ <ipxact:name>embeddedsw.configuration.isPrintableDevice</ipxact:name>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_link</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="avalon_streaming" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="avalon_streaming" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>data</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_link_data</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>valid</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_link_valid</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>ready</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_link_ready</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:master></ipxact:master>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value>rxlink_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value>rxlink_rst_n</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="beatsPerCycle" type="int">
+ <ipxact:name>beatsPerCycle</ipxact:name>
+ <ipxact:displayName>Beats Per Cycle</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="dataBitsPerSymbol" type="int">
+ <ipxact:name>dataBitsPerSymbol</ipxact:name>
+ <ipxact:displayName>Data bits per symbol</ipxact:displayName>
+ <ipxact:value>32</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="emptyWithinPacket" type="bit">
+ <ipxact:name>emptyWithinPacket</ipxact:name>
+ <ipxact:displayName>emptyWithinPacket</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="errorDescriptor" type="string">
+ <ipxact:name>errorDescriptor</ipxact:name>
+ <ipxact:displayName>Error descriptor</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="firstSymbolInHighOrderBits" type="bit">
+ <ipxact:name>firstSymbolInHighOrderBits</ipxact:name>
+ <ipxact:displayName>First Symbol In High-Order Bits</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="highOrderSymbolAtMSB" type="bit">
+ <ipxact:name>highOrderSymbolAtMSB</ipxact:name>
+ <ipxact:displayName>highOrderSymbolAtMSB</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="maxChannel" type="int">
+ <ipxact:name>maxChannel</ipxact:name>
+ <ipxact:displayName>Maximum channel</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="packetDescription" type="string">
+ <ipxact:name>packetDescription</ipxact:name>
+ <ipxact:displayName>Packet description </ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readyAllowance" type="int">
+ <ipxact:name>readyAllowance</ipxact:name>
+ <ipxact:displayName>Ready allowance</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readyLatency" type="int">
+ <ipxact:name>readyLatency</ipxact:name>
+ <ipxact:displayName>Ready latency</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="symbolsPerBeat" type="int">
+ <ipxact:name>symbolsPerBeat</ipxact:name>
+ <ipxact:displayName>Symbols per beat </ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>sof</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>sof</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>somf</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>somf</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>alldev_lane_aligned</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>alldev_lane_aligned</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>dev_lane_aligned</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>dev_lane_aligned</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>dev_sync_n</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>dev_sync_n</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>sysref</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>sysref</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_int</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="interrupt" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="interrupt" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>irq</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_int</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedAddressablePoint" type="string">
+ <ipxact:name>associatedAddressablePoint</ipxact:name>
+ <ipxact:displayName>Associated addressable interface</ipxact:displayName>
+ <ipxact:value>ip_arria10_e1sg_jesd204b_rx.jesd204_rx_avs</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>jesd204_rx_avs_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>Associated reset</ipxact:displayName>
+ <ipxact:value>jesd204_rx_avs_rst_n</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bridgedReceiverOffset" type="longint">
+ <ipxact:name>bridgedReceiverOffset</ipxact:name>
+ <ipxact:displayName>Bridged receiver offset</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bridgesToReceiver" type="string">
+ <ipxact:name>bridgesToReceiver</ipxact:name>
+ <ipxact:displayName>Bridges to receiver</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="irqScheme" type="string">
+ <ipxact:name>irqScheme</ipxact:name>
+ <ipxact:displayName>Interrupt scheme</ipxact:displayName>
+ <ipxact:value>NONE</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_rx_testmode</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_rx_testmode</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_f</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_f</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_k</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_k</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_l</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_l</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_m</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_m</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_n</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_n</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_s</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_s</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_cf</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_cf</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_cs</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_cs</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_hd</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_hd</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_np</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_np</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_lane_powerdown</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_lane_powerdown</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_frame_error</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_frame_error</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_dlb_data</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_dlb_data</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_dlb_data_valid</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_dlb_data_valid</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_dlb_kchar_data</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_dlb_kchar_data</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_dlb_errdetect</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_dlb_errdetect</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_dlb_disperr</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_dlb_disperr</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>pll_ref_clk</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="clock" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="clock" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>clk</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>pll_ref_clk</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="clockRate" type="longint">
+ <ipxact:name>clockRate</ipxact:name>
+ <ipxact:displayName>Clock rate</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="externallyDriven" type="bit">
+ <ipxact:name>externallyDriven</ipxact:name>
+ <ipxact:displayName>Externally driven</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ptfSchematicName" type="string">
+ <ipxact:name>ptfSchematicName</ipxact:name>
+ <ipxact:displayName>PTF schematic name</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rxphy_clk</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rxphy_clk</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_islockedtodata</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_is_lockedtodata</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_islockedtodata</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_cal_busy</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_cal_busy</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_cal_busy</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_analogreset</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_analogreset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_analogreset</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_digitalreset</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_digitalreset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_digitalreset</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_serial_data</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_serial_data</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_serial_data</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ </ipxact:busInterfaces>
+ <ipxact:model>
+ <ipxact:views>
+ <ipxact:view>
+ <ipxact:name>QUARTUS_SYNTH</ipxact:name>
+ <ipxact:envIdentifier>:quartus.altera.com:</ipxact:envIdentifier>
+ <ipxact:componentInstantiationRef>QUARTUS_SYNTH</ipxact:componentInstantiationRef>
+ </ipxact:view>
+ </ipxact:views>
+ <ipxact:instantiations>
+ <ipxact:componentInstantiation>
+ <ipxact:name>QUARTUS_SYNTH</ipxact:name>
+ <ipxact:moduleName>altera_jesd204</ipxact:moduleName>
+ <ipxact:fileSetRef>
+ <ipxact:localName>QUARTUS_SYNTH</ipxact:localName>
+ </ipxact:fileSetRef>
+ <ipxact:parameters></ipxact:parameters>
+ </ipxact:componentInstantiation>
+ </ipxact:instantiations>
+ <ipxact:ports>
+ <ipxact:port>
+ <ipxact:name>rxlink_clk</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rxlink_rst_n_reset_n</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_clk</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_rst_n</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_chipselect</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_address</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>7</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_read</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_readdata</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>31</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_waitrequest</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_write</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_writedata</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>31</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_link_data</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>31</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_link_valid</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_link_ready</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>sof</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>3</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>somf</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>3</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>alldev_lane_aligned</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>dev_lane_aligned</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>dev_sync_n</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>sysref</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_int</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_rx_testmode</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>3</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_f</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>7</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_k</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>4</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_l</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>4</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_m</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>7</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_n</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>4</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_s</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>4</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_cf</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>4</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_cs</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>1</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_hd</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_np</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>4</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_lane_powerdown</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_frame_error</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_dlb_data</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>31</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_dlb_data_valid</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_dlb_kchar_data</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>3</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_dlb_errdetect</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>3</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_dlb_disperr</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>3</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>pll_ref_clk</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rxphy_clk</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_islockedtodata</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_cal_busy</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_analogreset</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_digitalreset</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_serial_data</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ </ipxact:ports>
+ </ipxact:model>
+ <ipxact:vendorExtensions>
+ <altera:entity_info>
+ <ipxact:vendor>Intel Corporation</ipxact:vendor>
+ <ipxact:library>ip_arria10_e1sg_jesd204b_rx</ipxact:library>
+ <ipxact:name>altera_jesd204</ipxact:name>
+ <ipxact:version>19.2.0</ipxact:version>
+ </altera:entity_info>
+ <altera:altera_module_parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="wrapper_opt" type="string">
+ <ipxact:name>wrapper_opt</ipxact:name>
+ <ipxact:displayName>Jesd204b wrapper</ipxact:displayName>
+ <ipxact:value>base_phy</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="sdc_constraint" type="real">
+ <ipxact:name>sdc_constraint</ipxact:name>
+ <ipxact:displayName>Set constraint for sdc</ipxact:displayName>
+ <ipxact:value>1.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DEVICE_FAMILY" type="string">
+ <ipxact:name>DEVICE_FAMILY</ipxact:name>
+ <ipxact:displayName>Device family</ipxact:displayName>
+ <ipxact:value>Arria 10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="part_trait_dp" type="string">
+ <ipxact:name>part_trait_dp</ipxact:name>
+ <ipxact:displayName>Device Part</ipxact:displayName>
+ <ipxact:value>10AX115U2F45E1SG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DEVICE_SPEEDGRADE" type="string">
+ <ipxact:name>DEVICE_SPEEDGRADE</ipxact:name>
+ <ipxact:displayName>Device Speedgrade</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DATA_PATH" type="string">
+ <ipxact:name>DATA_PATH</ipxact:name>
+ <ipxact:displayName>Data path</ipxact:displayName>
+ <ipxact:value>RX</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="SUBCLASSV" type="int">
+ <ipxact:name>SUBCLASSV</ipxact:name>
+ <ipxact:displayName>Jesd204b subclass</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="lane_rate" type="real">
+ <ipxact:name>lane_rate</ipxact:name>
+ <ipxact:displayName>Data rate</ipxact:displayName>
+ <ipxact:value>4000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="PCS_CONFIG" type="string">
+ <ipxact:name>PCS_CONFIG</ipxact:name>
+ <ipxact:displayName>PCS Option</ipxact:displayName>
+ <ipxact:value>JESD_PCS_CFG1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_type" type="string">
+ <ipxact:name>pll_type</ipxact:name>
+ <ipxact:displayName>PLL Type</ipxact:displayName>
+ <ipxact:value>CMU</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bonded_mode" type="string">
+ <ipxact:name>bonded_mode</ipxact:name>
+ <ipxact:displayName>Bonding Mode </ipxact:displayName>
+ <ipxact:value>bonded</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="REFCLK_FREQ" type="real">
+ <ipxact:name>REFCLK_FREQ</ipxact:name>
+ <ipxact:displayName>PLL/CDR Reference Clock Frequency</ipxact:displayName>
+ <ipxact:value>200.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_analog_voltage" type="string">
+ <ipxact:name>gui_analog_voltage</ipxact:name>
+ <ipxact:displayName>VCCR_GXB and VCCT_GXB supply voltage for the Transceiver</ipxact:displayName>
+ <ipxact:value>1_0V</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bitrev_en" type="bit">
+ <ipxact:name>bitrev_en</ipxact:name>
+ <ipxact:displayName>Enable Bit reversal and Byte reversal</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_reconfig_enable" type="bit">
+ <ipxact:name>pll_reconfig_enable</ipxact:name>
+ <ipxact:displayName>Enable Transceiver Dynamic Reconfiguration</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rcfg_jtag_enable" type="bit">
+ <ipxact:name>rcfg_jtag_enable</ipxact:name>
+ <ipxact:displayName>Enable Native PHY Debug Master Endpoint</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rcfg_shared" type="bit">
+ <ipxact:name>rcfg_shared</ipxact:name>
+ <ipxact:displayName>Share Reconfiguration Interface</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rcfg_enable_split_interface" type="bit">
+ <ipxact:name>rcfg_enable_split_interface</ipxact:name>
+ <ipxact:displayName>Provide Separate Reconfiguration Interface for Each Channel</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="set_capability_reg_enable" type="bit">
+ <ipxact:name>set_capability_reg_enable</ipxact:name>
+ <ipxact:displayName>Enable Capability Registers</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="set_user_identifier" type="int">
+ <ipxact:name>set_user_identifier</ipxact:name>
+ <ipxact:displayName>Set user-defined IP identifier</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="set_csr_soft_logic_enable" type="bit">
+ <ipxact:name>set_csr_soft_logic_enable</ipxact:name>
+ <ipxact:displayName>Enable Control and Status Registers</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="set_prbs_soft_logic_enable" type="bit">
+ <ipxact:name>set_prbs_soft_logic_enable</ipxact:name>
+ <ipxact:displayName>Enable PRBS Soft Accumulators</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="L" type="int">
+ <ipxact:name>L</ipxact:name>
+ <ipxact:displayName>Lanes per converter device (L)</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="M" type="int">
+ <ipxact:name>M</ipxact:name>
+ <ipxact:displayName>Converters per device (M)</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="GUI_EN_CFG_F" type="bit">
+ <ipxact:name>GUI_EN_CFG_F</ipxact:name>
+ <ipxact:displayName>Enable manual F configuration</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="GUI_CFG_F" type="int">
+ <ipxact:name>GUI_CFG_F</ipxact:name>
+ <ipxact:displayName>Octets per frame (F)</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="F" type="int">
+ <ipxact:name>F</ipxact:name>
+ <ipxact:displayName>Octets per frame (F)</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="N" type="int">
+ <ipxact:name>N</ipxact:name>
+ <ipxact:displayName>Converter resolution (N)</ipxact:displayName>
+ <ipxact:value>14</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="N_PRIME" type="int">
+ <ipxact:name>N_PRIME</ipxact:name>
+ <ipxact:displayName>Transmitted bits per sample (N')</ipxact:displayName>
+ <ipxact:value>16</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="S" type="int">
+ <ipxact:name>S</ipxact:name>
+ <ipxact:displayName>Samples per converter per frame (S)</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="K" type="int">
+ <ipxact:name>K</ipxact:name>
+ <ipxact:displayName>Frames per multiframe (K)</ipxact:displayName>
+ <ipxact:value>32</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="SCR" type="int">
+ <ipxact:name>SCR</ipxact:name>
+ <ipxact:displayName>Enable scramble (SCR)</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="CS" type="int">
+ <ipxact:name>CS</ipxact:name>
+ <ipxact:displayName>Control Bits (CS)</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="CF" type="int">
+ <ipxact:name>CF</ipxact:name>
+ <ipxact:displayName>Control Words (CF)</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="HD" type="int">
+ <ipxact:name>HD</ipxact:name>
+ <ipxact:displayName>High Density user data format (HD)</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ECC_EN" type="bit">
+ <ipxact:name>ECC_EN</ipxact:name>
+ <ipxact:displayName>Enable Error Code Correction (ECC_EN)</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DLB_TEST" type="bit">
+ <ipxact:name>DLB_TEST</ipxact:name>
+ <ipxact:displayName>Enable Digital Loop Back Test (DLB_TEST)</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="PHADJ" type="int">
+ <ipxact:name>PHADJ</ipxact:name>
+ <ipxact:displayName>Phase adjustment request (PHADJ)</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ADJCNT" type="int">
+ <ipxact:name>ADJCNT</ipxact:name>
+ <ipxact:displayName>Adjustment resolution step count (ADJCNT)</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ADJDIR" type="int">
+ <ipxact:name>ADJDIR</ipxact:name>
+ <ipxact:displayName>Direction of adjustment (ADJDIR)</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="OPTIMIZE" type="int">
+ <ipxact:name>OPTIMIZE</ipxact:name>
+ <ipxact:displayName>CSR Programmability</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DID" type="int">
+ <ipxact:name>DID</ipxact:name>
+ <ipxact:displayName>Device ID</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="BID" type="int">
+ <ipxact:name>BID</ipxact:name>
+ <ipxact:displayName>Bank ID</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID0" type="int">
+ <ipxact:name>LID0</ipxact:name>
+ <ipxact:displayName>Lane0 ID</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK0" type="int">
+ <ipxact:name>FCHK0</ipxact:name>
+ <ipxact:displayName>Lane0 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID1" type="int">
+ <ipxact:name>LID1</ipxact:name>
+ <ipxact:displayName>Lane1 ID</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK1" type="int">
+ <ipxact:name>FCHK1</ipxact:name>
+ <ipxact:displayName>Lane1 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID2" type="int">
+ <ipxact:name>LID2</ipxact:name>
+ <ipxact:displayName>Lane2 ID</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK2" type="int">
+ <ipxact:name>FCHK2</ipxact:name>
+ <ipxact:displayName>Lane2 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID3" type="int">
+ <ipxact:name>LID3</ipxact:name>
+ <ipxact:displayName>Lane3 ID</ipxact:displayName>
+ <ipxact:value>3</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK3" type="int">
+ <ipxact:name>FCHK3</ipxact:name>
+ <ipxact:displayName>Lane3 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID4" type="int">
+ <ipxact:name>LID4</ipxact:name>
+ <ipxact:displayName>Lane4 ID</ipxact:displayName>
+ <ipxact:value>4</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK4" type="int">
+ <ipxact:name>FCHK4</ipxact:name>
+ <ipxact:displayName>Lane4 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID5" type="int">
+ <ipxact:name>LID5</ipxact:name>
+ <ipxact:displayName>Lane5 ID</ipxact:displayName>
+ <ipxact:value>5</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK5" type="int">
+ <ipxact:name>FCHK5</ipxact:name>
+ <ipxact:displayName>Lane5 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID6" type="int">
+ <ipxact:name>LID6</ipxact:name>
+ <ipxact:displayName>Lane6 ID</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK6" type="int">
+ <ipxact:name>FCHK6</ipxact:name>
+ <ipxact:displayName>Lane6 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID7" type="int">
+ <ipxact:name>LID7</ipxact:name>
+ <ipxact:displayName>Lane7 ID</ipxact:displayName>
+ <ipxact:value>7</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK7" type="int">
+ <ipxact:name>FCHK7</ipxact:name>
+ <ipxact:displayName>Lane7 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="d_refclk_freq" type="real">
+ <ipxact:name>d_refclk_freq</ipxact:name>
+ <ipxact:displayName>PLL/CDR Reference Clock Frequency</ipxact:displayName>
+ <ipxact:value>200.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="JESDV" type="int">
+ <ipxact:name>JESDV</ipxact:name>
+ <ipxact:displayName>JESDV</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="PMA_WIDTH" type="int">
+ <ipxact:name>PMA_WIDTH</ipxact:name>
+ <ipxact:displayName>PMA_WIDTH</ipxact:displayName>
+ <ipxact:value>32</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="SER_SIZE" type="int">
+ <ipxact:name>SER_SIZE</ipxact:name>
+ <ipxact:displayName>SER_SIZE</ipxact:displayName>
+ <ipxact:value>4</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FK" type="int">
+ <ipxact:name>FK</ipxact:name>
+ <ipxact:displayName>FK</ipxact:displayName>
+ <ipxact:value>64</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="RES1" type="int">
+ <ipxact:name>RES1</ipxact:name>
+ <ipxact:displayName>RES1</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="RES2" type="int">
+ <ipxact:name>RES2</ipxact:name>
+ <ipxact:displayName>RES2</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="BIT_REVERSAL" type="int">
+ <ipxact:name>BIT_REVERSAL</ipxact:name>
+ <ipxact:displayName>BIT_REVERSAL</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="BYTE_REVERSAL" type="int">
+ <ipxact:name>BYTE_REVERSAL</ipxact:name>
+ <ipxact:displayName>BYTE_REVERSAL</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ALIGNMENT_PATTERN" type="int">
+ <ipxact:name>ALIGNMENT_PATTERN</ipxact:name>
+ <ipxact:displayName>ALIGNMENT_PATTERN</ipxact:displayName>
+ <ipxact:value>658812</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="PULSE_WIDTH" type="int">
+ <ipxact:name>PULSE_WIDTH</ipxact:name>
+ <ipxact:displayName>PULSE_WIDTH</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LS_FIFO_DEPTH" type="int">
+ <ipxact:name>LS_FIFO_DEPTH</ipxact:name>
+ <ipxact:displayName>LS_FIFO_DEPTH</ipxact:displayName>
+ <ipxact:value>32</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LS_FIFO_WIDTHU" type="int">
+ <ipxact:name>LS_FIFO_WIDTHU</ipxact:name>
+ <ipxact:displayName>LS_FIFO_WIDTHU</ipxact:displayName>
+ <ipxact:value>5</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="UNUSED_TX_PARALLEL_WIDTH" type="int">
+ <ipxact:name>UNUSED_TX_PARALLEL_WIDTH</ipxact:name>
+ <ipxact:displayName>UNUSED_TX_PARALLEL_WIDTH</ipxact:displayName>
+ <ipxact:value>92</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="UNUSED_RX_PARALLEL_WIDTH" type="int">
+ <ipxact:name>UNUSED_RX_PARALLEL_WIDTH</ipxact:name>
+ <ipxact:displayName>UNUSED_RX_PARALLEL_WIDTH</ipxact:displayName>
+ <ipxact:value>72</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="XCVR_PLL_LOCKED_WIDTH" type="int">
+ <ipxact:name>XCVR_PLL_LOCKED_WIDTH</ipxact:name>
+ <ipxact:displayName>XCVR_PLL_LOCKED_WIDTH</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="RECONFIG_ADDRESS_WIDTH" type="int">
+ <ipxact:name>RECONFIG_ADDRESS_WIDTH</ipxact:name>
+ <ipxact:displayName>RECONFIG_ADDRESS_WIDTH</ipxact:displayName>
+ <ipxact:value>10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DEPTH_PIPE" type="int">
+ <ipxact:name>DEPTH_PIPE</ipxact:name>
+ <ipxact:displayName>Pipeline stages for link_clk domain reset signal</ipxact:displayName>
+ <ipxact:value>3</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="xcvr_ip" type="string">
+ <ipxact:name>xcvr_ip</ipxact:name>
+ <ipxact:displayName>xcvr_ip</ipxact:displayName>
+ <ipxact:value>ltile</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="die_types" type="string">
+ <ipxact:name>die_types</ipxact:name>
+ <ipxact:displayName>die_types</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="die_revisions" type="string">
+ <ipxact:name>die_revisions</ipxact:name>
+ <ipxact:displayName>die_revisions</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="support_c1" type="bit">
+ <ipxact:name>support_c1</ipxact:name>
+ <ipxact:displayName>support_c1</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="support_c2" type="bit">
+ <ipxact:name>support_c2</ipxact:name>
+ <ipxact:displayName>support_c2</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="support_c3" type="bit">
+ <ipxact:name>support_c3</ipxact:name>
+ <ipxact:displayName>support_c3</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="crete_tile_status" type="string">
+ <ipxact:name>crete_tile_status</ipxact:name>
+ <ipxact:displayName>Transceiver Tile</ipxact:displayName>
+ <ipxact:value>ltile</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_user_crete_tile" type="string">
+ <ipxact:name>gui_user_crete_tile</ipxact:name>
+ <ipxact:displayName>Transceiver Tile</ipxact:displayName>
+ <ipxact:value>htile</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="TEST_COMPONENTS_EN" type="bit">
+ <ipxact:name>TEST_COMPONENTS_EN</ipxact:name>
+ <ipxact:displayName>Add Test Components</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="TERMINATE_RECONFIG_EN" type="bit">
+ <ipxact:name>TERMINATE_RECONFIG_EN</ipxact:name>
+ <ipxact:displayName>Terminate Reconfig Signals</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_TYPE" type="string">
+ <ipxact:name>ED_TYPE</ipxact:name>
+ <ipxact:displayName>Select Design</ipxact:displayName>
+ <ipxact:value>NONE</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_FILESET_SIM" type="bit">
+ <ipxact:name>ED_FILESET_SIM</ipxact:name>
+ <ipxact:displayName>Simulation</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_FILESET_SYNTH" type="bit">
+ <ipxact:name>ED_FILESET_SYNTH</ipxact:name>
+ <ipxact:displayName>Synthesis</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_HDL_FORMAT_SIM" type="string">
+ <ipxact:name>ED_HDL_FORMAT_SIM</ipxact:name>
+ <ipxact:displayName>HDL Format</ipxact:displayName>
+ <ipxact:value>VERILOG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_SIM_PAT_TESTMODE" type="string">
+ <ipxact:name>ED_SIM_PAT_TESTMODE</ipxact:name>
+ <ipxact:displayName>Test pattern</ipxact:displayName>
+ <ipxact:value>PRBS_7</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_HDL_FORMAT_SYNTH" type="string">
+ <ipxact:name>ED_HDL_FORMAT_SYNTH</ipxact:name>
+ <ipxact:displayName>HDL Format</ipxact:displayName>
+ <ipxact:value>VERILOG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_DEV_KIT" type="string">
+ <ipxact:name>ED_DEV_KIT</ipxact:name>
+ <ipxact:displayName>Select Board</ipxact:displayName>
+ <ipxact:value>NONE</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="GUI_ED_DEV_KIT" type="string">
+ <ipxact:name>GUI_ED_DEV_KIT</ipxact:name>
+ <ipxact:displayName>Select Board</ipxact:displayName>
+ <ipxact:value>None</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_SINGLE_REFCLK" type="bit">
+ <ipxact:name>ED_SINGLE_REFCLK</ipxact:name>
+ <ipxact:displayName>Single reference clock (Advanced users only. Not recommended.)</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_3WIRE_SPI" type="bit">
+ <ipxact:name>ED_3WIRE_SPI</ipxact:name>
+ <ipxact:displayName>Generate 3-wire SPI module</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="SELECT_CUSTOM_DEVICE" type="bit">
+ <ipxact:name>SELECT_CUSTOM_DEVICE</ipxact:name>
+ <ipxact:displayName>Change Target Device</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DYN_CSR" type="string">
+ <ipxact:name>DYN_CSR</ipxact:name>
+ <ipxact:displayName>Dynamic CSR Configuration for DV purpose</ipxact:displayName>
+ <ipxact:value>DISABLE</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rcp_load_enable" type="int">
+ <ipxact:name>rcp_load_enable</ipxact:name>
+ <ipxact:displayName>Enable adaptation load soft IP</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="enable_adpt_multi_recipe" type="int">
+ <ipxact:name>enable_adpt_multi_recipe</ipxact:name>
+ <ipxact:displayName>enable_adpt_multi_recipe</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="cal_recipe_sel" type="string">
+ <ipxact:name>cal_recipe_sel</ipxact:name>
+ <ipxact:displayName>PMA adaptation Select </ipxact:displayName>
+ <ipxact:value>NRZ_28Gbps_VSR</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="enable_pma_adpt_disp" type="int">
+ <ipxact:name>enable_pma_adpt_disp</ipxact:name>
+ <ipxact:displayName>enable_pma_adpt_disp</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_val_a" type="int">
+ <ipxact:name>ctle_lf_val_a</ipxact:name>
+ <ipxact:displayName>GAINLF</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_val_ada_a" type="string">
+ <ipxact:name>ctle_lf_val_ada_a</ipxact:name>
+ <ipxact:displayName>GAINLF Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_min_a" type="int">
+ <ipxact:name>ctle_lf_min_a</ipxact:name>
+ <ipxact:displayName>CTLE LF Min</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_max_a" type="int">
+ <ipxact:name>ctle_lf_max_a</ipxact:name>
+ <ipxact:displayName>CTLE LF Max</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_val_a" type="int">
+ <ipxact:name>ctle_hf_val_a</ipxact:name>
+ <ipxact:displayName>GAINHF</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_val_ada_a" type="string">
+ <ipxact:name>ctle_hf_val_ada_a</ipxact:name>
+ <ipxact:displayName>GAINHF Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_min_a" type="int">
+ <ipxact:name>ctle_hf_min_a</ipxact:name>
+ <ipxact:displayName>CTLE HF Min</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_max_a" type="int">
+ <ipxact:name>ctle_hf_max_a</ipxact:name>
+ <ipxact:displayName>CTLE HF Max</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_val_a" type="int">
+ <ipxact:name>rf_p2_val_a</ipxact:name>
+ <ipxact:displayName>RF_P2</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_val_ada_a" type="string">
+ <ipxact:name>rf_p2_val_ada_a</ipxact:name>
+ <ipxact:displayName>RF_P2 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_min_a" type="int">
+ <ipxact:name>rf_p2_min_a</ipxact:name>
+ <ipxact:displayName>RF_P2_MIN</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_max_a" type="int">
+ <ipxact:name>rf_p2_max_a</ipxact:name>
+ <ipxact:displayName>RF_P2_MAX</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_val_a" type="int">
+ <ipxact:name>rf_p1_val_a</ipxact:name>
+ <ipxact:displayName>RF_P1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_val_ada_a" type="string">
+ <ipxact:name>rf_p1_val_ada_a</ipxact:name>
+ <ipxact:displayName>RF_P1 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_min_a" type="int">
+ <ipxact:name>rf_p1_min_a</ipxact:name>
+ <ipxact:displayName>RF_P1_MIN</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_max_a" type="int">
+ <ipxact:name>rf_p1_max_a</ipxact:name>
+ <ipxact:displayName>RF_P1_MAX</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_reserved0_a" type="int">
+ <ipxact:name>rf_reserved0_a</ipxact:name>
+ <ipxact:displayName>Reserved 0</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p0_val_a" type="int">
+ <ipxact:name>rf_p0_val_a</ipxact:name>
+ <ipxact:displayName>RF_P0</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p0_val_ada_a" type="string">
+ <ipxact:name>rf_p0_val_ada_a</ipxact:name>
+ <ipxact:displayName>RF_P0 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_reserved1_a" type="int">
+ <ipxact:name>rf_reserved1_a</ipxact:name>
+ <ipxact:displayName>Reserved 1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b0t_a" type="int">
+ <ipxact:name>rf_b0t_a</ipxact:name>
+ <ipxact:displayName>RF_B0T</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_gs1_val_a" type="int">
+ <ipxact:name>ctle_gs1_val_a</ipxact:name>
+ <ipxact:displayName>GS1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_gs2_val_a" type="int">
+ <ipxact:name>ctle_gs2_val_a</ipxact:name>
+ <ipxact:displayName>GS2</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b1_a" type="int">
+ <ipxact:name>rf_b1_a</ipxact:name>
+ <ipxact:displayName>RF_B1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b1_ada_a" type="string">
+ <ipxact:name>rf_b1_ada_a</ipxact:name>
+ <ipxact:displayName>RF_B1 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b0_a" type="int">
+ <ipxact:name>rf_b0_a</ipxact:name>
+ <ipxact:displayName>RF_B0</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b0_ada_a" type="string">
+ <ipxact:name>rf_b0_ada_a</ipxact:name>
+ <ipxact:displayName>RF_B0 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_a_a" type="int">
+ <ipxact:name>rf_a_a</ipxact:name>
+ <ipxact:displayName>RF_A</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_ctle_frz_a" type="int">
+ <ipxact:name>l_ctle_frz_a</ipxact:name>
+ <ipxact:displayName>l_ctle_frz_a</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_rf_frz_a" type="int">
+ <ipxact:name>l_rf_frz_a</ipxact:name>
+ <ipxact:displayName>l_rf_frz_a</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_val_b" type="int">
+ <ipxact:name>ctle_lf_val_b</ipxact:name>
+ <ipxact:displayName>GAINLF</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_val_ada_b" type="string">
+ <ipxact:name>ctle_lf_val_ada_b</ipxact:name>
+ <ipxact:displayName>GAINLF Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_min_b" type="int">
+ <ipxact:name>ctle_lf_min_b</ipxact:name>
+ <ipxact:displayName>CTLE LF Min</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_max_b" type="int">
+ <ipxact:name>ctle_lf_max_b</ipxact:name>
+ <ipxact:displayName>CTLE LF Max</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_val_b" type="int">
+ <ipxact:name>ctle_hf_val_b</ipxact:name>
+ <ipxact:displayName>GAINHF</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_val_ada_b" type="string">
+ <ipxact:name>ctle_hf_val_ada_b</ipxact:name>
+ <ipxact:displayName>GAINHF Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_min_b" type="int">
+ <ipxact:name>ctle_hf_min_b</ipxact:name>
+ <ipxact:displayName>CTLE HF Min</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_max_b" type="int">
+ <ipxact:name>ctle_hf_max_b</ipxact:name>
+ <ipxact:displayName>CTLE HF Max</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_val_b" type="int">
+ <ipxact:name>rf_p2_val_b</ipxact:name>
+ <ipxact:displayName>RF_P2</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_val_ada_b" type="string">
+ <ipxact:name>rf_p2_val_ada_b</ipxact:name>
+ <ipxact:displayName>RF_P2 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_min_b" type="int">
+ <ipxact:name>rf_p2_min_b</ipxact:name>
+ <ipxact:displayName>RF_P2_MIN</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_max_b" type="int">
+ <ipxact:name>rf_p2_max_b</ipxact:name>
+ <ipxact:displayName>RF_P2_MAX</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_val_b" type="int">
+ <ipxact:name>rf_p1_val_b</ipxact:name>
+ <ipxact:displayName>RF_P1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_val_ada_b" type="string">
+ <ipxact:name>rf_p1_val_ada_b</ipxact:name>
+ <ipxact:displayName>RF_P1 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_min_b" type="int">
+ <ipxact:name>rf_p1_min_b</ipxact:name>
+ <ipxact:displayName>RF_P1_MIN</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_max_b" type="int">
+ <ipxact:name>rf_p1_max_b</ipxact:name>
+ <ipxact:displayName>RF_P1_MAX</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_reserved0_b" type="int">
+ <ipxact:name>rf_reserved0_b</ipxact:name>
+ <ipxact:displayName>Reserved 0</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p0_val_b" type="int">
+ <ipxact:name>rf_p0_val_b</ipxact:name>
+ <ipxact:displayName>RF_P0</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p0_val_ada_b" type="string">
+ <ipxact:name>rf_p0_val_ada_b</ipxact:name>
+ <ipxact:displayName>RF_P0 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_reserved1_b" type="int">
+ <ipxact:name>rf_reserved1_b</ipxact:name>
+ <ipxact:displayName>Reserved 1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b0t_b" type="int">
+ <ipxact:name>rf_b0t_b</ipxact:name>
+ <ipxact:displayName>RF_B0T</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_gs1_val_b" type="int">
+ <ipxact:name>ctle_gs1_val_b</ipxact:name>
+ <ipxact:displayName>GS1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_gs2_val_b" type="int">
+ <ipxact:name>ctle_gs2_val_b</ipxact:name>
+ <ipxact:displayName>GS2</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b1_b" type="int">
+ <ipxact:name>rf_b1_b</ipxact:name>
+ <ipxact:displayName>RF_B1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b1_ada_b" type="string">
+ <ipxact:name>rf_b1_ada_b</ipxact:name>
+ <ipxact:displayName>RF_B1 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b0_b" type="int">
+ <ipxact:name>rf_b0_b</ipxact:name>
+ <ipxact:displayName>RF_B0</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b0_ada_b" type="string">
+ <ipxact:name>rf_b0_ada_b</ipxact:name>
+ <ipxact:displayName>RF_B0 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_a_b" type="int">
+ <ipxact:name>rf_a_b</ipxact:name>
+ <ipxact:displayName>RF_A</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_ctle_frz_b" type="int">
+ <ipxact:name>l_ctle_frz_b</ipxact:name>
+ <ipxact:displayName>l_ctle_frz_b</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_rf_frz_b" type="int">
+ <ipxact:name>l_rf_frz_b</ipxact:name>
+ <ipxact:displayName>l_rf_frz_b</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_multi_enable" type="int">
+ <ipxact:name>adpt_multi_enable</ipxact:name>
+ <ipxact:displayName>Enable multiple PMA configuration</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_cnt" type="int">
+ <ipxact:name>adpt_recipe_cnt</ipxact:name>
+ <ipxact:displayName>Number of PMA configuration</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_select" type="int">
+ <ipxact:name>adpt_recipe_select</ipxact:name>
+ <ipxact:displayName>Select a PMA configuration to load or store</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data0" type="string">
+ <ipxact:name>adpt_recipe_data0</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data0</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data1" type="string">
+ <ipxact:name>adpt_recipe_data1</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data1</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data2" type="string">
+ <ipxact:name>adpt_recipe_data2</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data2</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data3" type="string">
+ <ipxact:name>adpt_recipe_data3</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data3</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data4" type="string">
+ <ipxact:name>adpt_recipe_data4</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data4</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data5" type="string">
+ <ipxact:name>adpt_recipe_data5</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data5</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data6" type="string">
+ <ipxact:name>adpt_recipe_data6</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data6</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data7" type="string">
+ <ipxact:name>adpt_recipe_data7</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data7</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_params" type="string">
+ <ipxact:name>adpt_params</ipxact:name>
+ <ipxact:displayName>adpt_params</ipxact:displayName>
+ <ipxact:value>ctle_lf_val_a,ctle_lf_val_ada_a,ctle_lf_min_a,ctle_lf_max_a,ctle_hf_val_a,ctle_hf_val_ada_a,ctle_hf_min_a,ctle_hf_max_a,rf_p2_val_a,rf_p2_val_ada_a,rf_p2_min_a,rf_p2_max_a,rf_p1_val_a,rf_p1_val_ada_a,rf_p1_min_a,rf_p1_max_a,rf_reserved0_a,rf_p0_val_a,rf_p0_val_ada_a,rf_reserved1_a,rf_b0t_a,ctle_gs1_val_a,ctle_gs2_val_a,rf_b1_a,rf_b1_ada_a,rf_b0_a,rf_b0_ada_a,rf_a_a,ctle_lf_val_b,ctle_lf_val_ada_b,ctle_lf_min_b,ctle_lf_max_b,ctle_hf_val_b,ctle_hf_val_ada_b,ctle_hf_min_b,ctle_hf_max_b,rf_p2_val_b,rf_p2_val_ada_b,rf_p2_min_b,rf_p2_max_b,rf_p1_val_b,rf_p1_val_ada_b,rf_p1_min_b,rf_p1_max_b,rf_reserved0_b,rf_p0_val_b,rf_p0_val_ada_b,rf_reserved1_b,rf_b0t_b,ctle_gs1_val_b,ctle_gs2_val_b,rf_b1_b,rf_b1_ada_b,rf_b0_b,rf_b0_ada_b,rf_a_b</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_params_a" type="string">
+ <ipxact:name>adpt_params_a</ipxact:name>
+ <ipxact:displayName>adpt_params_a</ipxact:displayName>
+ <ipxact:value>ctle_lf_val_a,ctle_lf_val_ada_a,ctle_lf_min_a,ctle_lf_max_a,ctle_hf_val_a,ctle_hf_val_ada_a,ctle_hf_min_a,ctle_hf_max_a,rf_p2_val_a,rf_p2_val_ada_a,rf_p2_min_a,rf_p2_max_a,rf_p1_val_a,rf_p1_val_ada_a,rf_p1_min_a,rf_p1_max_a,rf_reserved0_a,rf_p0_val_a,rf_p0_val_ada_a,rf_reserved1_a,rf_b0t_a,ctle_gs1_val_a,ctle_gs2_val_a,rf_b1_a,rf_b1_ada_a,rf_b0_a,rf_b0_ada_a,rf_a_a</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_params_b" type="string">
+ <ipxact:name>adpt_params_b</ipxact:name>
+ <ipxact:displayName>adpt_params_b</ipxact:displayName>
+ <ipxact:value>ctle_lf_val_b,ctle_lf_val_ada_b,ctle_lf_min_b,ctle_lf_max_b,ctle_hf_val_b,ctle_hf_val_ada_b,ctle_hf_min_b,ctle_hf_max_b,rf_p2_val_b,rf_p2_val_ada_b,rf_p2_min_b,rf_p2_max_b,rf_p1_val_b,rf_p1_val_ada_b,rf_p1_min_b,rf_p1_max_b,rf_reserved0_b,rf_p0_val_b,rf_p0_val_ada_b,rf_reserved1_b,rf_b0t_b,ctle_gs1_val_b,ctle_gs2_val_b,rf_b1_b,rf_b1_ada_b,rf_b0_b,rf_b0_ada_b,rf_a_b</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_labels_a" type="string">
+ <ipxact:name>adpt_param_labels_a</ipxact:name>
+ <ipxact:displayName>Init. Parameters</ipxact:displayName>
+ <ipxact:value>GAINLF,GAINLF Fix/Adaptable,CTLE LF Min,CTLE LF Max,GAINHF,GAINHF Fix/Adaptable,CTLE HF Min,CTLE HF Max,RF_P2,RF_P2 Fix/Adaptable,RF_P2_MIN,RF_P2_MAX,RF_P1,RF_P1 Fix/Adaptable,RF_P1_MIN,RF_P1_MAX,Reserved 0,RF_P0,RF_P0 Fix/Adaptable,Reserved 1,RF_B0T,GS1,GS2,RF_B1,RF_B1 Fix/Adaptable,RF_B0,RF_B0 Fix/Adaptable,RF_A</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_labels_b" type="string">
+ <ipxact:name>adpt_param_labels_b</ipxact:name>
+ <ipxact:displayName>Cont. Parameters</ipxact:displayName>
+ <ipxact:value>GAINLF,GAINLF Fix/Adaptable,CTLE LF Min,CTLE LF Max,GAINHF,GAINHF Fix/Adaptable,CTLE HF Min,CTLE HF Max,RF_P2,RF_P2 Fix/Adaptable,RF_P2_MIN,RF_P2_MAX,RF_P1,RF_P1 Fix/Adaptable,RF_P1_MIN,RF_P1_MAX,Reserved 0,RF_P0,RF_P0 Fix/Adaptable,Reserved 1,RF_B0T,GS1,GS2,RF_B1,RF_B1 Fix/Adaptable,RF_B0,RF_B0 Fix/Adaptable,RF_A</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals0" type="string">
+ <ipxact:name>adpt_param_vals0</ipxact:name>
+ <ipxact:displayName>adpt_param_vals0</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals1" type="string">
+ <ipxact:name>adpt_param_vals1</ipxact:name>
+ <ipxact:displayName>adpt_param_vals1</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals2" type="string">
+ <ipxact:name>adpt_param_vals2</ipxact:name>
+ <ipxact:displayName>adpt_param_vals2</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals3" type="string">
+ <ipxact:name>adpt_param_vals3</ipxact:name>
+ <ipxact:displayName>adpt_param_vals3</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals4" type="string">
+ <ipxact:name>adpt_param_vals4</ipxact:name>
+ <ipxact:displayName>adpt_param_vals4</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals5" type="string">
+ <ipxact:name>adpt_param_vals5</ipxact:name>
+ <ipxact:displayName>adpt_param_vals5</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals6" type="string">
+ <ipxact:name>adpt_param_vals6</ipxact:name>
+ <ipxact:displayName>adpt_param_vals6</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals7" type="string">
+ <ipxact:name>adpt_param_vals7</ipxact:name>
+ <ipxact:displayName>adpt_param_vals7</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals0_a" type="string">
+ <ipxact:name>adpt_param_vals0_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 0</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals1_a" type="string">
+ <ipxact:name>adpt_param_vals1_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 1</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals2_a" type="string">
+ <ipxact:name>adpt_param_vals2_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 2</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals3_a" type="string">
+ <ipxact:name>adpt_param_vals3_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 3</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals4_a" type="string">
+ <ipxact:name>adpt_param_vals4_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 4</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals5_a" type="string">
+ <ipxact:name>adpt_param_vals5_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 5</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals6_a" type="string">
+ <ipxact:name>adpt_param_vals6_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 6</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals7_a" type="string">
+ <ipxact:name>adpt_param_vals7_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 7</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals0_b" type="string">
+ <ipxact:name>adpt_param_vals0_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 0</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals1_b" type="string">
+ <ipxact:name>adpt_param_vals1_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 1</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals2_b" type="string">
+ <ipxact:name>adpt_param_vals2_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 2</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals3_b" type="string">
+ <ipxact:name>adpt_param_vals3_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 3</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals4_b" type="string">
+ <ipxact:name>adpt_param_vals4_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 4</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals5_b" type="string">
+ <ipxact:name>adpt_param_vals5_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 5</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals6_b" type="string">
+ <ipxact:name>adpt_param_vals6_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 6</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals7_b" type="string">
+ <ipxact:name>adpt_param_vals7_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 7</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="AUTO_DEVICE" type="string">
+ <ipxact:name>AUTO_DEVICE</ipxact:name>
+ <ipxact:displayName>Auto DEVICE</ipxact:displayName>
+ <ipxact:value>10AX115U2F45E1SG</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_module_parameters>
+ <altera:altera_system_parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="device" type="string">
+ <ipxact:name>device</ipxact:name>
+ <ipxact:displayName>Device</ipxact:displayName>
+ <ipxact:value>10AX115U2F45E1SG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="deviceFamily" type="string">
+ <ipxact:name>deviceFamily</ipxact:name>
+ <ipxact:displayName>Device family</ipxact:displayName>
+ <ipxact:value>Arria 10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="deviceSpeedGrade" type="string">
+ <ipxact:name>deviceSpeedGrade</ipxact:name>
+ <ipxact:displayName>Device Speed Grade</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="generationId" type="int">
+ <ipxact:name>generationId</ipxact:name>
+ <ipxact:displayName>Generation Id</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bonusData" type="string">
+ <ipxact:name>bonusData</ipxact:name>
+ <ipxact:displayName>bonusData</ipxact:displayName>
+ <ipxact:value>bonusData
+{
+ element $system
+ {
+ datum _originalDeviceFamily
+ {
+ value = "Arria 10";
+ type = "String";
+ }
+ }
+ element jesd204_0
+ {
+ datum _sortIndex
+ {
+ value = "0";
+ type = "int";
+ }
+ }
+}
+</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hideFromIPCatalog" type="bit">
+ <ipxact:name>hideFromIPCatalog</ipxact:name>
+ <ipxact:displayName>Hide from IP Catalog</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="lockedInterfaceDefinition" type="string">
+ <ipxact:name>lockedInterfaceDefinition</ipxact:name>
+ <ipxact:displayName>lockedInterfaceDefinition</ipxact:displayName>
+ <ipxact:value><boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>rxlink_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxlink_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rxlink_rst_n</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxlink_rst_n_reset_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>rxlink_clk</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs_rst_n</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_rst_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs</name>
+ <type>avalon</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_chipselect</name>
+ <role>chipselect</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_address</name>
+ <role>address</role>
+ <direction>Input</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_readdata</name>
+ <role>readdata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_waitrequest</name>
+ <role>waitrequest</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_write</name>
+ <role>write</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
+ </entry>
+ <entry>
+ <key>addressGroup</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>1024</value>
+ </entry>
+ <entry>
+ <key>addressUnits</key>
+ <value>WORDS</value>
+ </entry>
+ <entry>
+ <key>alwaysBurstMaxBurst</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>jesd204_rx_avs_rst_n</value>
+ </entry>
+ <entry>
+ <key>bitsPerSymbol</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToMaster</key>
+ </entry>
+ <entry>
+ <key>burstOnBurstBoundariesOnly</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>burstcountUnits</key>
+ <value>WORDS</value>
+ </entry>
+ <entry>
+ <key>constantBurstBehavior</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>holdTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>interleaveBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isBigEndian</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isFlash</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isMemoryDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isNonVolatileStorage</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>linewrapBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maximumPendingReadTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>maximumPendingWriteTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>minimumReadLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumResponseLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumUninterruptedRunLength</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>readWaitTime</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>registerIncomingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>registerOutgoingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>setupTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>timingUnits</key>
+ <value>Cycles</value>
+ </entry>
+ <entry>
+ <key>transparentBridge</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>waitrequestAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>writeLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitTime</key>
+ <value>0</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_link</name>
+ <type>avalon_streaming</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_link_data</name>
+ <role>data</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_link_valid</name>
+ <role>valid</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_link_ready</name>
+ <role>ready</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>rxlink_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>rxlink_rst_n</value>
+ </entry>
+ <entry>
+ <key>beatsPerCycle</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>dataBitsPerSymbol</key>
+ <value>32</value>
+ </entry>
+ <entry>
+ <key>emptyWithinPacket</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>errorDescriptor</key>
+ </entry>
+ <entry>
+ <key>firstSymbolInHighOrderBits</key>
+ <value>true</value>
+ </entry>
+ <entry>
+ <key>highOrderSymbolAtMSB</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maxChannel</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>packetDescription</key>
+ <value></value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readyAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>readyLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>symbolsPerBeat</key>
+ <value>1</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>sof</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>sof</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>somf</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>somf</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>alldev_lane_aligned</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>alldev_lane_aligned</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>dev_lane_aligned</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>dev_lane_aligned</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>dev_sync_n</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>dev_sync_n</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>sysref</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>sysref</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_int</name>
+ <type>interrupt</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_int</name>
+ <role>irq</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedAddressablePoint</key>
+ <value>ip_arria10_e1sg_jesd204b_rx.jesd204_rx_avs</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>jesd204_rx_avs_rst_n</value>
+ </entry>
+ <entry>
+ <key>bridgedReceiverOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToReceiver</key>
+ </entry>
+ <entry>
+ <key>irqScheme</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_rx_testmode</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_rx_testmode</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_f</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_f</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_k</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_k</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_l</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_l</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_m</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_m</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_n</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_n</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_s</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_s</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_cf</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_cf</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_cs</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_cs</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>2</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_hd</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_hd</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_np</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_np</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_lane_powerdown</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_lane_powerdown</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_frame_error</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_frame_error</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_data</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_data_valid</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_data_valid</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_kchar_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_kchar_data</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_errdetect</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_errdetect</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_disperr</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_disperr</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>pll_ref_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>pll_ref_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rxphy_clk</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxphy_clk</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_islockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_islockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_serial_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_serial_data</name>
+ <role>rx_serial_data</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="systemInfos" type="string">
+ <ipxact:name>systemInfos</ipxact:name>
+ <ipxact:displayName>systemInfos</ipxact:displayName>
+ <ipxact:value><systemInfosDefinition>
+ <connPtSystemInfos>
+ <entry>
+ <key>jesd204_rx_avs</key>
+ <value>
+ <connectionPointName>jesd204_rx_avs</connectionPointName>
+ <suppliedSystemInfos/>
+ <consumedSystemInfos>
+ <entry>
+ <key>ADDRESS_MAP</key>
+ <value>&lt;address-map&gt;&lt;slave name='jesd204_rx_avs' start='0x0' end='0x400' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+ </entry>
+ <entry>
+ <key>ADDRESS_WIDTH</key>
+ <value>10</value>
+ </entry>
+ <entry>
+ <key>MAX_SLAVE_DATA_WIDTH</key>
+ <value>32</value>
+ </entry>
+ </consumedSystemInfos>
+ </value>
+ </entry>
+ </connPtSystemInfos>
+</systemInfosDefinition></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_system_parameters>
+ <altera:altera_interface_boundary>
+ <altera:interface_mapping altera:name="alldev_lane_aligned" altera:internal="jesd204_0.alldev_lane_aligned" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="alldev_lane_aligned" altera:internal="alldev_lane_aligned"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_cf" altera:internal="jesd204_0.csr_cf" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_cf" altera:internal="csr_cf"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_cs" altera:internal="jesd204_0.csr_cs" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_cs" altera:internal="csr_cs"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_f" altera:internal="jesd204_0.csr_f" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_f" altera:internal="csr_f"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_hd" altera:internal="jesd204_0.csr_hd" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_hd" altera:internal="csr_hd"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_k" altera:internal="jesd204_0.csr_k" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_k" altera:internal="csr_k"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_l" altera:internal="jesd204_0.csr_l" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_l" altera:internal="csr_l"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_lane_powerdown" altera:internal="jesd204_0.csr_lane_powerdown" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_lane_powerdown" altera:internal="csr_lane_powerdown"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_m" altera:internal="jesd204_0.csr_m" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_m" altera:internal="csr_m"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_n" altera:internal="jesd204_0.csr_n" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_n" altera:internal="csr_n"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_np" altera:internal="jesd204_0.csr_np" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_np" altera:internal="csr_np"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_rx_testmode" altera:internal="jesd204_0.csr_rx_testmode" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_rx_testmode" altera:internal="csr_rx_testmode"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_s" altera:internal="jesd204_0.csr_s" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_s" altera:internal="csr_s"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_tx_testmode" altera:internal="jesd204_0.csr_tx_testmode"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_tx_testpattern_a" altera:internal="jesd204_0.csr_tx_testpattern_a"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_tx_testpattern_b" altera:internal="jesd204_0.csr_tx_testpattern_b"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_tx_testpattern_c" altera:internal="jesd204_0.csr_tx_testpattern_c"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_tx_testpattern_d" altera:internal="jesd204_0.csr_tx_testpattern_d"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="dev_lane_aligned" altera:internal="jesd204_0.dev_lane_aligned" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="dev_lane_aligned" altera:internal="dev_lane_aligned"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="dev_sync_n" altera:internal="jesd204_0.dev_sync_n" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="dev_sync_n" altera:internal="dev_sync_n"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_avs" altera:internal="jesd204_0.jesd204_rx_avs" altera:type="avalon" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_avs_address" altera:internal="jesd204_rx_avs_address"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_avs_chipselect" altera:internal="jesd204_rx_avs_chipselect"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_avs_read" altera:internal="jesd204_rx_avs_read"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_avs_readdata" altera:internal="jesd204_rx_avs_readdata"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_avs_waitrequest" altera:internal="jesd204_rx_avs_waitrequest"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_avs_write" altera:internal="jesd204_rx_avs_write"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_avs_writedata" altera:internal="jesd204_rx_avs_writedata"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_avs_clk" altera:internal="jesd204_0.jesd204_rx_avs_clk" altera:type="clock" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_avs_clk" altera:internal="jesd204_rx_avs_clk"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_avs_rst_n" altera:internal="jesd204_0.jesd204_rx_avs_rst_n" altera:type="reset" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_avs_rst_n" altera:internal="jesd204_rx_avs_rst_n"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_dlb_data" altera:internal="jesd204_0.jesd204_rx_dlb_data" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_dlb_data" altera:internal="jesd204_rx_dlb_data"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_dlb_data_valid" altera:internal="jesd204_0.jesd204_rx_dlb_data_valid" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_dlb_data_valid" altera:internal="jesd204_rx_dlb_data_valid"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_dlb_disperr" altera:internal="jesd204_0.jesd204_rx_dlb_disperr" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_dlb_disperr" altera:internal="jesd204_rx_dlb_disperr"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_dlb_errdetect" altera:internal="jesd204_0.jesd204_rx_dlb_errdetect" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_dlb_errdetect" altera:internal="jesd204_rx_dlb_errdetect"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_dlb_kchar_data" altera:internal="jesd204_0.jesd204_rx_dlb_kchar_data" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_dlb_kchar_data" altera:internal="jesd204_rx_dlb_kchar_data"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_frame_error" altera:internal="jesd204_0.jesd204_rx_frame_error" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_frame_error" altera:internal="jesd204_rx_frame_error"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_int" altera:internal="jesd204_0.jesd204_rx_int" altera:type="interrupt" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_int" altera:internal="jesd204_rx_int"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_link" altera:internal="jesd204_0.jesd204_rx_link" altera:type="avalon_streaming" altera:dir="start">
+ <altera:port_mapping altera:name="jesd204_rx_link_data" altera:internal="jesd204_rx_link_data"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_link_ready" altera:internal="jesd204_rx_link_ready"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_link_valid" altera:internal="jesd204_rx_link_valid"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_avs" altera:internal="jesd204_0.jesd204_tx_avs"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_avs_clk" altera:internal="jesd204_0.jesd204_tx_avs_clk"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_avs_rst_n" altera:internal="jesd204_0.jesd204_tx_avs_rst_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_dlb_data" altera:internal="jesd204_0.jesd204_tx_dlb_data"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_dlb_kchar_data" altera:internal="jesd204_0.jesd204_tx_dlb_kchar_data"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_frame_error" altera:internal="jesd204_0.jesd204_tx_frame_error"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_frame_ready" altera:internal="jesd204_0.jesd204_tx_frame_ready"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_int" altera:internal="jesd204_0.jesd204_tx_int"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_link" altera:internal="jesd204_0.jesd204_tx_link"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="mdev_sync_n" altera:internal="jesd204_0.mdev_sync_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="pll_locked" altera:internal="jesd204_0.pll_locked"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="pll_ref_clk" altera:internal="jesd204_0.pll_ref_clk" altera:type="clock" altera:dir="end">
+ <altera:port_mapping altera:name="pll_ref_clk" altera:internal="pll_ref_clk"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_analogreset" altera:internal="jesd204_0.rx_analogreset" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="rx_analogreset" altera:internal="rx_analogreset"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_cal_busy" altera:internal="jesd204_0.rx_cal_busy" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="rx_cal_busy" altera:internal="rx_cal_busy"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_cf" altera:internal="jesd204_0.rx_csr_cf"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_cs" altera:internal="jesd204_0.rx_csr_cs"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_f" altera:internal="jesd204_0.rx_csr_f"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_hd" altera:internal="jesd204_0.rx_csr_hd"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_k" altera:internal="jesd204_0.rx_csr_k"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_l" altera:internal="jesd204_0.rx_csr_l"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_lane_powerdown" altera:internal="jesd204_0.rx_csr_lane_powerdown"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_m" altera:internal="jesd204_0.rx_csr_m"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_n" altera:internal="jesd204_0.rx_csr_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_np" altera:internal="jesd204_0.rx_csr_np"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_s" altera:internal="jesd204_0.rx_csr_s"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_dev_sync_n" altera:internal="jesd204_0.rx_dev_sync_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_digitalreset" altera:internal="jesd204_0.rx_digitalreset" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="rx_digitalreset" altera:internal="rx_digitalreset"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_islockedtodata" altera:internal="jesd204_0.rx_islockedtodata" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="rx_islockedtodata" altera:internal="rx_islockedtodata"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_pll_ref_clk" altera:internal="jesd204_0.rx_pll_ref_clk"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_serial_data" altera:internal="jesd204_0.rx_serial_data" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="rx_serial_data" altera:internal="rx_serial_data"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_seriallpbken" altera:internal="jesd204_0.rx_seriallpbken"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_sof" altera:internal="jesd204_0.rx_sof"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_somf" altera:internal="jesd204_0.rx_somf"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_sysref" altera:internal="jesd204_0.rx_sysref"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rxlink_clk" altera:internal="jesd204_0.rxlink_clk" altera:type="clock" altera:dir="end">
+ <altera:port_mapping altera:name="rxlink_clk" altera:internal="rxlink_clk"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rxlink_rst_n" altera:internal="jesd204_0.rxlink_rst_n" altera:type="reset" altera:dir="end">
+ <altera:port_mapping altera:name="rxlink_rst_n_reset_n" altera:internal="rxlink_rst_n_reset_n"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rxphy_clk" altera:internal="jesd204_0.rxphy_clk" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="rxphy_clk" altera:internal="rxphy_clk"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="sof" altera:internal="jesd204_0.sof" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="sof" altera:internal="sof"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="somf" altera:internal="jesd204_0.somf" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="somf" altera:internal="somf"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="sync_n" altera:internal="jesd204_0.sync_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="sysref" altera:internal="jesd204_0.sysref" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="sysref" altera:internal="sysref"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_analogreset" altera:internal="jesd204_0.tx_analogreset"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_bonding_clocks_ch0" altera:internal="jesd204_0.tx_bonding_clocks_ch0"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_bonding_clocks_ch1" altera:internal="jesd204_0.tx_bonding_clocks_ch1"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_cal_busy" altera:internal="jesd204_0.tx_cal_busy"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_cf" altera:internal="jesd204_0.tx_csr_cf"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_cs" altera:internal="jesd204_0.tx_csr_cs"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_f" altera:internal="jesd204_0.tx_csr_f"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_hd" altera:internal="jesd204_0.tx_csr_hd"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_k" altera:internal="jesd204_0.tx_csr_k"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_l" altera:internal="jesd204_0.tx_csr_l"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_lane_powerdown" altera:internal="jesd204_0.tx_csr_lane_powerdown"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_m" altera:internal="jesd204_0.tx_csr_m"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_n" altera:internal="jesd204_0.tx_csr_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_np" altera:internal="jesd204_0.tx_csr_np"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_s" altera:internal="jesd204_0.tx_csr_s"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_dev_sync_n" altera:internal="jesd204_0.tx_dev_sync_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_digitalreset" altera:internal="jesd204_0.tx_digitalreset"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_serial_data" altera:internal="jesd204_0.tx_serial_data"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_somf" altera:internal="jesd204_0.tx_somf"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_sysref" altera:internal="jesd204_0.tx_sysref"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="txlink_clk" altera:internal="jesd204_0.txlink_clk"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="txlink_rst_n" altera:internal="jesd204_0.txlink_rst_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="txphy_clk" altera:internal="jesd204_0.txphy_clk"></altera:interface_mapping>
+ </altera:altera_interface_boundary>
+ <altera:altera_has_warnings>false</altera:altera_has_warnings>
+ <altera:altera_has_errors>false</altera:altera_has_errors>
+ </ipxact:vendorExtensions>
+</ipxact:component>
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx.qsys b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz.qsys
similarity index 54%
rename from libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx.qsys
rename to libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz.qsys
index 636b277ba53ae5ff47b8b26a7722c2ae796183dd..c4ed31506907439a2e3c34051e354636b59c4eca 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx.qsys
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz.qsys
@@ -1,5 +1,5 @@
<?xml version="1.0" encoding="UTF-8"?>
-<system name="ip_arria10_e1sg_jesd204b_rx">
+<system name="ip_arria10_e1sg_jesd204b_rx_200MHz">
<component
name="$${FILENAME}"
displayName="$${FILENAME}"
@@ -20,7 +20,6 @@
}
}
]]></parameter>
- <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
<parameter name="device" value="10AX115U2F45E1SG" />
<parameter name="deviceFamily" value="Arria 10" />
<parameter name="deviceSpeedGrade" value="1" />
@@ -31,7 +30,6 @@
<parameter name="hdlLanguage" value="VERILOG" />
<parameter name="hideFromIPCatalog" value="false" />
<parameter name="lockedInterfaceDefinition" value="" />
- <parameter name="maxAdditionalLatency" value="1" />
<parameter name="sopcBorderPoints" value="false" />
<parameter name="systemHash" value="0" />
<parameter name="systemInfos"><![CDATA[<systemInfosDefinition>
@@ -1871,11 +1869,49 @@
</boundary>
<originalModuleInfo>
<className>altera_jesd204</className>
- <version>18.0</version>
+ <version>19.2.0</version>
<displayName>JESD204B Intel FPGA IP</displayName>
</originalModuleInfo>
<systemInfoParameterDescriptors>
- <descriptors/>
+ <descriptors>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>AUTO_DEVICE</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfotype>DEVICE</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>DEVICE_FAMILY</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfotype>DEVICE_FAMILY</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>DEVICE_SPEEDGRADE</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfotype>DEVICE_SPEEDGRADE</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>die_revisions</parameterName>
+ <parameterType>[Ljava.lang.String;</parameterType>
+ <systemInfotype>DEVICE_DIE_REVISIONS</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>die_types</parameterName>
+ <parameterType>[Ljava.lang.String;</parameterType>
+ <systemInfotype>DEVICE_DIE_TYPES</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>part_trait_dp</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfoArgs>DEVICE</systemInfoArgs>
+ <systemInfotype>PART_TRAIT</systemInfotype>
+ </descriptor>
+ </descriptors>
</systemInfoParameterDescriptors>
<systemInfos>
<connPtSystemInfos>
@@ -1903,38 +1939,1695 @@
</connPtSystemInfos>
</systemInfos>
</componentDefinition>]]></parameter>
+ <parameter name="defaultBoundary"><![CDATA[<boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>rxlink_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxlink_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rxlink_rst_n</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxlink_rst_n_reset_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>rxlink_clk</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs_rst_n</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_rst_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs</name>
+ <type>avalon</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_chipselect</name>
+ <role>chipselect</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_address</name>
+ <role>address</role>
+ <direction>Input</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_readdata</name>
+ <role>readdata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_waitrequest</name>
+ <role>waitrequest</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_write</name>
+ <role>write</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
+ </entry>
+ <entry>
+ <key>addressGroup</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>1024</value>
+ </entry>
+ <entry>
+ <key>addressUnits</key>
+ <value>WORDS</value>
+ </entry>
+ <entry>
+ <key>alwaysBurstMaxBurst</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>jesd204_rx_avs_rst_n</value>
+ </entry>
+ <entry>
+ <key>bitsPerSymbol</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToMaster</key>
+ </entry>
+ <entry>
+ <key>burstOnBurstBoundariesOnly</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>burstcountUnits</key>
+ <value>WORDS</value>
+ </entry>
+ <entry>
+ <key>constantBurstBehavior</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>holdTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>interleaveBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isBigEndian</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isFlash</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isMemoryDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isNonVolatileStorage</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>linewrapBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maximumPendingReadTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>maximumPendingWriteTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>minimumReadLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumResponseLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumUninterruptedRunLength</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>readWaitTime</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>registerIncomingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>registerOutgoingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>setupTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>timingUnits</key>
+ <value>Cycles</value>
+ </entry>
+ <entry>
+ <key>transparentBridge</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>waitrequestAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>writeLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitTime</key>
+ <value>0</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_link</name>
+ <type>avalon_streaming</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_link_data</name>
+ <role>data</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_link_valid</name>
+ <role>valid</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_link_ready</name>
+ <role>ready</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>rxlink_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>rxlink_rst_n</value>
+ </entry>
+ <entry>
+ <key>beatsPerCycle</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>dataBitsPerSymbol</key>
+ <value>32</value>
+ </entry>
+ <entry>
+ <key>emptyWithinPacket</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>errorDescriptor</key>
+ </entry>
+ <entry>
+ <key>firstSymbolInHighOrderBits</key>
+ <value>true</value>
+ </entry>
+ <entry>
+ <key>highOrderSymbolAtMSB</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maxChannel</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>packetDescription</key>
+ <value></value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readyAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>readyLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>symbolsPerBeat</key>
+ <value>1</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>sof</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>sof</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>somf</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>somf</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>alldev_lane_aligned</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>alldev_lane_aligned</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>dev_lane_aligned</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>dev_lane_aligned</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>dev_sync_n</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>dev_sync_n</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>sysref</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>sysref</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_int</name>
+ <type>interrupt</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_int</name>
+ <role>irq</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedAddressablePoint</key>
+ <value>jesd204_0.jesd204_rx_avs</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>jesd204_rx_avs_rst_n</value>
+ </entry>
+ <entry>
+ <key>bridgedReceiverOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToReceiver</key>
+ </entry>
+ <entry>
+ <key>irqScheme</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_rx_testmode</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_rx_testmode</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_f</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_f</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_k</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_k</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_l</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_l</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_m</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_m</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_n</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_n</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_s</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_s</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_cf</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_cf</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_cs</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_cs</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>2</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_hd</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_hd</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_np</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_np</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_lane_powerdown</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_lane_powerdown</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_frame_error</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_frame_error</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_data</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_data_valid</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_data_valid</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_kchar_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_kchar_data</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_errdetect</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_errdetect</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_disperr</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_disperr</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>pll_ref_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>pll_ref_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rxphy_clk</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxphy_clk</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_islockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_islockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_serial_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_serial_data</name>
+ <role>rx_serial_data</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>ip_arria10_e1sg_jesd204b_rx</hdlLibraryName>
+ <hdlLibraryName>ip_arria10_e1sg_jesd204b_rx_200MHz</hdlLibraryName>
<fileSets>
<fileSet>
<fileSetName>ip_arria10_e1sg_jesd204b_rx</fileSetName>
- <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx</fileSetFixedName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_200MHz</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
<fileSetName>ip_arria10_e1sg_jesd204b_rx</fileSetName>
- <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx</fileSetFixedName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_200MHz</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
<fileSetName>ip_arria10_e1sg_jesd204b_rx</fileSetName>
- <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx</fileSetFixedName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_200MHz</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx.ip</parameter>
+ <parameter name="logicalView">ip_arria10_e1sg_jesd204b_rx_200MHz.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
- <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
- <interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
- <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
- <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz_12ch.ip b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz_12ch.ip
new file mode 100644
index 0000000000000000000000000000000000000000..02bb23216d2903b6d91eb451973df594b7f0f8fd
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz_12ch.ip
@@ -0,0 +1,5732 @@
+<?xml version="1.0" ?>
+<ipxact:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact2014/extensions" xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014">
+ <ipxact:vendor>Intel Corporation</ipxact:vendor>
+ <ipxact:library>ip_arria10_e1sg_jesd204b_rx</ipxact:library>
+ <ipxact:name>jesd204_0</ipxact:name>
+ <ipxact:version>19.2.0</ipxact:version>
+ <ipxact:busInterfaces>
+ <ipxact:busInterface>
+ <ipxact:name>rxlink_clk</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="clock" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="clock" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>clk</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rxlink_clk</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="clockRate" type="longint">
+ <ipxact:name>clockRate</ipxact:name>
+ <ipxact:displayName>Clock rate</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="externallyDriven" type="bit">
+ <ipxact:name>externallyDriven</ipxact:name>
+ <ipxact:displayName>Externally driven</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ptfSchematicName" type="string">
+ <ipxact:name>ptfSchematicName</ipxact:name>
+ <ipxact:displayName>PTF schematic name</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rxlink_rst_n</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset_n</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rxlink_rst_n_reset_n</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>rxlink_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>DEASSERT</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_avs_clk</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="clock" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="clock" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>clk</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_clk</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="clockRate" type="longint">
+ <ipxact:name>clockRate</ipxact:name>
+ <ipxact:displayName>Clock rate</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="externallyDriven" type="bit">
+ <ipxact:name>externallyDriven</ipxact:name>
+ <ipxact:displayName>Externally driven</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ptfSchematicName" type="string">
+ <ipxact:name>ptfSchematicName</ipxact:name>
+ <ipxact:displayName>PTF schematic name</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_avs_rst_n</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset_n</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_rst_n</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>jesd204_rx_avs_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>DEASSERT</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_avs</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="avalon" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="avalon" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>chipselect</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_chipselect</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>address</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_address</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>read</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_read</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>readdata</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_readdata</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>waitrequest</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_waitrequest</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>write</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_write</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>writedata</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_avs_writedata</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="addressAlignment" type="string">
+ <ipxact:name>addressAlignment</ipxact:name>
+ <ipxact:displayName>Slave addressing</ipxact:displayName>
+ <ipxact:value>DYNAMIC</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="addressGroup" type="int">
+ <ipxact:name>addressGroup</ipxact:name>
+ <ipxact:displayName>Address group</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="addressSpan" type="string">
+ <ipxact:name>addressSpan</ipxact:name>
+ <ipxact:displayName>Address span</ipxact:displayName>
+ <ipxact:value>1024</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="addressUnits" type="string">
+ <ipxact:name>addressUnits</ipxact:name>
+ <ipxact:displayName>Address units</ipxact:displayName>
+ <ipxact:value>WORDS</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="alwaysBurstMaxBurst" type="bit">
+ <ipxact:name>alwaysBurstMaxBurst</ipxact:name>
+ <ipxact:displayName>Always burst maximum burst</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>jesd204_rx_avs_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>Associated reset</ipxact:displayName>
+ <ipxact:value>jesd204_rx_avs_rst_n</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bitsPerSymbol" type="int">
+ <ipxact:name>bitsPerSymbol</ipxact:name>
+ <ipxact:displayName>Bits per symbol</ipxact:displayName>
+ <ipxact:value>8</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bridgedAddressOffset" type="string">
+ <ipxact:name>bridgedAddressOffset</ipxact:name>
+ <ipxact:displayName>Bridged Address Offset</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bridgesToMaster" type="string">
+ <ipxact:name>bridgesToMaster</ipxact:name>
+ <ipxact:displayName>Bridges to master</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="burstOnBurstBoundariesOnly" type="bit">
+ <ipxact:name>burstOnBurstBoundariesOnly</ipxact:name>
+ <ipxact:displayName>Burst on burst boundaries only</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="burstcountUnits" type="string">
+ <ipxact:name>burstcountUnits</ipxact:name>
+ <ipxact:displayName>Burstcount units</ipxact:displayName>
+ <ipxact:value>WORDS</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="constantBurstBehavior" type="bit">
+ <ipxact:name>constantBurstBehavior</ipxact:name>
+ <ipxact:displayName>Constant burst behavior</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="explicitAddressSpan" type="string">
+ <ipxact:name>explicitAddressSpan</ipxact:name>
+ <ipxact:displayName>Explicit address span</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="holdTime" type="int">
+ <ipxact:name>holdTime</ipxact:name>
+ <ipxact:displayName>Hold</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="interleaveBursts" type="bit">
+ <ipxact:name>interleaveBursts</ipxact:name>
+ <ipxact:displayName>Interleave bursts</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="isBigEndian" type="bit">
+ <ipxact:name>isBigEndian</ipxact:name>
+ <ipxact:displayName>Big endian</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="isFlash" type="bit">
+ <ipxact:name>isFlash</ipxact:name>
+ <ipxact:displayName>Flash memory</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="isMemoryDevice" type="bit">
+ <ipxact:name>isMemoryDevice</ipxact:name>
+ <ipxact:displayName>Memory device</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="isNonVolatileStorage" type="bit">
+ <ipxact:name>isNonVolatileStorage</ipxact:name>
+ <ipxact:displayName>Non-volatile storage</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="linewrapBursts" type="bit">
+ <ipxact:name>linewrapBursts</ipxact:name>
+ <ipxact:displayName>Linewrap bursts</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="maximumPendingReadTransactions" type="int">
+ <ipxact:name>maximumPendingReadTransactions</ipxact:name>
+ <ipxact:displayName>Maximum pending read transactions</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="maximumPendingWriteTransactions" type="int">
+ <ipxact:name>maximumPendingWriteTransactions</ipxact:name>
+ <ipxact:displayName>Maximum pending write transactions</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="minimumReadLatency" type="int">
+ <ipxact:name>minimumReadLatency</ipxact:name>
+ <ipxact:displayName>minimumReadLatency</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="minimumResponseLatency" type="int">
+ <ipxact:name>minimumResponseLatency</ipxact:name>
+ <ipxact:displayName>Minimum response latency</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="minimumUninterruptedRunLength" type="int">
+ <ipxact:name>minimumUninterruptedRunLength</ipxact:name>
+ <ipxact:displayName>Minimum uninterrupted run length</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="printableDevice" type="bit">
+ <ipxact:name>printableDevice</ipxact:name>
+ <ipxact:displayName>Can receive stdout/stderr</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readLatency" type="int">
+ <ipxact:name>readLatency</ipxact:name>
+ <ipxact:displayName>Read latency</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readWaitStates" type="int">
+ <ipxact:name>readWaitStates</ipxact:name>
+ <ipxact:displayName>Read wait states</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readWaitTime" type="int">
+ <ipxact:name>readWaitTime</ipxact:name>
+ <ipxact:displayName>Read wait</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="registerIncomingSignals" type="bit">
+ <ipxact:name>registerIncomingSignals</ipxact:name>
+ <ipxact:displayName>Register incoming signals</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="registerOutgoingSignals" type="bit">
+ <ipxact:name>registerOutgoingSignals</ipxact:name>
+ <ipxact:displayName>Register outgoing signals</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="setupTime" type="int">
+ <ipxact:name>setupTime</ipxact:name>
+ <ipxact:displayName>Setup</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="timingUnits" type="string">
+ <ipxact:name>timingUnits</ipxact:name>
+ <ipxact:displayName>Timing units</ipxact:displayName>
+ <ipxact:value>Cycles</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="transparentBridge" type="bit">
+ <ipxact:name>transparentBridge</ipxact:name>
+ <ipxact:displayName>Transparent bridge</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="waitrequestAllowance" type="int">
+ <ipxact:name>waitrequestAllowance</ipxact:name>
+ <ipxact:displayName>Waitrequest allowance</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="wellBehavedWaitrequest" type="bit">
+ <ipxact:name>wellBehavedWaitrequest</ipxact:name>
+ <ipxact:displayName>Well-behaved waitrequest</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="writeLatency" type="int">
+ <ipxact:name>writeLatency</ipxact:name>
+ <ipxact:displayName>Write latency</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="writeWaitStates" type="int">
+ <ipxact:name>writeWaitStates</ipxact:name>
+ <ipxact:displayName>Write wait states</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="writeWaitTime" type="int">
+ <ipxact:name>writeWaitTime</ipxact:name>
+ <ipxact:displayName>Write wait</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="embeddedsw.configuration.isFlash" type="string">
+ <ipxact:name>embeddedsw.configuration.isFlash</ipxact:name>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="embeddedsw.configuration.isMemoryDevice" type="string">
+ <ipxact:name>embeddedsw.configuration.isMemoryDevice</ipxact:name>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="embeddedsw.configuration.isNonVolatileStorage" type="string">
+ <ipxact:name>embeddedsw.configuration.isNonVolatileStorage</ipxact:name>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="embeddedsw.configuration.isPrintableDevice" type="string">
+ <ipxact:name>embeddedsw.configuration.isPrintableDevice</ipxact:name>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_link</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="avalon_streaming" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="avalon_streaming" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>data</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_link_data</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>valid</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_link_valid</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>ready</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_link_ready</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:master></ipxact:master>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value>rxlink_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value>rxlink_rst_n</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="beatsPerCycle" type="int">
+ <ipxact:name>beatsPerCycle</ipxact:name>
+ <ipxact:displayName>Beats Per Cycle</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="dataBitsPerSymbol" type="int">
+ <ipxact:name>dataBitsPerSymbol</ipxact:name>
+ <ipxact:displayName>Data bits per symbol</ipxact:displayName>
+ <ipxact:value>32</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="emptyWithinPacket" type="bit">
+ <ipxact:name>emptyWithinPacket</ipxact:name>
+ <ipxact:displayName>emptyWithinPacket</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="errorDescriptor" type="string">
+ <ipxact:name>errorDescriptor</ipxact:name>
+ <ipxact:displayName>Error descriptor</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="firstSymbolInHighOrderBits" type="bit">
+ <ipxact:name>firstSymbolInHighOrderBits</ipxact:name>
+ <ipxact:displayName>First Symbol In High-Order Bits</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="highOrderSymbolAtMSB" type="bit">
+ <ipxact:name>highOrderSymbolAtMSB</ipxact:name>
+ <ipxact:displayName>highOrderSymbolAtMSB</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="maxChannel" type="int">
+ <ipxact:name>maxChannel</ipxact:name>
+ <ipxact:displayName>Maximum channel</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="packetDescription" type="string">
+ <ipxact:name>packetDescription</ipxact:name>
+ <ipxact:displayName>Packet description </ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readyAllowance" type="int">
+ <ipxact:name>readyAllowance</ipxact:name>
+ <ipxact:displayName>Ready allowance</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readyLatency" type="int">
+ <ipxact:name>readyLatency</ipxact:name>
+ <ipxact:displayName>Ready latency</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="symbolsPerBeat" type="int">
+ <ipxact:name>symbolsPerBeat</ipxact:name>
+ <ipxact:displayName>Symbols per beat </ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>sof</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>sof</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>somf</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>somf</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>alldev_lane_aligned</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>alldev_lane_aligned</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>dev_lane_aligned</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>dev_lane_aligned</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>dev_sync_n</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>dev_sync_n</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>sysref</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>sysref</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_int</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="interrupt" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="interrupt" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>irq</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_int</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedAddressablePoint" type="string">
+ <ipxact:name>associatedAddressablePoint</ipxact:name>
+ <ipxact:displayName>Associated addressable interface</ipxact:displayName>
+ <ipxact:value>ip_arria10_e1sg_jesd204b_rx.jesd204_rx_avs</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>jesd204_rx_avs_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>Associated reset</ipxact:displayName>
+ <ipxact:value>jesd204_rx_avs_rst_n</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bridgedReceiverOffset" type="longint">
+ <ipxact:name>bridgedReceiverOffset</ipxact:name>
+ <ipxact:displayName>Bridged receiver offset</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bridgesToReceiver" type="string">
+ <ipxact:name>bridgesToReceiver</ipxact:name>
+ <ipxact:displayName>Bridges to receiver</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="irqScheme" type="string">
+ <ipxact:name>irqScheme</ipxact:name>
+ <ipxact:displayName>Interrupt scheme</ipxact:displayName>
+ <ipxact:value>NONE</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_rx_testmode</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_rx_testmode</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_f</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_f</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_k</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_k</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_l</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_l</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_m</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_m</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_n</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_n</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_s</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_s</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_cf</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_cf</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_cs</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_cs</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_hd</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_hd</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_np</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_np</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_lane_powerdown</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_lane_powerdown</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_frame_error</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_frame_error</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_dlb_data</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_dlb_data</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_dlb_data_valid</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_dlb_data_valid</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_dlb_kchar_data</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_dlb_kchar_data</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_dlb_errdetect</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_dlb_errdetect</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>jesd204_rx_dlb_disperr</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>jesd204_rx_dlb_disperr</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>pll_ref_clk</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="clock" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="clock" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>clk</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>pll_ref_clk</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="clockRate" type="longint">
+ <ipxact:name>clockRate</ipxact:name>
+ <ipxact:displayName>Clock rate</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="externallyDriven" type="bit">
+ <ipxact:name>externallyDriven</ipxact:name>
+ <ipxact:displayName>Externally driven</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ptfSchematicName" type="string">
+ <ipxact:name>ptfSchematicName</ipxact:name>
+ <ipxact:displayName>PTF schematic name</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rxphy_clk</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rxphy_clk</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_islockedtodata</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_is_lockedtodata</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_islockedtodata</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_cal_busy</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_cal_busy</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_cal_busy</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_analogreset</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_analogreset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_analogreset</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_digitalreset</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_digitalreset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_digitalreset</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_serial_data</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_serial_data</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_serial_data</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ </ipxact:busInterfaces>
+ <ipxact:model>
+ <ipxact:views>
+ <ipxact:view>
+ <ipxact:name>QUARTUS_SYNTH</ipxact:name>
+ <ipxact:envIdentifier>:quartus.altera.com:</ipxact:envIdentifier>
+ <ipxact:componentInstantiationRef>QUARTUS_SYNTH</ipxact:componentInstantiationRef>
+ </ipxact:view>
+ </ipxact:views>
+ <ipxact:instantiations>
+ <ipxact:componentInstantiation>
+ <ipxact:name>QUARTUS_SYNTH</ipxact:name>
+ <ipxact:moduleName>altera_jesd204</ipxact:moduleName>
+ <ipxact:fileSetRef>
+ <ipxact:localName>QUARTUS_SYNTH</ipxact:localName>
+ </ipxact:fileSetRef>
+ <ipxact:parameters></ipxact:parameters>
+ </ipxact:componentInstantiation>
+ </ipxact:instantiations>
+ <ipxact:ports>
+ <ipxact:port>
+ <ipxact:name>rxlink_clk</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rxlink_rst_n_reset_n</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_clk</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_rst_n</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_chipselect</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_address</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>7</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_read</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_readdata</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>31</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_waitrequest</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_write</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_avs_writedata</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>31</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_link_data</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>31</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_link_valid</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_link_ready</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>sof</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>3</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>somf</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>3</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>alldev_lane_aligned</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>dev_lane_aligned</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>dev_sync_n</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>sysref</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_int</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_rx_testmode</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>3</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_f</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>7</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_k</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>4</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_l</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>4</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_m</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>7</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_n</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>4</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_s</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>4</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_cf</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>4</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_cs</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>1</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_hd</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_np</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>4</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_lane_powerdown</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_frame_error</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_dlb_data</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>31</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_dlb_data_valid</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_dlb_kchar_data</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>3</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_dlb_errdetect</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>3</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>jesd204_rx_dlb_disperr</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>3</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>pll_ref_clk</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rxphy_clk</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_islockedtodata</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_cal_busy</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_analogreset</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_digitalreset</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_serial_data</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ </ipxact:ports>
+ </ipxact:model>
+ <ipxact:vendorExtensions>
+ <altera:entity_info>
+ <ipxact:vendor>Intel Corporation</ipxact:vendor>
+ <ipxact:library>ip_arria10_e1sg_jesd204b_rx</ipxact:library>
+ <ipxact:name>altera_jesd204</ipxact:name>
+ <ipxact:version>19.2.0</ipxact:version>
+ </altera:entity_info>
+ <altera:altera_module_parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="wrapper_opt" type="string">
+ <ipxact:name>wrapper_opt</ipxact:name>
+ <ipxact:displayName>Jesd204b wrapper</ipxact:displayName>
+ <ipxact:value>base_phy</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="sdc_constraint" type="real">
+ <ipxact:name>sdc_constraint</ipxact:name>
+ <ipxact:displayName>Set constraint for sdc</ipxact:displayName>
+ <ipxact:value>1.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DEVICE_FAMILY" type="string">
+ <ipxact:name>DEVICE_FAMILY</ipxact:name>
+ <ipxact:displayName>Device family</ipxact:displayName>
+ <ipxact:value>Arria 10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="part_trait_dp" type="string">
+ <ipxact:name>part_trait_dp</ipxact:name>
+ <ipxact:displayName>Device Part</ipxact:displayName>
+ <ipxact:value>10AX115U2F45E1SG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DEVICE_SPEEDGRADE" type="string">
+ <ipxact:name>DEVICE_SPEEDGRADE</ipxact:name>
+ <ipxact:displayName>Device Speedgrade</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DATA_PATH" type="string">
+ <ipxact:name>DATA_PATH</ipxact:name>
+ <ipxact:displayName>Data path</ipxact:displayName>
+ <ipxact:value>RX</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="SUBCLASSV" type="int">
+ <ipxact:name>SUBCLASSV</ipxact:name>
+ <ipxact:displayName>Jesd204b subclass</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="lane_rate" type="real">
+ <ipxact:name>lane_rate</ipxact:name>
+ <ipxact:displayName>Data rate</ipxact:displayName>
+ <ipxact:value>4000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="PCS_CONFIG" type="string">
+ <ipxact:name>PCS_CONFIG</ipxact:name>
+ <ipxact:displayName>PCS Option</ipxact:displayName>
+ <ipxact:value>JESD_PCS_CFG1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_type" type="string">
+ <ipxact:name>pll_type</ipxact:name>
+ <ipxact:displayName>PLL Type</ipxact:displayName>
+ <ipxact:value>CMU</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bonded_mode" type="string">
+ <ipxact:name>bonded_mode</ipxact:name>
+ <ipxact:displayName>Bonding Mode </ipxact:displayName>
+ <ipxact:value>bonded</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="REFCLK_FREQ" type="real">
+ <ipxact:name>REFCLK_FREQ</ipxact:name>
+ <ipxact:displayName>PLL/CDR Reference Clock Frequency</ipxact:displayName>
+ <ipxact:value>200.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_analog_voltage" type="string">
+ <ipxact:name>gui_analog_voltage</ipxact:name>
+ <ipxact:displayName>VCCR_GXB and VCCT_GXB supply voltage for the Transceiver</ipxact:displayName>
+ <ipxact:value>1_0V</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bitrev_en" type="bit">
+ <ipxact:name>bitrev_en</ipxact:name>
+ <ipxact:displayName>Enable Bit reversal and Byte reversal</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_reconfig_enable" type="bit">
+ <ipxact:name>pll_reconfig_enable</ipxact:name>
+ <ipxact:displayName>Enable Transceiver Dynamic Reconfiguration</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rcfg_jtag_enable" type="bit">
+ <ipxact:name>rcfg_jtag_enable</ipxact:name>
+ <ipxact:displayName>Enable Native PHY Debug Master Endpoint</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rcfg_shared" type="bit">
+ <ipxact:name>rcfg_shared</ipxact:name>
+ <ipxact:displayName>Share Reconfiguration Interface</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rcfg_enable_split_interface" type="bit">
+ <ipxact:name>rcfg_enable_split_interface</ipxact:name>
+ <ipxact:displayName>Provide Separate Reconfiguration Interface for Each Channel</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="set_capability_reg_enable" type="bit">
+ <ipxact:name>set_capability_reg_enable</ipxact:name>
+ <ipxact:displayName>Enable Capability Registers</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="set_user_identifier" type="int">
+ <ipxact:name>set_user_identifier</ipxact:name>
+ <ipxact:displayName>Set user-defined IP identifier</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="set_csr_soft_logic_enable" type="bit">
+ <ipxact:name>set_csr_soft_logic_enable</ipxact:name>
+ <ipxact:displayName>Enable Control and Status Registers</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="set_prbs_soft_logic_enable" type="bit">
+ <ipxact:name>set_prbs_soft_logic_enable</ipxact:name>
+ <ipxact:displayName>Enable PRBS Soft Accumulators</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="L" type="int">
+ <ipxact:name>L</ipxact:name>
+ <ipxact:displayName>Lanes per converter device (L)</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="M" type="int">
+ <ipxact:name>M</ipxact:name>
+ <ipxact:displayName>Converters per device (M)</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="GUI_EN_CFG_F" type="bit">
+ <ipxact:name>GUI_EN_CFG_F</ipxact:name>
+ <ipxact:displayName>Enable manual F configuration</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="GUI_CFG_F" type="int">
+ <ipxact:name>GUI_CFG_F</ipxact:name>
+ <ipxact:displayName>Octets per frame (F)</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="F" type="int">
+ <ipxact:name>F</ipxact:name>
+ <ipxact:displayName>Octets per frame (F)</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="N" type="int">
+ <ipxact:name>N</ipxact:name>
+ <ipxact:displayName>Converter resolution (N)</ipxact:displayName>
+ <ipxact:value>14</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="N_PRIME" type="int">
+ <ipxact:name>N_PRIME</ipxact:name>
+ <ipxact:displayName>Transmitted bits per sample (N')</ipxact:displayName>
+ <ipxact:value>16</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="S" type="int">
+ <ipxact:name>S</ipxact:name>
+ <ipxact:displayName>Samples per converter per frame (S)</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="K" type="int">
+ <ipxact:name>K</ipxact:name>
+ <ipxact:displayName>Frames per multiframe (K)</ipxact:displayName>
+ <ipxact:value>32</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="SCR" type="int">
+ <ipxact:name>SCR</ipxact:name>
+ <ipxact:displayName>Enable scramble (SCR)</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="CS" type="int">
+ <ipxact:name>CS</ipxact:name>
+ <ipxact:displayName>Control Bits (CS)</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="CF" type="int">
+ <ipxact:name>CF</ipxact:name>
+ <ipxact:displayName>Control Words (CF)</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="HD" type="int">
+ <ipxact:name>HD</ipxact:name>
+ <ipxact:displayName>High Density user data format (HD)</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ECC_EN" type="bit">
+ <ipxact:name>ECC_EN</ipxact:name>
+ <ipxact:displayName>Enable Error Code Correction (ECC_EN)</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DLB_TEST" type="bit">
+ <ipxact:name>DLB_TEST</ipxact:name>
+ <ipxact:displayName>Enable Digital Loop Back Test (DLB_TEST)</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="PHADJ" type="int">
+ <ipxact:name>PHADJ</ipxact:name>
+ <ipxact:displayName>Phase adjustment request (PHADJ)</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ADJCNT" type="int">
+ <ipxact:name>ADJCNT</ipxact:name>
+ <ipxact:displayName>Adjustment resolution step count (ADJCNT)</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ADJDIR" type="int">
+ <ipxact:name>ADJDIR</ipxact:name>
+ <ipxact:displayName>Direction of adjustment (ADJDIR)</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="OPTIMIZE" type="int">
+ <ipxact:name>OPTIMIZE</ipxact:name>
+ <ipxact:displayName>CSR Programmability</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DID" type="int">
+ <ipxact:name>DID</ipxact:name>
+ <ipxact:displayName>Device ID</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="BID" type="int">
+ <ipxact:name>BID</ipxact:name>
+ <ipxact:displayName>Bank ID</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID0" type="int">
+ <ipxact:name>LID0</ipxact:name>
+ <ipxact:displayName>Lane0 ID</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK0" type="int">
+ <ipxact:name>FCHK0</ipxact:name>
+ <ipxact:displayName>Lane0 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID1" type="int">
+ <ipxact:name>LID1</ipxact:name>
+ <ipxact:displayName>Lane1 ID</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK1" type="int">
+ <ipxact:name>FCHK1</ipxact:name>
+ <ipxact:displayName>Lane1 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID2" type="int">
+ <ipxact:name>LID2</ipxact:name>
+ <ipxact:displayName>Lane2 ID</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK2" type="int">
+ <ipxact:name>FCHK2</ipxact:name>
+ <ipxact:displayName>Lane2 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID3" type="int">
+ <ipxact:name>LID3</ipxact:name>
+ <ipxact:displayName>Lane3 ID</ipxact:displayName>
+ <ipxact:value>3</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK3" type="int">
+ <ipxact:name>FCHK3</ipxact:name>
+ <ipxact:displayName>Lane3 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID4" type="int">
+ <ipxact:name>LID4</ipxact:name>
+ <ipxact:displayName>Lane4 ID</ipxact:displayName>
+ <ipxact:value>4</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK4" type="int">
+ <ipxact:name>FCHK4</ipxact:name>
+ <ipxact:displayName>Lane4 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID5" type="int">
+ <ipxact:name>LID5</ipxact:name>
+ <ipxact:displayName>Lane5 ID</ipxact:displayName>
+ <ipxact:value>5</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK5" type="int">
+ <ipxact:name>FCHK5</ipxact:name>
+ <ipxact:displayName>Lane5 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID6" type="int">
+ <ipxact:name>LID6</ipxact:name>
+ <ipxact:displayName>Lane6 ID</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK6" type="int">
+ <ipxact:name>FCHK6</ipxact:name>
+ <ipxact:displayName>Lane6 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LID7" type="int">
+ <ipxact:name>LID7</ipxact:name>
+ <ipxact:displayName>Lane7 ID</ipxact:displayName>
+ <ipxact:value>7</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FCHK7" type="int">
+ <ipxact:name>FCHK7</ipxact:name>
+ <ipxact:displayName>Lane7 checksum</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="d_refclk_freq" type="real">
+ <ipxact:name>d_refclk_freq</ipxact:name>
+ <ipxact:displayName>PLL/CDR Reference Clock Frequency</ipxact:displayName>
+ <ipxact:value>200.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="JESDV" type="int">
+ <ipxact:name>JESDV</ipxact:name>
+ <ipxact:displayName>JESDV</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="PMA_WIDTH" type="int">
+ <ipxact:name>PMA_WIDTH</ipxact:name>
+ <ipxact:displayName>PMA_WIDTH</ipxact:displayName>
+ <ipxact:value>32</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="SER_SIZE" type="int">
+ <ipxact:name>SER_SIZE</ipxact:name>
+ <ipxact:displayName>SER_SIZE</ipxact:displayName>
+ <ipxact:value>4</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="FK" type="int">
+ <ipxact:name>FK</ipxact:name>
+ <ipxact:displayName>FK</ipxact:displayName>
+ <ipxact:value>64</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="RES1" type="int">
+ <ipxact:name>RES1</ipxact:name>
+ <ipxact:displayName>RES1</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="RES2" type="int">
+ <ipxact:name>RES2</ipxact:name>
+ <ipxact:displayName>RES2</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="BIT_REVERSAL" type="int">
+ <ipxact:name>BIT_REVERSAL</ipxact:name>
+ <ipxact:displayName>BIT_REVERSAL</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="BYTE_REVERSAL" type="int">
+ <ipxact:name>BYTE_REVERSAL</ipxact:name>
+ <ipxact:displayName>BYTE_REVERSAL</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ALIGNMENT_PATTERN" type="int">
+ <ipxact:name>ALIGNMENT_PATTERN</ipxact:name>
+ <ipxact:displayName>ALIGNMENT_PATTERN</ipxact:displayName>
+ <ipxact:value>658812</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="PULSE_WIDTH" type="int">
+ <ipxact:name>PULSE_WIDTH</ipxact:name>
+ <ipxact:displayName>PULSE_WIDTH</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LS_FIFO_DEPTH" type="int">
+ <ipxact:name>LS_FIFO_DEPTH</ipxact:name>
+ <ipxact:displayName>LS_FIFO_DEPTH</ipxact:displayName>
+ <ipxact:value>32</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LS_FIFO_WIDTHU" type="int">
+ <ipxact:name>LS_FIFO_WIDTHU</ipxact:name>
+ <ipxact:displayName>LS_FIFO_WIDTHU</ipxact:displayName>
+ <ipxact:value>5</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="UNUSED_TX_PARALLEL_WIDTH" type="int">
+ <ipxact:name>UNUSED_TX_PARALLEL_WIDTH</ipxact:name>
+ <ipxact:displayName>UNUSED_TX_PARALLEL_WIDTH</ipxact:displayName>
+ <ipxact:value>92</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="UNUSED_RX_PARALLEL_WIDTH" type="int">
+ <ipxact:name>UNUSED_RX_PARALLEL_WIDTH</ipxact:name>
+ <ipxact:displayName>UNUSED_RX_PARALLEL_WIDTH</ipxact:displayName>
+ <ipxact:value>72</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="XCVR_PLL_LOCKED_WIDTH" type="int">
+ <ipxact:name>XCVR_PLL_LOCKED_WIDTH</ipxact:name>
+ <ipxact:displayName>XCVR_PLL_LOCKED_WIDTH</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="RECONFIG_ADDRESS_WIDTH" type="int">
+ <ipxact:name>RECONFIG_ADDRESS_WIDTH</ipxact:name>
+ <ipxact:displayName>RECONFIG_ADDRESS_WIDTH</ipxact:displayName>
+ <ipxact:value>10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DEPTH_PIPE" type="int">
+ <ipxact:name>DEPTH_PIPE</ipxact:name>
+ <ipxact:displayName>Pipeline stages for link_clk domain reset signal</ipxact:displayName>
+ <ipxact:value>3</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="xcvr_ip" type="string">
+ <ipxact:name>xcvr_ip</ipxact:name>
+ <ipxact:displayName>xcvr_ip</ipxact:displayName>
+ <ipxact:value>ltile</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="die_types" type="string">
+ <ipxact:name>die_types</ipxact:name>
+ <ipxact:displayName>die_types</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="die_revisions" type="string">
+ <ipxact:name>die_revisions</ipxact:name>
+ <ipxact:displayName>die_revisions</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="support_c1" type="bit">
+ <ipxact:name>support_c1</ipxact:name>
+ <ipxact:displayName>support_c1</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="support_c2" type="bit">
+ <ipxact:name>support_c2</ipxact:name>
+ <ipxact:displayName>support_c2</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="support_c3" type="bit">
+ <ipxact:name>support_c3</ipxact:name>
+ <ipxact:displayName>support_c3</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="crete_tile_status" type="string">
+ <ipxact:name>crete_tile_status</ipxact:name>
+ <ipxact:displayName>Transceiver Tile</ipxact:displayName>
+ <ipxact:value>ltile</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_user_crete_tile" type="string">
+ <ipxact:name>gui_user_crete_tile</ipxact:name>
+ <ipxact:displayName>Transceiver Tile</ipxact:displayName>
+ <ipxact:value>htile</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="TEST_COMPONENTS_EN" type="bit">
+ <ipxact:name>TEST_COMPONENTS_EN</ipxact:name>
+ <ipxact:displayName>Add Test Components</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="TERMINATE_RECONFIG_EN" type="bit">
+ <ipxact:name>TERMINATE_RECONFIG_EN</ipxact:name>
+ <ipxact:displayName>Terminate Reconfig Signals</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_TYPE" type="string">
+ <ipxact:name>ED_TYPE</ipxact:name>
+ <ipxact:displayName>Select Design</ipxact:displayName>
+ <ipxact:value>NONE</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_FILESET_SIM" type="bit">
+ <ipxact:name>ED_FILESET_SIM</ipxact:name>
+ <ipxact:displayName>Simulation</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_FILESET_SYNTH" type="bit">
+ <ipxact:name>ED_FILESET_SYNTH</ipxact:name>
+ <ipxact:displayName>Synthesis</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_HDL_FORMAT_SIM" type="string">
+ <ipxact:name>ED_HDL_FORMAT_SIM</ipxact:name>
+ <ipxact:displayName>HDL Format</ipxact:displayName>
+ <ipxact:value>VERILOG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_SIM_PAT_TESTMODE" type="string">
+ <ipxact:name>ED_SIM_PAT_TESTMODE</ipxact:name>
+ <ipxact:displayName>Test pattern</ipxact:displayName>
+ <ipxact:value>PRBS_7</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_HDL_FORMAT_SYNTH" type="string">
+ <ipxact:name>ED_HDL_FORMAT_SYNTH</ipxact:name>
+ <ipxact:displayName>HDL Format</ipxact:displayName>
+ <ipxact:value>VERILOG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_DEV_KIT" type="string">
+ <ipxact:name>ED_DEV_KIT</ipxact:name>
+ <ipxact:displayName>Select Board</ipxact:displayName>
+ <ipxact:value>NONE</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="GUI_ED_DEV_KIT" type="string">
+ <ipxact:name>GUI_ED_DEV_KIT</ipxact:name>
+ <ipxact:displayName>Select Board</ipxact:displayName>
+ <ipxact:value>None</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_SINGLE_REFCLK" type="bit">
+ <ipxact:name>ED_SINGLE_REFCLK</ipxact:name>
+ <ipxact:displayName>Single reference clock (Advanced users only. Not recommended.)</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ED_3WIRE_SPI" type="bit">
+ <ipxact:name>ED_3WIRE_SPI</ipxact:name>
+ <ipxact:displayName>Generate 3-wire SPI module</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="SELECT_CUSTOM_DEVICE" type="bit">
+ <ipxact:name>SELECT_CUSTOM_DEVICE</ipxact:name>
+ <ipxact:displayName>Change Target Device</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DYN_CSR" type="string">
+ <ipxact:name>DYN_CSR</ipxact:name>
+ <ipxact:displayName>Dynamic CSR Configuration for DV purpose</ipxact:displayName>
+ <ipxact:value>DISABLE</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rcp_load_enable" type="int">
+ <ipxact:name>rcp_load_enable</ipxact:name>
+ <ipxact:displayName>Enable adaptation load soft IP</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="enable_adpt_multi_recipe" type="int">
+ <ipxact:name>enable_adpt_multi_recipe</ipxact:name>
+ <ipxact:displayName>enable_adpt_multi_recipe</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="cal_recipe_sel" type="string">
+ <ipxact:name>cal_recipe_sel</ipxact:name>
+ <ipxact:displayName>PMA adaptation Select </ipxact:displayName>
+ <ipxact:value>NRZ_28Gbps_VSR</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="enable_pma_adpt_disp" type="int">
+ <ipxact:name>enable_pma_adpt_disp</ipxact:name>
+ <ipxact:displayName>enable_pma_adpt_disp</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_val_a" type="int">
+ <ipxact:name>ctle_lf_val_a</ipxact:name>
+ <ipxact:displayName>GAINLF</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_val_ada_a" type="string">
+ <ipxact:name>ctle_lf_val_ada_a</ipxact:name>
+ <ipxact:displayName>GAINLF Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_min_a" type="int">
+ <ipxact:name>ctle_lf_min_a</ipxact:name>
+ <ipxact:displayName>CTLE LF Min</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_max_a" type="int">
+ <ipxact:name>ctle_lf_max_a</ipxact:name>
+ <ipxact:displayName>CTLE LF Max</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_val_a" type="int">
+ <ipxact:name>ctle_hf_val_a</ipxact:name>
+ <ipxact:displayName>GAINHF</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_val_ada_a" type="string">
+ <ipxact:name>ctle_hf_val_ada_a</ipxact:name>
+ <ipxact:displayName>GAINHF Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_min_a" type="int">
+ <ipxact:name>ctle_hf_min_a</ipxact:name>
+ <ipxact:displayName>CTLE HF Min</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_max_a" type="int">
+ <ipxact:name>ctle_hf_max_a</ipxact:name>
+ <ipxact:displayName>CTLE HF Max</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_val_a" type="int">
+ <ipxact:name>rf_p2_val_a</ipxact:name>
+ <ipxact:displayName>RF_P2</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_val_ada_a" type="string">
+ <ipxact:name>rf_p2_val_ada_a</ipxact:name>
+ <ipxact:displayName>RF_P2 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_min_a" type="int">
+ <ipxact:name>rf_p2_min_a</ipxact:name>
+ <ipxact:displayName>RF_P2_MIN</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_max_a" type="int">
+ <ipxact:name>rf_p2_max_a</ipxact:name>
+ <ipxact:displayName>RF_P2_MAX</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_val_a" type="int">
+ <ipxact:name>rf_p1_val_a</ipxact:name>
+ <ipxact:displayName>RF_P1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_val_ada_a" type="string">
+ <ipxact:name>rf_p1_val_ada_a</ipxact:name>
+ <ipxact:displayName>RF_P1 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_min_a" type="int">
+ <ipxact:name>rf_p1_min_a</ipxact:name>
+ <ipxact:displayName>RF_P1_MIN</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_max_a" type="int">
+ <ipxact:name>rf_p1_max_a</ipxact:name>
+ <ipxact:displayName>RF_P1_MAX</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_reserved0_a" type="int">
+ <ipxact:name>rf_reserved0_a</ipxact:name>
+ <ipxact:displayName>Reserved 0</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p0_val_a" type="int">
+ <ipxact:name>rf_p0_val_a</ipxact:name>
+ <ipxact:displayName>RF_P0</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p0_val_ada_a" type="string">
+ <ipxact:name>rf_p0_val_ada_a</ipxact:name>
+ <ipxact:displayName>RF_P0 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_reserved1_a" type="int">
+ <ipxact:name>rf_reserved1_a</ipxact:name>
+ <ipxact:displayName>Reserved 1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b0t_a" type="int">
+ <ipxact:name>rf_b0t_a</ipxact:name>
+ <ipxact:displayName>RF_B0T</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_gs1_val_a" type="int">
+ <ipxact:name>ctle_gs1_val_a</ipxact:name>
+ <ipxact:displayName>GS1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_gs2_val_a" type="int">
+ <ipxact:name>ctle_gs2_val_a</ipxact:name>
+ <ipxact:displayName>GS2</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b1_a" type="int">
+ <ipxact:name>rf_b1_a</ipxact:name>
+ <ipxact:displayName>RF_B1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b1_ada_a" type="string">
+ <ipxact:name>rf_b1_ada_a</ipxact:name>
+ <ipxact:displayName>RF_B1 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b0_a" type="int">
+ <ipxact:name>rf_b0_a</ipxact:name>
+ <ipxact:displayName>RF_B0</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b0_ada_a" type="string">
+ <ipxact:name>rf_b0_ada_a</ipxact:name>
+ <ipxact:displayName>RF_B0 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_a_a" type="int">
+ <ipxact:name>rf_a_a</ipxact:name>
+ <ipxact:displayName>RF_A</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_ctle_frz_a" type="int">
+ <ipxact:name>l_ctle_frz_a</ipxact:name>
+ <ipxact:displayName>l_ctle_frz_a</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_rf_frz_a" type="int">
+ <ipxact:name>l_rf_frz_a</ipxact:name>
+ <ipxact:displayName>l_rf_frz_a</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_val_b" type="int">
+ <ipxact:name>ctle_lf_val_b</ipxact:name>
+ <ipxact:displayName>GAINLF</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_val_ada_b" type="string">
+ <ipxact:name>ctle_lf_val_ada_b</ipxact:name>
+ <ipxact:displayName>GAINLF Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_min_b" type="int">
+ <ipxact:name>ctle_lf_min_b</ipxact:name>
+ <ipxact:displayName>CTLE LF Min</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_lf_max_b" type="int">
+ <ipxact:name>ctle_lf_max_b</ipxact:name>
+ <ipxact:displayName>CTLE LF Max</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_val_b" type="int">
+ <ipxact:name>ctle_hf_val_b</ipxact:name>
+ <ipxact:displayName>GAINHF</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_val_ada_b" type="string">
+ <ipxact:name>ctle_hf_val_ada_b</ipxact:name>
+ <ipxact:displayName>GAINHF Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_min_b" type="int">
+ <ipxact:name>ctle_hf_min_b</ipxact:name>
+ <ipxact:displayName>CTLE HF Min</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_hf_max_b" type="int">
+ <ipxact:name>ctle_hf_max_b</ipxact:name>
+ <ipxact:displayName>CTLE HF Max</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_val_b" type="int">
+ <ipxact:name>rf_p2_val_b</ipxact:name>
+ <ipxact:displayName>RF_P2</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_val_ada_b" type="string">
+ <ipxact:name>rf_p2_val_ada_b</ipxact:name>
+ <ipxact:displayName>RF_P2 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_min_b" type="int">
+ <ipxact:name>rf_p2_min_b</ipxact:name>
+ <ipxact:displayName>RF_P2_MIN</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p2_max_b" type="int">
+ <ipxact:name>rf_p2_max_b</ipxact:name>
+ <ipxact:displayName>RF_P2_MAX</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_val_b" type="int">
+ <ipxact:name>rf_p1_val_b</ipxact:name>
+ <ipxact:displayName>RF_P1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_val_ada_b" type="string">
+ <ipxact:name>rf_p1_val_ada_b</ipxact:name>
+ <ipxact:displayName>RF_P1 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_min_b" type="int">
+ <ipxact:name>rf_p1_min_b</ipxact:name>
+ <ipxact:displayName>RF_P1_MIN</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p1_max_b" type="int">
+ <ipxact:name>rf_p1_max_b</ipxact:name>
+ <ipxact:displayName>RF_P1_MAX</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_reserved0_b" type="int">
+ <ipxact:name>rf_reserved0_b</ipxact:name>
+ <ipxact:displayName>Reserved 0</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p0_val_b" type="int">
+ <ipxact:name>rf_p0_val_b</ipxact:name>
+ <ipxact:displayName>RF_P0</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_p0_val_ada_b" type="string">
+ <ipxact:name>rf_p0_val_ada_b</ipxact:name>
+ <ipxact:displayName>RF_P0 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_reserved1_b" type="int">
+ <ipxact:name>rf_reserved1_b</ipxact:name>
+ <ipxact:displayName>Reserved 1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b0t_b" type="int">
+ <ipxact:name>rf_b0t_b</ipxact:name>
+ <ipxact:displayName>RF_B0T</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_gs1_val_b" type="int">
+ <ipxact:name>ctle_gs1_val_b</ipxact:name>
+ <ipxact:displayName>GS1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ctle_gs2_val_b" type="int">
+ <ipxact:name>ctle_gs2_val_b</ipxact:name>
+ <ipxact:displayName>GS2</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b1_b" type="int">
+ <ipxact:name>rf_b1_b</ipxact:name>
+ <ipxact:displayName>RF_B1</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b1_ada_b" type="string">
+ <ipxact:name>rf_b1_ada_b</ipxact:name>
+ <ipxact:displayName>RF_B1 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b0_b" type="int">
+ <ipxact:name>rf_b0_b</ipxact:name>
+ <ipxact:displayName>RF_B0</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_b0_ada_b" type="string">
+ <ipxact:name>rf_b0_ada_b</ipxact:name>
+ <ipxact:displayName>RF_B0 Fix/Adaptable</ipxact:displayName>
+ <ipxact:value>adaptable</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="rf_a_b" type="int">
+ <ipxact:name>rf_a_b</ipxact:name>
+ <ipxact:displayName>RF_A</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_ctle_frz_b" type="int">
+ <ipxact:name>l_ctle_frz_b</ipxact:name>
+ <ipxact:displayName>l_ctle_frz_b</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_rf_frz_b" type="int">
+ <ipxact:name>l_rf_frz_b</ipxact:name>
+ <ipxact:displayName>l_rf_frz_b</ipxact:displayName>
+ <ipxact:value>999</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_multi_enable" type="int">
+ <ipxact:name>adpt_multi_enable</ipxact:name>
+ <ipxact:displayName>Enable multiple PMA configuration</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_cnt" type="int">
+ <ipxact:name>adpt_recipe_cnt</ipxact:name>
+ <ipxact:displayName>Number of PMA configuration</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_select" type="int">
+ <ipxact:name>adpt_recipe_select</ipxact:name>
+ <ipxact:displayName>Select a PMA configuration to load or store</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data0" type="string">
+ <ipxact:name>adpt_recipe_data0</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data0</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data1" type="string">
+ <ipxact:name>adpt_recipe_data1</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data1</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data2" type="string">
+ <ipxact:name>adpt_recipe_data2</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data2</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data3" type="string">
+ <ipxact:name>adpt_recipe_data3</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data3</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data4" type="string">
+ <ipxact:name>adpt_recipe_data4</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data4</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data5" type="string">
+ <ipxact:name>adpt_recipe_data5</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data5</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data6" type="string">
+ <ipxact:name>adpt_recipe_data6</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data6</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_recipe_data7" type="string">
+ <ipxact:name>adpt_recipe_data7</ipxact:name>
+ <ipxact:displayName>adpt_recipe_data7</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_params" type="string">
+ <ipxact:name>adpt_params</ipxact:name>
+ <ipxact:displayName>adpt_params</ipxact:displayName>
+ <ipxact:value>ctle_lf_val_a,ctle_lf_val_ada_a,ctle_lf_min_a,ctle_lf_max_a,ctle_hf_val_a,ctle_hf_val_ada_a,ctle_hf_min_a,ctle_hf_max_a,rf_p2_val_a,rf_p2_val_ada_a,rf_p2_min_a,rf_p2_max_a,rf_p1_val_a,rf_p1_val_ada_a,rf_p1_min_a,rf_p1_max_a,rf_reserved0_a,rf_p0_val_a,rf_p0_val_ada_a,rf_reserved1_a,rf_b0t_a,ctle_gs1_val_a,ctle_gs2_val_a,rf_b1_a,rf_b1_ada_a,rf_b0_a,rf_b0_ada_a,rf_a_a,ctle_lf_val_b,ctle_lf_val_ada_b,ctle_lf_min_b,ctle_lf_max_b,ctle_hf_val_b,ctle_hf_val_ada_b,ctle_hf_min_b,ctle_hf_max_b,rf_p2_val_b,rf_p2_val_ada_b,rf_p2_min_b,rf_p2_max_b,rf_p1_val_b,rf_p1_val_ada_b,rf_p1_min_b,rf_p1_max_b,rf_reserved0_b,rf_p0_val_b,rf_p0_val_ada_b,rf_reserved1_b,rf_b0t_b,ctle_gs1_val_b,ctle_gs2_val_b,rf_b1_b,rf_b1_ada_b,rf_b0_b,rf_b0_ada_b,rf_a_b</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_params_a" type="string">
+ <ipxact:name>adpt_params_a</ipxact:name>
+ <ipxact:displayName>adpt_params_a</ipxact:displayName>
+ <ipxact:value>ctle_lf_val_a,ctle_lf_val_ada_a,ctle_lf_min_a,ctle_lf_max_a,ctle_hf_val_a,ctle_hf_val_ada_a,ctle_hf_min_a,ctle_hf_max_a,rf_p2_val_a,rf_p2_val_ada_a,rf_p2_min_a,rf_p2_max_a,rf_p1_val_a,rf_p1_val_ada_a,rf_p1_min_a,rf_p1_max_a,rf_reserved0_a,rf_p0_val_a,rf_p0_val_ada_a,rf_reserved1_a,rf_b0t_a,ctle_gs1_val_a,ctle_gs2_val_a,rf_b1_a,rf_b1_ada_a,rf_b0_a,rf_b0_ada_a,rf_a_a</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_params_b" type="string">
+ <ipxact:name>adpt_params_b</ipxact:name>
+ <ipxact:displayName>adpt_params_b</ipxact:displayName>
+ <ipxact:value>ctle_lf_val_b,ctle_lf_val_ada_b,ctle_lf_min_b,ctle_lf_max_b,ctle_hf_val_b,ctle_hf_val_ada_b,ctle_hf_min_b,ctle_hf_max_b,rf_p2_val_b,rf_p2_val_ada_b,rf_p2_min_b,rf_p2_max_b,rf_p1_val_b,rf_p1_val_ada_b,rf_p1_min_b,rf_p1_max_b,rf_reserved0_b,rf_p0_val_b,rf_p0_val_ada_b,rf_reserved1_b,rf_b0t_b,ctle_gs1_val_b,ctle_gs2_val_b,rf_b1_b,rf_b1_ada_b,rf_b0_b,rf_b0_ada_b,rf_a_b</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_labels_a" type="string">
+ <ipxact:name>adpt_param_labels_a</ipxact:name>
+ <ipxact:displayName>Init. Parameters</ipxact:displayName>
+ <ipxact:value>GAINLF,GAINLF Fix/Adaptable,CTLE LF Min,CTLE LF Max,GAINHF,GAINHF Fix/Adaptable,CTLE HF Min,CTLE HF Max,RF_P2,RF_P2 Fix/Adaptable,RF_P2_MIN,RF_P2_MAX,RF_P1,RF_P1 Fix/Adaptable,RF_P1_MIN,RF_P1_MAX,Reserved 0,RF_P0,RF_P0 Fix/Adaptable,Reserved 1,RF_B0T,GS1,GS2,RF_B1,RF_B1 Fix/Adaptable,RF_B0,RF_B0 Fix/Adaptable,RF_A</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_labels_b" type="string">
+ <ipxact:name>adpt_param_labels_b</ipxact:name>
+ <ipxact:displayName>Cont. Parameters</ipxact:displayName>
+ <ipxact:value>GAINLF,GAINLF Fix/Adaptable,CTLE LF Min,CTLE LF Max,GAINHF,GAINHF Fix/Adaptable,CTLE HF Min,CTLE HF Max,RF_P2,RF_P2 Fix/Adaptable,RF_P2_MIN,RF_P2_MAX,RF_P1,RF_P1 Fix/Adaptable,RF_P1_MIN,RF_P1_MAX,Reserved 0,RF_P0,RF_P0 Fix/Adaptable,Reserved 1,RF_B0T,GS1,GS2,RF_B1,RF_B1 Fix/Adaptable,RF_B0,RF_B0 Fix/Adaptable,RF_A</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals0" type="string">
+ <ipxact:name>adpt_param_vals0</ipxact:name>
+ <ipxact:displayName>adpt_param_vals0</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals1" type="string">
+ <ipxact:name>adpt_param_vals1</ipxact:name>
+ <ipxact:displayName>adpt_param_vals1</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals2" type="string">
+ <ipxact:name>adpt_param_vals2</ipxact:name>
+ <ipxact:displayName>adpt_param_vals2</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals3" type="string">
+ <ipxact:name>adpt_param_vals3</ipxact:name>
+ <ipxact:displayName>adpt_param_vals3</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals4" type="string">
+ <ipxact:name>adpt_param_vals4</ipxact:name>
+ <ipxact:displayName>adpt_param_vals4</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals5" type="string">
+ <ipxact:name>adpt_param_vals5</ipxact:name>
+ <ipxact:displayName>adpt_param_vals5</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals6" type="string">
+ <ipxact:name>adpt_param_vals6</ipxact:name>
+ <ipxact:displayName>adpt_param_vals6</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals7" type="string">
+ <ipxact:name>adpt_param_vals7</ipxact:name>
+ <ipxact:displayName>adpt_param_vals7</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals0_a" type="string">
+ <ipxact:name>adpt_param_vals0_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 0</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals1_a" type="string">
+ <ipxact:name>adpt_param_vals1_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 1</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals2_a" type="string">
+ <ipxact:name>adpt_param_vals2_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 2</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals3_a" type="string">
+ <ipxact:name>adpt_param_vals3_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 3</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals4_a" type="string">
+ <ipxact:name>adpt_param_vals4_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 4</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals5_a" type="string">
+ <ipxact:name>adpt_param_vals5_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 5</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals6_a" type="string">
+ <ipxact:name>adpt_param_vals6_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 6</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals7_a" type="string">
+ <ipxact:name>adpt_param_vals7_a</ipxact:name>
+ <ipxact:displayName>PMA configuration 7</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals0_b" type="string">
+ <ipxact:name>adpt_param_vals0_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 0</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals1_b" type="string">
+ <ipxact:name>adpt_param_vals1_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 1</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals2_b" type="string">
+ <ipxact:name>adpt_param_vals2_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 2</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals3_b" type="string">
+ <ipxact:name>adpt_param_vals3_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 3</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals4_b" type="string">
+ <ipxact:name>adpt_param_vals4_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 4</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals5_b" type="string">
+ <ipxact:name>adpt_param_vals5_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 5</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals6_b" type="string">
+ <ipxact:name>adpt_param_vals6_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 6</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="adpt_param_vals7_b" type="string">
+ <ipxact:name>adpt_param_vals7_b</ipxact:name>
+ <ipxact:displayName>PMA configuration 7</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="AUTO_DEVICE" type="string">
+ <ipxact:name>AUTO_DEVICE</ipxact:name>
+ <ipxact:displayName>Auto DEVICE</ipxact:displayName>
+ <ipxact:value>10AX115U2F45E1SG</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_module_parameters>
+ <altera:altera_system_parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="device" type="string">
+ <ipxact:name>device</ipxact:name>
+ <ipxact:displayName>Device</ipxact:displayName>
+ <ipxact:value>10AX115U2F45E1SG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="deviceFamily" type="string">
+ <ipxact:name>deviceFamily</ipxact:name>
+ <ipxact:displayName>Device family</ipxact:displayName>
+ <ipxact:value>Arria 10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="deviceSpeedGrade" type="string">
+ <ipxact:name>deviceSpeedGrade</ipxact:name>
+ <ipxact:displayName>Device Speed Grade</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="generationId" type="int">
+ <ipxact:name>generationId</ipxact:name>
+ <ipxact:displayName>Generation Id</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bonusData" type="string">
+ <ipxact:name>bonusData</ipxact:name>
+ <ipxact:displayName>bonusData</ipxact:displayName>
+ <ipxact:value>bonusData
+{
+ element $system
+ {
+ datum _originalDeviceFamily
+ {
+ value = "Arria 10";
+ type = "String";
+ }
+ }
+ element jesd204_0
+ {
+ datum _sortIndex
+ {
+ value = "0";
+ type = "int";
+ }
+ }
+}
+</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hideFromIPCatalog" type="bit">
+ <ipxact:name>hideFromIPCatalog</ipxact:name>
+ <ipxact:displayName>Hide from IP Catalog</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="lockedInterfaceDefinition" type="string">
+ <ipxact:name>lockedInterfaceDefinition</ipxact:name>
+ <ipxact:displayName>lockedInterfaceDefinition</ipxact:displayName>
+ <ipxact:value><boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>rxlink_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxlink_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rxlink_rst_n</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxlink_rst_n_reset_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>rxlink_clk</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs_rst_n</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_rst_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs</name>
+ <type>avalon</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_chipselect</name>
+ <role>chipselect</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_address</name>
+ <role>address</role>
+ <direction>Input</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_readdata</name>
+ <role>readdata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_waitrequest</name>
+ <role>waitrequest</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_write</name>
+ <role>write</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
+ </entry>
+ <entry>
+ <key>addressGroup</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>1024</value>
+ </entry>
+ <entry>
+ <key>addressUnits</key>
+ <value>WORDS</value>
+ </entry>
+ <entry>
+ <key>alwaysBurstMaxBurst</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>jesd204_rx_avs_rst_n</value>
+ </entry>
+ <entry>
+ <key>bitsPerSymbol</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToMaster</key>
+ </entry>
+ <entry>
+ <key>burstOnBurstBoundariesOnly</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>burstcountUnits</key>
+ <value>WORDS</value>
+ </entry>
+ <entry>
+ <key>constantBurstBehavior</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>holdTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>interleaveBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isBigEndian</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isFlash</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isMemoryDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isNonVolatileStorage</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>linewrapBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maximumPendingReadTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>maximumPendingWriteTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>minimumReadLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumResponseLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumUninterruptedRunLength</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>readWaitTime</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>registerIncomingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>registerOutgoingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>setupTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>timingUnits</key>
+ <value>Cycles</value>
+ </entry>
+ <entry>
+ <key>transparentBridge</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>waitrequestAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>writeLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitTime</key>
+ <value>0</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_link</name>
+ <type>avalon_streaming</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_link_data</name>
+ <role>data</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_link_valid</name>
+ <role>valid</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_link_ready</name>
+ <role>ready</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>rxlink_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>rxlink_rst_n</value>
+ </entry>
+ <entry>
+ <key>beatsPerCycle</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>dataBitsPerSymbol</key>
+ <value>32</value>
+ </entry>
+ <entry>
+ <key>emptyWithinPacket</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>errorDescriptor</key>
+ </entry>
+ <entry>
+ <key>firstSymbolInHighOrderBits</key>
+ <value>true</value>
+ </entry>
+ <entry>
+ <key>highOrderSymbolAtMSB</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maxChannel</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>packetDescription</key>
+ <value></value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readyAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>readyLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>symbolsPerBeat</key>
+ <value>1</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>sof</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>sof</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>somf</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>somf</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>alldev_lane_aligned</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>alldev_lane_aligned</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>dev_lane_aligned</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>dev_lane_aligned</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>dev_sync_n</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>dev_sync_n</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>sysref</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>sysref</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_int</name>
+ <type>interrupt</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_int</name>
+ <role>irq</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedAddressablePoint</key>
+ <value>ip_arria10_e1sg_jesd204b_rx.jesd204_rx_avs</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>jesd204_rx_avs_rst_n</value>
+ </entry>
+ <entry>
+ <key>bridgedReceiverOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToReceiver</key>
+ </entry>
+ <entry>
+ <key>irqScheme</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_rx_testmode</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_rx_testmode</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_f</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_f</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_k</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_k</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_l</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_l</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_m</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_m</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_n</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_n</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_s</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_s</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_cf</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_cf</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_cs</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_cs</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>2</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_hd</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_hd</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_np</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_np</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_lane_powerdown</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_lane_powerdown</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_frame_error</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_frame_error</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_data</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_data_valid</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_data_valid</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_kchar_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_kchar_data</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_errdetect</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_errdetect</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_disperr</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_disperr</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>pll_ref_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>pll_ref_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rxphy_clk</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxphy_clk</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_islockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_islockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_serial_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_serial_data</name>
+ <role>rx_serial_data</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="systemInfos" type="string">
+ <ipxact:name>systemInfos</ipxact:name>
+ <ipxact:displayName>systemInfos</ipxact:displayName>
+ <ipxact:value><systemInfosDefinition>
+ <connPtSystemInfos>
+ <entry>
+ <key>jesd204_rx_avs</key>
+ <value>
+ <connectionPointName>jesd204_rx_avs</connectionPointName>
+ <suppliedSystemInfos/>
+ <consumedSystemInfos>
+ <entry>
+ <key>ADDRESS_MAP</key>
+ <value>&lt;address-map&gt;&lt;slave name='jesd204_rx_avs' start='0x0' end='0x400' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+ </entry>
+ <entry>
+ <key>ADDRESS_WIDTH</key>
+ <value>10</value>
+ </entry>
+ <entry>
+ <key>MAX_SLAVE_DATA_WIDTH</key>
+ <value>32</value>
+ </entry>
+ </consumedSystemInfos>
+ </value>
+ </entry>
+ </connPtSystemInfos>
+</systemInfosDefinition></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_system_parameters>
+ <altera:altera_interface_boundary>
+ <altera:interface_mapping altera:name="alldev_lane_aligned" altera:internal="jesd204_0.alldev_lane_aligned" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="alldev_lane_aligned" altera:internal="alldev_lane_aligned"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_cf" altera:internal="jesd204_0.csr_cf" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_cf" altera:internal="csr_cf"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_cs" altera:internal="jesd204_0.csr_cs" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_cs" altera:internal="csr_cs"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_f" altera:internal="jesd204_0.csr_f" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_f" altera:internal="csr_f"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_hd" altera:internal="jesd204_0.csr_hd" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_hd" altera:internal="csr_hd"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_k" altera:internal="jesd204_0.csr_k" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_k" altera:internal="csr_k"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_l" altera:internal="jesd204_0.csr_l" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_l" altera:internal="csr_l"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_lane_powerdown" altera:internal="jesd204_0.csr_lane_powerdown" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_lane_powerdown" altera:internal="csr_lane_powerdown"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_m" altera:internal="jesd204_0.csr_m" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_m" altera:internal="csr_m"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_n" altera:internal="jesd204_0.csr_n" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_n" altera:internal="csr_n"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_np" altera:internal="jesd204_0.csr_np" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_np" altera:internal="csr_np"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_rx_testmode" altera:internal="jesd204_0.csr_rx_testmode" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_rx_testmode" altera:internal="csr_rx_testmode"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_s" altera:internal="jesd204_0.csr_s" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="csr_s" altera:internal="csr_s"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_tx_testmode" altera:internal="jesd204_0.csr_tx_testmode"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_tx_testpattern_a" altera:internal="jesd204_0.csr_tx_testpattern_a"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_tx_testpattern_b" altera:internal="jesd204_0.csr_tx_testpattern_b"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_tx_testpattern_c" altera:internal="jesd204_0.csr_tx_testpattern_c"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="csr_tx_testpattern_d" altera:internal="jesd204_0.csr_tx_testpattern_d"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="dev_lane_aligned" altera:internal="jesd204_0.dev_lane_aligned" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="dev_lane_aligned" altera:internal="dev_lane_aligned"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="dev_sync_n" altera:internal="jesd204_0.dev_sync_n" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="dev_sync_n" altera:internal="dev_sync_n"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_avs" altera:internal="jesd204_0.jesd204_rx_avs" altera:type="avalon" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_avs_address" altera:internal="jesd204_rx_avs_address"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_avs_chipselect" altera:internal="jesd204_rx_avs_chipselect"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_avs_read" altera:internal="jesd204_rx_avs_read"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_avs_readdata" altera:internal="jesd204_rx_avs_readdata"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_avs_waitrequest" altera:internal="jesd204_rx_avs_waitrequest"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_avs_write" altera:internal="jesd204_rx_avs_write"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_avs_writedata" altera:internal="jesd204_rx_avs_writedata"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_avs_clk" altera:internal="jesd204_0.jesd204_rx_avs_clk" altera:type="clock" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_avs_clk" altera:internal="jesd204_rx_avs_clk"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_avs_rst_n" altera:internal="jesd204_0.jesd204_rx_avs_rst_n" altera:type="reset" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_avs_rst_n" altera:internal="jesd204_rx_avs_rst_n"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_dlb_data" altera:internal="jesd204_0.jesd204_rx_dlb_data" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_dlb_data" altera:internal="jesd204_rx_dlb_data"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_dlb_data_valid" altera:internal="jesd204_0.jesd204_rx_dlb_data_valid" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_dlb_data_valid" altera:internal="jesd204_rx_dlb_data_valid"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_dlb_disperr" altera:internal="jesd204_0.jesd204_rx_dlb_disperr" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_dlb_disperr" altera:internal="jesd204_rx_dlb_disperr"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_dlb_errdetect" altera:internal="jesd204_0.jesd204_rx_dlb_errdetect" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_dlb_errdetect" altera:internal="jesd204_rx_dlb_errdetect"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_dlb_kchar_data" altera:internal="jesd204_0.jesd204_rx_dlb_kchar_data" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_dlb_kchar_data" altera:internal="jesd204_rx_dlb_kchar_data"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_frame_error" altera:internal="jesd204_0.jesd204_rx_frame_error" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_frame_error" altera:internal="jesd204_rx_frame_error"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_int" altera:internal="jesd204_0.jesd204_rx_int" altera:type="interrupt" altera:dir="end">
+ <altera:port_mapping altera:name="jesd204_rx_int" altera:internal="jesd204_rx_int"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_rx_link" altera:internal="jesd204_0.jesd204_rx_link" altera:type="avalon_streaming" altera:dir="start">
+ <altera:port_mapping altera:name="jesd204_rx_link_data" altera:internal="jesd204_rx_link_data"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_link_ready" altera:internal="jesd204_rx_link_ready"></altera:port_mapping>
+ <altera:port_mapping altera:name="jesd204_rx_link_valid" altera:internal="jesd204_rx_link_valid"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_avs" altera:internal="jesd204_0.jesd204_tx_avs"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_avs_clk" altera:internal="jesd204_0.jesd204_tx_avs_clk"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_avs_rst_n" altera:internal="jesd204_0.jesd204_tx_avs_rst_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_dlb_data" altera:internal="jesd204_0.jesd204_tx_dlb_data"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_dlb_kchar_data" altera:internal="jesd204_0.jesd204_tx_dlb_kchar_data"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_frame_error" altera:internal="jesd204_0.jesd204_tx_frame_error"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_frame_ready" altera:internal="jesd204_0.jesd204_tx_frame_ready"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_int" altera:internal="jesd204_0.jesd204_tx_int"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="jesd204_tx_link" altera:internal="jesd204_0.jesd204_tx_link"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="mdev_sync_n" altera:internal="jesd204_0.mdev_sync_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="pll_locked" altera:internal="jesd204_0.pll_locked"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="pll_ref_clk" altera:internal="jesd204_0.pll_ref_clk" altera:type="clock" altera:dir="end">
+ <altera:port_mapping altera:name="pll_ref_clk" altera:internal="pll_ref_clk"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_analogreset" altera:internal="jesd204_0.rx_analogreset" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="rx_analogreset" altera:internal="rx_analogreset"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_cal_busy" altera:internal="jesd204_0.rx_cal_busy" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="rx_cal_busy" altera:internal="rx_cal_busy"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_cf" altera:internal="jesd204_0.rx_csr_cf"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_cs" altera:internal="jesd204_0.rx_csr_cs"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_f" altera:internal="jesd204_0.rx_csr_f"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_hd" altera:internal="jesd204_0.rx_csr_hd"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_k" altera:internal="jesd204_0.rx_csr_k"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_l" altera:internal="jesd204_0.rx_csr_l"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_lane_powerdown" altera:internal="jesd204_0.rx_csr_lane_powerdown"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_m" altera:internal="jesd204_0.rx_csr_m"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_n" altera:internal="jesd204_0.rx_csr_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_np" altera:internal="jesd204_0.rx_csr_np"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_csr_s" altera:internal="jesd204_0.rx_csr_s"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_dev_sync_n" altera:internal="jesd204_0.rx_dev_sync_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_digitalreset" altera:internal="jesd204_0.rx_digitalreset" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="rx_digitalreset" altera:internal="rx_digitalreset"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_islockedtodata" altera:internal="jesd204_0.rx_islockedtodata" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="rx_islockedtodata" altera:internal="rx_islockedtodata"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_pll_ref_clk" altera:internal="jesd204_0.rx_pll_ref_clk"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_serial_data" altera:internal="jesd204_0.rx_serial_data" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="rx_serial_data" altera:internal="rx_serial_data"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_seriallpbken" altera:internal="jesd204_0.rx_seriallpbken"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_sof" altera:internal="jesd204_0.rx_sof"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_somf" altera:internal="jesd204_0.rx_somf"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rx_sysref" altera:internal="jesd204_0.rx_sysref"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="rxlink_clk" altera:internal="jesd204_0.rxlink_clk" altera:type="clock" altera:dir="end">
+ <altera:port_mapping altera:name="rxlink_clk" altera:internal="rxlink_clk"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rxlink_rst_n" altera:internal="jesd204_0.rxlink_rst_n" altera:type="reset" altera:dir="end">
+ <altera:port_mapping altera:name="rxlink_rst_n_reset_n" altera:internal="rxlink_rst_n_reset_n"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="rxphy_clk" altera:internal="jesd204_0.rxphy_clk" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="rxphy_clk" altera:internal="rxphy_clk"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="sof" altera:internal="jesd204_0.sof" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="sof" altera:internal="sof"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="somf" altera:internal="jesd204_0.somf" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="somf" altera:internal="somf"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="sync_n" altera:internal="jesd204_0.sync_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="sysref" altera:internal="jesd204_0.sysref" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="sysref" altera:internal="sysref"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_analogreset" altera:internal="jesd204_0.tx_analogreset"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_bonding_clocks_ch0" altera:internal="jesd204_0.tx_bonding_clocks_ch0"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_bonding_clocks_ch1" altera:internal="jesd204_0.tx_bonding_clocks_ch1"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_cal_busy" altera:internal="jesd204_0.tx_cal_busy"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_cf" altera:internal="jesd204_0.tx_csr_cf"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_cs" altera:internal="jesd204_0.tx_csr_cs"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_f" altera:internal="jesd204_0.tx_csr_f"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_hd" altera:internal="jesd204_0.tx_csr_hd"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_k" altera:internal="jesd204_0.tx_csr_k"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_l" altera:internal="jesd204_0.tx_csr_l"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_lane_powerdown" altera:internal="jesd204_0.tx_csr_lane_powerdown"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_m" altera:internal="jesd204_0.tx_csr_m"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_n" altera:internal="jesd204_0.tx_csr_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_np" altera:internal="jesd204_0.tx_csr_np"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_csr_s" altera:internal="jesd204_0.tx_csr_s"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_dev_sync_n" altera:internal="jesd204_0.tx_dev_sync_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_digitalreset" altera:internal="jesd204_0.tx_digitalreset"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_serial_data" altera:internal="jesd204_0.tx_serial_data"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_somf" altera:internal="jesd204_0.tx_somf"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="tx_sysref" altera:internal="jesd204_0.tx_sysref"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="txlink_clk" altera:internal="jesd204_0.txlink_clk"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="txlink_rst_n" altera:internal="jesd204_0.txlink_rst_n"></altera:interface_mapping>
+ <altera:interface_mapping altera:name="txphy_clk" altera:internal="jesd204_0.txphy_clk"></altera:interface_mapping>
+ </altera:altera_interface_boundary>
+ <altera:altera_has_warnings>false</altera:altera_has_warnings>
+ <altera:altera_has_errors>false</altera:altera_has_errors>
+ </ipxact:vendorExtensions>
+</ipxact:component>
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz_12ch.qsys b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz_12ch.qsys
new file mode 100644
index 0000000000000000000000000000000000000000..c4ed31506907439a2e3c34051e354636b59c4eca
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_200MHz_12ch.qsys
@@ -0,0 +1,3633 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<system name="ip_arria10_e1sg_jesd204b_rx_200MHz">
+ <component
+ name="$${FILENAME}"
+ displayName="$${FILENAME}"
+ version="1.0"
+ description=""
+ tags=""
+ categories="System"
+ tool="QsysPro" />
+ <parameter name="bonusData"><![CDATA[bonusData
+{
+ element jesd204_0
+ {
+ datum _sortIndex
+ {
+ value = "0";
+ type = "int";
+ }
+ }
+}
+]]></parameter>
+ <parameter name="device" value="10AX115U2F45E1SG" />
+ <parameter name="deviceFamily" value="Arria 10" />
+ <parameter name="deviceSpeedGrade" value="1" />
+ <parameter name="fabricMode" value="QSYS" />
+ <parameter name="generateLegacySim" value="false" />
+ <parameter name="generationId" value="0" />
+ <parameter name="globalResetBus" value="false" />
+ <parameter name="hdlLanguage" value="VERILOG" />
+ <parameter name="hideFromIPCatalog" value="false" />
+ <parameter name="lockedInterfaceDefinition" value="" />
+ <parameter name="sopcBorderPoints" value="false" />
+ <parameter name="systemHash" value="0" />
+ <parameter name="systemInfos"><![CDATA[<systemInfosDefinition>
+ <connPtSystemInfos>
+ <entry>
+ <key>jesd204_rx_avs</key>
+ <value>
+ <connectionPointName>jesd204_rx_avs</connectionPointName>
+ <suppliedSystemInfos/>
+ <consumedSystemInfos>
+ <entry>
+ <key>ADDRESS_MAP</key>
+ <value><address-map><slave name='jesd204_0.jesd204_rx_avs' start='0x0' end='0x400' datawidth='32' /></address-map></value>
+ </entry>
+ <entry>
+ <key>ADDRESS_WIDTH</key>
+ <value>10</value>
+ </entry>
+ <entry>
+ <key>MAX_SLAVE_DATA_WIDTH</key>
+ <value>32</value>
+ </entry>
+ </consumedSystemInfos>
+ </value>
+ </entry>
+ </connPtSystemInfos>
+</systemInfosDefinition>]]></parameter>
+ <parameter name="systemScripts" value="" />
+ <parameter name="testBenchDutName" value="" />
+ <parameter name="timeStamp" value="0" />
+ <parameter name="useTestBenchNamingPattern" value="false" />
+ <instanceScript></instanceScript>
+ <interface name="csr_cf" internal="jesd204_0.csr_cf" type="conduit" dir="end" />
+ <interface name="csr_cs" internal="jesd204_0.csr_cs" type="conduit" dir="end" />
+ <interface name="csr_f" internal="jesd204_0.csr_f" type="conduit" dir="end" />
+ <interface name="csr_hd" internal="jesd204_0.csr_hd" type="conduit" dir="end" />
+ <interface name="csr_k" internal="jesd204_0.csr_k" type="conduit" dir="end" />
+ <interface name="csr_l" internal="jesd204_0.csr_l" type="conduit" dir="end" />
+ <interface
+ name="csr_lane_powerdown"
+ internal="jesd204_0.csr_lane_powerdown"
+ type="conduit"
+ dir="end" />
+ <interface name="csr_m" internal="jesd204_0.csr_m" type="conduit" dir="end" />
+ <interface name="csr_n" internal="jesd204_0.csr_n" type="conduit" dir="end" />
+ <interface name="csr_np" internal="jesd204_0.csr_np" type="conduit" dir="end" />
+ <interface
+ name="csr_rx_testmode"
+ internal="jesd204_0.csr_rx_testmode"
+ type="conduit"
+ dir="end" />
+ <interface name="csr_s" internal="jesd204_0.csr_s" type="conduit" dir="end" />
+ <interface
+ name="dev_lane_aligned"
+ internal="jesd204_0.dev_lane_aligned"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="dev_sync_n"
+ internal="jesd204_0.dev_sync_n"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="jesd204_0_alldev_lane_aligned"
+ internal="jesd204_0.alldev_lane_aligned"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="jesd204_rx_avs"
+ internal="jesd204_0.jesd204_rx_avs"
+ type="avalon"
+ dir="end" />
+ <interface
+ name="jesd204_rx_avs_clk"
+ internal="jesd204_0.jesd204_rx_avs_clk"
+ type="clock"
+ dir="end" />
+ <interface
+ name="jesd204_rx_avs_rst_n"
+ internal="jesd204_0.jesd204_rx_avs_rst_n"
+ type="reset"
+ dir="end" />
+ <interface
+ name="jesd204_rx_dlb_data"
+ internal="jesd204_0.jesd204_rx_dlb_data"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="jesd204_rx_dlb_data_valid"
+ internal="jesd204_0.jesd204_rx_dlb_data_valid"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="jesd204_rx_dlb_disperr"
+ internal="jesd204_0.jesd204_rx_dlb_disperr"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="jesd204_rx_dlb_errdetect"
+ internal="jesd204_0.jesd204_rx_dlb_errdetect"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="jesd204_rx_dlb_kchar_data"
+ internal="jesd204_0.jesd204_rx_dlb_kchar_data"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="jesd204_rx_frame_error"
+ internal="jesd204_0.jesd204_rx_frame_error"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="jesd204_rx_int"
+ internal="jesd204_0.jesd204_rx_int"
+ type="interrupt"
+ dir="end" />
+ <interface
+ name="jesd204_rx_link"
+ internal="jesd204_0.jesd204_rx_link"
+ type="avalon_streaming"
+ dir="start" />
+ <interface
+ name="pll_ref_clk"
+ internal="jesd204_0.pll_ref_clk"
+ type="clock"
+ dir="end" />
+ <interface
+ name="rx_analogreset"
+ internal="jesd204_0.rx_analogreset"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="rx_cal_busy"
+ internal="jesd204_0.rx_cal_busy"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="rx_digitalreset"
+ internal="jesd204_0.rx_digitalreset"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="rx_islockedtodata"
+ internal="jesd204_0.rx_islockedtodata"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="rx_serial_data"
+ internal="jesd204_0.rx_serial_data"
+ type="conduit"
+ dir="end" />
+ <interface
+ name="rxlink_clk"
+ internal="jesd204_0.rxlink_clk"
+ type="clock"
+ dir="end" />
+ <interface
+ name="rxlink_rst_n"
+ internal="jesd204_0.rxlink_rst_n"
+ type="reset"
+ dir="end" />
+ <interface
+ name="rxphy_clk"
+ internal="jesd204_0.rxphy_clk"
+ type="conduit"
+ dir="end" />
+ <interface name="sof" internal="jesd204_0.sof" type="conduit" dir="end" />
+ <interface name="somf" internal="jesd204_0.somf" type="conduit" dir="end" />
+ <interface name="sysref" internal="jesd204_0.sysref" type="conduit" dir="end" />
+ <module
+ name="jesd204_0"
+ kind="altera_generic_component"
+ version="1.0"
+ enabled="1">
+ <parameter name="componentDefinition"><![CDATA[<componentDefinition>
+ <boundary>
+ <interfaces>
+ <interface>
+ <name>alldev_lane_aligned</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>alldev_lane_aligned</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_cf</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_cf</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_cs</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_cs</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>2</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_f</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_f</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_hd</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_hd</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_k</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_k</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_l</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_l</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_lane_powerdown</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_lane_powerdown</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_m</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_m</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_n</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_n</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_np</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_np</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_rx_testmode</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_rx_testmode</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_s</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_s</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>dev_lane_aligned</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>dev_lane_aligned</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>dev_sync_n</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>dev_sync_n</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs</name>
+ <type>avalon</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_chipselect</name>
+ <role>chipselect</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_address</name>
+ <role>address</role>
+ <direction>Input</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_readdata</name>
+ <role>readdata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_waitrequest</name>
+ <role>waitrequest</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_write</name>
+ <role>write</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
+ </entry>
+ <entry>
+ <key>addressGroup</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>1024</value>
+ </entry>
+ <entry>
+ <key>addressUnits</key>
+ <value>WORDS</value>
+ </entry>
+ <entry>
+ <key>alwaysBurstMaxBurst</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>jesd204_rx_avs_rst_n</value>
+ </entry>
+ <entry>
+ <key>bitsPerSymbol</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToMaster</key>
+ </entry>
+ <entry>
+ <key>burstOnBurstBoundariesOnly</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>burstcountUnits</key>
+ <value>WORDS</value>
+ </entry>
+ <entry>
+ <key>constantBurstBehavior</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>holdTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>interleaveBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isBigEndian</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isFlash</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isMemoryDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isNonVolatileStorage</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>linewrapBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maximumPendingReadTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>maximumPendingWriteTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>minimumReadLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumResponseLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumUninterruptedRunLength</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>readWaitTime</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>registerIncomingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>registerOutgoingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>setupTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>timingUnits</key>
+ <value>Cycles</value>
+ </entry>
+ <entry>
+ <key>transparentBridge</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>waitrequestAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>writeLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitTime</key>
+ <value>0</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs_rst_n</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_rst_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_data</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_data_valid</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_data_valid</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_disperr</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_disperr</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_errdetect</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_errdetect</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_kchar_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_kchar_data</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_frame_error</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_frame_error</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_int</name>
+ <type>interrupt</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_int</name>
+ <role>irq</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedAddressablePoint</key>
+ <value>jesd204_0.jesd204_rx_avs</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>jesd204_rx_avs_rst_n</value>
+ </entry>
+ <entry>
+ <key>bridgedReceiverOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToReceiver</key>
+ </entry>
+ <entry>
+ <key>irqScheme</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_link</name>
+ <type>avalon_streaming</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_link_data</name>
+ <role>data</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_link_valid</name>
+ <role>valid</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_link_ready</name>
+ <role>ready</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>rxlink_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>rxlink_rst_n</value>
+ </entry>
+ <entry>
+ <key>beatsPerCycle</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>dataBitsPerSymbol</key>
+ <value>32</value>
+ </entry>
+ <entry>
+ <key>emptyWithinPacket</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>errorDescriptor</key>
+ </entry>
+ <entry>
+ <key>firstSymbolInHighOrderBits</key>
+ <value>true</value>
+ </entry>
+ <entry>
+ <key>highOrderSymbolAtMSB</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maxChannel</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>packetDescription</key>
+ <value></value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readyAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>readyLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>symbolsPerBeat</key>
+ <value>1</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>pll_ref_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>pll_ref_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_islockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_islockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_serial_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_serial_data</name>
+ <role>rx_serial_data</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rxlink_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxlink_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rxlink_rst_n</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxlink_rst_n_reset_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>rxlink_clk</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rxphy_clk</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxphy_clk</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>sof</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>sof</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>somf</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>somf</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>sysref</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>sysref</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+ </boundary>
+ <originalModuleInfo>
+ <className>altera_jesd204</className>
+ <version>19.2.0</version>
+ <displayName>JESD204B Intel FPGA IP</displayName>
+ </originalModuleInfo>
+ <systemInfoParameterDescriptors>
+ <descriptors>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>AUTO_DEVICE</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfotype>DEVICE</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>DEVICE_FAMILY</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfotype>DEVICE_FAMILY</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>DEVICE_SPEEDGRADE</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfotype>DEVICE_SPEEDGRADE</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>die_revisions</parameterName>
+ <parameterType>[Ljava.lang.String;</parameterType>
+ <systemInfotype>DEVICE_DIE_REVISIONS</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>die_types</parameterName>
+ <parameterType>[Ljava.lang.String;</parameterType>
+ <systemInfotype>DEVICE_DIE_TYPES</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>part_trait_dp</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfoArgs>DEVICE</systemInfoArgs>
+ <systemInfotype>PART_TRAIT</systemInfotype>
+ </descriptor>
+ </descriptors>
+ </systemInfoParameterDescriptors>
+ <systemInfos>
+ <connPtSystemInfos>
+ <entry>
+ <key>jesd204_rx_avs</key>
+ <value>
+ <connectionPointName>jesd204_rx_avs</connectionPointName>
+ <suppliedSystemInfos>
+ <entry>
+ <key>ADDRESS_MAP</key>
+ <value><address-map><slave name='jesd204_rx_avs' start='0x0' end='0x400' datawidth='32' /></address-map></value>
+ </entry>
+ <entry>
+ <key>ADDRESS_WIDTH</key>
+ <value>10</value>
+ </entry>
+ <entry>
+ <key>MAX_SLAVE_DATA_WIDTH</key>
+ <value>32</value>
+ </entry>
+ </suppliedSystemInfos>
+ <consumedSystemInfos/>
+ </value>
+ </entry>
+ </connPtSystemInfos>
+ </systemInfos>
+</componentDefinition>]]></parameter>
+ <parameter name="defaultBoundary"><![CDATA[<boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>rxlink_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxlink_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rxlink_rst_n</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxlink_rst_n_reset_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>rxlink_clk</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs_rst_n</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_rst_n</name>
+ <role>reset_n</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>DEASSERT</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_avs</name>
+ <type>avalon</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_avs_chipselect</name>
+ <role>chipselect</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_address</name>
+ <role>address</role>
+ <direction>Input</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_readdata</name>
+ <role>readdata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_waitrequest</name>
+ <role>waitrequest</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_write</name>
+ <role>write</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_avs_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
+ </entry>
+ <entry>
+ <key>addressGroup</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>1024</value>
+ </entry>
+ <entry>
+ <key>addressUnits</key>
+ <value>WORDS</value>
+ </entry>
+ <entry>
+ <key>alwaysBurstMaxBurst</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>jesd204_rx_avs_rst_n</value>
+ </entry>
+ <entry>
+ <key>bitsPerSymbol</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToMaster</key>
+ </entry>
+ <entry>
+ <key>burstOnBurstBoundariesOnly</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>burstcountUnits</key>
+ <value>WORDS</value>
+ </entry>
+ <entry>
+ <key>constantBurstBehavior</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>holdTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>interleaveBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isBigEndian</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isFlash</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isMemoryDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isNonVolatileStorage</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>linewrapBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maximumPendingReadTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>maximumPendingWriteTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>minimumReadLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumResponseLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumUninterruptedRunLength</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>readWaitTime</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>registerIncomingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>registerOutgoingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>setupTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>timingUnits</key>
+ <value>Cycles</value>
+ </entry>
+ <entry>
+ <key>transparentBridge</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>waitrequestAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>writeLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitTime</key>
+ <value>0</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_link</name>
+ <type>avalon_streaming</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_link_data</name>
+ <role>data</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_link_valid</name>
+ <role>valid</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>jesd204_rx_link_ready</name>
+ <role>ready</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>rxlink_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>rxlink_rst_n</value>
+ </entry>
+ <entry>
+ <key>beatsPerCycle</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>dataBitsPerSymbol</key>
+ <value>32</value>
+ </entry>
+ <entry>
+ <key>emptyWithinPacket</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>errorDescriptor</key>
+ </entry>
+ <entry>
+ <key>firstSymbolInHighOrderBits</key>
+ <value>true</value>
+ </entry>
+ <entry>
+ <key>highOrderSymbolAtMSB</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maxChannel</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>packetDescription</key>
+ <value></value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readyAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>readyLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>symbolsPerBeat</key>
+ <value>1</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>sof</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>sof</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>somf</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>somf</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>alldev_lane_aligned</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>alldev_lane_aligned</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>dev_lane_aligned</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>dev_lane_aligned</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>dev_sync_n</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>dev_sync_n</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>sysref</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>sysref</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_int</name>
+ <type>interrupt</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_int</name>
+ <role>irq</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedAddressablePoint</key>
+ <value>jesd204_0.jesd204_rx_avs</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>jesd204_rx_avs_clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>jesd204_rx_avs_rst_n</value>
+ </entry>
+ <entry>
+ <key>bridgedReceiverOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToReceiver</key>
+ </entry>
+ <entry>
+ <key>irqScheme</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_rx_testmode</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_rx_testmode</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_f</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_f</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_k</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_k</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_l</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_l</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_m</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_m</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_n</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_n</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_s</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_s</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_cf</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_cf</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_cs</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_cs</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>2</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_hd</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_hd</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_np</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_np</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>5</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_lane_powerdown</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_lane_powerdown</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_frame_error</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_frame_error</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_data</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_data_valid</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_data_valid</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_kchar_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_kchar_data</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_errdetect</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_errdetect</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>jesd204_rx_dlb_disperr</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>jesd204_rx_dlb_disperr</name>
+ <role>export</role>
+ <direction>Input</direction>
+ <width>4</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>pll_ref_clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>pll_ref_clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rxphy_clk</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rxphy_clk</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_islockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_islockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_serial_data</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_serial_data</name>
+ <role>rx_serial_data</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition>]]></parameter>
+ <parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
+ <hdlLibraryName>ip_arria10_e1sg_jesd204b_rx_200MHz</hdlLibraryName>
+ <fileSets>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_200MHz</fileSetFixedName>
+ <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_200MHz</fileSetFixedName>
+ <fileSetKind>SIM_VERILOG</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_200MHz</fileSetFixedName>
+ <fileSetKind>SIM_VHDL</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ </fileSets>
+</generationInfoDefinition>]]></parameter>
+ <parameter name="hlsFile" value="" />
+ <parameter name="logicalView">ip_arria10_e1sg_jesd204b_rx_200MHz.ip</parameter>
+ <parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
+ <assignmentValueMap/>
+</assignmentDefinition>]]></parameter>
+ <parameter name="svInterfaceDefinition" value="" />
+ </module>
+</system>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.ip b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.ip
deleted file mode 100644
index 379f047968a48b237b32a50b6c244de2dc6b02a7..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.ip
+++ /dev/null
@@ -1,4186 +0,0 @@
-<?xml version="1.0" ?>
-<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
- <spirit:vendor>Intel Corporation</spirit:vendor>
- <spirit:library>ip_arria10_e1sg_jesd204b_rx_core_pll</spirit:library>
- <spirit:name>core_pll</spirit:name>
- <spirit:version>18.0</spirit:version>
- <spirit:busInterfaces>
- <spirit:busInterface>
- <spirit:name>locked</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>export</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>locked</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>outclk0</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
- <spirit:master></spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>clk</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>outclk_0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedDirectClock</spirit:name>
- <spirit:displayName>Associated direct clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedDirectClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clockRate</spirit:name>
- <spirit:displayName>Clock rate</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clockRate">100000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clockRateKnown</spirit:name>
- <spirit:displayName>Clock rate known</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="clockRateKnown">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>externallyDriven</spirit:name>
- <spirit:displayName>Externally driven</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ptfSchematicName</spirit:name>
- <spirit:displayName>PTF schematic name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>outclk1</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
- <spirit:master></spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>clk</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>outclk_1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedDirectClock</spirit:name>
- <spirit:displayName>Associated direct clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedDirectClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clockRate</spirit:name>
- <spirit:displayName>Clock rate</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clockRate">200000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clockRateKnown</spirit:name>
- <spirit:displayName>Clock rate known</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="clockRateKnown">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>externallyDriven</spirit:name>
- <spirit:displayName>Externally driven</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ptfSchematicName</spirit:name>
- <spirit:displayName>PTF schematic name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>refclk</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>clk</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>refclk</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>clockRate</spirit:name>
- <spirit:displayName>Clock rate</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clockRate">200000000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>externallyDriven</spirit:name>
- <spirit:displayName>Externally driven</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ptfSchematicName</spirit:name>
- <spirit:displayName>PTF schematic name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rst</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">NONE</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- </spirit:busInterfaces>
- <spirit:model>
- <spirit:views>
- <spirit:view>
- <spirit:name>QUARTUS_SYNTH</spirit:name>
- <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
- <spirit:modelName>altera_iopll</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>QUARTUS_SYNTH</spirit:localName>
- </spirit:fileSetRef>
- </spirit:view>
- </spirit:views>
- <spirit:ports>
- <spirit:port>
- <spirit:name>rst</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>refclk</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>locked</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>outclk_0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>outclk_1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- </spirit:ports>
- </spirit:model>
- <spirit:vendorExtensions>
- <altera:entity_info>
- <spirit:vendor>Intel Corporation</spirit:vendor>
- <spirit:library>ip_arria10_e1sg_jesd204b_rx_core_pll</spirit:library>
- <spirit:name>altera_iopll</spirit:name>
- <spirit:version>18.0</spirit:version>
- </altera:entity_info>
- <altera:altera_module_parameters>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>gui_device_family</spirit:name>
- <spirit:displayName>Device Family</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_device_family">Arria 10</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_device_component</spirit:name>
- <spirit:displayName>Component</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_device_component">10AX115U2F45E1SG</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_device_speed_grade</spirit:name>
- <spirit:displayName>Speed Grade</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_device_speed_grade">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_debug_mode</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_debug_mode">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_skip_sdc_generation</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_skip_sdc_generation">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_include_iossm</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_include_iossm">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cal_code_hex_file</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_cal_code_hex_file">iossm.hex</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_parameter_table_hex_file</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_parameter_table_hex_file">seq_params_sim.hex</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_tclk_mux_en</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_pll_tclk_mux_en">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_tclk_sel</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_pll_tclk_sel">pll_tclk_m_src</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_vco_freq_band_0</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_pll_vco_freq_band_0">pll_freq_clk0_disabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_vco_freq_band_1</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_pll_vco_freq_band_1">pll_freq_clk1_disabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_freqcal_en</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_pll_freqcal_en">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_freqcal_req_flag</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_pll_freqcal_req_flag">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cal_converge</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cal_converge">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cal_error</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_cal_error">cal_clean</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_cal_done</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_pll_cal_done">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_type</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_pll_type">S10_Simple</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_m_cnt_in_src</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_pll_m_cnt_in_src">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_c_cnt_in_src0</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_c_cnt_in_src0">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_c_cnt_in_src1</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_c_cnt_in_src1">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_c_cnt_in_src2</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_c_cnt_in_src2">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_c_cnt_in_src3</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_c_cnt_in_src3">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_c_cnt_in_src4</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_c_cnt_in_src4">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_c_cnt_in_src5</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_c_cnt_in_src5">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_c_cnt_in_src6</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_c_cnt_in_src6">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_c_cnt_in_src7</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_c_cnt_in_src7">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_c_cnt_in_src8</spirit:name>
- <spirit:displayName></spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_c_cnt_in_src8">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>system_info_device_family</spirit:name>
- <spirit:displayName>Device Family</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="system_info_device_family">Arria 10</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>system_info_device_component</spirit:name>
- <spirit:displayName>Component</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="system_info_device_component">10AX115U2F45E1SG</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>system_info_device_speed_grade</spirit:name>
- <spirit:displayName>Speed Grade</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="system_info_device_speed_grade">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>system_part_trait_speed_grade</spirit:name>
- <spirit:displayName>Speed Grade Trait</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="system_part_trait_speed_grade">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_usr_device_speed_grade</spirit:name>
- <spirit:displayName>Speed Grade</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_usr_device_speed_grade">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_en_reconf</spirit:name>
- <spirit:displayName>Enable dynamic reconfiguration of PLL</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_en_reconf">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_en_dps_ports</spirit:name>
- <spirit:displayName>Enable access to dynamic phase shift ports</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_en_dps_ports">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_mode</spirit:name>
- <spirit:displayName>PLL Mode</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_pll_mode">Integer-N PLL</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_use_logical</spirit:name>
- <spirit:displayName>Use logical PLL</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_use_logical">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_reference_clock_frequency</spirit:name>
- <spirit:displayName>Reference Clock Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_reference_clock_frequency">200.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_use_coreclk</spirit:name>
- <spirit:displayName>Refclk source is global clock</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_use_coreclk">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_refclk_might_change</spirit:name>
- <spirit:displayName>My reference clock frequency might change</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_refclk_might_change">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_fractional_cout</spirit:name>
- <spirit:displayName>Fractional carry out</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_fractional_cout">32</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_prot_mode</spirit:name>
- <spirit:displayName>prot_mode</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_prot_mode">UNUSED</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_dsm_out_sel</spirit:name>
- <spirit:displayName>DSM Order</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_dsm_out_sel">1st_order</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_use_locked</spirit:name>
- <spirit:displayName>Enable locked output port</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_use_locked">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_en_adv_params</spirit:name>
- <spirit:displayName>Enable physical output clock parameters</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_en_adv_params">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_bandwidth_preset</spirit:name>
- <spirit:displayName>PLL Bandwidth Preset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_pll_bandwidth_preset">Low</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_lock_setting</spirit:name>
- <spirit:displayName>Lock Threshold Setting</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_lock_setting">Low Lock Time</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_auto_reset</spirit:name>
- <spirit:displayName>PLL Auto Reset</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_pll_auto_reset">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_en_lvds_ports</spirit:name>
- <spirit:displayName>Access to PLL LVDS_CLK/LOADEN output port</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_en_lvds_ports">Disabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_operation_mode</spirit:name>
- <spirit:displayName>Compensation Mode</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_operation_mode">source synchronous</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_feedback_clock</spirit:name>
- <spirit:displayName>Feedback Clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_feedback_clock">Global Clock</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_to_compensate</spirit:name>
- <spirit:displayName>Compensated Outclk</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_clock_to_compensate">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_use_NDFB_modes</spirit:name>
- <spirit:displayName>Use Nondedicated Feedback Path</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_use_NDFB_modes">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_refclk_switch</spirit:name>
- <spirit:displayName>Create a second input clock signal 'refclk1'</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_refclk_switch">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_refclk1_frequency</spirit:name>
- <spirit:displayName>Second Reference Clock Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_refclk1_frequency">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_en_phout_ports</spirit:name>
- <spirit:displayName>Enable access to PLL DPA output port</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_en_phout_ports">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phout_division</spirit:name>
- <spirit:displayName>PLL DPA output division</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_phout_division">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_en_extclkout_ports</spirit:name>
- <spirit:displayName>Enable access to PLL external clock output port</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_en_extclkout_ports">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_number_of_clocks</spirit:name>
- <spirit:displayName>Number Of Clocks</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_number_of_clocks">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_multiply_factor</spirit:name>
- <spirit:displayName>Multiply Factor (M-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_multiply_factor">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_n</spirit:name>
- <spirit:displayName>Divide Factor (N-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_n">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_frac_multiply_factor</spirit:name>
- <spirit:displayName>Fractional Multiply Factor (K)</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_frac_multiply_factor">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_fix_vco_frequency</spirit:name>
- <spirit:displayName>Specify VCO frequency</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_fix_vco_frequency">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_fixed_vco_frequency</spirit:name>
- <spirit:displayName>Desired VCO Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_fixed_vco_frequency">600.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_vco_frequency</spirit:name>
- <spirit:displayName>Actual VCO Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_vco_frequency">600.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_enable_output_counter_cascading</spirit:name>
- <spirit:displayName>Enable output counter cascading</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_enable_output_counter_cascading">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_mif_gen_options</spirit:name>
- <spirit:displayName>MIF Generation Options</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_mif_gen_options">Generate New MIF File</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_new_mif_file_path</spirit:name>
- <spirit:displayName>Path to New MIF file</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_new_mif_file_path">~/pll.mif</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_existing_mif_file_path</spirit:name>
- <spirit:displayName>Path to Existing MIF file</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_existing_mif_file_path">~/pll.mif</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_mif_config_name</spirit:name>
- <spirit:displayName>Name of Current Configuration</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_mif_config_name">unnamed</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_active_clk</spirit:name>
- <spirit:displayName>Create an 'active_clk' signal to indicate the input clock in use</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_active_clk">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clk_bad</spirit:name>
- <spirit:displayName>Create a 'clkbad' signal for each of the input clocks</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_clk_bad">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_switchover_mode</spirit:name>
- <spirit:displayName>Switchover Mode</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_switchover_mode">Automatic Switchover</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_switchover_delay</spirit:name>
- <spirit:displayName>Switchover Delay</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_switchover_delay">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_enable_cascade_out</spirit:name>
- <spirit:displayName>Create a 'cascade_out' signal to connect to a downstream PLL</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_enable_cascade_out">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_outclk_index</spirit:name>
- <spirit:displayName>cascade_out source</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_cascade_outclk_index">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_enable_cascade_in</spirit:name>
- <spirit:displayName>Create an 'adjpllin' (cascade in) signal to connect to an upstream PLL through IO Column Cascading</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_enable_cascade_in">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_enable_permit_cal</spirit:name>
- <spirit:displayName>Connect to an upstream PLL through Core Clock Network Cascading (create a permit_cal input signal)</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_enable_permit_cal">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_cascading_mode</spirit:name>
- <spirit:displayName>Connection Signal Type to Upstream PLL</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_pll_cascading_mode">adjpllin</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_enable_mif_dps</spirit:name>
- <spirit:displayName>Enable Dynamic Phase Shift for MIF streaming</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_enable_mif_dps">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_dps_cntr</spirit:name>
- <spirit:displayName>DPS Counter Selection</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_dps_cntr">C0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_dps_num</spirit:name>
- <spirit:displayName>Number of Dynamic Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_dps_num">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_dps_dir</spirit:name>
- <spirit:displayName>Dynamic Phase Shift Direction</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_dps_dir">Positive</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_extclkout_0_source</spirit:name>
- <spirit:displayName>extclk_out[0] source</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_extclkout_0_source">C0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_extclkout_1_source</spirit:name>
- <spirit:displayName>extclk_out[1] source</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_extclkout_1_source">C0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_global</spirit:name>
- <spirit:displayName>Give clocks global names</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_clock_name_global">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string0</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string0">link_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string1</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string1">frame_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string2</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string2">outclk2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string3</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string3">outclk3</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string4</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string4">outclk4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string5</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string5">outclk5</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string6</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string6">outclk6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string7</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string7">outclk7</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string8</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string8">outclk8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string9</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string9">outclk9</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string10</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string10">outclk10</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string11</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string11">outclk11</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string12</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string12">outclk12</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string13</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string13">outclk13</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string14</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string14">outclk14</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string15</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string15">outclk15</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string16</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string16">outclk16</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_clock_name_string17</spirit:name>
- <spirit:displayName>Clock Name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_clock_name_string17">outclk17</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c0</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c0">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c1</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c1">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c2</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c2">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c3</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c3">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c4</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c4">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c5</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c5">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c6</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c6">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c7</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c7">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c8</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c8">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c9</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c9">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c10</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c10">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c11</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c11">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c12</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c12">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c13</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c13">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c14</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c14">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c15</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c15">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c16</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c16">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_divide_factor_c17</spirit:name>
- <spirit:displayName>Divide Factor (C-Counter)</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_divide_factor_c17">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter0</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter0">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter1</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter1">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter2</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter2">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter3</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter3">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter4</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter4">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter5</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter5">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter6</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter6">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter7</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter7">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter8</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter8">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter9</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter9">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter10</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter10">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter11</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter11">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter12</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter12">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter13</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter13">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter14</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter14">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter15</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter15">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter16</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter16">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_cascade_counter17</spirit:name>
- <spirit:displayName>Make this a cascade counter</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="gui_cascade_counter17">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency0</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency0">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency1</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency1">200.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency2</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency2">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency3</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency3">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency4</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency4">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency5</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency5">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency6</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency6">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency7</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency7">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency8</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency8">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency9</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency9">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency10</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency10">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency11</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency11">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency12</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency12">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency13</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency13">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency14</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency14">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency15</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency15">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency16</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency16">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_output_clock_frequency17</spirit:name>
- <spirit:displayName>Desired Frequency</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_output_clock_frequency17">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency0</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency0">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency1</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency1">200.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency2</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency2">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency3</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency3">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency4</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency4">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency5</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency5">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency6</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency6">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency7</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency7">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency8</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency8">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency9</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency9">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency10</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency10">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency11</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency11">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency12</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency12">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency13</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency13">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency14</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency14">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency15</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency15">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency16</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency16">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency17</spirit:name>
- <spirit:displayName>Actual Frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency17">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range0</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range0">99.595142,99.607843,99.649123,100.0,100.350877,100.392157</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range1</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range1">183.333333,185.714286,187.5,200.0,214.285714,216.666667</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range2</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range2">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range3</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range3">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range4</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range4">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range5</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range5">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range6</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range6">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range7</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range7">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range8</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range8">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range9</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range9">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range10</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range10">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range11</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range11">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range12</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range12">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range13</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range13">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range14</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range14">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range15</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range15">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range16</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range16">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_output_clock_frequency_range17</spirit:name>
- <spirit:displayName>Legal Frequencies</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_output_clock_frequency_range17">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units0</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units0">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units1</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units1">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units2</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units2">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units3</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units3">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units4</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units4">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units5</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units5">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units6</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units6">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units7</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units7">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units8</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units8">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units9</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units9">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units10</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units10">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units11</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units11">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units12</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units12">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units13</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units13">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units14</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units14">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units15</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units15">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units16</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units16">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_ps_units17</spirit:name>
- <spirit:displayName>Phase Shift Units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_ps_units17">ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift0</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift0">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift1</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift1">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift2</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift2">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift3</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift3">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift4</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift4">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift5</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift5">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift6</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift6">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift7</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift7">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift8</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift8">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift9</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift9">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift10</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift10">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift11</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift11">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift12</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift12">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift13</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift13">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift14</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift14">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift15</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift15">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift16</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift16">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift17</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift17">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg0</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg0">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg1</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg1">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg2</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg2">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg3</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg3">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg4</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg4">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg5</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg5">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg6</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg6">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg7</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg7">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg8</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg8">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg9</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg9">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg10</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg10">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg11</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg11">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg12</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg12">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg13</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg13">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg14</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg14">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg15</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg15">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg16</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg16">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_phase_shift_deg17</spirit:name>
- <spirit:displayName>Desired Phase Shift</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_phase_shift_deg17">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift0</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift0">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift1</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift1">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift2</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift2">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift3</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift3">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift4</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift4">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift5</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift5">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift6</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift6">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift7</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift7">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift8</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift8">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift9</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift9">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift10</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift10">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift11</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift11">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift12</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift12">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift13</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift13">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift14</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift14">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift15</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift15">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift16</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift16">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift17</spirit:name>
- <spirit:displayName>Actual phase shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift17">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range0</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range0">0.0,78.1,89.3,104.2,125.0,156.2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range1</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range1">0.0,78.1,89.3,104.2,125.0,156.2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range2</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range2">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range3</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range3">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range4</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range4">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range5</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range5">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range6</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range6">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range7</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range7">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range8</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range8">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range9</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range9">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range10</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range10">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range11</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range11">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range12</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range12">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range13</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range13">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range14</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range14">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range15</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range15">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range16</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range16">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_range17</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_range17">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg0</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg0">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg1</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg1">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg2</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg2">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg3</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg3">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg4</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg4">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg5</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg5">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg6</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg6">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg7</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg7">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg8</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg8">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg9</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg9">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg10</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg10">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg11</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg11">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg12</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg12">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg13</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg13">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg14</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg14">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg15</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg15">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg16</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg16">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg17</spirit:name>
- <spirit:displayName>Actual Phase Shift</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg17">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range0</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range0">0.0,2.8,3.2,3.8,4.5,5.6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range1</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range1">0.0,5.6,6.4,7.5,9.0,11.2</spirit:value>
- </spirit:parameter>
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- <spirit:name>gui_actual_phase_shift_deg_range2</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range2">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range3</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range3">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range4</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range4">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range5</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range5">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range6</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range6">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range7</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range7">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range8</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range8">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range9</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range9">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range10</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range10">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range11</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range11">0.0</spirit:value>
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- <spirit:parameter>
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- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range12">0.0</spirit:value>
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- <spirit:parameter>
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- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range13">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range14</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range14">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range15</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range15">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range16</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range16">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_phase_shift_deg_range17</spirit:name>
- <spirit:displayName>Legal Phase Shifts</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_phase_shift_deg_range17">0.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_duty_cycle0</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle0">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_duty_cycle1</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle1">50.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_duty_cycle2</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle2">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_duty_cycle3</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle3">50.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_duty_cycle4</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle4">50.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_duty_cycle5</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle5">50.0</spirit:value>
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- <spirit:parameter>
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- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle6">50.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_duty_cycle7</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle7">50.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_duty_cycle8</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle8">50.0</spirit:value>
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- <spirit:parameter>
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- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle9">50.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_duty_cycle10</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle10">50.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_duty_cycle11</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle11">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_duty_cycle12</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle12">50.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_duty_cycle13</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle13">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_duty_cycle14</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle14">50.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_duty_cycle15</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle15">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_duty_cycle16</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle16">50.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_duty_cycle17</spirit:name>
- <spirit:displayName>Desired Duty Cycle</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="gui_duty_cycle17">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle0</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle0">50.0</spirit:value>
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- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle1</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle1">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle2</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle2">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle3</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle3">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle4</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle4">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle5</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle5">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle6</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle6">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle7</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle7">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle8</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle8">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle9</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle9">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle10</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle10">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle11</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle11">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle12</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle12">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle13</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle13">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle14</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle14">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle15</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle15">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle16</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle16">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle17</spirit:name>
- <spirit:displayName>Actual duty cycle</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle17">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range0</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range0">45.83,46.43,46.88,50.0,53.12,53.57</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range1</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range1">41.67,42.86,43.75,50.0,56.25,57.14</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range2</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range2">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range3</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range3">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range4</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range4">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range5</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range5">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range6</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range6">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range7</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range7">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range8</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range8">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range9</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range9">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range10</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range10">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range11</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range11">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range12</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range12">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range13</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range13">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range14</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range14">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range15</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range15">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range16</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range16">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_actual_duty_cycle_range17</spirit:name>
- <spirit:displayName>Legal Duty Cycles</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="gui_actual_duty_cycle_range17">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>parameterTable_names</spirit:name>
- <spirit:displayName>Parameter Names</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="parameterTable_names">M-Counter Divide Setting,N-Counter Divide Setting,VCO Frequency,C-Counter-0 Divide Setting,C-Counter-1 Divide Setting,C-Counter-2 Divide Setting,C-Counter-3 Divide Setting,C-Counter-4 Divide Setting,C-Counter-5 Divide Setting,C-Counter-6 Divide Setting,C-Counter-7 Divide Setting,C-Counter-8 Divide Setting,PLL Auto Reset,M-Counter Hi Divide,M-Counter Lo Divide,M-Counter Even Duty Enable,M-Counter Bypass Enable,N-Counter Hi Divide,N-Counter Lo Divide,N-Counter Even Duty Enable,N-Counter Bypass Enable,C-Counter-0 Hi Divide,C-Counter-1 Hi Divide,C-Counter-2 Hi Divide,C-Counter-3 Hi Divide,C-Counter-4 Hi Divide,C-Counter-5 Hi Divide,C-Counter-6 Hi Divide,C-Counter-7 Hi Divide,C-Counter-8 Hi Divide,C-Counter-0 Lo Divide,C-Counter-1 Lo Divide,C-Counter-2 Lo Divide,C-Counter-3 Lo Divide,C-Counter-4 Lo Divide,C-Counter-5 Lo Divide,C-Counter-6 Lo Divide,C-Counter-7 Lo Divide,C-Counter-8 Lo Divide,C-Counter-0 Even Duty Enable,C-Counter-1 Even Duty Enable,C-Counter-2 Even Duty Enable,C-Counter-3 Even Duty Enable,C-Counter-4 Even Duty Enable,C-Counter-5 Even Duty Enable,C-Counter-6 Even Duty Enable,C-Counter-7 Even Duty Enable,C-Counter-8 Even Duty Enable,C-Counter-0 Bypass Enable,C-Counter-1 Bypass Enable,C-Counter-2 Bypass Enable,C-Counter-3 Bypass Enable,C-Counter-4 Bypass Enable,C-Counter-5 Bypass Enable,C-Counter-6 Bypass Enable,C-Counter-7 Bypass Enable,C-Counter-8 Bypass Enable,C-Counter-0 Preset,C-Counter-1 Preset,C-Counter-2 Preset,C-Counter-3 Preset,C-Counter-4 Preset,C-Counter-5 Preset,C-Counter-6 Preset,C-Counter-7 Preset,C-Counter-8 Preset,C-Counter-0 Phase Mux Preset,C-Counter-1 Phase Mux Preset,C-Counter-2 Phase Mux Preset,C-Counter-3 Phase Mux Preset,C-Counter-4 Phase Mux Preset,C-Counter-5 Phase Mux Preset,C-Counter-6 Phase Mux Preset,C-Counter-7 Phase Mux Preset,C-Counter-8 Phase Mux Preset,Charge Pump Current,Bandwidth Control</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>parameterTable_values</spirit:name>
- <spirit:displayName>Parameter Values</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="parameterTable_values">4,1,800.0 MHz,8,4,1,1,1,1,1,1,1,false,2,2,false,false,256,256,false,true,4,2,256,256,256,256,256,256,256,4,2,256,256,256,256,256,256,256,false,false,false,false,false,false,false,false,false,false,false,true,true,true,true,true,true,true,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,pll_cp_setting10,pll_bw_res_setting2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>mifTable_names</spirit:name>
- <spirit:displayName>MIF File Property</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="mifTable_names">The MIF file specified does not yet exist</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>mifTable_values</spirit:name>
- <spirit:displayName>Values</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="mifTable_values"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_m_cnt_basic</spirit:name>
- <spirit:displayName>pll_m_cnt_basic</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="pll_m_cnt_basic">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_m_cnt</spirit:name>
- <spirit:displayName>pll_m_cnt</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="pll_m_cnt">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prot_mode</spirit:name>
- <spirit:displayName>prot_mode</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="prot_mode">BASIC</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>m_cnt_hi_div</spirit:name>
- <spirit:displayName>m_cnt_hi_div</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="m_cnt_hi_div">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>eff_m_cnt</spirit:name>
- <spirit:displayName>eff_m_cnt</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="eff_m_cnt">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>multiply_factor</spirit:name>
- <spirit:displayName>multiply_factor</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="multiply_factor">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>use_core_refclk</spirit:name>
- <spirit:displayName>use_core_refclk</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="use_core_refclk">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>m_cnt_lo_div</spirit:name>
- <spirit:displayName>m_cnt_lo_div</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="m_cnt_lo_div">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>n_cnt_hi_div</spirit:name>
- <spirit:displayName>n_cnt_hi_div</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="n_cnt_hi_div">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>n_cnt_lo_div</spirit:name>
- <spirit:displayName>n_cnt_lo_div</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="n_cnt_lo_div">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>m_cnt_bypass_en</spirit:name>
- <spirit:displayName>m_cnt_bypass_en</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="m_cnt_bypass_en">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>n_cnt_bypass_en</spirit:name>
- <spirit:displayName>n_cnt_bypass_en</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="n_cnt_bypass_en">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>m_cnt_odd_div_duty_en</spirit:name>
- <spirit:displayName>m_cnt_odd_div_duty_en</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="m_cnt_odd_div_duty_en">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>n_cnt_odd_div_duty_en</spirit:name>
- <spirit:displayName>n_cnt_odd_div_duty_en</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="n_cnt_odd_div_duty_en">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_vco_div</spirit:name>
- <spirit:displayName>pll_vco_div</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="pll_vco_div">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_cp_current</spirit:name>
- <spirit:displayName>pll_cp_current</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_cp_current">pll_cp_setting10</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_bwctrl</spirit:name>
- <spirit:displayName>pll_bwctrl</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_bwctrl">pll_bw_res_setting2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_ripplecap_ctrl</spirit:name>
- <spirit:displayName>pll_ripplecap_ctrl</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_ripplecap_ctrl"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_fractional_division</spirit:name>
- <spirit:displayName>pll_fractional_division</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="pll_fractional_division">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>fractional_vco_multiplier</spirit:name>
- <spirit:displayName>fractional_vco_multiplier</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="fractional_vco_multiplier">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>reference_clock_frequency</spirit:name>
- <spirit:displayName>reference_clock_frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="reference_clock_frequency">200.0 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_fractional_cout</spirit:name>
- <spirit:displayName>pll_fractional_cout</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="pll_fractional_cout">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_dsm_out_sel</spirit:name>
- <spirit:displayName>pll_dsm_out_sel</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_dsm_out_sel">1st_order</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>operation_mode</spirit:name>
- <spirit:displayName>operation_mode</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="operation_mode">source_synchronous</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>number_of_clocks</spirit:name>
- <spirit:displayName>number_of_clocks</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="number_of_clocks">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>number_of_outclks</spirit:name>
- <spirit:displayName>number_of_outclks</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="number_of_outclks">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_vcoph_div</spirit:name>
- <spirit:displayName>pll_vcoph_div</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="pll_vcoph_div">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_type</spirit:name>
- <spirit:displayName>pll_type</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_type">Arria 10</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_subtype</spirit:name>
- <spirit:displayName>pll_subtype</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_subtype">General</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_output_clk_frequency</spirit:name>
- <spirit:displayName>pll_output_clk_frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_output_clk_frequency">800.0 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>mimic_fbclk_type</spirit:name>
- <spirit:displayName>mimic_fbclk_type</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="mimic_fbclk_type">gclk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_bw_sel</spirit:name>
- <spirit:displayName>pll_bw_sel</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_bw_sel">Low</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_slf_rst</spirit:name>
- <spirit:displayName>pll_slf_rst</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="pll_slf_rst">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_fbclk_mux_1</spirit:name>
- <spirit:displayName>pll_fbclk_mux_1</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_fbclk_mux_1">pll_fbclk_mux_1_glb</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_fbclk_mux_2</spirit:name>
- <spirit:displayName>pll_fbclk_mux_2</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_fbclk_mux_2">pll_fbclk_mux_2_fb_1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_m_cnt_in_src</spirit:name>
- <spirit:displayName>pll_m_cnt_in_src</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_m_cnt_in_src">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_clkin_0_src</spirit:name>
- <spirit:displayName>pll_clkin_0_src</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_clkin_0_src">clk_0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>refclk1_frequency</spirit:name>
- <spirit:displayName>refclk1_frequency</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="refclk1_frequency">100.0 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_clk_loss_sw_en</spirit:name>
- <spirit:displayName>pll_clk_loss_sw_en</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="pll_clk_loss_sw_en">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_manu_clk_sw_en</spirit:name>
- <spirit:displayName>pll_manu_clk_sw_en</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="pll_manu_clk_sw_en">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_auto_clk_sw_en</spirit:name>
- <spirit:displayName>pll_auto_clk_sw_en</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="pll_auto_clk_sw_en">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_clkin_1_src</spirit:name>
- <spirit:displayName>pll_clkin_1_src</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_clkin_1_src">clk_0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_clk_sw_dly</spirit:name>
- <spirit:displayName>pll_clk_sw_dly</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="pll_clk_sw_dly">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_extclk_0_cnt_src</spirit:name>
- <spirit:displayName>pll_extclk_0_cnt_src</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_extclk_0_cnt_src">pll_extclk_cnt_src_vss</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_extclk_1_cnt_src</spirit:name>
- <spirit:displayName>pll_extclk_1_cnt_src</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_extclk_1_cnt_src">pll_extclk_cnt_src_vss</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_lock_fltr_cfg</spirit:name>
- <spirit:displayName>pll_lock_fltr_cfg</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="pll_lock_fltr_cfg">100</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_unlock_fltr_cfg</spirit:name>
- <spirit:displayName>pll_unlock_fltr_cfg</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="pll_unlock_fltr_cfg">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>lock_mode</spirit:name>
- <spirit:displayName>lock_mode</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="lock_mode">low_lock_time</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_to_compensate</spirit:name>
- <spirit:displayName>clock_to_compensate</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="clock_to_compensate">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_global</spirit:name>
- <spirit:displayName>clock_name_global</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="clock_name_global">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_freqcal_en</spirit:name>
- <spirit:displayName>pll_freqcal_en</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="pll_freqcal_en">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_defer_cal_user_mode</spirit:name>
- <spirit:displayName>pll_defer_cal_user_mode</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="pll_defer_cal_user_mode">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>dprio_interface_sel</spirit:name>
- <spirit:displayName>dprio_interface_sel</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="dprio_interface_sel">3</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div0</spirit:name>
- <spirit:displayName>c_cnt_hi_div0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div0">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div1</spirit:name>
- <spirit:displayName>c_cnt_hi_div1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div1">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div2</spirit:name>
- <spirit:displayName>c_cnt_hi_div2</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div2">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div3</spirit:name>
- <spirit:displayName>c_cnt_hi_div3</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div3">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div4</spirit:name>
- <spirit:displayName>c_cnt_hi_div4</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div4">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div5</spirit:name>
- <spirit:displayName>c_cnt_hi_div5</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div5">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div6</spirit:name>
- <spirit:displayName>c_cnt_hi_div6</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div6">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div7</spirit:name>
- <spirit:displayName>c_cnt_hi_div7</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div7">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div8</spirit:name>
- <spirit:displayName>c_cnt_hi_div8</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div8">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div9</spirit:name>
- <spirit:displayName>c_cnt_hi_div9</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div9">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div10</spirit:name>
- <spirit:displayName>c_cnt_hi_div10</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div10">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div11</spirit:name>
- <spirit:displayName>c_cnt_hi_div11</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div11">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div12</spirit:name>
- <spirit:displayName>c_cnt_hi_div12</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div12">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div13</spirit:name>
- <spirit:displayName>c_cnt_hi_div13</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div13">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div14</spirit:name>
- <spirit:displayName>c_cnt_hi_div14</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div14">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div15</spirit:name>
- <spirit:displayName>c_cnt_hi_div15</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div15">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div16</spirit:name>
- <spirit:displayName>c_cnt_hi_div16</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div16">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_hi_div17</spirit:name>
- <spirit:displayName>c_cnt_hi_div17</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_hi_div17">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div0</spirit:name>
- <spirit:displayName>c_cnt_lo_div0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div0">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div1</spirit:name>
- <spirit:displayName>c_cnt_lo_div1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div1">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div2</spirit:name>
- <spirit:displayName>c_cnt_lo_div2</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div2">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div3</spirit:name>
- <spirit:displayName>c_cnt_lo_div3</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div3">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div4</spirit:name>
- <spirit:displayName>c_cnt_lo_div4</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div4">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div5</spirit:name>
- <spirit:displayName>c_cnt_lo_div5</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div5">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div6</spirit:name>
- <spirit:displayName>c_cnt_lo_div6</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div6">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div7</spirit:name>
- <spirit:displayName>c_cnt_lo_div7</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div7">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div8</spirit:name>
- <spirit:displayName>c_cnt_lo_div8</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div8">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div9</spirit:name>
- <spirit:displayName>c_cnt_lo_div9</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div9">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div10</spirit:name>
- <spirit:displayName>c_cnt_lo_div10</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div10">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div11</spirit:name>
- <spirit:displayName>c_cnt_lo_div11</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div11">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div12</spirit:name>
- <spirit:displayName>c_cnt_lo_div12</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div12">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div13</spirit:name>
- <spirit:displayName>c_cnt_lo_div13</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div13">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div14</spirit:name>
- <spirit:displayName>c_cnt_lo_div14</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div14">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div15</spirit:name>
- <spirit:displayName>c_cnt_lo_div15</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div15">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div16</spirit:name>
- <spirit:displayName>c_cnt_lo_div16</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div16">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_lo_div17</spirit:name>
- <spirit:displayName>c_cnt_lo_div17</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_lo_div17">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst0</spirit:name>
- <spirit:displayName>c_cnt_prst0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst0">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst1</spirit:name>
- <spirit:displayName>c_cnt_prst1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst1">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst2</spirit:name>
- <spirit:displayName>c_cnt_prst2</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst2">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst3</spirit:name>
- <spirit:displayName>c_cnt_prst3</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst3">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst4</spirit:name>
- <spirit:displayName>c_cnt_prst4</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst4">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst5</spirit:name>
- <spirit:displayName>c_cnt_prst5</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst5">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst6</spirit:name>
- <spirit:displayName>c_cnt_prst6</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst6">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst7</spirit:name>
- <spirit:displayName>c_cnt_prst7</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst7">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst8</spirit:name>
- <spirit:displayName>c_cnt_prst8</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst8">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst9</spirit:name>
- <spirit:displayName>c_cnt_prst9</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst9">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst10</spirit:name>
- <spirit:displayName>c_cnt_prst10</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst10">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst11</spirit:name>
- <spirit:displayName>c_cnt_prst11</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst11">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst12</spirit:name>
- <spirit:displayName>c_cnt_prst12</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst12">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst13</spirit:name>
- <spirit:displayName>c_cnt_prst13</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst13">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst14</spirit:name>
- <spirit:displayName>c_cnt_prst14</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst14">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst15</spirit:name>
- <spirit:displayName>c_cnt_prst15</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst15">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst16</spirit:name>
- <spirit:displayName>c_cnt_prst16</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst16">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_prst17</spirit:name>
- <spirit:displayName>c_cnt_prst17</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_prst17">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst0</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst0">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst1</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst1">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst2</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst2</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst2">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst3</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst3</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst3">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst4</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst4</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst4">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst5</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst5</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst5">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst6</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst6</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst6">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst7</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst7</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst7">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst8</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst8</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst8">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst9</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst9</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst9">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst10</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst10</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst10">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst11</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst11</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst11">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst12</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst12</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst12">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst13</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst13</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst13">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst14</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst14</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst14">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst15</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst15</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst15">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst16</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst16</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst16">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_ph_mux_prst17</spirit:name>
- <spirit:displayName>c_cnt_ph_mux_prst17</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="c_cnt_ph_mux_prst17">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src0</spirit:name>
- <spirit:displayName>c_cnt_in_src0</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src0">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src1</spirit:name>
- <spirit:displayName>c_cnt_in_src1</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src1">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src2</spirit:name>
- <spirit:displayName>c_cnt_in_src2</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src2">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src3</spirit:name>
- <spirit:displayName>c_cnt_in_src3</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src3">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src4</spirit:name>
- <spirit:displayName>c_cnt_in_src4</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src4">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src5</spirit:name>
- <spirit:displayName>c_cnt_in_src5</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src5">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src6</spirit:name>
- <spirit:displayName>c_cnt_in_src6</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src6">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src7</spirit:name>
- <spirit:displayName>c_cnt_in_src7</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src7">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src8</spirit:name>
- <spirit:displayName>c_cnt_in_src8</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src8">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src9</spirit:name>
- <spirit:displayName>c_cnt_in_src9</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src9">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src10</spirit:name>
- <spirit:displayName>c_cnt_in_src10</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src10">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src11</spirit:name>
- <spirit:displayName>c_cnt_in_src11</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src11">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src12</spirit:name>
- <spirit:displayName>c_cnt_in_src12</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src12">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src13</spirit:name>
- <spirit:displayName>c_cnt_in_src13</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src13">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src14</spirit:name>
- <spirit:displayName>c_cnt_in_src14</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src14">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src15</spirit:name>
- <spirit:displayName>c_cnt_in_src15</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src15">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src16</spirit:name>
- <spirit:displayName>c_cnt_in_src16</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src16">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_in_src17</spirit:name>
- <spirit:displayName>c_cnt_in_src17</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="c_cnt_in_src17">c_m_cnt_in_src_ph_mux_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en0</spirit:name>
- <spirit:displayName>c_cnt_bypass_en0</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en0">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en1</spirit:name>
- <spirit:displayName>c_cnt_bypass_en1</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en1">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en2</spirit:name>
- <spirit:displayName>c_cnt_bypass_en2</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en2">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en3</spirit:name>
- <spirit:displayName>c_cnt_bypass_en3</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en3">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en4</spirit:name>
- <spirit:displayName>c_cnt_bypass_en4</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en4">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en5</spirit:name>
- <spirit:displayName>c_cnt_bypass_en5</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en5">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en6</spirit:name>
- <spirit:displayName>c_cnt_bypass_en6</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en6">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en7</spirit:name>
- <spirit:displayName>c_cnt_bypass_en7</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en7">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en8</spirit:name>
- <spirit:displayName>c_cnt_bypass_en8</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en8">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en9</spirit:name>
- <spirit:displayName>c_cnt_bypass_en9</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en9">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en10</spirit:name>
- <spirit:displayName>c_cnt_bypass_en10</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en10">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en11</spirit:name>
- <spirit:displayName>c_cnt_bypass_en11</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en11">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en12</spirit:name>
- <spirit:displayName>c_cnt_bypass_en12</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en12">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en13</spirit:name>
- <spirit:displayName>c_cnt_bypass_en13</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en13">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en14</spirit:name>
- <spirit:displayName>c_cnt_bypass_en14</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en14">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en15</spirit:name>
- <spirit:displayName>c_cnt_bypass_en15</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en15">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en16</spirit:name>
- <spirit:displayName>c_cnt_bypass_en16</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en16">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_bypass_en17</spirit:name>
- <spirit:displayName>c_cnt_bypass_en17</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_bypass_en17">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en0</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en0</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en0">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en1</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en1</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en1">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en2</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en2</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en2">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en3</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en3</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en3">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en4</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en4</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en4">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en5</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en5</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en5">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en6</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en6</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en6">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en7</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en7</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en7">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en8</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en8</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en8">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en9</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en9</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en9">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en10</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en10</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en10">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en11</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en11</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en11">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en12</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en12</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en12">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en13</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en13</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en13">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en14</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en14</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en14">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en15</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en15</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en15">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en16</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en16</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en16">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>c_cnt_odd_div_duty_en17</spirit:name>
- <spirit:displayName>c_cnt_odd_div_duty_en17</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="c_cnt_odd_div_duty_en17">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency0</spirit:name>
- <spirit:displayName>output_clock_frequency0</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency0">100.000000 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency1</spirit:name>
- <spirit:displayName>output_clock_frequency1</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency1">200.000000 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency2</spirit:name>
- <spirit:displayName>output_clock_frequency2</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency2">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency3</spirit:name>
- <spirit:displayName>output_clock_frequency3</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency3">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency4</spirit:name>
- <spirit:displayName>output_clock_frequency4</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency4">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency5</spirit:name>
- <spirit:displayName>output_clock_frequency5</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency5">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency6</spirit:name>
- <spirit:displayName>output_clock_frequency6</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency6">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency7</spirit:name>
- <spirit:displayName>output_clock_frequency7</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency7">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency8</spirit:name>
- <spirit:displayName>output_clock_frequency8</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency8">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency9</spirit:name>
- <spirit:displayName>output_clock_frequency9</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency9">0 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency10</spirit:name>
- <spirit:displayName>output_clock_frequency10</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency10">0 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency11</spirit:name>
- <spirit:displayName>output_clock_frequency11</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency11">0 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency12</spirit:name>
- <spirit:displayName>output_clock_frequency12</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency12">0 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency13</spirit:name>
- <spirit:displayName>output_clock_frequency13</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency13">0 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency14</spirit:name>
- <spirit:displayName>output_clock_frequency14</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency14">0 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency15</spirit:name>
- <spirit:displayName>output_clock_frequency15</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency15">0 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency16</spirit:name>
- <spirit:displayName>output_clock_frequency16</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency16">0 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>output_clock_frequency17</spirit:name>
- <spirit:displayName>output_clock_frequency17</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="output_clock_frequency17">0 MHz</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift0</spirit:name>
- <spirit:displayName>phase_shift0</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift0">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift1</spirit:name>
- <spirit:displayName>phase_shift1</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift1">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift2</spirit:name>
- <spirit:displayName>phase_shift2</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift2">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift3</spirit:name>
- <spirit:displayName>phase_shift3</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift3">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift4</spirit:name>
- <spirit:displayName>phase_shift4</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift4">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift5</spirit:name>
- <spirit:displayName>phase_shift5</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift5">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift6</spirit:name>
- <spirit:displayName>phase_shift6</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift6">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift7</spirit:name>
- <spirit:displayName>phase_shift7</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift7">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift8</spirit:name>
- <spirit:displayName>phase_shift8</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift8">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift9</spirit:name>
- <spirit:displayName>phase_shift9</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift9">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift10</spirit:name>
- <spirit:displayName>phase_shift10</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift10">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift11</spirit:name>
- <spirit:displayName>phase_shift11</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift11">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift12</spirit:name>
- <spirit:displayName>phase_shift12</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift12">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift13</spirit:name>
- <spirit:displayName>phase_shift13</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift13">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift14</spirit:name>
- <spirit:displayName>phase_shift14</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift14">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift15</spirit:name>
- <spirit:displayName>phase_shift15</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift15">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift16</spirit:name>
- <spirit:displayName>phase_shift16</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift16">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>phase_shift17</spirit:name>
- <spirit:displayName>phase_shift17</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="phase_shift17">0 ps</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle0</spirit:name>
- <spirit:displayName>duty_cycle0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle0">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle1</spirit:name>
- <spirit:displayName>duty_cycle1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle1">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle2</spirit:name>
- <spirit:displayName>duty_cycle2</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle2">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle3</spirit:name>
- <spirit:displayName>duty_cycle3</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle3">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle4</spirit:name>
- <spirit:displayName>duty_cycle4</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle4">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle5</spirit:name>
- <spirit:displayName>duty_cycle5</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle5">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle6</spirit:name>
- <spirit:displayName>duty_cycle6</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle6">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle7</spirit:name>
- <spirit:displayName>duty_cycle7</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle7">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle8</spirit:name>
- <spirit:displayName>duty_cycle8</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle8">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle9</spirit:name>
- <spirit:displayName>duty_cycle9</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle9">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle10</spirit:name>
- <spirit:displayName>duty_cycle10</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle10">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle11</spirit:name>
- <spirit:displayName>duty_cycle11</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle11">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle12</spirit:name>
- <spirit:displayName>duty_cycle12</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle12">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle13</spirit:name>
- <spirit:displayName>duty_cycle13</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle13">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle14</spirit:name>
- <spirit:displayName>duty_cycle14</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle14">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle15</spirit:name>
- <spirit:displayName>duty_cycle15</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle15">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle16</spirit:name>
- <spirit:displayName>duty_cycle16</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle16">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>duty_cycle17</spirit:name>
- <spirit:displayName>duty_cycle17</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="duty_cycle17">50</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_0</spirit:name>
- <spirit:displayName>clock_name_0</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clock_name_0">link_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_1</spirit:name>
- <spirit:displayName>clock_name_1</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clock_name_1">frame_clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_2</spirit:name>
- <spirit:displayName>clock_name_2</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clock_name_2"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_3</spirit:name>
- <spirit:displayName>clock_name_3</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clock_name_3"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_4</spirit:name>
- <spirit:displayName>clock_name_4</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clock_name_4"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_5</spirit:name>
- <spirit:displayName>clock_name_5</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clock_name_5"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_6</spirit:name>
- <spirit:displayName>clock_name_6</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clock_name_6"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_7</spirit:name>
- <spirit:displayName>clock_name_7</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clock_name_7"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_8</spirit:name>
- <spirit:displayName>clock_name_8</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clock_name_8"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_global_0</spirit:name>
- <spirit:displayName>clock_name_global_0</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="clock_name_global_0">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_global_1</spirit:name>
- <spirit:displayName>clock_name_global_1</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="clock_name_global_1">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_global_2</spirit:name>
- <spirit:displayName>clock_name_global_2</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="clock_name_global_2">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_global_3</spirit:name>
- <spirit:displayName>clock_name_global_3</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="clock_name_global_3">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_global_4</spirit:name>
- <spirit:displayName>clock_name_global_4</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="clock_name_global_4">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_global_5</spirit:name>
- <spirit:displayName>clock_name_global_5</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="clock_name_global_5">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_global_6</spirit:name>
- <spirit:displayName>clock_name_global_6</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="clock_name_global_6">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_global_7</spirit:name>
- <spirit:displayName>clock_name_global_7</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="clock_name_global_7">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>clock_name_global_8</spirit:name>
- <spirit:displayName>clock_name_global_8</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="clock_name_global_8">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>divide_factor0</spirit:name>
- <spirit:displayName>divide_factor0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="divide_factor0">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>divide_factor1</spirit:name>
- <spirit:displayName>divide_factor1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="divide_factor1">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>divide_factor2</spirit:name>
- <spirit:displayName>divide_factor2</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="divide_factor2">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>divide_factor3</spirit:name>
- <spirit:displayName>divide_factor3</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="divide_factor3">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>divide_factor4</spirit:name>
- <spirit:displayName>divide_factor4</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="divide_factor4">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>divide_factor5</spirit:name>
- <spirit:displayName>divide_factor5</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="divide_factor5">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>divide_factor6</spirit:name>
- <spirit:displayName>divide_factor6</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="divide_factor6">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>divide_factor7</spirit:name>
- <spirit:displayName>divide_factor7</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="divide_factor7">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>divide_factor8</spirit:name>
- <spirit:displayName>divide_factor8</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="divide_factor8">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_tclk_mux_en</spirit:name>
- <spirit:displayName>pll_tclk_mux_en</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="pll_tclk_mux_en">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_tclk_sel</spirit:name>
- <spirit:displayName>pll_tclk_sel</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_tclk_sel">pll_tclk_m_src</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_vco_freq_band_0</spirit:name>
- <spirit:displayName>pll_vco_freq_band_0</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_vco_freq_band_0">pll_freq_clk0_disabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_vco_freq_band_1</spirit:name>
- <spirit:displayName>pll_vco_freq_band_1</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="pll_vco_freq_band_1">pll_freq_clk1_disabled</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_freqcal_req_flag</spirit:name>
- <spirit:displayName>pll_freqcal_req_flag</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="pll_freqcal_req_flag">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>cal_converge</spirit:name>
- <spirit:displayName>cal_converge</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="cal_converge">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>cal_error</spirit:name>
- <spirit:displayName>cal_error</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="cal_error">cal_clean</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>pll_cal_done</spirit:name>
- <spirit:displayName>pll_cal_done</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="pll_cal_done">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>include_iossm</spirit:name>
- <spirit:displayName>include_iossm</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="include_iossm">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>cal_code_hex_file</spirit:name>
- <spirit:displayName>cal_code_hex_file</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="cal_code_hex_file">iossm.hex</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>parameter_table_hex_file</spirit:name>
- <spirit:displayName>parameter_table_hex_file</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="parameter_table_hex_file">seq_params_sim.hex</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>iossm_nios_sim_clk_period_ps</spirit:name>
- <spirit:displayName>iossm_nios_sim_clk_period_ps</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="iossm_nios_sim_clk_period_ps">1333</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_number_of_family_allowable_clocks</spirit:name>
- <spirit:displayName>hp_number_of_family_allowable_clocks</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="hp_number_of_family_allowable_clocks">9</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_previous_num_clocks</spirit:name>
- <spirit:displayName>hp_previous_num_clocks</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="hp_previous_num_clocks">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_vco_frequency_fp</spirit:name>
- <spirit:displayName>hp_actual_vco_frequency_fp</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_vco_frequency_fp">600.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_parameter_update_message</spirit:name>
- <spirit:displayName>hp_parameter_update_message</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="hp_parameter_update_message">{altera_iopll::util::pll_send_message DEBUG {Starting parameter update messages: gui_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in callback gui_output_clock_frequency_callback }} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- done callback gui_output_clock_frequency_callback }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}}</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_qsys_scripting_mode</spirit:name>
- <spirit:displayName>hp_qsys_scripting_mode</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="hp_qsys_scripting_mode">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp0</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp0</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp0">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp1</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp1</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp1">200.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp2</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp2</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp2">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp3</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp3</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp3">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp4</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp4</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp4">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp5</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp5</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp5">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp6</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp6</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp6">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp7</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp7</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp7">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp8</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp8</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp8">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp9</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp9</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp9">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp10</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp10</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp10">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp11</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp11</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp11">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp12</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp12</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp12">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp13</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp13</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp13">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp14</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp14</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp14">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp15</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp15</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp15">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp16</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp16</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp16">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_output_clock_frequency_fp17</spirit:name>
- <spirit:displayName>hp_actual_output_clock_frequency_fp17</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_output_clock_frequency_fp17">100.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp0</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp0</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp0">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp1</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp1</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp1">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp2</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp2</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp2">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp3</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp3</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp3">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp4</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp4</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp4">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp5</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp5</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp5">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp6</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp6</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp6">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp7</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp7</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp7">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp8</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp8</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp8">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp9</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp9</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp9">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp10</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp10</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp10">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp11</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp11</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp11">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp12</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp12</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp12">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp13</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp13</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp13">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp14</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp14</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp14">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp15</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp15</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp15">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp16</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp16</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp16">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_phase_shift_fp17</spirit:name>
- <spirit:displayName>hp_actual_phase_shift_fp17</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_phase_shift_fp17">0.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp0</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp0</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp0">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp1</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp1</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp1">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp2</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp2</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp2">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp3</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp3</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp3">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp4</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp4</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp4">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp5</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp5</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp5">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp6</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp6</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp6">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp7</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp7</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp7">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp8</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp8</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp8">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp9</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp9</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp9">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp10</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp10</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp10">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp11</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp11</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp11">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp12</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp12</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp12">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp13</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp13</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp13">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp14</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp14</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp14">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp15</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp15</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp15">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp16</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp16</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp16">50.0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hp_actual_duty_cycle_fp17</spirit:name>
- <spirit:displayName>hp_actual_duty_cycle_fp17</spirit:displayName>
- <spirit:value spirit:format="float" spirit:id="hp_actual_duty_cycle_fp17">50.0</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_module_parameters>
- <altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>embeddedsw.dts.compatible</spirit:name>
- <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.compatible">altr,pll</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>embeddedsw.dts.group</spirit:name>
- <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.group">clock</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>embeddedsw.dts.vendor</spirit:name>
- <spirit:value spirit:format="string" spirit:id="embeddedsw.dts.vendor">altr</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_assignments>
- <altera:altera_system_parameters>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>device</spirit:name>
- <spirit:displayName>Device</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>deviceFamily</spirit:name>
- <spirit:displayName>Device family</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>deviceSpeedGrade</spirit:name>
- <spirit:displayName>Device Speed Grade</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>generationId</spirit:name>
- <spirit:displayName>Generation Id</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bonusData</spirit:name>
- <spirit:displayName>bonusData</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="bonusData">bonusData
-{
- element core_pll
- {
- datum _sortIndex
- {
- value = "0";
- type = "int";
- }
- }
-}
-</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hideFromIPCatalog</spirit:name>
- <spirit:displayName>Hide from IP Catalog</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>lockedInterfaceDefinition</spirit:name>
- <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
- <interfaces>
- <interface>
- <name>locked</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>locked</name>
- <role>export</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>ui.blockdiagram.direction</key>
- <value>output</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>outclk0</name>
- <type>clock</type>
- <isStart>true</isStart>
- <ports>
- <port>
- <name>outclk_0</name>
- <role>clk</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>ui.blockdiagram.direction</key>
- <value>output</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedDirectClock</key>
- </entry>
- <entry>
- <key>clockRate</key>
- <value>100000000</value>
- </entry>
- <entry>
- <key>clockRateKnown</key>
- <value>true</value>
- </entry>
- <entry>
- <key>externallyDriven</key>
- <value>false</value>
- </entry>
- <entry>
- <key>ptfSchematicName</key>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>outclk1</name>
- <type>clock</type>
- <isStart>true</isStart>
- <ports>
- <port>
- <name>outclk_1</name>
- <role>clk</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>ui.blockdiagram.direction</key>
- <value>output</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedDirectClock</key>
- </entry>
- <entry>
- <key>clockRate</key>
- <value>100000000</value>
- </entry>
- <entry>
- <key>clockRateKnown</key>
- <value>true</value>
- </entry>
- <entry>
- <key>externallyDriven</key>
- <value>false</value>
- </entry>
- <entry>
- <key>ptfSchematicName</key>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>refclk</name>
- <type>clock</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>refclk</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>ui.blockdiagram.direction</key>
- <value>input</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>clockRate</key>
- <value>200000000</value>
- </entry>
- <entry>
- <key>externallyDriven</key>
- <value>false</value>
- </entry>
- <entry>
- <key>ptfSchematicName</key>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset</name>
- <type>reset</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>rst</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>ui.blockdiagram.direction</key>
- <value>input</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>NONE</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- </interfaces>
-</boundaryDefinition>]]></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>systemInfos</spirit:name>
- <spirit:displayName>systemInfos</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
- <connPtSystemInfos>
- <entry>
- <key>outclk0</key>
- <value>
- <connectionPointName>outclk0</connectionPointName>
- <suppliedSystemInfos/>
- <consumedSystemInfos>
- <entry>
- <key>CLOCK_RATE</key>
- <value>100000000</value>
- </entry>
- </consumedSystemInfos>
- </value>
- </entry>
- <entry>
- <key>outclk1</key>
- <value>
- <connectionPointName>outclk1</connectionPointName>
- <suppliedSystemInfos/>
- <consumedSystemInfos>
- <entry>
- <key>CLOCK_RATE</key>
- <value>200000000</value>
- </entry>
- </consumedSystemInfos>
- </value>
- </entry>
- </connPtSystemInfos>
-</systemInfosDefinition>]]></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </altera:altera_system_parameters>
- <altera:altera_interface_boundary>
- <altera:interface_mapping altera:name="locked" altera:internal="core_pll.locked" altera:type="conduit" altera:dir="end">
- <altera:port_mapping altera:name="locked" altera:internal="locked"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="outclk0" altera:internal="core_pll.outclk0" altera:type="clock" altera:dir="start">
- <altera:port_mapping altera:name="outclk_0" altera:internal="outclk_0"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="outclk1" altera:internal="core_pll.outclk1" altera:type="clock" altera:dir="start">
- <altera:port_mapping altera:name="outclk_1" altera:internal="outclk_1"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="refclk" altera:internal="core_pll.refclk" altera:type="clock" altera:dir="end">
- <altera:port_mapping altera:name="refclk" altera:internal="refclk"></altera:port_mapping>
- </altera:interface_mapping>
- <altera:interface_mapping altera:name="reset" altera:internal="core_pll.reset" altera:type="reset" altera:dir="end">
- <altera:port_mapping altera:name="rst" altera:internal="rst"></altera:port_mapping>
- </altera:interface_mapping>
- </altera:altera_interface_boundary>
- <altera:altera_has_warnings>false</altera:altera_has_warnings>
- <altera:altera_has_errors>false</altera:altera_has_errors>
- </spirit:vendorExtensions>
-</spirit:component>
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/altera_iopll_180/sim/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.vo b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/altera_iopll_180/sim/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.vo
deleted file mode 100644
index d4ee2071a4b3a49f0e2fc76198d6de5fe84d8058..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/altera_iopll_180/sim/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.vo
+++ /dev/null
@@ -1,183 +0,0 @@
-`timescale 1ns/10ps
-module ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama(
-
- // interface 'reset'
- input wire rst,
-
- // interface 'refclk'
- input wire refclk,
-
- // interface 'locked'
- output wire locked,
-
- // interface 'outclk0'
- output wire outclk_0,
-
- // interface 'outclk1'
- output wire outclk_1
-);
-
- wire [6:0] unused_wires;
-
- altera_iopll #(
- .c_cnt_bypass_en0("false"),
- .c_cnt_bypass_en1("false"),
- .c_cnt_bypass_en2("true"),
- .c_cnt_bypass_en3("true"),
- .c_cnt_bypass_en4("true"),
- .c_cnt_bypass_en5("true"),
- .c_cnt_bypass_en6("true"),
- .c_cnt_bypass_en7("true"),
- .c_cnt_bypass_en8("true"),
- .c_cnt_hi_div0(4),
- .c_cnt_hi_div1(2),
- .c_cnt_hi_div2(256),
- .c_cnt_hi_div3(256),
- .c_cnt_hi_div4(256),
- .c_cnt_hi_div5(256),
- .c_cnt_hi_div6(256),
- .c_cnt_hi_div7(256),
- .c_cnt_hi_div8(256),
- .c_cnt_in_src0("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src1("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src2("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src3("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src4("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src5("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src6("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src7("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src8("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_lo_div0(4),
- .c_cnt_lo_div1(2),
- .c_cnt_lo_div2(256),
- .c_cnt_lo_div3(256),
- .c_cnt_lo_div4(256),
- .c_cnt_lo_div5(256),
- .c_cnt_lo_div6(256),
- .c_cnt_lo_div7(256),
- .c_cnt_lo_div8(256),
- .c_cnt_odd_div_duty_en0("false"),
- .c_cnt_odd_div_duty_en1("false"),
- .c_cnt_odd_div_duty_en2("false"),
- .c_cnt_odd_div_duty_en3("false"),
- .c_cnt_odd_div_duty_en4("false"),
- .c_cnt_odd_div_duty_en5("false"),
- .c_cnt_odd_div_duty_en6("false"),
- .c_cnt_odd_div_duty_en7("false"),
- .c_cnt_odd_div_duty_en8("false"),
- .c_cnt_ph_mux_prst0(0),
- .c_cnt_ph_mux_prst1(0),
- .c_cnt_ph_mux_prst2(0),
- .c_cnt_ph_mux_prst3(0),
- .c_cnt_ph_mux_prst4(0),
- .c_cnt_ph_mux_prst5(0),
- .c_cnt_ph_mux_prst6(0),
- .c_cnt_ph_mux_prst7(0),
- .c_cnt_ph_mux_prst8(0),
- .c_cnt_prst0(1),
- .c_cnt_prst1(1),
- .c_cnt_prst2(1),
- .c_cnt_prst3(1),
- .c_cnt_prst4(1),
- .c_cnt_prst5(1),
- .c_cnt_prst6(1),
- .c_cnt_prst7(1),
- .c_cnt_prst8(1),
- .clock_name_0("link_clk"),
- .clock_name_1("frame_clk"),
- .clock_name_2(""),
- .clock_name_3(""),
- .clock_name_4(""),
- .clock_name_5(""),
- .clock_name_6(""),
- .clock_name_7(""),
- .clock_name_8(""),
- .clock_name_global_0("false"),
- .clock_name_global_1("false"),
- .clock_name_global_2("false"),
- .clock_name_global_3("false"),
- .clock_name_global_4("false"),
- .clock_name_global_5("false"),
- .clock_name_global_6("false"),
- .clock_name_global_7("false"),
- .clock_name_global_8("false"),
- .duty_cycle0(50),
- .duty_cycle1(50),
- .duty_cycle2(50),
- .duty_cycle3(50),
- .duty_cycle4(50),
- .duty_cycle5(50),
- .duty_cycle6(50),
- .duty_cycle7(50),
- .duty_cycle8(50),
- .m_cnt_bypass_en("false"),
- .m_cnt_hi_div(2),
- .m_cnt_lo_div(2),
- .m_cnt_odd_div_duty_en("false"),
- .n_cnt_bypass_en("true"),
- .n_cnt_hi_div(256),
- .n_cnt_lo_div(256),
- .n_cnt_odd_div_duty_en("false"),
- .number_of_clocks(2),
- .operation_mode("source_synchronous"),
- .output_clock_frequency0("100.000000 MHz"),
- .output_clock_frequency1("200.000000 MHz"),
- .output_clock_frequency2("0 ps"),
- .output_clock_frequency3("0 ps"),
- .output_clock_frequency4("0 ps"),
- .output_clock_frequency5("0 ps"),
- .output_clock_frequency6("0 ps"),
- .output_clock_frequency7("0 ps"),
- .output_clock_frequency8("0 ps"),
- .phase_shift0("0 ps"),
- .phase_shift1("0 ps"),
- .phase_shift2("0 ps"),
- .phase_shift3("0 ps"),
- .phase_shift4("0 ps"),
- .phase_shift5("0 ps"),
- .phase_shift6("0 ps"),
- .phase_shift7("0 ps"),
- .phase_shift8("0 ps"),
- .pll_bw_sel("Low"),
- .pll_bwctrl("pll_bw_res_setting2"),
- .pll_cp_current("pll_cp_setting10"),
- .pll_extclk_0_cnt_src("pll_extclk_cnt_src_vss"),
- .pll_extclk_1_cnt_src("pll_extclk_cnt_src_vss"),
- .pll_fbclk_mux_1("pll_fbclk_mux_1_glb"),
- .pll_fbclk_mux_2("pll_fbclk_mux_2_fb_1"),
- .pll_m_cnt_in_src("c_m_cnt_in_src_ph_mux_clk"),
- .pll_output_clk_frequency("800.0 MHz"),
- .pll_slf_rst("false"),
- .pll_subtype("General"),
- .pll_type("Arria 10"),
- .prot_mode("BASIC"),
- .reference_clock_frequency("200.0 MHz")
- ) altera_iopll_i (
- .refclk1 (1'b0),
- .rst (rst),
- .fbclk (1'b0),
- .fboutclk ( ),
- .zdbfbclk ( ),
- .locked (locked),
- .loaden ( ),
- .phase_done ( ),
- .reconfig_to_pll (64'b0),
- .refclk (refclk),
- .scanclk (1'b0),
- .phout ( ),
- .num_phase_shifts (3'b0),
- .cntsel (5'b0),
- .clkbad ( ),
- .extclk_out ( ),
- .lvds_clk ( ),
- .outclk ({outclk_1, outclk_0}),
- .phase_en (1'b0),
- .extswitch (1'b0),
- .cascade_out ( ),
- .activeclk ( ),
- .adjpllin (1'b0),
- .updn (1'b0),
- .reconfig_from_pll ( )
- );
-endmodule
-
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/altera_iopll_180/synth/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.v b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/altera_iopll_180/synth/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.v
deleted file mode 100644
index d4ee2071a4b3a49f0e2fc76198d6de5fe84d8058..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/altera_iopll_180/synth/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.v
+++ /dev/null
@@ -1,183 +0,0 @@
-`timescale 1ns/10ps
-module ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama(
-
- // interface 'reset'
- input wire rst,
-
- // interface 'refclk'
- input wire refclk,
-
- // interface 'locked'
- output wire locked,
-
- // interface 'outclk0'
- output wire outclk_0,
-
- // interface 'outclk1'
- output wire outclk_1
-);
-
- wire [6:0] unused_wires;
-
- altera_iopll #(
- .c_cnt_bypass_en0("false"),
- .c_cnt_bypass_en1("false"),
- .c_cnt_bypass_en2("true"),
- .c_cnt_bypass_en3("true"),
- .c_cnt_bypass_en4("true"),
- .c_cnt_bypass_en5("true"),
- .c_cnt_bypass_en6("true"),
- .c_cnt_bypass_en7("true"),
- .c_cnt_bypass_en8("true"),
- .c_cnt_hi_div0(4),
- .c_cnt_hi_div1(2),
- .c_cnt_hi_div2(256),
- .c_cnt_hi_div3(256),
- .c_cnt_hi_div4(256),
- .c_cnt_hi_div5(256),
- .c_cnt_hi_div6(256),
- .c_cnt_hi_div7(256),
- .c_cnt_hi_div8(256),
- .c_cnt_in_src0("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src1("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src2("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src3("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src4("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src5("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src6("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src7("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_in_src8("c_m_cnt_in_src_ph_mux_clk"),
- .c_cnt_lo_div0(4),
- .c_cnt_lo_div1(2),
- .c_cnt_lo_div2(256),
- .c_cnt_lo_div3(256),
- .c_cnt_lo_div4(256),
- .c_cnt_lo_div5(256),
- .c_cnt_lo_div6(256),
- .c_cnt_lo_div7(256),
- .c_cnt_lo_div8(256),
- .c_cnt_odd_div_duty_en0("false"),
- .c_cnt_odd_div_duty_en1("false"),
- .c_cnt_odd_div_duty_en2("false"),
- .c_cnt_odd_div_duty_en3("false"),
- .c_cnt_odd_div_duty_en4("false"),
- .c_cnt_odd_div_duty_en5("false"),
- .c_cnt_odd_div_duty_en6("false"),
- .c_cnt_odd_div_duty_en7("false"),
- .c_cnt_odd_div_duty_en8("false"),
- .c_cnt_ph_mux_prst0(0),
- .c_cnt_ph_mux_prst1(0),
- .c_cnt_ph_mux_prst2(0),
- .c_cnt_ph_mux_prst3(0),
- .c_cnt_ph_mux_prst4(0),
- .c_cnt_ph_mux_prst5(0),
- .c_cnt_ph_mux_prst6(0),
- .c_cnt_ph_mux_prst7(0),
- .c_cnt_ph_mux_prst8(0),
- .c_cnt_prst0(1),
- .c_cnt_prst1(1),
- .c_cnt_prst2(1),
- .c_cnt_prst3(1),
- .c_cnt_prst4(1),
- .c_cnt_prst5(1),
- .c_cnt_prst6(1),
- .c_cnt_prst7(1),
- .c_cnt_prst8(1),
- .clock_name_0("link_clk"),
- .clock_name_1("frame_clk"),
- .clock_name_2(""),
- .clock_name_3(""),
- .clock_name_4(""),
- .clock_name_5(""),
- .clock_name_6(""),
- .clock_name_7(""),
- .clock_name_8(""),
- .clock_name_global_0("false"),
- .clock_name_global_1("false"),
- .clock_name_global_2("false"),
- .clock_name_global_3("false"),
- .clock_name_global_4("false"),
- .clock_name_global_5("false"),
- .clock_name_global_6("false"),
- .clock_name_global_7("false"),
- .clock_name_global_8("false"),
- .duty_cycle0(50),
- .duty_cycle1(50),
- .duty_cycle2(50),
- .duty_cycle3(50),
- .duty_cycle4(50),
- .duty_cycle5(50),
- .duty_cycle6(50),
- .duty_cycle7(50),
- .duty_cycle8(50),
- .m_cnt_bypass_en("false"),
- .m_cnt_hi_div(2),
- .m_cnt_lo_div(2),
- .m_cnt_odd_div_duty_en("false"),
- .n_cnt_bypass_en("true"),
- .n_cnt_hi_div(256),
- .n_cnt_lo_div(256),
- .n_cnt_odd_div_duty_en("false"),
- .number_of_clocks(2),
- .operation_mode("source_synchronous"),
- .output_clock_frequency0("100.000000 MHz"),
- .output_clock_frequency1("200.000000 MHz"),
- .output_clock_frequency2("0 ps"),
- .output_clock_frequency3("0 ps"),
- .output_clock_frequency4("0 ps"),
- .output_clock_frequency5("0 ps"),
- .output_clock_frequency6("0 ps"),
- .output_clock_frequency7("0 ps"),
- .output_clock_frequency8("0 ps"),
- .phase_shift0("0 ps"),
- .phase_shift1("0 ps"),
- .phase_shift2("0 ps"),
- .phase_shift3("0 ps"),
- .phase_shift4("0 ps"),
- .phase_shift5("0 ps"),
- .phase_shift6("0 ps"),
- .phase_shift7("0 ps"),
- .phase_shift8("0 ps"),
- .pll_bw_sel("Low"),
- .pll_bwctrl("pll_bw_res_setting2"),
- .pll_cp_current("pll_cp_setting10"),
- .pll_extclk_0_cnt_src("pll_extclk_cnt_src_vss"),
- .pll_extclk_1_cnt_src("pll_extclk_cnt_src_vss"),
- .pll_fbclk_mux_1("pll_fbclk_mux_1_glb"),
- .pll_fbclk_mux_2("pll_fbclk_mux_2_fb_1"),
- .pll_m_cnt_in_src("c_m_cnt_in_src_ph_mux_clk"),
- .pll_output_clk_frequency("800.0 MHz"),
- .pll_slf_rst("false"),
- .pll_subtype("General"),
- .pll_type("Arria 10"),
- .prot_mode("BASIC"),
- .reference_clock_frequency("200.0 MHz")
- ) altera_iopll_i (
- .refclk1 (1'b0),
- .rst (rst),
- .fbclk (1'b0),
- .fboutclk ( ),
- .zdbfbclk ( ),
- .locked (locked),
- .loaden ( ),
- .phase_done ( ),
- .reconfig_to_pll (64'b0),
- .refclk (refclk),
- .scanclk (1'b0),
- .phout ( ),
- .num_phase_shifts (3'b0),
- .cntsel (5'b0),
- .clkbad ( ),
- .extclk_out ( ),
- .lvds_clk ( ),
- .outclk ({outclk_1, outclk_0}),
- .phase_en (1'b0),
- .extswitch (1'b0),
- .cascade_out ( ),
- .activeclk ( ),
- .adjpllin (1'b0),
- .updn (1'b0),
- .reconfig_from_pll ( )
- );
-endmodule
-
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.bsf b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.bsf
deleted file mode 100644
index 4b8b8c3519edee34532c09f62b26890cc643d728..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.bsf
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
-WARNING: Do NOT edit the input and output ports in this file in a text
-editor if you plan to continue editing the block that represents it in
-the Block Editor! File corruption is VERY likely to occur.
-*/
-/*
-Copyright (C) 2018 Intel Corporation. All rights reserved.
-Your use of Intel Corporation's design tools, logic functions
-and other software and tools, and its AMPP partner logic
-functions, and any output files from any of the foregoing
-(including device programming or simulation files), and any
-associated documentation or information are expressly subject
-to the terms and conditions of the Intel Program License
-Subscription Agreement, the Intel Quartus Prime License Agreement,
-the Intel FPGA IP License Agreement, or other applicable license
-agreement, including, without limitation, that your use is for
-the sole purpose of programming logic devices manufactured by
-Intel and sold by Intel or its authorized distributors. Please
-refer to the applicable agreement for further details.
-*/
-(header "symbol" (version "1.1"))
-(symbol
- (rect 0 0 248 184)
- (text "ip_arria10_e1sg_jesd204b_rx_core_pll" (rect 13 -1 166 11)(font "Arial" (font_size 10)))
- (text "inst" (rect 8 168 20 180)(font "Arial" ))
- (port
- (pt 0 72)
- (input)
- (text "refclk" (rect 0 0 22 12)(font "Arial" (font_size 8)))
- (text "refclk" (rect 4 61 40 72)(font "Arial" (font_size 8)))
- (line (pt 0 72)(pt 48 72)(line_width 1))
- )
- (port
- (pt 0 112)
- (input)
- (text "rst" (rect 0 0 10 12)(font "Arial" (font_size 8)))
- (text "rst" (rect 4 101 22 112)(font "Arial" (font_size 8)))
- (line (pt 0 112)(pt 48 112)(line_width 1))
- )
- (port
- (pt 248 72)
- (output)
- (text "locked" (rect 0 0 24 12)(font "Arial" (font_size 8)))
- (text "locked" (rect 127 61 163 72)(font "Arial" (font_size 8)))
- )
- (port
- (pt 248 112)
- (output)
- (text "outclk_0" (rect 0 0 33 12)(font "Arial" (font_size 8)))
- (text "outclk_0" (rect 117 101 165 112)(font "Arial" (font_size 8)))
- )
- (port
- (pt 248 152)
- (output)
- (text "outclk_1" (rect 0 0 31 12)(font "Arial" (font_size 8)))
- (text "outclk_1" (rect 119 141 167 152)(font "Arial" (font_size 8)))
- )
- (drawing
- (text "locked" (rect 113 43 262 99)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "export" (rect 82 67 200 144)(font "Arial" (color 0 0 0)))
- (text "outclk0" (rect 113 83 268 179)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "clk" (rect 97 107 212 224)(font "Arial" (color 0 0 0)))
- (text "outclk1" (rect 113 123 268 259)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "clk" (rect 97 147 212 304)(font "Arial" (color 0 0 0)))
- (text "refclk" (rect 16 43 68 99)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "clk" (rect 53 67 124 144)(font "Arial" (color 0 0 0)))
- (text "reset" (rect 19 83 68 179)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset" (rect 53 107 136 224)(font "Arial" (color 0 0 0)))
- (text " ip_arria10_e1sg_jesd204b_rx_core_pll " (rect -9 168 210 346)(font "Arial" ))
- (line (pt 48 32)(pt 112 32)(line_width 1))
- (line (pt 112 32)(pt 112 168)(line_width 1))
- (line (pt 48 168)(pt 112 168)(line_width 1))
- (line (pt 48 32)(pt 48 168)(line_width 1))
- (line (pt 160 72)(pt 112 72)(line_width 1))
- (line (pt 111 52)(pt 111 76)(line_width 1))
- (line (pt 110 52)(pt 110 76)(line_width 1))
- (line (pt 160 112)(pt 112 112)(line_width 1))
- (line (pt 111 92)(pt 111 116)(line_width 1))
- (line (pt 110 92)(pt 110 116)(line_width 1))
- (line (pt 160 152)(pt 112 152)(line_width 1))
- (line (pt 111 132)(pt 111 156)(line_width 1))
- (line (pt 110 132)(pt 110 156)(line_width 1))
- (line (pt 49 52)(pt 49 76)(line_width 1))
- (line (pt 50 52)(pt 50 76)(line_width 1))
- (line (pt 49 92)(pt 49 116)(line_width 1))
- (line (pt 50 92)(pt 50 116)(line_width 1))
- (line (pt 0 0)(pt 251 0)(line_width 1))
- (line (pt 251 0)(pt 251 184)(line_width 1))
- (line (pt 0 184)(pt 251 184)(line_width 1))
- (line (pt 0 0)(pt 0 184)(line_width 1))
- )
-)
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.cmp b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.cmp
deleted file mode 100644
index c274deee5af780c190abbfad7a790166387b88aa..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.cmp
+++ /dev/null
@@ -1,10 +0,0 @@
- component ip_arria10_e1sg_jesd204b_rx_core_pll is
- port (
- locked : out std_logic; -- export
- outclk_0 : out std_logic; -- clk
- outclk_1 : out std_logic; -- clk
- refclk : in std_logic := 'X'; -- clk
- rst : in std_logic := 'X' -- reset
- );
- end component ip_arria10_e1sg_jesd204b_rx_core_pll;
-
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.csv b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.csv
deleted file mode 100644
index 756e36aa5c07832e51129903b064d8ffa8346538..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.csv
+++ /dev/null
@@ -1,18 +0,0 @@
-# system info ip_arria10_e1sg_jesd204b_rx_core_pll on 2019.11.25.08:21:57
-system_info:
-name,value
-DEVICE,10AX115U2F45E1SG
-DEVICE_FAMILY,Arria 10
-GENERATION_ID,0
-#
-#
-# Files generated for ip_arria10_e1sg_jesd204b_rx_core_pll on 2019.11.25.08:21:57
-files:
-filepath,kind,attributes,module,is_top
-sim/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd,VHDL,CONTAINS_INLINE_CONFIGURATION,ip_arria10_e1sg_jesd204b_rx_core_pll,true
-altera_iopll_180/sim/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.vo,VERILOG,,ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama,false
-#
-# Map from instance-path to kind of module
-instances:
-instancePath,module
-ip_arria10_e1sg_jesd204b_rx_core_pll.core_pll,ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.html b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.html
deleted file mode 100644
index f1abdb87c25d1da07a5e1e1cee5a1d896cefc5fc..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.html
+++ /dev/null
@@ -1,1401 +0,0 @@
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-<html xmlns="http://www.w3.org/1999/xhtml">
- <head>
- <title>datasheet for ip_arria10_e1sg_jesd204b_rx_core_pll</title>
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- </head>
- <body>
- <table class="topTitle">
- <tr>
- <td class="l">ip_arria10_e1sg_jesd204b_rx_core_pll</td>
- <td class="r">
- <br/>
- <br/>
- </td>
- </tr>
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- <tr>
- <td class="l">2019.11.25.08:21:58</td>
- <td class="r">Datasheet</td>
- </tr>
- </table>
- <div style="width:100% ; height:10px"> </div>
- <div class="label">Overview</div>
- <div class="greydiv">
- <div style="display:inline-block ; text-align:left">
- <table class="connectionboxes">
- <tr style="height:6px">
- <td></td>
- </tr>
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- <br/></span>
- </div>
- </div>
- <div style="width:100% ; height:10px"> </div>
- <div class="label">Memory Map</div>
- <table class="mmap">
- <tr>
- <td class="empty" rowspan="2"></td>
- </tr>
- </table>
- <a name="module_core_pll"> </a>
- <div>
- <hr/>
- <h2>core_pll</h2>altera_iopll v18.0
- <br/>
- <br/>
- <br/>
- <table class="flowbox">
- <tr>
- <td class="parametersbox">
- <h2>Parameters</h2>
- <table>
- <tr>
- <td class="parametername">gui_device_family</td>
- <td class="parametervalue">Arria 10</td>
- </tr>
- <tr>
- <td class="parametername">gui_device_component</td>
- <td class="parametervalue">10AX115U2F45E1SG</td>
- </tr>
- <tr>
- <td class="parametername">gui_device_speed_grade</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">gui_en_reconf</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_en_dps_ports</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_reference_clock_frequency</td>
- <td class="parametervalue">200.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_use_locked</td>
- <td class="parametervalue">true</td>
- </tr>
- <tr>
- <td class="parametername">gui_en_adv_params</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_pll_bandwidth_preset</td>
- <td class="parametervalue">Low</td>
- </tr>
- <tr>
- <td class="parametername">gui_pll_auto_reset</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_en_lvds_ports</td>
- <td class="parametervalue">Disabled</td>
- </tr>
- <tr>
- <td class="parametername">gui_operation_mode</td>
- <td class="parametervalue">source synchronous</td>
- </tr>
- <tr>
- <td class="parametername">gui_refclk_switch</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_refclk1_frequency</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_en_phout_ports</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_en_extclkout_ports</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_number_of_clocks</td>
- <td class="parametervalue">2</td>
- </tr>
- <tr>
- <td class="parametername">gui_fix_vco_frequency</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_enable_output_counter_cascading</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_mif_gen_options</td>
- <td class="parametervalue">Generate New MIF File</td>
- </tr>
- <tr>
- <td class="parametername">gui_new_mif_file_path</td>
- <td class="parametervalue">~/pll.mif</td>
- </tr>
- <tr>
- <td class="parametername">gui_active_clk</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_clk_bad</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_switchover_mode</td>
- <td class="parametervalue">Automatic Switchover</td>
- </tr>
- <tr>
- <td class="parametername">gui_switchover_delay</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">gui_enable_cascade_out</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_cascade_outclk_index</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">gui_enable_cascade_in</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_enable_mif_dps</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_dps_cntr</td>
- <td class="parametervalue">C0</td>
- </tr>
- <tr>
- <td class="parametername">gui_dps_num</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">gui_dps_dir</td>
- <td class="parametervalue">Positive</td>
- </tr>
- <tr>
- <td class="parametername">gui_extclkout_0_source</td>
- <td class="parametervalue">C0</td>
- </tr>
- <tr>
- <td class="parametername">gui_extclkout_1_source</td>
- <td class="parametervalue">C0</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_global</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string0</td>
- <td class="parametervalue">link_clk</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string1</td>
- <td class="parametervalue">frame_clk</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string2</td>
- <td class="parametervalue">outclk2</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string3</td>
- <td class="parametervalue">outclk3</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string4</td>
- <td class="parametervalue">outclk4</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string5</td>
- <td class="parametervalue">outclk5</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string6</td>
- <td class="parametervalue">outclk6</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string7</td>
- <td class="parametervalue">outclk7</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string8</td>
- <td class="parametervalue">outclk8</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string9</td>
- <td class="parametervalue">outclk9</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string10</td>
- <td class="parametervalue">outclk10</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string11</td>
- <td class="parametervalue">outclk11</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string12</td>
- <td class="parametervalue">outclk12</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string13</td>
- <td class="parametervalue">outclk13</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string14</td>
- <td class="parametervalue">outclk14</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string15</td>
- <td class="parametervalue">outclk15</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string16</td>
- <td class="parametervalue">outclk16</td>
- </tr>
- <tr>
- <td class="parametername">gui_clock_name_string17</td>
- <td class="parametervalue">outclk17</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c2</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c3</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c4</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c5</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c6</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c7</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c8</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c9</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c10</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c11</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c12</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c13</td>
- <td class="parametervalue">6</td>
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- <tr>
- <td class="parametername">gui_divide_factor_c14</td>
- <td class="parametervalue">6</td>
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- <tr>
- <td class="parametername">gui_divide_factor_c15</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c16</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_divide_factor_c17</td>
- <td class="parametervalue">6</td>
- </tr>
- <tr>
- <td class="parametername">gui_cascade_counter2</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_cascade_counter3</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_cascade_counter4</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_cascade_counter5</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_cascade_counter6</td>
- <td class="parametervalue">false</td>
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- <tr>
- <td class="parametername">gui_cascade_counter7</td>
- <td class="parametervalue">false</td>
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- <tr>
- <td class="parametername">gui_cascade_counter8</td>
- <td class="parametervalue">false</td>
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- <tr>
- <td class="parametername">gui_cascade_counter9</td>
- <td class="parametervalue">false</td>
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- <tr>
- <td class="parametername">gui_cascade_counter10</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_cascade_counter11</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_cascade_counter12</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_cascade_counter13</td>
- <td class="parametervalue">false</td>
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- <tr>
- <td class="parametername">gui_cascade_counter14</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_cascade_counter15</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_cascade_counter16</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_cascade_counter17</td>
- <td class="parametervalue">false</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency0</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency1</td>
- <td class="parametervalue">200.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency2</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency3</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency4</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency5</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency6</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency7</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency8</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency9</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency10</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency11</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency12</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency13</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency14</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency15</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency16</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_output_clock_frequency17</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency0</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency1</td>
- <td class="parametervalue">200.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency2</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency3</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency4</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency5</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency6</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency7</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency8</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency9</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency10</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency11</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency12</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency13</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency14</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency15</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency16</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency17</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range0</td>
- <td class="parametervalue">99.595142,99.607843,99.649123,100.0,100.350877,100.392157</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range1</td>
- <td class="parametervalue">183.333333,185.714286,187.5,200.0,214.285714,216.666667</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range2</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range3</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range4</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range5</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range6</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range7</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range8</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range9</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range10</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range11</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range12</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range13</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range14</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range15</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range16</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_output_clock_frequency_range17</td>
- <td class="parametervalue">100.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units0</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units1</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units2</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units3</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units4</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units5</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units6</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units7</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units8</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units9</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units10</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units11</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units12</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units13</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units14</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units15</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units16</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_ps_units17</td>
- <td class="parametervalue">ps</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift0</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift1</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift5</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift6</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift9</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift10</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift11</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift12</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift13</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift14</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift15</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift16</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift17</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg5</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg6</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg9</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg10</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg11</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg12</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg13</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg14</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg15</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg16</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_phase_shift_deg17</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift0</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift1</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift5</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift6</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift9</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift10</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift11</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift12</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift13</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift14</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift15</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift16</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift17</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range0</td>
- <td class="parametervalue">0.0,78.1,89.3,104.2,125.0,156.2</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range1</td>
- <td class="parametervalue">0.0,78.1,89.3,104.2,125.0,156.2</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range5</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range6</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range9</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range10</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range11</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range12</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range13</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range14</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range15</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range16</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_range17</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg5</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg6</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg9</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg10</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg11</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg12</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg13</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg14</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg15</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg16</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg17</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range2</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range3</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range4</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range5</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range6</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range7</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range8</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range9</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range10</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range11</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range12</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range13</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range14</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range15</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range16</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_phase_shift_deg_range17</td>
- <td class="parametervalue">0.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle0</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle1</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle2</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle3</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle4</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle5</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle6</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle7</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle8</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle9</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle10</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle11</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle12</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle13</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle14</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle15</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle16</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_duty_cycle17</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle0</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle1</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle2</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle3</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle4</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle5</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle6</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle7</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle8</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle9</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle10</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle11</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle12</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle13</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle14</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle15</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle16</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle17</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range0</td>
- <td class="parametervalue">45.83,46.43,46.88,50.0,53.12,53.57</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range1</td>
- <td class="parametervalue">41.67,42.86,43.75,50.0,56.25,57.14</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range2</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range3</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range4</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range5</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range6</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range7</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range8</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range9</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range10</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range11</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range12</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range13</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range14</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range15</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range16</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">gui_actual_duty_cycle_range17</td>
- <td class="parametervalue">50.0</td>
- </tr>
- <tr>
- <td class="parametername">parameterTable_names</td>
- <td class="parametervalue">M-Counter Divide Setting,N-Counter Divide Setting,VCO Frequency,C-Counter-0 Divide Setting,C-Counter-1 Divide Setting,C-Counter-2 Divide Setting,C-Counter-3 Divide Setting,C-Counter-4 Divide Setting,C-Counter-5 Divide Setting,C-Counter-6 Divide Setting,C-Counter-7 Divide Setting,C-Counter-8 Divide Setting,PLL Auto Reset,M-Counter Hi Divide,M-Counter Lo Divide,M-Counter Even Duty Enable,M-Counter Bypass Enable,N-Counter Hi Divide,N-Counter Lo Divide,N-Counter Even Duty Enable,N-Counter Bypass Enable,C-Counter-0 Hi Divide,C-Counter-1 Hi Divide,C-Counter-2 Hi Divide,C-Counter-3 Hi Divide,C-Counter-4 Hi Divide,C-Counter-5 Hi Divide,C-Counter-6 Hi Divide,C-Counter-7 Hi Divide,C-Counter-8 Hi Divide,C-Counter-0 Lo Divide,C-Counter-1 Lo Divide,C-Counter-2 Lo Divide,C-Counter-3 Lo Divide,C-Counter-4 Lo Divide,C-Counter-5 Lo Divide,C-Counter-6 Lo Divide,C-Counter-7 Lo Divide,C-Counter-8 Lo Divide,C-Counter-0 Even Duty Enable,C-Counter-1 Even Duty Enable,C-Counter-2 Even Duty Enable,C-Counter-3 Even Duty Enable,C-Counter-4 Even Duty Enable,C-Counter-5 Even Duty Enable,C-Counter-6 Even Duty Enable,C-Counter-7 Even Duty Enable,C-Counter-8 Even Duty Enable,C-Counter-0 Bypass Enable,C-Counter-1 Bypass Enable,C-Counter-2 Bypass Enable,C-Counter-3 Bypass Enable,C-Counter-4 Bypass Enable,C-Counter-5 Bypass Enable,C-Counter-6 Bypass Enable,C-Counter-7 Bypass Enable,C-Counter-8 Bypass Enable,C-Counter-0 Preset,C-Counter-1 Preset,C-Counter-2 Preset,C-Counter-3 Preset,C-Counter-4 Preset,C-Counter-5 Preset,C-Counter-6 Preset,C-Counter-7 Preset,C-Counter-8 Preset,C-Counter-0 Phase Mux Preset,C-Counter-1 Phase Mux Preset,C-Counter-2 Phase Mux Preset,C-Counter-3 Phase Mux Preset,C-Counter-4 Phase Mux Preset,C-Counter-5 Phase Mux Preset,C-Counter-6 Phase Mux Preset,C-Counter-7 Phase Mux Preset,C-Counter-8 Phase Mux Preset,Charge Pump Current,Bandwidth Control</td>
- </tr>
- <tr>
- <td class="parametername">parameterTable_values</td>
- <td class="parametervalue">4,1,800.0 MHz,8,4,1,1,1,1,1,1,1,false,2,2,false,false,256,256,false,true,4,2,256,256,256,256,256,256,256,4,2,256,256,256,256,256,256,256,false,false,false,false,false,false,false,false,false,false,false,true,true,true,true,true,true,true,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,pll_cp_setting10,pll_bw_res_setting2</td>
- </tr>
- <tr>
- <td class="parametername">mifTable_names</td>
- <td class="parametervalue">The MIF file specified does not yet exist</td>
- </tr>
- <tr>
- <td class="parametername">mifTable_values</td>
- <td class="parametervalue"></td>
- </tr>
- <tr>
- <td class="parametername">deviceFamily</td>
- <td class="parametervalue">UNKNOWN</td>
- </tr>
- <tr>
- <td class="parametername">generateLegacySim</td>
- <td class="parametervalue">false</td>
- </tr>
- </table>
- </td>
- </tr>
- </table>  
- <table class="flowbox">
- <tr>
- <td class="parametersbox">
- <h2>Software Assignments</h2>(none)</td>
- </tr>
- </table>
- </div>
- <table class="blueBar">
- <tr>
- <td class="l">generation took 0.00 seconds</td>
- <td class="r">rendering took 0.01 seconds</td>
- </tr>
- </table>
- </body>
-</html>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.ppf b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.ppf
deleted file mode 100644
index daace63bb8f7d0dc09a835032718bb969ab2c4f2..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.ppf
+++ /dev/null
@@ -1,14 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<pinplan
- variation_name="core_pll"
- megafunction_name="ALTERA_IOPLL"
- intended_family="Arria 10"
- specifies="all_ports">
- <global>
- <pin name="rst" direction="input" scope="external" />
- <pin name="refclk" direction="input" scope="external" />
- <pin name="locked" direction="output" scope="external" />
- <pin name="outclk_0" direction="output" scope="external" />
- <pin name="outclk_1" direction="output" scope="external" />
- </global>
-</pinplan>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.qgsimc b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.qgsimc
deleted file mode 100644
index 390ae976fd9c1f845800283ea0099268089c11c6..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.qgsimc
+++ /dev/null
@@ -1,2877 +0,0 @@
-<?xml version="1.0" ?>
-<node xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:xs="http://www.w3.org/2001/XMLSchema" xmlns:altera="http://www.altera.com/XMLSchema/Qsys/SystemTree">
- <instanceKey xsi:type="xs:string">ip_arria10_e1sg_jesd204b_rx_core_pll</instanceKey>
- <instanceData xsi:type="data">
- <parameters></parameters>
- <interconnectAssignments>
- <interconnectAssignment>
- <name>$system.qsys_mm.clockCrossingAdapter</name>
- <value>HANDSHAKE</value>
- </interconnectAssignment>
- <interconnectAssignment>
- <name>$system.qsys_mm.maxAdditionalLatency</name>
- <value>0</value>
- </interconnectAssignment>
- </interconnectAssignments>
- <className>ip_arria10_e1sg_jesd204b_rx_core_pll</className>
- <version>1.0</version>
- <name>ip_arria10_e1sg_jesd204b_rx_core_pll</name>
- <uniqueName>ip_arria10_e1sg_jesd204b_rx_core_pll</uniqueName>
- <nonce>0</nonce>
- <incidentConnections></incidentConnections>
- </instanceData>
- <children>
- <node>
- <instanceKey xsi:type="xs:string">core_pll</instanceKey>
- <instanceData xsi:type="data">
- <parameters>
- <parameter>
- <name>c_cnt_bypass_en0</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en1</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en10</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en11</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en12</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en13</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en14</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en15</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en16</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en17</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en2</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en3</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en4</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en5</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en6</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en7</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en8</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en9</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div0</name>
- <value>4</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div1</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div10</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div11</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div12</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div13</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div14</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div15</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div16</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div17</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div2</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div3</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div4</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div5</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div6</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div7</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div8</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div9</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src0</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src1</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src10</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src11</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src12</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src13</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src14</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src15</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src16</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src17</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src2</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src3</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src4</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src5</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src6</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src7</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src8</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src9</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div0</name>
- <value>4</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div1</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div10</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div11</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div12</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div13</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div14</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div15</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div16</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div17</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div2</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div3</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div4</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div5</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div6</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div7</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div8</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div9</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en0</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en1</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en10</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en11</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en12</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en13</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en14</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en15</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en16</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en17</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en2</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en3</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en4</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en5</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en6</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en7</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en8</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en9</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst0</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst1</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst10</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst11</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst12</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst13</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst14</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst15</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst16</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst17</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst2</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst3</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst4</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst5</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst6</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst7</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst8</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst9</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst0</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst1</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst10</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst11</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst12</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst13</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst14</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst15</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst16</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst17</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst2</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst3</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst4</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst5</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst6</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst7</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst8</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst9</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>cal_code_hex_file</name>
- <value>iossm.hex</value>
- </parameter>
- <parameter>
- <name>cal_converge</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>cal_error</name>
- <value>cal_clean</value>
- </parameter>
- <parameter>
- <name>clock_name_0</name>
- <value>link_clk</value>
- </parameter>
- <parameter>
- <name>clock_name_1</name>
- <value>frame_clk</value>
- </parameter>
- <parameter>
- <name>clock_name_2</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_3</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_4</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_5</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_6</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_7</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_8</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_global</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_0</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_1</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_2</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_3</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_4</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_5</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_6</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_7</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_8</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_to_compensate</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>divide_factor0</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor1</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor2</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor3</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor4</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor5</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor6</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor7</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor8</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>dprio_interface_sel</name>
- <value>3</value>
- </parameter>
- <parameter>
- <name>duty_cycle0</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle1</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle10</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle11</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle12</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle13</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle14</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle15</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle16</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle17</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle2</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle3</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle4</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle5</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle6</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle7</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle8</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle9</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>eff_m_cnt</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>fractional_vco_multiplier</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_active_clk</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle0</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle1</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle10</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle11</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle12</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle13</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle14</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle15</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle16</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle17</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle2</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle3</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle4</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle5</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle6</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle7</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle8</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle9</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range0</name>
- <value>45.83,46.43,46.88,50.0,53.12,53.57</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range1</name>
- <value>41.67,42.86,43.75,50.0,56.25,57.14</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range10</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range11</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range12</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range13</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range14</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range15</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range16</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range17</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range2</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range3</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range4</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range5</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range6</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range7</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range8</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range9</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency0</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency1</name>
- <value>200.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency10</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency11</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency12</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency13</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency14</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency15</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency16</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency17</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency2</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency3</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency4</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency5</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency6</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency7</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency8</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency9</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range0</name>
- <value>99.595142,99.607843,99.649123,100.0,100.350877,100.392157</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range1</name>
- <value>183.333333,185.714286,187.5,200.0,214.285714,216.666667</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range10</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range11</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range12</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range13</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range14</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range15</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range16</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range17</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range2</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range3</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range4</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range5</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range6</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range7</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range8</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range9</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift0</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift1</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg0</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg1</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range0</name>
- <value>0.0,2.8,3.2,3.8,4.5,5.6</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range1</name>
- <value>0.0,5.6,6.4,7.5,9.0,11.2</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range0</name>
- <value>0.0,78.1,89.3,104.2,125.0,156.2</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range1</name>
- <value>0.0,78.1,89.3,104.2,125.0,156.2</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src0</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src1</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src2</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src3</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src4</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src5</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src6</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src7</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src8</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_cal_code_hex_file</name>
- <value>iossm.hex</value>
- </parameter>
- <parameter>
- <name>gui_cal_converge</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cal_error</name>
- <value>cal_clean</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter0</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter1</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter10</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter11</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter12</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter13</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter14</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter15</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter16</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter17</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter2</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter3</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter4</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter5</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter6</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter7</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter8</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter9</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_outclk_index</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>gui_clk_bad</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_global</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string0</name>
- <value>link_clk</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string1</name>
- <value>frame_clk</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string10</name>
- <value>outclk10</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string11</name>
- <value>outclk11</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string12</name>
- <value>outclk12</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string13</name>
- <value>outclk13</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string14</name>
- <value>outclk14</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string15</name>
- <value>outclk15</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string16</name>
- <value>outclk16</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string17</name>
- <value>outclk17</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string2</name>
- <value>outclk2</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string3</name>
- <value>outclk3</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string4</name>
- <value>outclk4</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string5</name>
- <value>outclk5</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string6</name>
- <value>outclk6</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string7</name>
- <value>outclk7</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string8</name>
- <value>outclk8</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string9</name>
- <value>outclk9</value>
- </parameter>
- <parameter>
- <name>gui_clock_to_compensate</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>gui_debug_mode</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_device_component</name>
- <value>10AX115U2F45E1SG</value>
- </parameter>
- <parameter>
- <name>gui_device_family</name>
- <value>Arria 10</value>
- </parameter>
- <parameter>
- <name>gui_device_speed_grade</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c0</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c1</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c10</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c11</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c12</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c13</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c14</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c15</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c16</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c17</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c2</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c3</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c4</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c5</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c6</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c7</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c8</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c9</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_n</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>gui_dps_cntr</name>
- <value>C0</value>
- </parameter>
- <parameter>
- <name>gui_dps_dir</name>
- <value>Positive</value>
- </parameter>
- <parameter>
- <name>gui_dps_num</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>gui_dsm_out_sel</name>
- <value>1st_order</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle0</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle1</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle10</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle11</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle12</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle13</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle14</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle15</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle16</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle17</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle2</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle3</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle4</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle5</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle6</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle7</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle8</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle9</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_en_adv_params</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_en_dps_ports</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_en_extclkout_ports</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_en_lvds_ports</name>
- <value>Disabled</value>
- </parameter>
- <parameter>
- <name>gui_en_phout_ports</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_en_reconf</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_enable_cascade_in</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_enable_cascade_out</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_enable_mif_dps</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_enable_output_counter_cascading</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_enable_permit_cal</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_existing_mif_file_path</name>
- <value>~/pll.mif</value>
- </parameter>
- <parameter>
- <name>gui_extclkout_0_source</name>
- <value>C0</value>
- </parameter>
- <parameter>
- <name>gui_extclkout_1_source</name>
- <value>C0</value>
- </parameter>
- <parameter>
- <name>gui_feedback_clock</name>
- <value>Global Clock</value>
- </parameter>
- <parameter>
- <name>gui_fix_vco_frequency</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_fixed_vco_frequency</name>
- <value>600.0</value>
- </parameter>
- <parameter>
- <name>gui_frac_multiply_factor</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>gui_fractional_cout</name>
- <value>32</value>
- </parameter>
- <parameter>
- <name>gui_include_iossm</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_lock_setting</name>
- <value>Low Lock Time</value>
- </parameter>
- <parameter>
- <name>gui_mif_config_name</name>
- <value>unnamed</value>
- </parameter>
- <parameter>
- <name>gui_mif_gen_options</name>
- <value>Generate New MIF File</value>
- </parameter>
- <parameter>
- <name>gui_multiply_factor</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_new_mif_file_path</name>
- <value>~/pll.mif</value>
- </parameter>
- <parameter>
- <name>gui_number_of_clocks</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>gui_operation_mode</name>
- <value>source synchronous</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency0</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency1</name>
- <value>200.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency10</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency11</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency12</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency13</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency14</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency15</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency16</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency17</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency2</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency3</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency4</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency5</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency6</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency7</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency8</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency9</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_parameter_table_hex_file</name>
- <value>seq_params_sim.hex</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift0</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift1</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg0</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg1</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phout_division</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>gui_pll_auto_reset</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_pll_bandwidth_preset</name>
- <value>Low</value>
- </parameter>
- <parameter>
- <name>gui_pll_cal_done</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_pll_cascading_mode</name>
- <value>adjpllin</value>
- </parameter>
- <parameter>
- <name>gui_pll_freqcal_en</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>gui_pll_freqcal_req_flag</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>gui_pll_m_cnt_in_src</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_pll_mode</name>
- <value>Integer-N PLL</value>
- </parameter>
- <parameter>
- <name>gui_pll_tclk_mux_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_pll_tclk_sel</name>
- <value>pll_tclk_m_src</value>
- </parameter>
- <parameter>
- <name>gui_pll_type</name>
- <value>S10_Simple</value>
- </parameter>
- <parameter>
- <name>gui_pll_vco_freq_band_0</name>
- <value>pll_freq_clk0_disabled</value>
- </parameter>
- <parameter>
- <name>gui_pll_vco_freq_band_1</name>
- <value>pll_freq_clk1_disabled</value>
- </parameter>
- <parameter>
- <name>gui_prot_mode</name>
- <value>UNUSED</value>
- </parameter>
- <parameter>
- <name>gui_ps_units0</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units1</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units10</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units11</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units12</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units13</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units14</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units15</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units16</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units17</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units2</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units3</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units4</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units5</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units6</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units7</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units8</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units9</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_refclk1_frequency</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_refclk_might_change</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_refclk_switch</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_reference_clock_frequency</name>
- <value>200.0</value>
- </parameter>
- <parameter>
- <name>gui_skip_sdc_generation</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_switchover_delay</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>gui_switchover_mode</name>
- <value>Automatic Switchover</value>
- </parameter>
- <parameter>
- <name>gui_use_NDFB_modes</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_use_coreclk</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_use_locked</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>gui_use_logical</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_usr_device_speed_grade</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>gui_vco_frequency</name>
- <value>600.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp0</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp1</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp10</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp11</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp12</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp13</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp14</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp15</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp16</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp17</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp2</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp3</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp4</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp5</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp6</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp7</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp8</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp9</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp0</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp1</name>
- <value>200.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp10</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp11</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp12</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp13</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp14</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp15</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp16</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp17</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp2</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp3</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp4</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp5</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp6</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp7</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp8</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp9</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp0</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp1</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_vco_frequency_fp</name>
- <value>600.0</value>
- </parameter>
- <parameter>
- <name>hp_number_of_family_allowable_clocks</name>
- <value>9</value>
- </parameter>
- <parameter>
- <name>hp_parameter_update_message</name>
- <value>{altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}}</value>
- </parameter>
- <parameter>
- <name>hp_previous_num_clocks</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>hp_qsys_scripting_mode</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>include_iossm</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>iossm_nios_sim_clk_period_ps</name>
- <value>1333</value>
- </parameter>
- <parameter>
- <name>lock_mode</name>
- <value>low_lock_time</value>
- </parameter>
- <parameter>
- <name>m_cnt_bypass_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>m_cnt_hi_div</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>m_cnt_lo_div</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>m_cnt_odd_div_duty_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>mifTable_names</name>
- <value>The MIF file specified does not yet exist</value>
- </parameter>
- <parameter>
- <name>mifTable_values</name>
- <value></value>
- </parameter>
- <parameter>
- <name>mimic_fbclk_type</name>
- <value>gclk</value>
- </parameter>
- <parameter>
- <name>multiply_factor</name>
- <value>4</value>
- </parameter>
- <parameter>
- <name>n_cnt_bypass_en</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>n_cnt_hi_div</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>n_cnt_lo_div</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>n_cnt_odd_div_duty_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>number_of_clocks</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>number_of_outclks</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>operation_mode</name>
- <value>source_synchronous</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency0</name>
- <value>100.000000 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency1</name>
- <value>200.000000 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency10</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency11</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency12</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency13</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency14</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency15</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency16</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency17</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency2</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency3</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency4</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency5</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency6</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency7</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency8</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency9</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>parameterTable_names</name>
- <value>M-Counter Divide Setting,N-Counter Divide Setting,VCO Frequency,C-Counter-0 Divide Setting,C-Counter-1 Divide Setting,C-Counter-2 Divide Setting,C-Counter-3 Divide Setting,C-Counter-4 Divide Setting,C-Counter-5 Divide Setting,C-Counter-6 Divide Setting,C-Counter-7 Divide Setting,C-Counter-8 Divide Setting,PLL Auto Reset,M-Counter Hi Divide,M-Counter Lo Divide,M-Counter Even Duty Enable,M-Counter Bypass Enable,N-Counter Hi Divide,N-Counter Lo Divide,N-Counter Even Duty Enable,N-Counter Bypass Enable,C-Counter-0 Hi Divide,C-Counter-1 Hi Divide,C-Counter-2 Hi Divide,C-Counter-3 Hi Divide,C-Counter-4 Hi Divide,C-Counter-5 Hi Divide,C-Counter-6 Hi Divide,C-Counter-7 Hi Divide,C-Counter-8 Hi Divide,C-Counter-0 Lo Divide,C-Counter-1 Lo Divide,C-Counter-2 Lo Divide,C-Counter-3 Lo Divide,C-Counter-4 Lo Divide,C-Counter-5 Lo Divide,C-Counter-6 Lo Divide,C-Counter-7 Lo Divide,C-Counter-8 Lo Divide,C-Counter-0 Even Duty Enable,C-Counter-1 Even Duty Enable,C-Counter-2 Even Duty Enable,C-Counter-3 Even Duty Enable,C-Counter-4 Even Duty Enable,C-Counter-5 Even Duty Enable,C-Counter-6 Even Duty Enable,C-Counter-7 Even Duty Enable,C-Counter-8 Even Duty Enable,C-Counter-0 Bypass Enable,C-Counter-1 Bypass Enable,C-Counter-2 Bypass Enable,C-Counter-3 Bypass Enable,C-Counter-4 Bypass Enable,C-Counter-5 Bypass Enable,C-Counter-6 Bypass Enable,C-Counter-7 Bypass Enable,C-Counter-8 Bypass Enable,C-Counter-0 Preset,C-Counter-1 Preset,C-Counter-2 Preset,C-Counter-3 Preset,C-Counter-4 Preset,C-Counter-5 Preset,C-Counter-6 Preset,C-Counter-7 Preset,C-Counter-8 Preset,C-Counter-0 Phase Mux Preset,C-Counter-1 Phase Mux Preset,C-Counter-2 Phase Mux Preset,C-Counter-3 Phase Mux Preset,C-Counter-4 Phase Mux Preset,C-Counter-5 Phase Mux Preset,C-Counter-6 Phase Mux Preset,C-Counter-7 Phase Mux Preset,C-Counter-8 Phase Mux Preset,Charge Pump Current,Bandwidth Control</value>
- </parameter>
- <parameter>
- <name>parameterTable_values</name>
- <value>4,1,800.0 MHz,8,4,1,1,1,1,1,1,1,false,2,2,false,false,256,256,false,true,4,2,256,256,256,256,256,256,256,4,2,256,256,256,256,256,256,256,false,false,false,false,false,false,false,false,false,false,false,true,true,true,true,true,true,true,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,pll_cp_setting10,pll_bw_res_setting2</value>
- </parameter>
- <parameter>
- <name>parameter_table_hex_file</name>
- <value>seq_params_sim.hex</value>
- </parameter>
- <parameter>
- <name>phase_shift0</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift1</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift10</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift11</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift12</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift13</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift14</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift15</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift16</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift17</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift2</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift3</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift4</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift5</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift6</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift7</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift8</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift9</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>pll_auto_clk_sw_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>pll_bw_sel</name>
- <value>Low</value>
- </parameter>
- <parameter>
- <name>pll_bwctrl</name>
- <value>pll_bw_res_setting2</value>
- </parameter>
- <parameter>
- <name>pll_cal_done</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>pll_clk_loss_sw_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>pll_clk_sw_dly</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>pll_clkin_0_src</name>
- <value>clk_0</value>
- </parameter>
- <parameter>
- <name>pll_clkin_1_src</name>
- <value>clk_0</value>
- </parameter>
- <parameter>
- <name>pll_cp_current</name>
- <value>pll_cp_setting10</value>
- </parameter>
- <parameter>
- <name>pll_defer_cal_user_mode</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>pll_dsm_out_sel</name>
- <value>1st_order</value>
- </parameter>
- <parameter>
- <name>pll_extclk_0_cnt_src</name>
- <value>pll_extclk_cnt_src_vss</value>
- </parameter>
- <parameter>
- <name>pll_extclk_1_cnt_src</name>
- <value>pll_extclk_cnt_src_vss</value>
- </parameter>
- <parameter>
- <name>pll_fbclk_mux_1</name>
- <value>pll_fbclk_mux_1_glb</value>
- </parameter>
- <parameter>
- <name>pll_fbclk_mux_2</name>
- <value>pll_fbclk_mux_2_fb_1</value>
- </parameter>
- <parameter>
- <name>pll_fractional_cout</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>pll_fractional_division</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>pll_freqcal_en</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>pll_freqcal_req_flag</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>pll_lock_fltr_cfg</name>
- <value>100</value>
- </parameter>
- <parameter>
- <name>pll_m_cnt</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>pll_m_cnt_basic</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>pll_m_cnt_in_src</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>pll_manu_clk_sw_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>pll_output_clk_frequency</name>
- <value>800.0 MHz</value>
- </parameter>
- <parameter>
- <name>pll_ripplecap_ctrl</name>
- <value></value>
- </parameter>
- <parameter>
- <name>pll_slf_rst</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>pll_subtype</name>
- <value>General</value>
- </parameter>
- <parameter>
- <name>pll_tclk_mux_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>pll_tclk_sel</name>
- <value>pll_tclk_m_src</value>
- </parameter>
- <parameter>
- <name>pll_type</name>
- <value>Arria 10</value>
- </parameter>
- <parameter>
- <name>pll_unlock_fltr_cfg</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>pll_vco_div</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>pll_vco_freq_band_0</name>
- <value>pll_freq_clk0_disabled</value>
- </parameter>
- <parameter>
- <name>pll_vco_freq_band_1</name>
- <value>pll_freq_clk1_disabled</value>
- </parameter>
- <parameter>
- <name>pll_vcoph_div</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>prot_mode</name>
- <value>BASIC</value>
- </parameter>
- <parameter>
- <name>refclk1_frequency</name>
- <value>100.0 MHz</value>
- </parameter>
- <parameter>
- <name>reference_clock_frequency</name>
- <value>200.0 MHz</value>
- </parameter>
- <parameter>
- <name>system_info_device_component</name>
- <value>10AX115U2F45E1SG</value>
- </parameter>
- <parameter>
- <name>system_info_device_family</name>
- <value>Arria 10</value>
- </parameter>
- <parameter>
- <name>system_info_device_speed_grade</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>system_part_trait_speed_grade</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>use_core_refclk</name>
- <value>false</value>
- </parameter>
- </parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>altera_iopll</className>
- <version>18.0</version>
- <name>core_pll</name>
- <uniqueName>ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama</uniqueName>
- <nonce>0</nonce>
- <incidentConnections></incidentConnections>
- <path>ip_arria10_e1sg_jesd204b_rx_core_pll.core_pll</path>
- </instanceData>
- <children></children>
- </node>
- </children>
-</node>
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.qgsynthc b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.qgsynthc
deleted file mode 100644
index 390ae976fd9c1f845800283ea0099268089c11c6..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.qgsynthc
+++ /dev/null
@@ -1,2877 +0,0 @@
-<?xml version="1.0" ?>
-<node xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:xs="http://www.w3.org/2001/XMLSchema" xmlns:altera="http://www.altera.com/XMLSchema/Qsys/SystemTree">
- <instanceKey xsi:type="xs:string">ip_arria10_e1sg_jesd204b_rx_core_pll</instanceKey>
- <instanceData xsi:type="data">
- <parameters></parameters>
- <interconnectAssignments>
- <interconnectAssignment>
- <name>$system.qsys_mm.clockCrossingAdapter</name>
- <value>HANDSHAKE</value>
- </interconnectAssignment>
- <interconnectAssignment>
- <name>$system.qsys_mm.maxAdditionalLatency</name>
- <value>0</value>
- </interconnectAssignment>
- </interconnectAssignments>
- <className>ip_arria10_e1sg_jesd204b_rx_core_pll</className>
- <version>1.0</version>
- <name>ip_arria10_e1sg_jesd204b_rx_core_pll</name>
- <uniqueName>ip_arria10_e1sg_jesd204b_rx_core_pll</uniqueName>
- <nonce>0</nonce>
- <incidentConnections></incidentConnections>
- </instanceData>
- <children>
- <node>
- <instanceKey xsi:type="xs:string">core_pll</instanceKey>
- <instanceData xsi:type="data">
- <parameters>
- <parameter>
- <name>c_cnt_bypass_en0</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en1</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en10</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en11</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en12</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en13</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en14</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en15</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en16</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en17</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en2</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en3</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en4</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en5</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en6</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en7</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en8</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_bypass_en9</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div0</name>
- <value>4</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div1</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div10</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div11</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div12</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div13</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div14</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div15</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div16</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div17</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div2</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div3</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div4</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div5</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div6</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div7</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div8</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_hi_div9</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src0</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src1</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src10</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src11</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src12</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src13</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src14</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src15</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src16</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src17</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src2</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src3</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src4</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src5</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src6</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src7</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src8</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_in_src9</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div0</name>
- <value>4</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div1</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div10</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div11</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div12</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div13</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div14</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div15</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div16</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div17</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div2</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div3</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div4</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div5</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div6</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div7</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div8</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>c_cnt_lo_div9</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en0</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en1</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en10</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en11</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en12</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en13</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en14</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en15</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en16</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en17</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en2</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en3</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en4</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en5</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en6</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en7</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en8</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_odd_div_duty_en9</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst0</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst1</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst10</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst11</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst12</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst13</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst14</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst15</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst16</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst17</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst2</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst3</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst4</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst5</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst6</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst7</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst8</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_ph_mux_prst9</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst0</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst1</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst10</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst11</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst12</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst13</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst14</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst15</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst16</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst17</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst2</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst3</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst4</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst5</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst6</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst7</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst8</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>c_cnt_prst9</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>cal_code_hex_file</name>
- <value>iossm.hex</value>
- </parameter>
- <parameter>
- <name>cal_converge</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>cal_error</name>
- <value>cal_clean</value>
- </parameter>
- <parameter>
- <name>clock_name_0</name>
- <value>link_clk</value>
- </parameter>
- <parameter>
- <name>clock_name_1</name>
- <value>frame_clk</value>
- </parameter>
- <parameter>
- <name>clock_name_2</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_3</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_4</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_5</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_6</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_7</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_8</name>
- <value></value>
- </parameter>
- <parameter>
- <name>clock_name_global</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_0</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_1</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_2</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_3</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_4</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_5</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_6</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_7</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_name_global_8</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>clock_to_compensate</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>divide_factor0</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor1</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor2</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor3</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor4</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor5</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor6</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor7</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>divide_factor8</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>dprio_interface_sel</name>
- <value>3</value>
- </parameter>
- <parameter>
- <name>duty_cycle0</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle1</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle10</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle11</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle12</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle13</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle14</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle15</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle16</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle17</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle2</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle3</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle4</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle5</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle6</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle7</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle8</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>duty_cycle9</name>
- <value>50</value>
- </parameter>
- <parameter>
- <name>eff_m_cnt</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>fractional_vco_multiplier</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_active_clk</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle0</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle1</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle10</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle11</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle12</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle13</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle14</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle15</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle16</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle17</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle2</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle3</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle4</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle5</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle6</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle7</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle8</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle9</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range0</name>
- <value>45.83,46.43,46.88,50.0,53.12,53.57</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range1</name>
- <value>41.67,42.86,43.75,50.0,56.25,57.14</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range10</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range11</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range12</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range13</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range14</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range15</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range16</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range17</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range2</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range3</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range4</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range5</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range6</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range7</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range8</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_duty_cycle_range9</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency0</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency1</name>
- <value>200.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency10</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency11</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency12</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency13</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency14</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency15</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency16</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency17</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency2</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency3</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency4</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency5</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency6</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency7</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency8</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency9</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range0</name>
- <value>99.595142,99.607843,99.649123,100.0,100.350877,100.392157</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range1</name>
- <value>183.333333,185.714286,187.5,200.0,214.285714,216.666667</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range10</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range11</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range12</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range13</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range14</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range15</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range16</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range17</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range2</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range3</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range4</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range5</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range6</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range7</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range8</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_output_clock_frequency_range9</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift0</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift1</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg0</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg1</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range0</name>
- <value>0.0,2.8,3.2,3.8,4.5,5.6</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range1</name>
- <value>0.0,5.6,6.4,7.5,9.0,11.2</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_deg_range9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range0</name>
- <value>0.0,78.1,89.3,104.2,125.0,156.2</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range1</name>
- <value>0.0,78.1,89.3,104.2,125.0,156.2</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_actual_phase_shift_range9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src0</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src1</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src2</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src3</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src4</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src5</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src6</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src7</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_c_cnt_in_src8</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_cal_code_hex_file</name>
- <value>iossm.hex</value>
- </parameter>
- <parameter>
- <name>gui_cal_converge</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cal_error</name>
- <value>cal_clean</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter0</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter1</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter10</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter11</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter12</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter13</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter14</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter15</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter16</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter17</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter2</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter3</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter4</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter5</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter6</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter7</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter8</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_counter9</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_cascade_outclk_index</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>gui_clk_bad</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_global</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string0</name>
- <value>link_clk</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string1</name>
- <value>frame_clk</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string10</name>
- <value>outclk10</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string11</name>
- <value>outclk11</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string12</name>
- <value>outclk12</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string13</name>
- <value>outclk13</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string14</name>
- <value>outclk14</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string15</name>
- <value>outclk15</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string16</name>
- <value>outclk16</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string17</name>
- <value>outclk17</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string2</name>
- <value>outclk2</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string3</name>
- <value>outclk3</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string4</name>
- <value>outclk4</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string5</name>
- <value>outclk5</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string6</name>
- <value>outclk6</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string7</name>
- <value>outclk7</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string8</name>
- <value>outclk8</value>
- </parameter>
- <parameter>
- <name>gui_clock_name_string9</name>
- <value>outclk9</value>
- </parameter>
- <parameter>
- <name>gui_clock_to_compensate</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>gui_debug_mode</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_device_component</name>
- <value>10AX115U2F45E1SG</value>
- </parameter>
- <parameter>
- <name>gui_device_family</name>
- <value>Arria 10</value>
- </parameter>
- <parameter>
- <name>gui_device_speed_grade</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c0</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c1</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c10</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c11</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c12</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c13</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c14</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c15</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c16</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c17</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c2</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c3</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c4</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c5</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c6</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c7</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c8</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_c9</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_divide_factor_n</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>gui_dps_cntr</name>
- <value>C0</value>
- </parameter>
- <parameter>
- <name>gui_dps_dir</name>
- <value>Positive</value>
- </parameter>
- <parameter>
- <name>gui_dps_num</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>gui_dsm_out_sel</name>
- <value>1st_order</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle0</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle1</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle10</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle11</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle12</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle13</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle14</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle15</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle16</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle17</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle2</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle3</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle4</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle5</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle6</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle7</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle8</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_duty_cycle9</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>gui_en_adv_params</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_en_dps_ports</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_en_extclkout_ports</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_en_lvds_ports</name>
- <value>Disabled</value>
- </parameter>
- <parameter>
- <name>gui_en_phout_ports</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_en_reconf</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_enable_cascade_in</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_enable_cascade_out</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_enable_mif_dps</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_enable_output_counter_cascading</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_enable_permit_cal</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_existing_mif_file_path</name>
- <value>~/pll.mif</value>
- </parameter>
- <parameter>
- <name>gui_extclkout_0_source</name>
- <value>C0</value>
- </parameter>
- <parameter>
- <name>gui_extclkout_1_source</name>
- <value>C0</value>
- </parameter>
- <parameter>
- <name>gui_feedback_clock</name>
- <value>Global Clock</value>
- </parameter>
- <parameter>
- <name>gui_fix_vco_frequency</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_fixed_vco_frequency</name>
- <value>600.0</value>
- </parameter>
- <parameter>
- <name>gui_frac_multiply_factor</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>gui_fractional_cout</name>
- <value>32</value>
- </parameter>
- <parameter>
- <name>gui_include_iossm</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_lock_setting</name>
- <value>Low Lock Time</value>
- </parameter>
- <parameter>
- <name>gui_mif_config_name</name>
- <value>unnamed</value>
- </parameter>
- <parameter>
- <name>gui_mif_gen_options</name>
- <value>Generate New MIF File</value>
- </parameter>
- <parameter>
- <name>gui_multiply_factor</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>gui_new_mif_file_path</name>
- <value>~/pll.mif</value>
- </parameter>
- <parameter>
- <name>gui_number_of_clocks</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>gui_operation_mode</name>
- <value>source synchronous</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency0</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency1</name>
- <value>200.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency10</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency11</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency12</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency13</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency14</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency15</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency16</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency17</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency2</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency3</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency4</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency5</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency6</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency7</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency8</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_output_clock_frequency9</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_parameter_table_hex_file</name>
- <value>seq_params_sim.hex</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift0</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift1</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg0</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg1</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phase_shift_deg9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>gui_phout_division</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>gui_pll_auto_reset</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_pll_bandwidth_preset</name>
- <value>Low</value>
- </parameter>
- <parameter>
- <name>gui_pll_cal_done</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_pll_cascading_mode</name>
- <value>adjpllin</value>
- </parameter>
- <parameter>
- <name>gui_pll_freqcal_en</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>gui_pll_freqcal_req_flag</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>gui_pll_m_cnt_in_src</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>gui_pll_mode</name>
- <value>Integer-N PLL</value>
- </parameter>
- <parameter>
- <name>gui_pll_tclk_mux_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_pll_tclk_sel</name>
- <value>pll_tclk_m_src</value>
- </parameter>
- <parameter>
- <name>gui_pll_type</name>
- <value>S10_Simple</value>
- </parameter>
- <parameter>
- <name>gui_pll_vco_freq_band_0</name>
- <value>pll_freq_clk0_disabled</value>
- </parameter>
- <parameter>
- <name>gui_pll_vco_freq_band_1</name>
- <value>pll_freq_clk1_disabled</value>
- </parameter>
- <parameter>
- <name>gui_prot_mode</name>
- <value>UNUSED</value>
- </parameter>
- <parameter>
- <name>gui_ps_units0</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units1</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units10</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units11</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units12</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units13</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units14</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units15</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units16</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units17</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units2</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units3</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units4</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units5</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units6</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units7</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units8</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_ps_units9</name>
- <value>ps</value>
- </parameter>
- <parameter>
- <name>gui_refclk1_frequency</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>gui_refclk_might_change</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_refclk_switch</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_reference_clock_frequency</name>
- <value>200.0</value>
- </parameter>
- <parameter>
- <name>gui_skip_sdc_generation</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_switchover_delay</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>gui_switchover_mode</name>
- <value>Automatic Switchover</value>
- </parameter>
- <parameter>
- <name>gui_use_NDFB_modes</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_use_coreclk</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_use_locked</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>gui_use_logical</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>gui_usr_device_speed_grade</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>gui_vco_frequency</name>
- <value>600.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp0</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp1</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp10</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp11</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp12</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp13</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp14</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp15</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp16</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp17</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp2</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp3</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp4</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp5</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp6</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp7</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp8</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_duty_cycle_fp9</name>
- <value>50.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp0</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp1</name>
- <value>200.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp10</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp11</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp12</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp13</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp14</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp15</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp16</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp17</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp2</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp3</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp4</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp5</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp6</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp7</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp8</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_output_clock_frequency_fp9</name>
- <value>100.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp0</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp1</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp10</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp11</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp12</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp13</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp14</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp15</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp16</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp17</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp2</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp3</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp4</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp5</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp6</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp7</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp8</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_phase_shift_fp9</name>
- <value>0.0</value>
- </parameter>
- <parameter>
- <name>hp_actual_vco_frequency_fp</name>
- <value>600.0</value>
- </parameter>
- <parameter>
- <name>hp_number_of_family_allowable_clocks</name>
- <value>9</value>
- </parameter>
- <parameter>
- <name>hp_parameter_update_message</name>
- <value>{altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}}</value>
- </parameter>
- <parameter>
- <name>hp_previous_num_clocks</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>hp_qsys_scripting_mode</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>include_iossm</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>iossm_nios_sim_clk_period_ps</name>
- <value>1333</value>
- </parameter>
- <parameter>
- <name>lock_mode</name>
- <value>low_lock_time</value>
- </parameter>
- <parameter>
- <name>m_cnt_bypass_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>m_cnt_hi_div</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>m_cnt_lo_div</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>m_cnt_odd_div_duty_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>mifTable_names</name>
- <value>The MIF file specified does not yet exist</value>
- </parameter>
- <parameter>
- <name>mifTable_values</name>
- <value></value>
- </parameter>
- <parameter>
- <name>mimic_fbclk_type</name>
- <value>gclk</value>
- </parameter>
- <parameter>
- <name>multiply_factor</name>
- <value>4</value>
- </parameter>
- <parameter>
- <name>n_cnt_bypass_en</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>n_cnt_hi_div</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>n_cnt_lo_div</name>
- <value>256</value>
- </parameter>
- <parameter>
- <name>n_cnt_odd_div_duty_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>number_of_clocks</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>number_of_outclks</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>operation_mode</name>
- <value>source_synchronous</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency0</name>
- <value>100.000000 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency1</name>
- <value>200.000000 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency10</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency11</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency12</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency13</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency14</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency15</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency16</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency17</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency2</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency3</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency4</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency5</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency6</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency7</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency8</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>output_clock_frequency9</name>
- <value>0 MHz</value>
- </parameter>
- <parameter>
- <name>parameterTable_names</name>
- <value>M-Counter Divide Setting,N-Counter Divide Setting,VCO Frequency,C-Counter-0 Divide Setting,C-Counter-1 Divide Setting,C-Counter-2 Divide Setting,C-Counter-3 Divide Setting,C-Counter-4 Divide Setting,C-Counter-5 Divide Setting,C-Counter-6 Divide Setting,C-Counter-7 Divide Setting,C-Counter-8 Divide Setting,PLL Auto Reset,M-Counter Hi Divide,M-Counter Lo Divide,M-Counter Even Duty Enable,M-Counter Bypass Enable,N-Counter Hi Divide,N-Counter Lo Divide,N-Counter Even Duty Enable,N-Counter Bypass Enable,C-Counter-0 Hi Divide,C-Counter-1 Hi Divide,C-Counter-2 Hi Divide,C-Counter-3 Hi Divide,C-Counter-4 Hi Divide,C-Counter-5 Hi Divide,C-Counter-6 Hi Divide,C-Counter-7 Hi Divide,C-Counter-8 Hi Divide,C-Counter-0 Lo Divide,C-Counter-1 Lo Divide,C-Counter-2 Lo Divide,C-Counter-3 Lo Divide,C-Counter-4 Lo Divide,C-Counter-5 Lo Divide,C-Counter-6 Lo Divide,C-Counter-7 Lo Divide,C-Counter-8 Lo Divide,C-Counter-0 Even Duty Enable,C-Counter-1 Even Duty Enable,C-Counter-2 Even Duty Enable,C-Counter-3 Even Duty Enable,C-Counter-4 Even Duty Enable,C-Counter-5 Even Duty Enable,C-Counter-6 Even Duty Enable,C-Counter-7 Even Duty Enable,C-Counter-8 Even Duty Enable,C-Counter-0 Bypass Enable,C-Counter-1 Bypass Enable,C-Counter-2 Bypass Enable,C-Counter-3 Bypass Enable,C-Counter-4 Bypass Enable,C-Counter-5 Bypass Enable,C-Counter-6 Bypass Enable,C-Counter-7 Bypass Enable,C-Counter-8 Bypass Enable,C-Counter-0 Preset,C-Counter-1 Preset,C-Counter-2 Preset,C-Counter-3 Preset,C-Counter-4 Preset,C-Counter-5 Preset,C-Counter-6 Preset,C-Counter-7 Preset,C-Counter-8 Preset,C-Counter-0 Phase Mux Preset,C-Counter-1 Phase Mux Preset,C-Counter-2 Phase Mux Preset,C-Counter-3 Phase Mux Preset,C-Counter-4 Phase Mux Preset,C-Counter-5 Phase Mux Preset,C-Counter-6 Phase Mux Preset,C-Counter-7 Phase Mux Preset,C-Counter-8 Phase Mux Preset,Charge Pump Current,Bandwidth Control</value>
- </parameter>
- <parameter>
- <name>parameterTable_values</name>
- <value>4,1,800.0 MHz,8,4,1,1,1,1,1,1,1,false,2,2,false,false,256,256,false,true,4,2,256,256,256,256,256,256,256,4,2,256,256,256,256,256,256,256,false,false,false,false,false,false,false,false,false,false,false,true,true,true,true,true,true,true,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,pll_cp_setting10,pll_bw_res_setting2</value>
- </parameter>
- <parameter>
- <name>parameter_table_hex_file</name>
- <value>seq_params_sim.hex</value>
- </parameter>
- <parameter>
- <name>phase_shift0</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift1</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift10</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift11</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift12</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift13</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift14</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift15</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift16</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift17</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift2</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift3</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift4</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift5</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift6</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift7</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift8</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>phase_shift9</name>
- <value>0 ps</value>
- </parameter>
- <parameter>
- <name>pll_auto_clk_sw_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>pll_bw_sel</name>
- <value>Low</value>
- </parameter>
- <parameter>
- <name>pll_bwctrl</name>
- <value>pll_bw_res_setting2</value>
- </parameter>
- <parameter>
- <name>pll_cal_done</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>pll_clk_loss_sw_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>pll_clk_sw_dly</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>pll_clkin_0_src</name>
- <value>clk_0</value>
- </parameter>
- <parameter>
- <name>pll_clkin_1_src</name>
- <value>clk_0</value>
- </parameter>
- <parameter>
- <name>pll_cp_current</name>
- <value>pll_cp_setting10</value>
- </parameter>
- <parameter>
- <name>pll_defer_cal_user_mode</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>pll_dsm_out_sel</name>
- <value>1st_order</value>
- </parameter>
- <parameter>
- <name>pll_extclk_0_cnt_src</name>
- <value>pll_extclk_cnt_src_vss</value>
- </parameter>
- <parameter>
- <name>pll_extclk_1_cnt_src</name>
- <value>pll_extclk_cnt_src_vss</value>
- </parameter>
- <parameter>
- <name>pll_fbclk_mux_1</name>
- <value>pll_fbclk_mux_1_glb</value>
- </parameter>
- <parameter>
- <name>pll_fbclk_mux_2</name>
- <value>pll_fbclk_mux_2_fb_1</value>
- </parameter>
- <parameter>
- <name>pll_fractional_cout</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>pll_fractional_division</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>pll_freqcal_en</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>pll_freqcal_req_flag</name>
- <value>true</value>
- </parameter>
- <parameter>
- <name>pll_lock_fltr_cfg</name>
- <value>100</value>
- </parameter>
- <parameter>
- <name>pll_m_cnt</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>pll_m_cnt_basic</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>pll_m_cnt_in_src</name>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- </parameter>
- <parameter>
- <name>pll_manu_clk_sw_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>pll_output_clk_frequency</name>
- <value>800.0 MHz</value>
- </parameter>
- <parameter>
- <name>pll_ripplecap_ctrl</name>
- <value></value>
- </parameter>
- <parameter>
- <name>pll_slf_rst</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>pll_subtype</name>
- <value>General</value>
- </parameter>
- <parameter>
- <name>pll_tclk_mux_en</name>
- <value>false</value>
- </parameter>
- <parameter>
- <name>pll_tclk_sel</name>
- <value>pll_tclk_m_src</value>
- </parameter>
- <parameter>
- <name>pll_type</name>
- <value>Arria 10</value>
- </parameter>
- <parameter>
- <name>pll_unlock_fltr_cfg</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>pll_vco_div</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>pll_vco_freq_band_0</name>
- <value>pll_freq_clk0_disabled</value>
- </parameter>
- <parameter>
- <name>pll_vco_freq_band_1</name>
- <value>pll_freq_clk1_disabled</value>
- </parameter>
- <parameter>
- <name>pll_vcoph_div</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>prot_mode</name>
- <value>BASIC</value>
- </parameter>
- <parameter>
- <name>refclk1_frequency</name>
- <value>100.0 MHz</value>
- </parameter>
- <parameter>
- <name>reference_clock_frequency</name>
- <value>200.0 MHz</value>
- </parameter>
- <parameter>
- <name>system_info_device_component</name>
- <value>10AX115U2F45E1SG</value>
- </parameter>
- <parameter>
- <name>system_info_device_family</name>
- <value>Arria 10</value>
- </parameter>
- <parameter>
- <name>system_info_device_speed_grade</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>system_part_trait_speed_grade</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>use_core_refclk</name>
- <value>false</value>
- </parameter>
- </parameters>
- <interconnectAssignments></interconnectAssignments>
- <className>altera_iopll</className>
- <version>18.0</version>
- <name>core_pll</name>
- <uniqueName>ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama</uniqueName>
- <nonce>0</nonce>
- <incidentConnections></incidentConnections>
- <path>ip_arria10_e1sg_jesd204b_rx_core_pll.core_pll</path>
- </instanceData>
- <children></children>
- </node>
- </children>
-</node>
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.qip b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.qip
deleted file mode 100644
index b1f840155b165ab18d2b68aaf962b7d3c3d55f22..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.qip
+++ /dev/null
@@ -1,625 +0,0 @@
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_TOOL_NAME "QsysPrimePro"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_TOOL_VERSION "18.0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_TOOL_ENV "QsysPrimePro"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_TOOL_VENDOR_NAME "Intel Corporation"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_TOP_LEVEL_COMPONENT_NAME "altera_iopll"
-set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name SOPCINFO_FILE [file join $::quartus(qip_path) "ip_arria10_e1sg_jesd204b_rx_core_pll.sopcinfo"]
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name SLD_INFO "QSYS_NAME ip_arria10_e1sg_jesd204b_rx_core_pll HAS_SOPCINFO 1 GENERATION_ID 0"
-set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name MISC_FILE [file join $::quartus(qip_path) "ip_arria10_e1sg_jesd204b_rx_core_pll.cmp"]
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_TARGETED_DEVICE_FAMILY "Arria 10"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_TARGETED_PART_TRAIT "DEVICE_SPEEDGRADE::1"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_GENERATED_DEVICE_FAMILY "{Arria 10}"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_QSYS_MODE "STANDALONE"
-set_global_assignment -name SYNTHESIS_ONLY_QIP ON
-set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name MISC_FILE [file join $::quartus(qip_path) "../ip_arria10_e1sg_jesd204b_rx_core_pll.ip"]
-
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2plc2QyMDRiX3J4X2NvcmVfcGxsX2FsdGVyYV9pb3BsbF8xODBfNHNncGFtYQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_DISPLAY_NAME "SU9QTEwgSW50ZWwgRlBHQSBJUA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_INTERNAL "Off"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_VERSION "MTguMA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_DESCRIPTION "SW50ZWwgRlBHQSBQaGFzZS1Mb2NrZWQgTG9vcCAoSU9QTEwgSW50ZWwgRlBHQSBJUCk="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RldmljZV9zcGVlZF9ncmFkZQ==::MQ==::U3BlZWQgR3JhZGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RlYnVnX21vZGU=::ZmFsc2U=::Z3VpX2RlYnVnX21vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3NraXBfc2RjX2dlbmVyYXRpb24=::ZmFsc2U=::Z3VpX3NraXBfc2RjX2dlbmVyYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2luY2x1ZGVfaW9zc20=::ZmFsc2U=::Z3VpX2luY2x1ZGVfaW9zc20="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2NhbF9jb2RlX2hleF9maWxl::aW9zc20uaGV4::Z3VpX2NhbF9jb2RlX2hleF9maWxl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BhcmFtZXRlcl90YWJsZV9oZXhfZmlsZQ==::c2VxX3BhcmFtc19zaW0uaGV4::Z3VpX3BhcmFtZXRlcl90YWJsZV9oZXhfZmlsZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF90Y2xrX211eF9lbg==::ZmFsc2U=::Z3VpX3BsbF90Y2xrX211eF9lbg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF90Y2xrX3NlbA==::cGxsX3RjbGtfbV9zcmM=::Z3VpX3BsbF90Y2xrX3NlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF92Y29fZnJlcV9iYW5kXzA=::cGxsX2ZyZXFfY2xrMF9kaXNhYmxlZA==::Z3VpX3BsbF92Y29fZnJlcV9iYW5kXzA="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF92Y29fZnJlcV9iYW5kXzE=::cGxsX2ZyZXFfY2xrMV9kaXNhYmxlZA==::Z3VpX3BsbF92Y29fZnJlcV9iYW5kXzE="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF9mcmVxY2FsX2Vu::dHJ1ZQ==::Z3VpX3BsbF9mcmVxY2FsX2Vu"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF9mcmVxY2FsX3JlcV9mbGFn::dHJ1ZQ==::Z3VpX3BsbF9mcmVxY2FsX3JlcV9mbGFn"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2NhbF9jb252ZXJnZQ==::ZmFsc2U=::Z3VpX2NhbF9jb252ZXJnZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2NhbF9lcnJvcg==::Y2FsX2NsZWFu::Z3VpX2NhbF9lcnJvcg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF9jYWxfZG9uZQ==::ZmFsc2U=::Z3VpX3BsbF9jYWxfZG9uZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF90eXBl::UzEwX1NpbXBsZQ==::Z3VpX3BsbF90eXBl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF9tX2NudF9pbl9zcmM=::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Z3VpX3BsbF9tX2NudF9pbl9zcmM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2NfY250X2luX3NyYzA=::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Z3VpX2NfY250X2luX3NyYzA="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2NfY250X2luX3NyYzE=::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Z3VpX2NfY250X2luX3NyYzE="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2NfY250X2luX3NyYzI=::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Z3VpX2NfY250X2luX3NyYzI="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2NfY250X2luX3NyYzM=::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Z3VpX2NfY250X2luX3NyYzM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2NfY250X2luX3NyYzQ=::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Z3VpX2NfY250X2luX3NyYzQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2NfY250X2luX3NyYzU=::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Z3VpX2NfY250X2luX3NyYzU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2NfY250X2luX3NyYzY=::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Z3VpX2NfY250X2luX3NyYzY="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2NfY250X2luX3NyYzc=::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Z3VpX2NfY250X2luX3NyYzc="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2NfY250X2luX3NyYzg=::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Z3VpX2NfY250X2luX3NyYzg="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "c3lzdGVtX2luZm9fZGV2aWNlX2ZhbWlseQ==::QXJyaWEgMTA=::RGV2aWNlIEZhbWlseQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "c3lzdGVtX2luZm9fZGV2aWNlX2NvbXBvbmVudA==::MTBBWDExNVUyRjQ1RTFTRw==::Q29tcG9uZW50"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "c3lzdGVtX2luZm9fZGV2aWNlX3NwZWVkX2dyYWRl::MQ==::U3BlZWQgR3JhZGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "c3lzdGVtX3BhcnRfdHJhaXRfc3BlZWRfZ3JhZGU=::MQ==::U3BlZWQgR3JhZGUgVHJhaXQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3Vzcl9kZXZpY2Vfc3BlZWRfZ3JhZGU=::MQ==::U3BlZWQgR3JhZGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2VuX3JlY29uZg==::ZmFsc2U=::RW5hYmxlIGR5bmFtaWMgcmVjb25maWd1cmF0aW9uIG9mIFBMTA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2VuX2Rwc19wb3J0cw==::ZmFsc2U=::RW5hYmxlIGFjY2VzcyB0byBkeW5hbWljIHBoYXNlIHNoaWZ0IHBvcnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF9tb2Rl::SW50ZWdlci1OIFBMTA==::UExMIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3VzZV9sb2dpY2Fs::ZmFsc2U=::VXNlIGxvZ2ljYWwgUExM"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3JlZmVyZW5jZV9jbG9ja19mcmVxdWVuY3k=::MjAwLjA=::UmVmZXJlbmNlIENsb2NrIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3VzZV9jb3JlY2xr::ZmFsc2U=::UmVmY2xrIHNvdXJjZSBpcyBnbG9iYWwgY2xvY2s="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3JlZmNsa19taWdodF9jaGFuZ2U=::ZmFsc2U=::TXkgcmVmZXJlbmNlIGNsb2NrIGZyZXF1ZW5jeSBtaWdodCBjaGFuZ2U="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2ZyYWN0aW9uYWxfY291dA==::MzI=::RnJhY3Rpb25hbCBjYXJyeSBvdXQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3Byb3RfbW9kZQ==::VU5VU0VE::cHJvdF9tb2Rl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RzbV9vdXRfc2Vs::MXN0X29yZGVy::RFNNIE9yZGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3VzZV9sb2NrZWQ=::dHJ1ZQ==::RW5hYmxlIGxvY2tlZCBvdXRwdXQgcG9ydA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2VuX2Fkdl9wYXJhbXM=::ZmFsc2U=::RW5hYmxlIHBoeXNpY2FsIG91dHB1dCBjbG9jayBwYXJhbWV0ZXJz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF9iYW5kd2lkdGhfcHJlc2V0::TG93::UExMIEJhbmR3aWR0aCBQcmVzZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2xvY2tfc2V0dGluZw==::TG93IExvY2sgVGltZQ==::TG9jayBUaHJlc2hvbGQgU2V0dGluZw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF9hdXRvX3Jlc2V0::ZmFsc2U=::UExMIEF1dG8gUmVzZXQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2VuX2x2ZHNfcG9ydHM=::RGlzYWJsZWQ=::QWNjZXNzIHRvIFBMTCBMVkRTX0NMSy9MT0FERU4gb3V0cHV0IHBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX29wZXJhdGlvbl9tb2Rl::c291cmNlIHN5bmNocm9ub3Vz::Q29tcGVuc2F0aW9uIE1vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2ZlZWRiYWNrX2Nsb2Nr::R2xvYmFsIENsb2Nr::RmVlZGJhY2sgQ2xvY2s="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX3RvX2NvbXBlbnNhdGU=::MA==::Q29tcGVuc2F0ZWQgT3V0Y2xr"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3VzZV9OREZCX21vZGVz::ZmFsc2U=::VXNlIE5vbmRlZGljYXRlZCBGZWVkYmFjayBQYXRo"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3JlZmNsa19zd2l0Y2g=::ZmFsc2U=::Q3JlYXRlIGEgc2Vjb25kIGlucHV0IGNsb2NrIHNpZ25hbCAncmVmY2xrMSc="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2VuX3Bob3V0X3BvcnRz::ZmFsc2U=::RW5hYmxlIGFjY2VzcyB0byBQTEwgRFBBIG91dHB1dCBwb3J0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3Bob3V0X2RpdmlzaW9u::MQ==::UExMIERQQSBvdXRwdXQgZGl2aXNpb24="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2VuX2V4dGNsa291dF9wb3J0cw==::ZmFsc2U=::RW5hYmxlIGFjY2VzcyB0byBQTEwgZXh0ZXJuYWwgY2xvY2sgb3V0cHV0IHBvcnQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX251bWJlcl9vZl9jbG9ja3M=::Mg==::TnVtYmVyIE9mIENsb2Nrcw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX211bHRpcGx5X2ZhY3Rvcg==::Ng==::TXVsdGlwbHkgRmFjdG9yIChNLUNvdW50ZXIp"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3Jfbg==::MQ==::RGl2aWRlIEZhY3RvciAoTi1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2ZyYWNfbXVsdGlwbHlfZmFjdG9y::MQ==::RnJhY3Rpb25hbCBNdWx0aXBseSBGYWN0b3IgKEsp"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2ZpeF92Y29fZnJlcXVlbmN5::ZmFsc2U=::U3BlY2lmeSBWQ08gZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3Zjb19mcmVxdWVuY3k=::NjAwLjA=::QWN0dWFsIFZDTyBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdGl2ZV9jbGs=::ZmFsc2U=::Q3JlYXRlIGFuICdhY3RpdmVfY2xrJyBzaWduYWwgdG8gaW5kaWNhdGUgdGhlIGlucHV0IGNsb2NrIGluIHVzZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsa19iYWQ=::ZmFsc2U=::Q3JlYXRlIGEgJ2Nsa2JhZCcgc2lnbmFsIGZvciBlYWNoIG9mIHRoZSBpbnB1dCBjbG9ja3M="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3N3aXRjaG92ZXJfbW9kZQ==::QXV0b21hdGljIFN3aXRjaG92ZXI=::U3dpdGNob3ZlciBNb2Rl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3N3aXRjaG92ZXJfZGVsYXk=::MA==::U3dpdGNob3ZlciBEZWxheQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2VuYWJsZV9jYXNjYWRlX291dA==::ZmFsc2U=::Q3JlYXRlIGEgJ2Nhc2NhZGVfb3V0JyBzaWduYWwgdG8gY29ubmVjdCB0byBhIGRvd25zdHJlYW0gUExM"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfb3V0Y2xrX2luZGV4::MA==::Y2FzY2FkZV9vdXQgc291cmNl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2VuYWJsZV9jYXNjYWRlX2lu::ZmFsc2U=::Q3JlYXRlIGFuICdhZGpwbGxpbicgKGNhc2NhZGUgaW4pIHNpZ25hbCB0byBjb25uZWN0IHRvIGFuIHVwc3RyZWFtIFBMTCB0aHJvdWdoIElPIENvbHVtbiBDYXNjYWRpbmc="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2VuYWJsZV9wZXJtaXRfY2Fs::ZmFsc2U=::Q29ubmVjdCB0byBhbiB1cHN0cmVhbSBQTEwgdGhyb3VnaCBDb3JlIENsb2NrIE5ldHdvcmsgQ2FzY2FkaW5nIChjcmVhdGUgYSBwZXJtaXRfY2FsIGlucHV0IHNpZ25hbCk="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BsbF9jYXNjYWRpbmdfbW9kZQ==::YWRqcGxsaW4=::Q29ubmVjdGlvbiBTaWduYWwgVHlwZSB0byBVcHN0cmVhbSBQTEw="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfZ2xvYmFs::ZmFsc2U=::R2l2ZSBjbG9ja3MgZ2xvYmFsIG5hbWVz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nMA==::bGlua19jbGs=::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nMQ==::ZnJhbWVfY2xr::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nMg==::b3V0Y2xrMg==::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nMw==::b3V0Y2xrMw==::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nNA==::b3V0Y2xrNA==::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nNQ==::b3V0Y2xrNQ==::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nNg==::b3V0Y2xrNg==::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nNw==::b3V0Y2xrNw==::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nOA==::b3V0Y2xrOA==::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nOQ==::b3V0Y2xrOQ==::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nMTA=::b3V0Y2xrMTA=::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nMTE=::b3V0Y2xrMTE=::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nMTI=::b3V0Y2xrMTI=::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nMTM=::b3V0Y2xrMTM=::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nMTQ=::b3V0Y2xrMTQ=::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nMTU=::b3V0Y2xrMTU=::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nMTY=::b3V0Y2xrMTY=::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nsb2NrX25hbWVfc3RyaW5nMTc=::b3V0Y2xrMTc=::Q2xvY2sgTmFtZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzA=::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzE=::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzI=::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzM=::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzQ=::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzU=::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzY=::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzc=::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzg=::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzk=::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzEw::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzEx::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzEy::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzEz::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzE0::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzE1::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzE2::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2RpdmlkZV9mYWN0b3JfYzE3::Ng==::RGl2aWRlIEZhY3RvciAoQy1Db3VudGVyKQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjA=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjE=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjI=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjM=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjQ=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjU=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjY=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjc=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjg=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjk=::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjEw::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjEx::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjEy::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjEz::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjE0::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjE1::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjE2::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2Nhc2NhZGVfY291bnRlcjE3::ZmFsc2U=::TWFrZSB0aGlzIGEgY2FzY2FkZSBjb3VudGVy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kw::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kx::MjAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3ky::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kz::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3k0::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3k1::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3k2::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3k3::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3k4::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3k5::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kxMA==::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kxMQ==::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kxMg==::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kxMw==::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kxNA==::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kxNQ==::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kxNg==::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX291dHB1dF9jbG9ja19mcmVxdWVuY3kxNw==::MTAwLjA=::RGVzaXJlZCBGcmVxdWVuY3k="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5MA==::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5MQ==::MjAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5Mg==::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5Mw==::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5NA==::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5NQ==::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5Ng==::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5Nw==::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5OA==::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5OQ==::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5MTA=::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5MTE=::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5MTI=::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5MTM=::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5MTQ=::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5MTU=::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5MTY=::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5MTc=::MTAwLjA=::QWN0dWFsIEZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlMA==::OTkuNTk1MTQyLDk5LjYwNzg0Myw5OS42NDkxMjMsMTAwLjAsMTAwLjM1MDg3NywxMDAuMzkyMTU3::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlMQ==::MTgzLjMzMzMzMywxODUuNzE0Mjg2LDE4Ny41LDIwMC4wLDIxNC4yODU3MTQsMjE2LjY2NjY2Nw==::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlMg==::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlMw==::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlNA==::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlNQ==::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlNg==::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlNw==::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlOA==::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlOQ==::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlMTA=::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlMTE=::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlMTI=::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlMTM=::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlMTQ=::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlMTU=::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlMTY=::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9vdXRwdXRfY2xvY2tfZnJlcXVlbmN5X3JhbmdlMTc=::MTAwLjA=::TGVnYWwgRnJlcXVlbmNpZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMA==::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMQ==::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMg==::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMw==::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzNA==::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzNQ==::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzNg==::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzNw==::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzOA==::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzOQ==::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMTA=::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMTE=::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMTI=::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMTM=::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMTQ=::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMTU=::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMTY=::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BzX3VuaXRzMTc=::cHM=::UGhhc2UgU2hpZnQgVW5pdHM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0MA==::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0MQ==::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0Mg==::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0Mw==::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0NA==::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0NQ==::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0Ng==::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0Nw==::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0OA==::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0OQ==::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0MTA=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0MTE=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0MTI=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0MTM=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0MTQ=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0MTU=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0MTY=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0MTc=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzA=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzE=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzI=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzM=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzQ=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzU=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzY=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzc=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzg=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzk=::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzEw::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzEx::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzEy::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzEz::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzE0::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzE1::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzE2::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX3BoYXNlX3NoaWZ0X2RlZzE3::MC4w::RGVzaXJlZCBQaGFzZSBTaGlmdA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDA=::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDE=::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDI=::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDM=::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDQ=::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDU=::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDY=::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDc=::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDg=::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDk=::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDEw::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDEx::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDEy::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDEz::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDE0::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDE1::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDE2::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdDE3::MC4w::QWN0dWFsIHBoYXNlIHNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTA=::MC4wLDc4LjEsODkuMywxMDQuMiwxMjUuMCwxNTYuMg==::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTE=::MC4wLDc4LjEsODkuMywxMDQuMiwxMjUuMCwxNTYuMg==::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTI=::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTM=::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTQ=::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTU=::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTY=::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTc=::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTg=::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTk=::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTEw::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTEx::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTEy::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTEz::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTE0::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTE1::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTE2::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9yYW5nZTE3::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWcw::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWcx::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWcy::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWcz::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWc0::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWc1::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWc2::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWc3::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWc4::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWc5::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWcxMA==::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWcxMQ==::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWcxMg==::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWcxMw==::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWcxNA==::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWcxNQ==::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWcxNg==::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWcxNw==::MC4w::QWN0dWFsIFBoYXNlIFNoaWZ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2Uw::MC4wLDIuOCwzLjIsMy44LDQuNSw1LjY=::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2Ux::MC4wLDUuNiw2LjQsNy41LDkuMCwxMS4y::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2Uy::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2Uz::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2U0::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2U1::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2U2::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2U3::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2U4::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2U5::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2UxMA==::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2UxMQ==::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2UxMg==::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2UxMw==::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2UxNA==::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2UxNQ==::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2UxNg==::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9waGFzZV9zaGlmdF9kZWdfcmFuZ2UxNw==::MC4w::TGVnYWwgUGhhc2UgU2hpZnRz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUw::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUx::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUy::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUz::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGU0::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGU1::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGU2::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGU3::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGU4::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGU5::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUxMA==::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUxMQ==::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUxMg==::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUxMw==::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUxNA==::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUxNQ==::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUxNg==::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2R1dHlfY3ljbGUxNw==::NTAuMA==::RGVzaXJlZCBEdXR5IEN5Y2xl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlMA==::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlMQ==::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlMg==::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlMw==::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlNA==::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlNQ==::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlNg==::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlNw==::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlOA==::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlOQ==::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlMTA=::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlMTE=::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlMTI=::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlMTM=::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlMTQ=::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlMTU=::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlMTY=::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlMTc=::NTAuMA==::QWN0dWFsIGR1dHkgY3ljbGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlMA==::NDUuODMsNDYuNDMsNDYuODgsNTAuMCw1My4xMiw1My41Nw==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlMQ==::NDEuNjcsNDIuODYsNDMuNzUsNTAuMCw1Ni4yNSw1Ny4xNA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlMg==::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlMw==::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlNA==::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlNQ==::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlNg==::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlNw==::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlOA==::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlOQ==::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlMTA=::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlMTE=::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlMTI=::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlMTM=::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlMTQ=::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlMTU=::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlMTY=::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Z3VpX2FjdHVhbF9kdXR5X2N5Y2xlX3JhbmdlMTc=::NTAuMA==::TGVnYWwgRHV0eSBDeWNsZXM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGFyYW1ldGVyVGFibGVfbmFtZXM=::TS1Db3VudGVyIERpdmlkZSBTZXR0aW5nLE4tQ291bnRlciBEaXZpZGUgU2V0dGluZyxWQ08gRnJlcXVlbmN5LEMtQ291bnRlci0wIERpdmlkZSBTZXR0aW5nLEMtQ291bnRlci0xIERpdmlkZSBTZXR0aW5nLEMtQ291bnRlci0yIERpdmlkZSBTZXR0aW5nLEMtQ291bnRlci0zIERpdmlkZSBTZXR0aW5nLEMtQ291bnRlci00IERpdmlkZSBTZXR0aW5nLEMtQ291bnRlci01IERpdmlkZSBTZXR0aW5nLEMtQ291bnRlci02IERpdmlkZSBTZXR0aW5nLEMtQ291bnRlci03IERpdmlkZSBTZXR0aW5nLEMtQ291bnRlci04IERpdmlkZSBTZXR0aW5nLFBMTCBBdXRvIFJlc2V0LE0tQ291bnRlciBIaSBEaXZpZGUsTS1Db3VudGVyIExvIERpdmlkZSxNLUNvdW50ZXIgRXZlbiBEdXR5IEVuYWJsZSxNLUNvdW50ZXIgQnlwYXNzIEVuYWJsZSxOLUNvdW50ZXIgSGkgRGl2aWRlLE4tQ291bnRlciBMbyBEaXZpZGUsTi1Db3VudGVyIEV2ZW4gRHV0eSBFbmFibGUsTi1Db3VudGVyIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTAgSGkgRGl2aWRlLEMtQ291bnRlci0xIEhpIERpdmlkZSxDLUNvdW50ZXItMiBIaSBEaXZpZGUsQy1Db3VudGVyLTMgSGkgRGl2aWRlLEMtQ291bnRlci00IEhpIERpdmlkZSxDLUNvdW50ZXItNSBIaSBEaXZpZGUsQy1Db3VudGVyLTYgSGkgRGl2aWRlLEMtQ291bnRlci03IEhpIERpdmlkZSxDLUNvdW50ZXItOCBIaSBEaXZpZGUsQy1Db3VudGVyLTAgTG8gRGl2aWRlLEMtQ291bnRlci0xIExvIERpdmlkZSxDLUNvdW50ZXItMiBMbyBEaXZpZGUsQy1Db3VudGVyLTMgTG8gRGl2aWRlLEMtQ291bnRlci00IExvIERpdmlkZSxDLUNvdW50ZXItNSBMbyBEaXZpZGUsQy1Db3VudGVyLTYgTG8gRGl2aWRlLEMtQ291bnRlci03IExvIERpdmlkZSxDLUNvdW50ZXItOCBMbyBEaXZpZGUsQy1Db3VudGVyLTAgRXZlbiBEdXR5IEVuYWJsZSxDLUNvdW50ZXItMSBFdmVuIER1dHkgRW5hYmxlLEMtQ291bnRlci0yIEV2ZW4gRHV0eSBFbmFibGUsQy1Db3VudGVyLTMgRXZlbiBEdXR5IEVuYWJsZSxDLUNvdW50ZXItNCBFdmVuIER1dHkgRW5hYmxlLEMtQ291bnRlci01IEV2ZW4gRHV0eSBFbmFibGUsQy1Db3VudGVyLTYgRXZlbiBEdXR5IEVuYWJsZSxDLUNvdW50ZXItNyBFdmVuIER1dHkgRW5hYmxlLEMtQ291bnRlci04IEV2ZW4gRHV0eSBFbmFibGUsQy1Db3VudGVyLTAgQnlwYXNzIEVuYWJsZSxDLUNvdW50ZXItMSBCeXBhc3MgRW5hYmxlLEMtQ291bnRlci0yIEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTMgQnlwYXNzIEVuYWJsZSxDLUNvdW50ZXItNCBCeXBhc3MgRW5hYmxlLEMtQ291bnRlci01IEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTYgQnlwYXNzIEVuYWJsZSxDLUNvdW50ZXItNyBCeXBhc3MgRW5hYmxlLEMtQ291bnRlci04IEJ5cGFzcyBFbmFibGUsQy1Db3VudGVyLTAgUHJlc2V0LEMtQ291bnRlci0xIFByZXNldCxDLUNvdW50ZXItMiBQcmVzZXQsQy1Db3VudGVyLTMgUHJlc2V0LEMtQ291bnRlci00IFByZXNldCxDLUNvdW50ZXItNSBQcmVzZXQsQy1Db3VudGVyLTYgUHJlc2V0LEMtQ291bnRlci03IFByZXNldCxDLUNvdW50ZXItOCBQcmVzZXQsQy1Db3VudGVyLTAgUGhhc2UgTXV4IFByZXNldCxDLUNvdW50ZXItMSBQaGFzZSBNdXggUHJlc2V0LEMtQ291bnRlci0yIFBoYXNlIE11eCBQcmVzZXQsQy1Db3VudGVyLTMgUGhhc2UgTXV4IFByZXNldCxDLUNvdW50ZXItNCBQaGFzZSBNdXggUHJlc2V0LEMtQ291bnRlci01IFBoYXNlIE11eCBQcmVzZXQsQy1Db3VudGVyLTYgUGhhc2UgTXV4IFByZXNldCxDLUNvdW50ZXItNyBQaGFzZSBNdXggUHJlc2V0LEMtQ291bnRlci04IFBoYXNlIE11eCBQcmVzZXQsQ2hhcmdlIFB1bXAgQ3VycmVudCxCYW5kd2lkdGggQ29udHJvbA==::UGFyYW1ldGVyIE5hbWVz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGFyYW1ldGVyVGFibGVfdmFsdWVz::NCwxLDgwMC4wIE1Ieiw4LDQsMSwxLDEsMSwxLDEsMSxmYWxzZSwyLDIsZmFsc2UsZmFsc2UsMjU2LDI1NixmYWxzZSx0cnVlLDQsMiwyNTYsMjU2LDI1NiwyNTYsMjU2LDI1NiwyNTYsNCwyLDI1NiwyNTYsMjU2LDI1NiwyNTYsMjU2LDI1NixmYWxzZSxmYWxzZSxmYWxzZSxmYWxzZSxmYWxzZSxmYWxzZSxmYWxzZSxmYWxzZSxmYWxzZSxmYWxzZSxmYWxzZSx0cnVlLHRydWUsdHJ1ZSx0cnVlLHRydWUsdHJ1ZSx0cnVlLDEsMSwxLDEsMSwxLDEsMSwxLDAsMCwwLDAsMCwwLDAsMCwwLHBsbF9jcF9zZXR0aW5nMTAscGxsX2J3X3Jlc19zZXR0aW5nMg==::UGFyYW1ldGVyIFZhbHVlcw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bWlmVGFibGVfbmFtZXM=::VGhlIE1JRiBmaWxlIHNwZWNpZmllZCBkb2VzIG5vdCB5ZXQgZXhpc3Q=::TUlGIEZpbGUgUHJvcGVydHk="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX21fY250X2Jhc2lj::MQ==::cGxsX21fY250X2Jhc2lj"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX21fY250::MQ==::cGxsX21fY250"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cHJvdF9tb2Rl::QkFTSUM=::cHJvdF9tb2Rl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bV9jbnRfaGlfZGl2::Mg==::bV9jbnRfaGlfZGl2"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZWZmX21fY250::MQ==::ZWZmX21fY250"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bXVsdGlwbHlfZmFjdG9y::NA==::bXVsdGlwbHlfZmFjdG9y"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "dXNlX2NvcmVfcmVmY2xr::ZmFsc2U=::dXNlX2NvcmVfcmVmY2xr"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bV9jbnRfbG9fZGl2::Mg==::bV9jbnRfbG9fZGl2"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bl9jbnRfaGlfZGl2::MjU2::bl9jbnRfaGlfZGl2"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bl9jbnRfbG9fZGl2::MjU2::bl9jbnRfbG9fZGl2"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bV9jbnRfYnlwYXNzX2Vu::ZmFsc2U=::bV9jbnRfYnlwYXNzX2Vu"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bl9jbnRfYnlwYXNzX2Vu::dHJ1ZQ==::bl9jbnRfYnlwYXNzX2Vu"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bV9jbnRfb2RkX2Rpdl9kdXR5X2Vu::ZmFsc2U=::bV9jbnRfb2RkX2Rpdl9kdXR5X2Vu"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bl9jbnRfb2RkX2Rpdl9kdXR5X2Vu::ZmFsc2U=::bl9jbnRfb2RkX2Rpdl9kdXR5X2Vu"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX3Zjb19kaXY=::MQ==::cGxsX3Zjb19kaXY="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX2NwX2N1cnJlbnQ=::cGxsX2NwX3NldHRpbmcxMA==::cGxsX2NwX2N1cnJlbnQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX2J3Y3RybA==::cGxsX2J3X3Jlc19zZXR0aW5nMg==::cGxsX2J3Y3RybA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX2ZyYWN0aW9uYWxfZGl2aXNpb24=::MQ==::cGxsX2ZyYWN0aW9uYWxfZGl2aXNpb24="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZnJhY3Rpb25hbF92Y29fbXVsdGlwbGllcg==::ZmFsc2U=::ZnJhY3Rpb25hbF92Y29fbXVsdGlwbGllcg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cmVmZXJlbmNlX2Nsb2NrX2ZyZXF1ZW5jeQ==::MjAwLjAgTUh6::cmVmZXJlbmNlX2Nsb2NrX2ZyZXF1ZW5jeQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX2ZyYWN0aW9uYWxfY291dA==::MQ==::cGxsX2ZyYWN0aW9uYWxfY291dA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX2RzbV9vdXRfc2Vs::MXN0X29yZGVy::cGxsX2RzbV9vdXRfc2Vs"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "b3BlcmF0aW9uX21vZGU=::c291cmNlX3N5bmNocm9ub3Vz::b3BlcmF0aW9uX21vZGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bnVtYmVyX29mX2Nsb2Nrcw==::Mg==::bnVtYmVyX29mX2Nsb2Nrcw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bnVtYmVyX29mX291dGNsa3M=::Mg==::bnVtYmVyX29mX291dGNsa3M="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX3Zjb3BoX2Rpdg==::MQ==::cGxsX3Zjb3BoX2Rpdg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX3R5cGU=::QXJyaWEgMTA=::cGxsX3R5cGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX3N1YnR5cGU=::R2VuZXJhbA==::cGxsX3N1YnR5cGU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX291dHB1dF9jbGtfZnJlcXVlbmN5::ODAwLjAgTUh6::cGxsX291dHB1dF9jbGtfZnJlcXVlbmN5"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bWltaWNfZmJjbGtfdHlwZQ==::Z2Nsaw==::bWltaWNfZmJjbGtfdHlwZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX2J3X3NlbA==::TG93::cGxsX2J3X3NlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX3NsZl9yc3Q=::ZmFsc2U=::cGxsX3NsZl9yc3Q="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX2ZiY2xrX211eF8x::cGxsX2ZiY2xrX211eF8xX2dsYg==::cGxsX2ZiY2xrX211eF8x"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX2ZiY2xrX211eF8y::cGxsX2ZiY2xrX211eF8yX2ZiXzE=::cGxsX2ZiY2xrX211eF8y"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX21fY250X2luX3NyYw==::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::cGxsX21fY250X2luX3NyYw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX2V4dGNsa18wX2NudF9zcmM=::cGxsX2V4dGNsa19jbnRfc3JjX3Zzcw==::cGxsX2V4dGNsa18wX2NudF9zcmM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX2V4dGNsa18xX2NudF9zcmM=::cGxsX2V4dGNsa19jbnRfc3JjX3Zzcw==::cGxsX2V4dGNsa18xX2NudF9zcmM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX2xvY2tfZmx0cl9jZmc=::MTAw::cGxsX2xvY2tfZmx0cl9jZmc="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX3VubG9ja19mbHRyX2NmZw==::Mg==::cGxsX3VubG9ja19mbHRyX2NmZw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "bG9ja19tb2Rl::bG93X2xvY2tfdGltZQ==::bG9ja19tb2Rl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfdG9fY29tcGVuc2F0ZQ==::MA==::Y2xvY2tfdG9fY29tcGVuc2F0ZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfbmFtZV9nbG9iYWw=::ZmFsc2U=::Y2xvY2tfbmFtZV9nbG9iYWw="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGxsX2ZyZXFjYWxfZW4=::dHJ1ZQ==::cGxsX2ZyZXFjYWxfZW4="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZHByaW9faW50ZXJmYWNlX3NlbA==::Mw==::ZHByaW9faW50ZXJmYWNlX3NlbA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaGlfZGl2MA==::NA==::Y19jbnRfaGlfZGl2MA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaGlfZGl2MQ==::Mg==::Y19jbnRfaGlfZGl2MQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaGlfZGl2Mg==::MjU2::Y19jbnRfaGlfZGl2Mg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaGlfZGl2Mw==::MjU2::Y19jbnRfaGlfZGl2Mw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaGlfZGl2NA==::MjU2::Y19jbnRfaGlfZGl2NA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaGlfZGl2NQ==::MjU2::Y19jbnRfaGlfZGl2NQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaGlfZGl2Ng==::MjU2::Y19jbnRfaGlfZGl2Ng=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaGlfZGl2Nw==::MjU2::Y19jbnRfaGlfZGl2Nw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaGlfZGl2OA==::MjU2::Y19jbnRfaGlfZGl2OA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfbG9fZGl2MA==::NA==::Y19jbnRfbG9fZGl2MA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfbG9fZGl2MQ==::Mg==::Y19jbnRfbG9fZGl2MQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfbG9fZGl2Mg==::MjU2::Y19jbnRfbG9fZGl2Mg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfbG9fZGl2Mw==::MjU2::Y19jbnRfbG9fZGl2Mw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfbG9fZGl2NA==::MjU2::Y19jbnRfbG9fZGl2NA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfbG9fZGl2NQ==::MjU2::Y19jbnRfbG9fZGl2NQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfbG9fZGl2Ng==::MjU2::Y19jbnRfbG9fZGl2Ng=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfbG9fZGl2Nw==::MjU2::Y19jbnRfbG9fZGl2Nw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfbG9fZGl2OA==::MjU2::Y19jbnRfbG9fZGl2OA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcHJzdDA=::MQ==::Y19jbnRfcHJzdDA="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcHJzdDE=::MQ==::Y19jbnRfcHJzdDE="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcHJzdDI=::MQ==::Y19jbnRfcHJzdDI="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcHJzdDM=::MQ==::Y19jbnRfcHJzdDM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcHJzdDQ=::MQ==::Y19jbnRfcHJzdDQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcHJzdDU=::MQ==::Y19jbnRfcHJzdDU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcHJzdDY=::MQ==::Y19jbnRfcHJzdDY="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcHJzdDc=::MQ==::Y19jbnRfcHJzdDc="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcHJzdDg=::MQ==::Y19jbnRfcHJzdDg="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcGhfbXV4X3Byc3Qw::MA==::Y19jbnRfcGhfbXV4X3Byc3Qw"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcGhfbXV4X3Byc3Qx::MA==::Y19jbnRfcGhfbXV4X3Byc3Qx"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcGhfbXV4X3Byc3Qy::MA==::Y19jbnRfcGhfbXV4X3Byc3Qy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcGhfbXV4X3Byc3Qz::MA==::Y19jbnRfcGhfbXV4X3Byc3Qz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcGhfbXV4X3Byc3Q0::MA==::Y19jbnRfcGhfbXV4X3Byc3Q0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcGhfbXV4X3Byc3Q1::MA==::Y19jbnRfcGhfbXV4X3Byc3Q1"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcGhfbXV4X3Byc3Q2::MA==::Y19jbnRfcGhfbXV4X3Byc3Q2"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcGhfbXV4X3Byc3Q3::MA==::Y19jbnRfcGhfbXV4X3Byc3Q3"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfcGhfbXV4X3Byc3Q4::MA==::Y19jbnRfcGhfbXV4X3Byc3Q4"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaW5fc3JjMA==::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Y19jbnRfaW5fc3JjMA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaW5fc3JjMQ==::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Y19jbnRfaW5fc3JjMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaW5fc3JjMg==::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Y19jbnRfaW5fc3JjMg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaW5fc3JjMw==::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Y19jbnRfaW5fc3JjMw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaW5fc3JjNA==::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Y19jbnRfaW5fc3JjNA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaW5fc3JjNQ==::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Y19jbnRfaW5fc3JjNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaW5fc3JjNg==::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Y19jbnRfaW5fc3JjNg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaW5fc3JjNw==::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Y19jbnRfaW5fc3JjNw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfaW5fc3JjOA==::Y19tX2NudF9pbl9zcmNfcGhfbXV4X2Nsaw==::Y19jbnRfaW5fc3JjOA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfYnlwYXNzX2VuMA==::ZmFsc2U=::Y19jbnRfYnlwYXNzX2VuMA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfYnlwYXNzX2VuMQ==::ZmFsc2U=::Y19jbnRfYnlwYXNzX2VuMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfYnlwYXNzX2VuMg==::dHJ1ZQ==::Y19jbnRfYnlwYXNzX2VuMg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfYnlwYXNzX2VuMw==::dHJ1ZQ==::Y19jbnRfYnlwYXNzX2VuMw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfYnlwYXNzX2VuNA==::dHJ1ZQ==::Y19jbnRfYnlwYXNzX2VuNA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfYnlwYXNzX2VuNQ==::dHJ1ZQ==::Y19jbnRfYnlwYXNzX2VuNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfYnlwYXNzX2VuNg==::dHJ1ZQ==::Y19jbnRfYnlwYXNzX2VuNg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfYnlwYXNzX2VuNw==::dHJ1ZQ==::Y19jbnRfYnlwYXNzX2VuNw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfYnlwYXNzX2VuOA==::dHJ1ZQ==::Y19jbnRfYnlwYXNzX2VuOA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfb2RkX2Rpdl9kdXR5X2VuMA==::ZmFsc2U=::Y19jbnRfb2RkX2Rpdl9kdXR5X2VuMA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfb2RkX2Rpdl9kdXR5X2VuMQ==::ZmFsc2U=::Y19jbnRfb2RkX2Rpdl9kdXR5X2VuMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfb2RkX2Rpdl9kdXR5X2VuMg==::ZmFsc2U=::Y19jbnRfb2RkX2Rpdl9kdXR5X2VuMg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfb2RkX2Rpdl9kdXR5X2VuMw==::ZmFsc2U=::Y19jbnRfb2RkX2Rpdl9kdXR5X2VuMw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfb2RkX2Rpdl9kdXR5X2VuNA==::ZmFsc2U=::Y19jbnRfb2RkX2Rpdl9kdXR5X2VuNA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfb2RkX2Rpdl9kdXR5X2VuNQ==::ZmFsc2U=::Y19jbnRfb2RkX2Rpdl9kdXR5X2VuNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfb2RkX2Rpdl9kdXR5X2VuNg==::ZmFsc2U=::Y19jbnRfb2RkX2Rpdl9kdXR5X2VuNg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfb2RkX2Rpdl9kdXR5X2VuNw==::ZmFsc2U=::Y19jbnRfb2RkX2Rpdl9kdXR5X2VuNw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y19jbnRfb2RkX2Rpdl9kdXR5X2VuOA==::ZmFsc2U=::Y19jbnRfb2RkX2Rpdl9kdXR5X2VuOA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTA=::MTAwLjAwMDAwMCBNSHo=::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTA="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTE=::MjAwLjAwMDAwMCBNSHo=::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTE="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTI=::MCBwcw==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTI="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTM=::MCBwcw==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTQ=::MCBwcw==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTU=::MCBwcw==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTY=::MCBwcw==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTY="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTc=::MCBwcw==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTc="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTg=::MCBwcw==::b3V0cHV0X2Nsb2NrX2ZyZXF1ZW5jeTg="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQw::MCBwcw==::cGhhc2Vfc2hpZnQw"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQx::MCBwcw==::cGhhc2Vfc2hpZnQx"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQy::MCBwcw==::cGhhc2Vfc2hpZnQy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQz::MCBwcw==::cGhhc2Vfc2hpZnQz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQ0::MCBwcw==::cGhhc2Vfc2hpZnQ0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQ1::MCBwcw==::cGhhc2Vfc2hpZnQ1"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQ2::MCBwcw==::cGhhc2Vfc2hpZnQ2"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQ3::MCBwcw==::cGhhc2Vfc2hpZnQ3"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "cGhhc2Vfc2hpZnQ4::MCBwcw==::cGhhc2Vfc2hpZnQ4"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTA=::NTA=::ZHV0eV9jeWNsZTA="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTE=::NTA=::ZHV0eV9jeWNsZTE="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTI=::NTA=::ZHV0eV9jeWNsZTI="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTM=::NTA=::ZHV0eV9jeWNsZTM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTQ=::NTA=::ZHV0eV9jeWNsZTQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTU=::NTA=::ZHV0eV9jeWNsZTU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTY=::NTA=::ZHV0eV9jeWNsZTY="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTc=::NTA=::ZHV0eV9jeWNsZTc="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZHV0eV9jeWNsZTg=::NTA=::ZHV0eV9jeWNsZTg="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfbmFtZV8w::bGlua19jbGs=::Y2xvY2tfbmFtZV8w"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfbmFtZV8x::ZnJhbWVfY2xr::Y2xvY2tfbmFtZV8x"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfbmFtZV9nbG9iYWxfMA==::ZmFsc2U=::Y2xvY2tfbmFtZV9nbG9iYWxfMA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfbmFtZV9nbG9iYWxfMQ==::ZmFsc2U=::Y2xvY2tfbmFtZV9nbG9iYWxfMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfbmFtZV9nbG9iYWxfMg==::ZmFsc2U=::Y2xvY2tfbmFtZV9nbG9iYWxfMg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfbmFtZV9nbG9iYWxfMw==::ZmFsc2U=::Y2xvY2tfbmFtZV9nbG9iYWxfMw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfbmFtZV9nbG9iYWxfNA==::ZmFsc2U=::Y2xvY2tfbmFtZV9nbG9iYWxfNA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfbmFtZV9nbG9iYWxfNQ==::ZmFsc2U=::Y2xvY2tfbmFtZV9nbG9iYWxfNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfbmFtZV9nbG9iYWxfNg==::ZmFsc2U=::Y2xvY2tfbmFtZV9nbG9iYWxfNg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfbmFtZV9nbG9iYWxfNw==::ZmFsc2U=::Y2xvY2tfbmFtZV9nbG9iYWxfNw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "Y2xvY2tfbmFtZV9nbG9iYWxfOA==::ZmFsc2U=::Y2xvY2tfbmFtZV9nbG9iYWxfOA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZGl2aWRlX2ZhY3RvcjA=::MQ==::ZGl2aWRlX2ZhY3RvcjA="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZGl2aWRlX2ZhY3RvcjE=::MQ==::ZGl2aWRlX2ZhY3RvcjE="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZGl2aWRlX2ZhY3RvcjI=::MQ==::ZGl2aWRlX2ZhY3RvcjI="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZGl2aWRlX2ZhY3RvcjM=::MQ==::ZGl2aWRlX2ZhY3RvcjM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZGl2aWRlX2ZhY3RvcjQ=::MQ==::ZGl2aWRlX2ZhY3RvcjQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZGl2aWRlX2ZhY3RvcjU=::MQ==::ZGl2aWRlX2ZhY3RvcjU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZGl2aWRlX2ZhY3RvcjY=::MQ==::ZGl2aWRlX2ZhY3RvcjY="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZGl2aWRlX2ZhY3Rvcjc=::MQ==::ZGl2aWRlX2ZhY3Rvcjc="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "ZGl2aWRlX2ZhY3Rvcjg=::MQ==::ZGl2aWRlX2ZhY3Rvcjg="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfbnVtYmVyX29mX2ZhbWlseV9hbGxvd2FibGVfY2xvY2tz::OQ==::aHBfbnVtYmVyX29mX2ZhbWlseV9hbGxvd2FibGVfY2xvY2tz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfcHJldmlvdXNfbnVtX2Nsb2Nrcw==::MQ==::aHBfcHJldmlvdXNfbnVtX2Nsb2Nrcw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3Zjb19mcmVxdWVuY3lfZnA=::NjAwLjA=::aHBfYWN0dWFsX3Zjb19mcmVxdWVuY3lfZnA="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfcGFyYW1ldGVyX3VwZGF0ZV9tZXNzYWdl::{altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}}::aHBfcGFyYW1ldGVyX3VwZGF0ZV9tZXNzYWdl"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfcXN5c19zY3JpcHRpbmdfbW9kZQ==::ZmFsc2U=::aHBfcXN5c19zY3JpcHRpbmdfbW9kZQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAw::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAw"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAx::MjAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAx"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAy::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAz::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnA0::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnA0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnA1::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnA1"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnA2::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnA2"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnA3::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnA3"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnA4::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnA4"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnA5::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnA5"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxMA==::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxMA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxMQ==::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxMg==::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxMg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxMw==::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxMw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxNA==::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxNA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxNQ==::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxNg==::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxNg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxNw==::MTAwLjA=::aHBfYWN0dWFsX291dHB1dF9jbG9ja19mcmVxdWVuY3lfZnAxNw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMA==::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMQ==::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMg==::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMw==::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwNA==::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwNA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwNQ==::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwNg==::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwNg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwNw==::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwNw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwOA==::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwOA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwOQ==::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwOQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTA=::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTA="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTE=::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTE="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTI=::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTI="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTM=::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTM="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTQ=::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTQ="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTU=::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTU="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTY=::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTY="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTc=::MC4w::aHBfYWN0dWFsX3BoYXNlX3NoaWZ0X2ZwMTc="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAw::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAw"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAx::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAx"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAy::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAy"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAz::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAz"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnA0::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnA0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnA1::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnA1"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnA2::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnA2"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnA3::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnA3"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnA4::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnA4"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnA5::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnA5"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxMA==::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxMA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxMQ==::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxMQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxMg==::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxMg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxMw==::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxMw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxNA==::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxNA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxNQ==::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxNQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxNg==::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxNg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_PARAMETER "aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxNw==::NTAuMA==::aHBfYWN0dWFsX2R1dHlfY3ljbGVfZnAxNw=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_GROUP "QmFzaWMgRnVuY3Rpb25zL0Nsb2NrczsgUExMcyBhbmQgUmVzZXRzL1BMTA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvdWcvdWdfYWx0ZXJhX2lvcGxsLnBkZg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL21jbjE0MDM2NzgzODk4MzgvbWNuMTQwMzY3ODU1NDA1Mg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly93d3cuYWx0ZXJhLmNvbS9kb2N1bWVudGF0aW9uL2ducjE1MTcyODg4OTk3ODIuaHRtbA=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2plc2QyMDRiX3J4X2NvcmVfcGxs"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_DISPLAY_NAME "c3lzdGVt"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_REPORT_HIERARCHY "On"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_INTERNAL "Off"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_VERSION "MS4w"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_PARAMETER "QVVUT19HRU5FUkFUSU9OX0lE::MA==::QXV0byBHRU5FUkFUSU9OX0lE"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::QXJyaWEgMTA=::QXV0byBERVZJQ0VfRkFNSUxZ"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::MTBBWDExNVUyRjQ1RTFTRw==::QXV0byBERVZJQ0U="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfU1BFRURHUkFERQ==::MQ==::QXV0byBERVZJQ0VfU1BFRURHUkFERQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_PARAMETER "QVVUT19SRUZDTEtfQ0xPQ0tfUkFURQ==::LTE=::QXV0byBDTE9DS19SQVRF"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_PARAMETER "QVVUT19SRUZDTEtfQ0xPQ0tfRE9NQUlO::LTE=::QXV0byBDTE9DS19ET01BSU4="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_PARAMETER "QVVUT19SRUZDTEtfUkVTRVRfRE9NQUlO::LTE=::QXV0byBSRVNFVF9ET01BSU4="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll" -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name IP_COMPONENT_GROUP "U3lzdGVt"
-
-
-set_global_assignment -library "altera_iopll_180" -name VERILOG_FILE [file join $::quartus(qip_path) "altera_iopll_180/synth/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.v"]
-set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_core_pll" -name VHDL_FILE [file join $::quartus(qip_path) "synth/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd"]
-
-
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_TOOL_NAME "altera_iopll"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_TOOL_VERSION "18.0"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama" -library "altera_iopll_180" -name IP_TOOL_ENV "QsysPrimePro"
-
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.sopcinfo b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.sopcinfo
deleted file mode 100644
index 5ae118975f6d6c74011d6852099cbd046e87be75..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.sopcinfo
+++ /dev/null
@@ -1,6170 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<EnsembleReport
- name="ip_arria10_e1sg_jesd204b_rx_core_pll"
- kind="ip_arria10_e1sg_jesd204b_rx_core_pll"
- version="1.0"
- fabric="QSYS">
- <!-- Format version 18.0 219 (Future versions may contain additional information.) -->
- <!-- 2019.11.25.08:21:58 -->
- <!-- A collection of modules and connections -->
- <parameter name="AUTO_GENERATION_ID">
- <type>java.lang.Integer</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>GENERATION_ID</sysinfo_type>
- </parameter>
- <parameter name="AUTO_UNIQUE_ID">
- <type>java.lang.String</type>
- <value></value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>UNIQUE_ID</sysinfo_type>
- </parameter>
- <parameter name="AUTO_DEVICE_FAMILY">
- <type>java.lang.String</type>
- <value>ARRIA10</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
- </parameter>
- <parameter name="AUTO_DEVICE">
- <type>java.lang.String</type>
- <value>10AX115U2F45E1SG</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>DEVICE</sysinfo_type>
- </parameter>
- <parameter name="AUTO_DEVICE_SPEEDGRADE">
- <type>java.lang.String</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>DEVICE_SPEEDGRADE</sysinfo_type>
- </parameter>
- <parameter name="AUTO_REFCLK_CLOCK_RATE">
- <type>java.lang.Long</type>
- <value>-1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>CLOCK_RATE</sysinfo_type>
- <sysinfo_arg>refclk</sysinfo_arg>
- </parameter>
- <parameter name="AUTO_REFCLK_CLOCK_DOMAIN">
- <type>java.lang.Integer</type>
- <value>-1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>CLOCK_DOMAIN</sysinfo_type>
- <sysinfo_arg>refclk</sysinfo_arg>
- </parameter>
- <parameter name="AUTO_REFCLK_RESET_DOMAIN">
- <type>java.lang.Integer</type>
- <value>-1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>RESET_DOMAIN</sysinfo_type>
- <sysinfo_arg>refclk</sysinfo_arg>
- </parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>Arria 10</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
- </parameter>
- <parameter name="generateLegacySim">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <module name="core_pll" kind="altera_iopll" version="18.0" path="core_pll">
- <!-- Describes a single module. Module parameters are
-the requested settings for a module instance. -->
- <assignment>
- <name>embeddedsw.dts.compatible</name>
- <value>altr,pll</value>
- </assignment>
- <assignment>
- <name>embeddedsw.dts.group</name>
- <value>clock</value>
- </assignment>
- <assignment>
- <name>embeddedsw.dts.vendor</name>
- <value>altr</value>
- </assignment>
- <parameter name="gui_device_family">
- <type>java.lang.String</type>
- <value>Arria 10</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_device_component">
- <type>java.lang.String</type>
- <value>10AX115U2F45E1SG</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_device_speed_grade">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_debug_mode">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_skip_sdc_generation">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_include_iossm">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cal_code_hex_file">
- <type>java.lang.String</type>
- <value>iossm.hex</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_parameter_table_hex_file">
- <type>java.lang.String</type>
- <value>seq_params_sim.hex</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_tclk_mux_en">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_tclk_sel">
- <type>java.lang.String</type>
- <value>pll_tclk_m_src</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_vco_freq_band_0">
- <type>java.lang.String</type>
- <value>pll_freq_clk0_disabled</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_vco_freq_band_1">
- <type>java.lang.String</type>
- <value>pll_freq_clk1_disabled</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_freqcal_en">
- <type>boolean</type>
- <value>true</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_freqcal_req_flag">
- <type>boolean</type>
- <value>true</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cal_converge">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cal_error">
- <type>java.lang.String</type>
- <value>cal_clean</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_cal_done">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_type">
- <type>java.lang.String</type>
- <value>S10_Simple</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_m_cnt_in_src">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_c_cnt_in_src0">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_c_cnt_in_src1">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_c_cnt_in_src2">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_c_cnt_in_src3">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_c_cnt_in_src4">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_c_cnt_in_src5">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_c_cnt_in_src6">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_c_cnt_in_src7">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_c_cnt_in_src8">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="system_info_device_family">
- <type>java.lang.String</type>
- <value>ARRIA10</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
- </parameter>
- <parameter name="system_info_device_component">
- <type>java.lang.String</type>
- <value>10AX115U2F45E1SG</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>DEVICE</sysinfo_type>
- </parameter>
- <parameter name="system_info_device_speed_grade">
- <type>java.lang.String</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>DEVICE_SPEEDGRADE</sysinfo_type>
- </parameter>
- <parameter name="system_part_trait_speed_grade">
- <type>java.lang.String</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- <sysinfo_type>PART_TRAIT</sysinfo_type>
- <sysinfo_arg>DEVICE_SPEEDGRADE</sysinfo_arg>
- </parameter>
- <parameter name="gui_usr_device_speed_grade">
- <type>java.lang.String</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_en_reconf">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_en_dps_ports">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_mode">
- <type>java.lang.String</type>
- <value>Integer-N PLL</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_use_logical">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_reference_clock_frequency">
- <type>double</type>
- <value>200.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_use_coreclk">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_refclk_might_change">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_fractional_cout">
- <type>int</type>
- <value>32</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_prot_mode">
- <type>java.lang.String</type>
- <value>UNUSED</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_dsm_out_sel">
- <type>java.lang.String</type>
- <value>1st_order</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_use_locked">
- <type>boolean</type>
- <value>true</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_en_adv_params">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_bandwidth_preset">
- <type>java.lang.String</type>
- <value>Low</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_lock_setting">
- <type>java.lang.String</type>
- <value>Low Lock Time</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_auto_reset">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_en_lvds_ports">
- <type>java.lang.String</type>
- <value>Disabled</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_operation_mode">
- <type>java.lang.String</type>
- <value>source synchronous</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_feedback_clock">
- <type>java.lang.String</type>
- <value>Global Clock</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_to_compensate">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_use_NDFB_modes">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_refclk_switch">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_refclk1_frequency">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_en_phout_ports">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phout_division">
- <type>int</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_en_extclkout_ports">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_number_of_clocks">
- <type>int</type>
- <value>2</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_multiply_factor">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_n">
- <type>int</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_frac_multiply_factor">
- <type>long</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_fix_vco_frequency">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_fixed_vco_frequency">
- <type>double</type>
- <value>600.0</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_vco_frequency">
- <type>java.lang.String</type>
- <value>600.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_enable_output_counter_cascading">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_mif_gen_options">
- <type>java.lang.String</type>
- <value>Generate New MIF File</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_new_mif_file_path">
- <type>java.lang.String</type>
- <value>~/pll.mif</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_existing_mif_file_path">
- <type>java.lang.String</type>
- <value>~/pll.mif</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_mif_config_name">
- <type>java.lang.String</type>
- <value>unnamed</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_active_clk">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clk_bad">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_switchover_mode">
- <type>java.lang.String</type>
- <value>Automatic Switchover</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_switchover_delay">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_enable_cascade_out">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_outclk_index">
- <type>java.lang.String</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_enable_cascade_in">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_enable_permit_cal">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_cascading_mode">
- <type>java.lang.String</type>
- <value>adjpllin</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_enable_mif_dps">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_dps_cntr">
- <type>java.lang.String</type>
- <value>C0</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_dps_num">
- <type>int</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_dps_dir">
- <type>java.lang.String</type>
- <value>Positive</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_extclkout_0_source">
- <type>java.lang.String</type>
- <value>C0</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_extclkout_1_source">
- <type>java.lang.String</type>
- <value>C0</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_global">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string0">
- <type>java.lang.String</type>
- <value>link_clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string1">
- <type>java.lang.String</type>
- <value>frame_clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string2">
- <type>java.lang.String</type>
- <value>outclk2</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string3">
- <type>java.lang.String</type>
- <value>outclk3</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string4">
- <type>java.lang.String</type>
- <value>outclk4</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string5">
- <type>java.lang.String</type>
- <value>outclk5</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string6">
- <type>java.lang.String</type>
- <value>outclk6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string7">
- <type>java.lang.String</type>
- <value>outclk7</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string8">
- <type>java.lang.String</type>
- <value>outclk8</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string9">
- <type>java.lang.String</type>
- <value>outclk9</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string10">
- <type>java.lang.String</type>
- <value>outclk10</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string11">
- <type>java.lang.String</type>
- <value>outclk11</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string12">
- <type>java.lang.String</type>
- <value>outclk12</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string13">
- <type>java.lang.String</type>
- <value>outclk13</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string14">
- <type>java.lang.String</type>
- <value>outclk14</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string15">
- <type>java.lang.String</type>
- <value>outclk15</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string16">
- <type>java.lang.String</type>
- <value>outclk16</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_clock_name_string17">
- <type>java.lang.String</type>
- <value>outclk17</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c0">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c1">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c2">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c3">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c4">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c5">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c6">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c7">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c8">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c9">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c10">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c11">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c12">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c13">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c14">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c15">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c16">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_divide_factor_c17">
- <type>int</type>
- <value>6</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter0">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter1">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter2">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter3">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter4">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter5">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter6">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter7">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter8">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter9">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter10">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter11">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter12">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter13">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter14">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter15">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter16">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_cascade_counter17">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency0">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency1">
- <type>double</type>
- <value>200.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency2">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency3">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency4">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency5">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency6">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency7">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency8">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency9">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency10">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency11">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency12">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency13">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency14">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency15">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency16">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_output_clock_frequency17">
- <type>double</type>
- <value>100.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency0">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency1">
- <type>java.lang.String</type>
- <value>200.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency2">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency3">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency4">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency5">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency6">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency7">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency8">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency9">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency10">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency11">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency12">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency13">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency14">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency15">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency16">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency17">
- <type>java.lang.String</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range0">
- <type>[Ljava.lang.String;</type>
- <value>99.595142,99.607843,99.649123,100.0,100.350877,100.392157</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range1">
- <type>[Ljava.lang.String;</type>
- <value>183.333333,185.714286,187.5,200.0,214.285714,216.666667</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range2">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range3">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range4">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range5">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range6">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range7">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range8">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range9">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range10">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range11">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range12">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range13">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range14">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range15">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range16">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_output_clock_frequency_range17">
- <type>[Ljava.lang.String;</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units0">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units1">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units2">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units3">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units4">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units5">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units6">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units7">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units8">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units9">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units10">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units11">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units12">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units13">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units14">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units15">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units16">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_ps_units17">
- <type>java.lang.String</type>
- <value>ps</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift0">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift1">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift2">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift3">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift4">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift5">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift6">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift7">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift8">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift9">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift10">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift11">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift12">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift13">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift14">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift15">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift16">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift17">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg0">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg1">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg2">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg3">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg4">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg5">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg6">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg7">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg8">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg9">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg10">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg11">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg12">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg13">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg14">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg15">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg16">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_phase_shift_deg17">
- <type>double</type>
- <value>0.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift0">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift1">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift2">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift3">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift4">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift5">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift6">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift7">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift8">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift9">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift10">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift11">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift12">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift13">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift14">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift15">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift16">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift17">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range0">
- <type>[Ljava.lang.String;</type>
- <value>0.0,78.1,89.3,104.2,125.0,156.2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range1">
- <type>[Ljava.lang.String;</type>
- <value>0.0,78.1,89.3,104.2,125.0,156.2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range2">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range3">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range4">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range5">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range6">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range7">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range8">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range9">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range10">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range11">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range12">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range13">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range14">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range15">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range16">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_range17">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg0">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg1">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg2">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg3">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg4">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg5">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg6">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg7">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg8">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg9">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg10">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg11">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg12">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg13">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg14">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg15">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg16">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg17">
- <type>java.lang.String</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range0">
- <type>[Ljava.lang.String;</type>
- <value>0.0,2.8,3.2,3.8,4.5,5.6</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range1">
- <type>[Ljava.lang.String;</type>
- <value>0.0,5.6,6.4,7.5,9.0,11.2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range2">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range3">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range4">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range5">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range6">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range7">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range8">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range9">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range10">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range11">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range12">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range13">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range14">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range15">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range16">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_phase_shift_deg_range17">
- <type>[Ljava.lang.String;</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle0">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle1">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle2">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle3">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle4">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle5">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle6">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle7">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle8">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle9">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle10">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle11">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle12">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle13">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle14">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle15">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle16">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_duty_cycle17">
- <type>double</type>
- <value>50.0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle0">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle1">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle2">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle3">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle4">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle5">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle6">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle7">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle8">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle9">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle10">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle11">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle12">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle13">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle14">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle15">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle16">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle17">
- <type>java.lang.String</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range0">
- <type>[Ljava.lang.String;</type>
- <value>45.83,46.43,46.88,50.0,53.12,53.57</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range1">
- <type>[Ljava.lang.String;</type>
- <value>41.67,42.86,43.75,50.0,56.25,57.14</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range2">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range3">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range4">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range5">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range6">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range7">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range8">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range9">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range10">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range11">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range12">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range13">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range14">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range15">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range16">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_actual_duty_cycle_range17">
- <type>[Ljava.lang.String;</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="parameterTable_names">
- <type>[Ljava.lang.String;</type>
- <value>M-Counter Divide Setting,N-Counter Divide Setting,VCO Frequency,C-Counter-0 Divide Setting,C-Counter-1 Divide Setting,C-Counter-2 Divide Setting,C-Counter-3 Divide Setting,C-Counter-4 Divide Setting,C-Counter-5 Divide Setting,C-Counter-6 Divide Setting,C-Counter-7 Divide Setting,C-Counter-8 Divide Setting,PLL Auto Reset,M-Counter Hi Divide,M-Counter Lo Divide,M-Counter Even Duty Enable,M-Counter Bypass Enable,N-Counter Hi Divide,N-Counter Lo Divide,N-Counter Even Duty Enable,N-Counter Bypass Enable,C-Counter-0 Hi Divide,C-Counter-1 Hi Divide,C-Counter-2 Hi Divide,C-Counter-3 Hi Divide,C-Counter-4 Hi Divide,C-Counter-5 Hi Divide,C-Counter-6 Hi Divide,C-Counter-7 Hi Divide,C-Counter-8 Hi Divide,C-Counter-0 Lo Divide,C-Counter-1 Lo Divide,C-Counter-2 Lo Divide,C-Counter-3 Lo Divide,C-Counter-4 Lo Divide,C-Counter-5 Lo Divide,C-Counter-6 Lo Divide,C-Counter-7 Lo Divide,C-Counter-8 Lo Divide,C-Counter-0 Even Duty Enable,C-Counter-1 Even Duty Enable,C-Counter-2 Even Duty Enable,C-Counter-3 Even Duty Enable,C-Counter-4 Even Duty Enable,C-Counter-5 Even Duty Enable,C-Counter-6 Even Duty Enable,C-Counter-7 Even Duty Enable,C-Counter-8 Even Duty Enable,C-Counter-0 Bypass Enable,C-Counter-1 Bypass Enable,C-Counter-2 Bypass Enable,C-Counter-3 Bypass Enable,C-Counter-4 Bypass Enable,C-Counter-5 Bypass Enable,C-Counter-6 Bypass Enable,C-Counter-7 Bypass Enable,C-Counter-8 Bypass Enable,C-Counter-0 Preset,C-Counter-1 Preset,C-Counter-2 Preset,C-Counter-3 Preset,C-Counter-4 Preset,C-Counter-5 Preset,C-Counter-6 Preset,C-Counter-7 Preset,C-Counter-8 Preset,C-Counter-0 Phase Mux Preset,C-Counter-1 Phase Mux Preset,C-Counter-2 Phase Mux Preset,C-Counter-3 Phase Mux Preset,C-Counter-4 Phase Mux Preset,C-Counter-5 Phase Mux Preset,C-Counter-6 Phase Mux Preset,C-Counter-7 Phase Mux Preset,C-Counter-8 Phase Mux Preset,Charge Pump Current,Bandwidth Control</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="parameterTable_values">
- <type>[Ljava.lang.String;</type>
- <value>4,1,800.0 MHz,8,4,1,1,1,1,1,1,1,false,2,2,false,false,256,256,false,true,4,2,256,256,256,256,256,256,256,4,2,256,256,256,256,256,256,256,false,false,false,false,false,false,false,false,false,false,false,true,true,true,true,true,true,true,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,pll_cp_setting10,pll_bw_res_setting2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="mifTable_names">
- <type>[Ljava.lang.String;</type>
- <value>The MIF file specified does not yet exist</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="mifTable_values">
- <type>[Ljava.lang.String;</type>
- <value></value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_m_cnt_basic">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_m_cnt">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="prot_mode">
- <type>java.lang.String</type>
- <value>BASIC</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="m_cnt_hi_div">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="eff_m_cnt">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="multiply_factor">
- <type>int</type>
- <value>4</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="use_core_refclk">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="m_cnt_lo_div">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="n_cnt_hi_div">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="n_cnt_lo_div">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="m_cnt_bypass_en">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="n_cnt_bypass_en">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="m_cnt_odd_div_duty_en">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="n_cnt_odd_div_duty_en">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_vco_div">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_cp_current">
- <type>java.lang.String</type>
- <value>pll_cp_setting10</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_bwctrl">
- <type>java.lang.String</type>
- <value>pll_bw_res_setting2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_ripplecap_ctrl">
- <type>java.lang.String</type>
- <value></value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_fractional_division">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="fractional_vco_multiplier">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="reference_clock_frequency">
- <type>java.lang.String</type>
- <value>200.0 MHz</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_fractional_cout">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_dsm_out_sel">
- <type>java.lang.String</type>
- <value>1st_order</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="operation_mode">
- <type>java.lang.String</type>
- <value>source_synchronous</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="number_of_clocks">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="number_of_outclks">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_vcoph_div">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_type">
- <type>java.lang.String</type>
- <value>Arria 10</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_subtype">
- <type>java.lang.String</type>
- <value>General</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_output_clk_frequency">
- <type>java.lang.String</type>
- <value>800.0 MHz</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="mimic_fbclk_type">
- <type>java.lang.String</type>
- <value>gclk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_bw_sel">
- <type>java.lang.String</type>
- <value>Low</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_slf_rst">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_fbclk_mux_1">
- <type>java.lang.String</type>
- <value>pll_fbclk_mux_1_glb</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_fbclk_mux_2">
- <type>java.lang.String</type>
- <value>pll_fbclk_mux_2_fb_1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_m_cnt_in_src">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_clkin_0_src">
- <type>java.lang.String</type>
- <value>clk_0</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="refclk1_frequency">
- <type>java.lang.String</type>
- <value>100.0 MHz</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_clk_loss_sw_en">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_manu_clk_sw_en">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_auto_clk_sw_en">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_clkin_1_src">
- <type>java.lang.String</type>
- <value>clk_0</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_clk_sw_dly">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_extclk_0_cnt_src">
- <type>java.lang.String</type>
- <value>pll_extclk_cnt_src_vss</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_extclk_1_cnt_src">
- <type>java.lang.String</type>
- <value>pll_extclk_cnt_src_vss</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_lock_fltr_cfg">
- <type>int</type>
- <value>100</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_unlock_fltr_cfg">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="lock_mode">
- <type>java.lang.String</type>
- <value>low_lock_time</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_to_compensate">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_global">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_freqcal_en">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_defer_cal_user_mode">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="dprio_interface_sel">
- <type>int</type>
- <value>3</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div0">
- <type>int</type>
- <value>4</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div1">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div2">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div3">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div4">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div5">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div6">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div7">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div8">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div9">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div10">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div11">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div12">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div13">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div14">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div15">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div16">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_hi_div17">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div0">
- <type>int</type>
- <value>4</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div1">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div2">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div3">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div4">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div5">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div6">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div7">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div8">
- <type>int</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div9">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div10">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div11">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div12">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div13">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div14">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div15">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div16">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_lo_div17">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst0">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst1">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst2">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst3">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst4">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst5">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst6">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst7">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst8">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst9">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst10">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst11">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst12">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst13">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst14">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst15">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst16">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_prst17">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst0">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst1">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst2">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst3">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst4">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst5">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst6">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst7">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst8">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst9">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst10">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst11">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst12">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst13">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst14">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst15">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst16">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_ph_mux_prst17">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src0">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src1">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src2">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src3">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src4">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src5">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src6">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src7">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src8">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src9">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src10">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src11">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src12">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src13">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src14">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src15">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src16">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_in_src17">
- <type>java.lang.String</type>
- <value>c_m_cnt_in_src_ph_mux_clk</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en0">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en1">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en2">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en3">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en4">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en5">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en6">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en7">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en8">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en9">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en10">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en11">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en12">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en13">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en14">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en15">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en16">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_bypass_en17">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en0">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en1">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en2">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en3">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en4">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en5">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en6">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en7">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en8">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en9">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en10">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en11">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en12">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en13">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en14">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en15">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en16">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="c_cnt_odd_div_duty_en17">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency0">
- <type>java.lang.String</type>
- <value>100.000000 MHz</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency1">
- <type>java.lang.String</type>
- <value>200.000000 MHz</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency2">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency3">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency4">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency5">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency6">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency7">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency8">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency9">
- <type>java.lang.String</type>
- <value>0 MHz</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency10">
- <type>java.lang.String</type>
- <value>0 MHz</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency11">
- <type>java.lang.String</type>
- <value>0 MHz</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency12">
- <type>java.lang.String</type>
- <value>0 MHz</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency13">
- <type>java.lang.String</type>
- <value>0 MHz</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency14">
- <type>java.lang.String</type>
- <value>0 MHz</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency15">
- <type>java.lang.String</type>
- <value>0 MHz</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency16">
- <type>java.lang.String</type>
- <value>0 MHz</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="output_clock_frequency17">
- <type>java.lang.String</type>
- <value>0 MHz</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift0">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift1">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift2">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift3">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift4">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift5">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift6">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift7">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift8">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift9">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift10">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift11">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift12">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift13">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift14">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift15">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift16">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="phase_shift17">
- <type>java.lang.String</type>
- <value>0 ps</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle0">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle1">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle2">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle3">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle4">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle5">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle6">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle7">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle8">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle9">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle10">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle11">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle12">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle13">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle14">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle15">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle16">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="duty_cycle17">
- <type>int</type>
- <value>50</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_0">
- <type>java.lang.String</type>
- <value>link_clk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_1">
- <type>java.lang.String</type>
- <value>frame_clk</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_2">
- <type>java.lang.String</type>
- <value></value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_3">
- <type>java.lang.String</type>
- <value></value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_4">
- <type>java.lang.String</type>
- <value></value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_5">
- <type>java.lang.String</type>
- <value></value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_6">
- <type>java.lang.String</type>
- <value></value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_7">
- <type>java.lang.String</type>
- <value></value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_8">
- <type>java.lang.String</type>
- <value></value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_global_0">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_global_1">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_global_2">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_global_3">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_global_4">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_global_5">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_global_6">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_global_7">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clock_name_global_8">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="divide_factor0">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="divide_factor1">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="divide_factor2">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="divide_factor3">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="divide_factor4">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="divide_factor5">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="divide_factor6">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="divide_factor7">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="divide_factor8">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_tclk_mux_en">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_tclk_sel">
- <type>java.lang.String</type>
- <value>pll_tclk_m_src</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_vco_freq_band_0">
- <type>java.lang.String</type>
- <value>pll_freq_clk0_disabled</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_vco_freq_band_1">
- <type>java.lang.String</type>
- <value>pll_freq_clk1_disabled</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_freqcal_req_flag">
- <type>boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="cal_converge">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="cal_error">
- <type>java.lang.String</type>
- <value>cal_clean</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="pll_cal_done">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="include_iossm">
- <type>boolean</type>
- <value>false</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="cal_code_hex_file">
- <type>java.lang.String</type>
- <value>iossm.hex</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="parameter_table_hex_file">
- <type>java.lang.String</type>
- <value>seq_params_sim.hex</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="iossm_nios_sim_clk_period_ps">
- <type>int</type>
- <value>1333</value>
- <derived>true</derived>
- <enabled>false</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_number_of_family_allowable_clocks">
- <type>int</type>
- <value>9</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_previous_num_clocks">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_vco_frequency_fp">
- <type>double</type>
- <value>600.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_parameter_update_message">
- <type>java.lang.String</type>
- <value>{altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}}</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_qsys_scripting_mode">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp0">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp1">
- <type>double</type>
- <value>200.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp2">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp3">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp4">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp5">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp6">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp7">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp8">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp9">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp10">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp11">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp12">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp13">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp14">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp15">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp16">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_output_clock_frequency_fp17">
- <type>double</type>
- <value>100.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp0">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp1">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp2">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp3">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp4">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp5">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp6">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp7">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp8">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp9">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp10">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp11">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp12">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp13">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp14">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp15">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp16">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_phase_shift_fp17">
- <type>double</type>
- <value>0.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp0">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp1">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp2">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp3">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp4">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp5">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp6">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp7">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp8">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp9">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp10">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp11">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp12">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp13">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp14">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp15">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp16">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="hp_actual_duty_cycle_fp17">
- <type>double</type>
- <value>50.0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="generateLegacySim">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <interface name="reset" kind="reset_sink" version="18.0">
- <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
- <assignment>
- <name>ui.blockdiagram.direction</name>
- <value>input</value>
- </assignment>
- <parameter name="associatedClock">
- <type>java.lang.String</type>
- <value></value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="synchronousEdges">
- <type>com.altera.sopcmodel.reset.Reset$Edges</type>
- <value>NONE</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="generateLegacySim">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <type>reset</type>
- <isStart>false</isStart>
- <port>
- <name>rst</name>
- <direction>Input</direction>
- <width>1</width>
- <role>reset</role>
- </port>
- </interface>
- <interface name="refclk" kind="clock_sink" version="18.0">
- <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
- <assignment>
- <name>ui.blockdiagram.direction</name>
- <value>input</value>
- </assignment>
- <parameter name="externallyDriven">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ptfSchematicName">
- <type>java.lang.String</type>
- <value></value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="generateLegacySim">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clockRateKnown">
- <type>java.lang.Boolean</type>
- <value>true</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clockRate">
- <type>java.lang.Long</type>
- <value>200000000</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <type>clock</type>
- <isStart>false</isStart>
- <port>
- <name>refclk</name>
- <direction>Input</direction>
- <width>1</width>
- <role>clk</role>
- </port>
- </interface>
- <interface name="locked" kind="conduit_end" version="18.0">
- <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
- <assignment>
- <name>ui.blockdiagram.direction</name>
- <value>output</value>
- </assignment>
- <parameter name="associatedClock">
- <type>java.lang.String</type>
- <value></value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="associatedReset">
- <type>java.lang.String</type>
- <value></value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="prSafe">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="generateLegacySim">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <type>conduit</type>
- <isStart>false</isStart>
- <port>
- <name>locked</name>
- <direction>Output</direction>
- <width>1</width>
- <role>export</role>
- </port>
- </interface>
- <interface name="outclk0" kind="clock_source" version="18.0">
- <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
- <assignment>
- <name>ui.blockdiagram.direction</name>
- <value>output</value>
- </assignment>
- <parameter name="associatedDirectClock">
- <type>java.lang.String</type>
- <value></value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clockRate">
- <type>long</type>
- <value>100000000</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clockRateKnown">
- <type>boolean</type>
- <value>true</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="externallyDriven">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ptfSchematicName">
- <type>java.lang.String</type>
- <value></value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="generateLegacySim">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <type>clock</type>
- <isStart>true</isStart>
- <port>
- <name>outclk_0</name>
- <direction>Output</direction>
- <width>1</width>
- <role>clk</role>
- </port>
- </interface>
- <interface name="outclk1" kind="clock_source" version="18.0">
- <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
- <assignment>
- <name>ui.blockdiagram.direction</name>
- <value>output</value>
- </assignment>
- <parameter name="associatedDirectClock">
- <type>java.lang.String</type>
- <value></value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clockRate">
- <type>long</type>
- <value>200000000</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="clockRateKnown">
- <type>boolean</type>
- <value>true</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="externallyDriven">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ptfSchematicName">
- <type>java.lang.String</type>
- <value></value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="generateLegacySim">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <type>clock</type>
- <isStart>true</isStart>
- <port>
- <name>outclk_1</name>
- <direction>Output</direction>
- <width>1</width>
- <role>clk</role>
- </port>
- </interface>
- </module>
- <plugin>
- <instanceCount>1</instanceCount>
- <name>altera_iopll</name>
- <type>com.altera.entityinterfaces.IElementClass</type>
- <subtype>com.altera.entityinterfaces.IModule</subtype>
- <displayName>IOPLL Intel FPGA IP</displayName>
- <version>18.0</version>
- </plugin>
- <plugin>
- <instanceCount>1</instanceCount>
- <name>reset_sink</name>
- <type>com.altera.entityinterfaces.IElementClass</type>
- <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
- <displayName>Reset Input</displayName>
- <version>18.0</version>
- </plugin>
- <plugin>
- <instanceCount>1</instanceCount>
- <name>clock_sink</name>
- <type>com.altera.entityinterfaces.IElementClass</type>
- <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
- <displayName>Clock Input</displayName>
- <version>18.0</version>
- </plugin>
- <plugin>
- <instanceCount>1</instanceCount>
- <name>conduit_end</name>
- <type>com.altera.entityinterfaces.IElementClass</type>
- <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
- <displayName>Conduit</displayName>
- <version>18.0</version>
- </plugin>
- <plugin>
- <instanceCount>2</instanceCount>
- <name>clock_source</name>
- <type>com.altera.entityinterfaces.IElementClass</type>
- <subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
- <displayName>Clock Output</displayName>
- <version>18.0</version>
- </plugin>
- <reportVersion>18.0 219</reportVersion>
- <uniqueIdentifier></uniqueIdentifier>
-</EnsembleReport>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.spd b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.spd
deleted file mode 100644
index b608fcd2162b6a2f76eb2eebba9f4d25b77e36d0..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.spd
+++ /dev/null
@@ -1,15 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<simPackage>
- <file
- path="altera_iopll_180/sim/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.vo"
- type="VERILOG"
- library="altera_iopll_180" />
- <file
- path="sim/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd"
- type="VHDL"
- library="ip_arria10_e1sg_jesd204b_rx_core_pll"
- hasInlineConfiguration="true" />
- <topLevel
- name="ip_arria10_e1sg_jesd204b_rx_core_pll.ip_arria10_e1sg_jesd204b_rx_core_pll" />
- <deviceFamily name="arria10" />
-</simPackage>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.xml b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.xml
deleted file mode 100644
index f245c25c01326a6dbefdd85138eb4d129aca0053..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll.xml
+++ /dev/null
@@ -1,888 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<deploy
- date="2019.11.25.08:21:58"
- outputDirectory="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/">
- <perimeter>
- <parameter
- name="AUTO_GENERATION_ID"
- type="Integer"
- defaultValue="0"
- onHdl="0"
- affectsHdl="1" />
- <parameter
- name="AUTO_UNIQUE_ID"
- type="String"
- defaultValue=""
- onHdl="0"
- affectsHdl="1" />
- <parameter
- name="AUTO_DEVICE_FAMILY"
- type="String"
- defaultValue="Arria 10"
- onHdl="0"
- affectsHdl="1" />
- <parameter
- name="AUTO_DEVICE"
- type="String"
- defaultValue="10AX115U2F45E1SG"
- onHdl="0"
- affectsHdl="1" />
- <parameter
- name="AUTO_DEVICE_SPEEDGRADE"
- type="String"
- defaultValue="1"
- onHdl="0"
- affectsHdl="1" />
- <parameter
- name="AUTO_REFCLK_CLOCK_RATE"
- type="Long"
- defaultValue="-1"
- onHdl="0"
- affectsHdl="1" />
- <parameter
- name="AUTO_REFCLK_CLOCK_DOMAIN"
- type="Integer"
- defaultValue="-1"
- onHdl="0"
- affectsHdl="1" />
- <parameter
- name="AUTO_REFCLK_RESET_DOMAIN"
- type="Integer"
- defaultValue="-1"
- onHdl="0"
- affectsHdl="1" />
- <interface name="locked" kind="conduit" start="0">
- <property name="associatedClock" value="" />
- <property name="associatedReset" value="" />
- <property name="prSafe" value="false" />
- <port name="locked" direction="output" role="export" width="1" />
- </interface>
- <interface name="outclk0" kind="clock" start="1">
- <property name="associatedDirectClock" value="" />
- <property name="clockRate" value="100000000" />
- <property name="clockRateKnown" value="true" />
- <property name="externallyDriven" value="false" />
- <property name="ptfSchematicName" value="" />
- <port name="outclk_0" direction="output" role="clk" width="1" />
- </interface>
- <interface name="outclk1" kind="clock" start="1">
- <property name="associatedDirectClock" value="" />
- <property name="clockRate" value="200000000" />
- <property name="clockRateKnown" value="true" />
- <property name="externallyDriven" value="false" />
- <property name="ptfSchematicName" value="" />
- <port name="outclk_1" direction="output" role="clk" width="1" />
- </interface>
- <interface name="refclk" kind="clock" start="0">
- <property name="clockRate" value="200000000" />
- <property name="externallyDriven" value="false" />
- <property name="ptfSchematicName" value="" />
- <port name="refclk" direction="input" role="clk" width="1" />
- </interface>
- <interface name="reset" kind="reset" start="0">
- <property name="associatedClock" value="" />
- <property name="synchronousEdges" value="NONE" />
- <port name="rst" direction="input" role="reset" width="1" />
- </interface>
- </perimeter>
- <entity
- kind="ip_arria10_e1sg_jesd204b_rx_core_pll"
- version="1.0"
- name="ip_arria10_e1sg_jesd204b_rx_core_pll">
- <parameter name="AUTO_REFCLK_CLOCK_DOMAIN" value="-1" />
- <parameter name="AUTO_GENERATION_ID" value="0" />
- <parameter name="AUTO_DEVICE" value="10AX115U2F45E1SG" />
- <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
- <parameter name="AUTO_REFCLK_CLOCK_RATE" value="-1" />
- <parameter name="AUTO_UNIQUE_ID" value="" />
- <parameter name="AUTO_REFCLK_RESET_DOMAIN" value="-1" />
- <parameter name="AUTO_DEVICE_SPEEDGRADE" value="1" />
- <generatedFiles>
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/synth/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd"
- attributes="CONTAINS_INLINE_CONFIGURATION" />
- </generatedFiles>
- <childGeneratedFiles>
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/synth/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd"
- attributes="CONTAINS_INLINE_CONFIGURATION" />
- </childGeneratedFiles>
- <sourceFiles>
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.ip" />
- </sourceFiles>
- <childSourceFiles>
- <file
- path="/home/software/Altera/18.0/ip/altera/altera_iopll/top/altera_iopll_hw.tcl" />
- </childSourceFiles>
- <messages>
- <message level="Info" culprit="ip_arria10_e1sg_jesd204b_rx_core_pll">"Generating: ip_arria10_e1sg_jesd204b_rx_core_pll"</message>
- <message level="Info" culprit="ip_arria10_e1sg_jesd204b_rx_core_pll">"Generating: ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama"</message>
- <message level="Debug" culprit="core_pll">IN HDL WRAP: reset refclk locked outclk0 outclk1</message>
- <message level="Debug" culprit="core_pll">--hdl_params: c_cnt_bypass_en0 c_cnt_bypass_en1 c_cnt_bypass_en2 c_cnt_bypass_en3 c_cnt_bypass_en4 c_cnt_bypass_en5 c_cnt_bypass_en6 c_cnt_bypass_en7 c_cnt_bypass_en8 c_cnt_hi_div0 c_cnt_hi_div1 c_cnt_hi_div2 c_cnt_hi_div3 c_cnt_hi_div4 c_cnt_hi_div5 c_cnt_hi_div6 c_cnt_hi_div7 c_cnt_hi_div8 c_cnt_in_src0 c_cnt_in_src1 c_cnt_in_src2 c_cnt_in_src3 c_cnt_in_src4 c_cnt_in_src5 c_cnt_in_src6 c_cnt_in_src7 c_cnt_in_src8 c_cnt_lo_div0 c_cnt_lo_div1 c_cnt_lo_div2 c_cnt_lo_div3 c_cnt_lo_div4 c_cnt_lo_div5 c_cnt_lo_div6 c_cnt_lo_div7 c_cnt_lo_div8 c_cnt_odd_div_duty_en0 c_cnt_odd_div_duty_en1 c_cnt_odd_div_duty_en2 c_cnt_odd_div_duty_en3 c_cnt_odd_div_duty_en4 c_cnt_odd_div_duty_en5 c_cnt_odd_div_duty_en6 c_cnt_odd_div_duty_en7 c_cnt_odd_div_duty_en8 c_cnt_ph_mux_prst0 c_cnt_ph_mux_prst1 c_cnt_ph_mux_prst2 c_cnt_ph_mux_prst3 c_cnt_ph_mux_prst4 c_cnt_ph_mux_prst5 c_cnt_ph_mux_prst6 c_cnt_ph_mux_prst7 c_cnt_ph_mux_prst8 c_cnt_prst0 c_cnt_prst1 c_cnt_prst2 c_cnt_prst3 c_cnt_prst4 c_cnt_prst5 c_cnt_prst6 c_cnt_prst7 c_cnt_prst8 clock_name_0 clock_name_1 clock_name_2 clock_name_3 clock_name_4 clock_name_5 clock_name_6 clock_name_7 clock_name_8 clock_name_global_0 clock_name_global_1 clock_name_global_2 clock_name_global_3 clock_name_global_4 clock_name_global_5 clock_name_global_6 clock_name_global_7 clock_name_global_8 duty_cycle0 duty_cycle1 duty_cycle2 duty_cycle3 duty_cycle4 duty_cycle5 duty_cycle6 duty_cycle7 duty_cycle8 m_cnt_bypass_en m_cnt_hi_div m_cnt_lo_div m_cnt_odd_div_duty_en n_cnt_bypass_en n_cnt_hi_div n_cnt_lo_div n_cnt_odd_div_duty_en number_of_clocks operation_mode output_clock_frequency0 output_clock_frequency1 output_clock_frequency2 output_clock_frequency3 output_clock_frequency4 output_clock_frequency5 output_clock_frequency6 output_clock_frequency7 output_clock_frequency8 phase_shift0 phase_shift1 phase_shift2 phase_shift3 phase_shift4 phase_shift5 phase_shift6 phase_shift7 phase_shift8 pll_bw_sel pll_bwctrl pll_cp_current pll_extclk_0_cnt_src pll_extclk_1_cnt_src pll_fbclk_mux_1 pll_fbclk_mux_2 pll_m_cnt_in_src pll_output_clk_frequency pll_slf_rst pll_subtype pll_type prot_mode reference_clock_frequency</message>
- <message level="Debug" culprit="core_pll">altera_pll_ports ports: refclk1 {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} rst {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} fbclk {DIRECT_MAPPING false MAPPING_FUNCTION map_fbclk_port TIE_OFF {}} fboutclk {DIRECT_MAPPING false MAPPING_FUNCTION map_fboutclk_port TIE_OFF {}} zdbfbclk {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} locked {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} loaden {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} phase_done {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} reconfig_to_pll {DIRECT_MAPPING false MAPPING_FUNCTION map_reconfig_to_port TIE_OFF {}} refclk {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} scanclk {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} phout {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} num_phase_shifts {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 3'b0} cntsel {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 5'b0} clkbad {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} extclk_out {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} lvds_clk {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} outclk {DIRECT_MAPPING false MAPPING_FUNCTION map_outclk_port TIE_OFF {}} phase_en {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} extswitch {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} cascade_out {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} activeclk {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} adjpllin {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} updn {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} reconfig_from_pll {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }}</message>
- <message level="Debug" culprit="core_pll">module ports: rst refclk locked outclk_0 outclk_1</message>
- </messages>
- </entity>
- <entity
- kind="altera_iopll"
- version="18.0"
- name="ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama">
- <parameter name="gui_clock_name_string12" value="outclk12" />
- <parameter name="hp_actual_phase_shift_fp5" value="0.0" />
- <parameter name="gui_clock_name_string11" value="outclk11" />
- <parameter name="c_cnt_bypass_en17" value="true" />
- <parameter name="hp_actual_phase_shift_fp6" value="0.0" />
- <parameter name="gui_clock_name_string14" value="outclk14" />
- <parameter name="hp_actual_phase_shift_fp7" value="0.0" />
- <parameter name="gui_clock_name_string13" value="outclk13" />
- <parameter name="hp_actual_phase_shift_fp8" value="0.0" />
- <parameter name="gui_clock_name_string16" value="outclk16" />
- <parameter name="c_cnt_bypass_en14" value="true" />
- <parameter name="hp_actual_phase_shift_fp9" value="0.0" />
- <parameter name="gui_clock_name_string15" value="outclk15" />
- <parameter name="c_cnt_bypass_en13" value="true" />
- <parameter name="c_cnt_bypass_en16" value="true" />
- <parameter name="gui_clock_name_string17" value="outclk17" />
- <parameter name="c_cnt_bypass_en15" value="true" />
- <parameter name="gui_actual_phase_shift_deg4" value="0.0" />
- <parameter name="c_cnt_bypass_en10" value="true" />
- <parameter name="gui_actual_phase_shift_deg5" value="0.0" />
- <parameter name="prot_mode" value="BASIC" />
- <parameter name="gui_pll_cascading_mode" value="adjpllin" />
- <parameter name="gui_actual_phase_shift_deg6" value="0.0" />
- <parameter name="c_cnt_bypass_en12" value="true" />
- <parameter name="gui_actual_phase_shift_deg7" value="0.0" />
- <parameter name="c_cnt_bypass_en11" value="true" />
- <parameter name="hp_actual_phase_shift_fp0" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg0" value="0.0" />
- <parameter name="hp_actual_phase_shift_fp1" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg1" value="0.0" />
- <parameter name="hp_actual_phase_shift_fp2" value="0.0" />
- <parameter name="gui_clock_name_string10" value="outclk10" />
- <parameter name="gui_actual_phase_shift_deg2" value="0.0" />
- <parameter name="hp_actual_phase_shift_fp3" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg3" value="0.0" />
- <parameter name="hp_actual_phase_shift_fp4" value="0.0" />
- <parameter name="gui_parameter_table_hex_file" value="seq_params_sim.hex" />
- <parameter name="pll_fbclk_mux_2" value="pll_fbclk_mux_2_fb_1" />
- <parameter name="pll_fbclk_mux_1" value="pll_fbclk_mux_1_glb" />
- <parameter name="gui_new_mif_file_path" value="~/pll.mif" />
- <parameter name="gui_vco_frequency" value="600.0" />
- <parameter name="gui_ps_units10" value="ps" />
- <parameter name="gui_ps_units11" value="ps" />
- <parameter name="hp_actual_output_clock_frequency_fp17" value="100.0" />
- <parameter name="gui_ps_units16" value="ps" />
- <parameter name="hp_actual_output_clock_frequency_fp16" value="100.0" />
- <parameter name="gui_ps_units17" value="ps" />
- <parameter name="hp_actual_output_clock_frequency_fp15" value="100.0" />
- <parameter name="hp_actual_output_clock_frequency_fp14" value="100.0" />
- <parameter name="hp_actual_output_clock_frequency_fp13" value="100.0" />
- <parameter name="gui_ps_units12" value="ps" />
- <parameter name="gui_actual_phase_shift_deg8" value="0.0" />
- <parameter name="hp_actual_output_clock_frequency_fp12" value="100.0" />
- <parameter name="gui_ps_units13" value="ps" />
- <parameter name="gui_actual_phase_shift_deg9" value="0.0" />
- <parameter name="hp_actual_output_clock_frequency_fp11" value="100.0" />
- <parameter name="gui_ps_units14" value="ps" />
- <parameter name="hp_actual_output_clock_frequency_fp10" value="100.0" />
- <parameter name="gui_ps_units15" value="ps" />
- <parameter name="gui_mif_gen_options" value="Generate New MIF File" />
- <parameter name="c_cnt_prst6" value="1" />
- <parameter name="divide_factor7" value="1" />
- <parameter name="c_cnt_prst5" value="1" />
- <parameter name="divide_factor8" value="1" />
- <parameter name="c_cnt_prst8" value="1" />
- <parameter name="divide_factor5" value="1" />
- <parameter name="c_cnt_prst7" value="1" />
- <parameter name="divide_factor6" value="1" />
- <parameter name="c_cnt_prst9" value="1" />
- <parameter name="pll_extclk_0_cnt_src" value="pll_extclk_cnt_src_vss" />
- <parameter name="c_cnt_in_src9" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="c_cnt_in_src8" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_actual_output_clock_frequency_range10" value="100.0" />
- <parameter name="c_cnt_in_src5" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_duty_cycle9" value="50.0" />
- <parameter name="c_cnt_in_src4" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="c_cnt_in_src7" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="c_cnt_in_src6" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_actual_output_clock_frequency_range16" value="100.0" />
- <parameter name="gui_duty_cycle6" value="50.0" />
- <parameter name="c_cnt_in_src1" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_actual_output_clock_frequency_range15" value="100.0" />
- <parameter name="gui_duty_cycle5" value="50.0" />
- <parameter name="c_cnt_in_src0" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_duty_cycle8" value="50.0" />
- <parameter name="c_cnt_in_src3" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_actual_output_clock_frequency_range17" value="100.0" />
- <parameter name="gui_duty_cycle7" value="50.0" />
- <parameter name="c_cnt_in_src2" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_en_adv_params" value="false" />
- <parameter name="gui_actual_output_clock_frequency_range12" value="100.0" />
- <parameter name="gui_duty_cycle2" value="50.0" />
- <parameter name="gui_actual_output_clock_frequency_range11" value="100.0" />
- <parameter name="gui_duty_cycle1" value="50.0" />
- <parameter name="gui_actual_output_clock_frequency_range14" value="100.0" />
- <parameter name="gui_duty_cycle4" value="50.0" />
- <parameter name="gui_actual_output_clock_frequency_range13" value="100.0" />
- <parameter name="gui_duty_cycle3" value="50.0" />
- <parameter name="gui_use_NDFB_modes" value="false" />
- <parameter name="gui_duty_cycle0" value="50.0" />
- <parameter name="gui_lock_setting" value="Low Lock Time" />
- <parameter name="gui_dps_cntr" value="C0" />
- <parameter name="duty_cycle12" value="50" />
- <parameter name="duty_cycle13" value="50" />
- <parameter name="duty_cycle10" value="50" />
- <parameter name="duty_cycle11" value="50" />
- <parameter name="duty_cycle16" value="50" />
- <parameter name="duty_cycle17" value="50" />
- <parameter name="duty_cycle14" value="50" />
- <parameter name="duty_cycle15" value="50" />
- <parameter name="pll_vcoph_div" value="1" />
- <parameter name="gui_device_speed_grade" value="1" />
- <parameter name="gui_dps_num" value="1" />
- <parameter name="gui_actual_phase_shift_range6" value="0.0" />
- <parameter name="gui_actual_phase_shift_range5" value="0.0" />
- <parameter name="gui_actual_phase_shift_range4" value="0.0" />
- <parameter name="gui_actual_phase_shift_range3" value="0.0" />
- <parameter name="gui_actual_phase_shift_range2" value="0.0" />
- <parameter name="system_part_trait_speed_grade" value="1" />
- <parameter name="gui_feedback_clock" value="Global Clock" />
- <parameter
- name="gui_actual_phase_shift_range1"
- value="0.0,78.1,89.3,104.2,125.0,156.2" />
- <parameter
- name="gui_actual_phase_shift_range0"
- value="0.0,78.1,89.3,104.2,125.0,156.2" />
- <parameter name="gui_pll_m_cnt_in_src" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_mif_config_name" value="unnamed" />
- <parameter name="gui_actual_phase_shift_range9" value="0.0" />
- <parameter name="gui_actual_phase_shift_range8" value="0.0" />
- <parameter name="gui_actual_phase_shift_range7" value="0.0" />
- <parameter name="gui_phase_shift15" value="0.0" />
- <parameter name="gui_phase_shift16" value="0.0" />
- <parameter name="gui_phase_shift13" value="0.0" />
- <parameter name="gui_phase_shift14" value="0.0" />
- <parameter name="gui_phase_shift11" value="0.0" />
- <parameter name="gui_phase_shift12" value="0.0" />
- <parameter name="pll_fractional_cout" value="1" />
- <parameter name="gui_phase_shift10" value="0.0" />
- <parameter name="hp_number_of_family_allowable_clocks" value="9" />
- <parameter name="gui_actual_output_clock_frequency17" value="100.0" />
- <parameter name="gui_actual_duty_cycle0" value="50.0" />
- <parameter name="gui_actual_duty_cycle1" value="50.0" />
- <parameter name="gui_fix_vco_frequency" value="false" />
- <parameter name="gui_actual_duty_cycle6" value="50.0" />
- <parameter name="gui_actual_duty_cycle7" value="50.0" />
- <parameter name="gui_actual_duty_cycle8" value="50.0" />
- <parameter name="gui_actual_duty_cycle9" value="50.0" />
- <parameter name="gui_actual_duty_cycle2" value="50.0" />
- <parameter name="gui_actual_duty_cycle3" value="50.0" />
- <parameter name="gui_actual_duty_cycle4" value="50.0" />
- <parameter name="gui_actual_duty_cycle5" value="50.0" />
- <parameter name="pll_manu_clk_sw_en" value="false" />
- <parameter name="system_info_device_speed_grade" value="1" />
- <parameter name="gui_actual_output_clock_frequency12" value="100.0" />
- <parameter name="gui_actual_output_clock_frequency11" value="100.0" />
- <parameter name="gui_actual_output_clock_frequency10" value="100.0" />
- <parameter name="gui_actual_output_clock_frequency16" value="100.0" />
- <parameter name="gui_debug_mode" value="false" />
- <parameter name="gui_actual_output_clock_frequency15" value="100.0" />
- <parameter name="gui_actual_output_clock_frequency14" value="100.0" />
- <parameter name="gui_actual_output_clock_frequency13" value="100.0" />
- <parameter name="lock_mode" value="low_lock_time" />
- <parameter name="gui_phase_shift17" value="0.0" />
- <parameter name="c_cnt_prst0" value="1" />
- <parameter name="gui_device_component" value="10AX115U2F45E1SG" />
- <parameter name="c_cnt_prst2" value="1" />
- <parameter name="c_cnt_prst1" value="1" />
- <parameter name="c_cnt_prst4" value="1" />
- <parameter name="c_cnt_prst3" value="1" />
- <parameter name="gui_pll_auto_reset" value="false" />
- <parameter name="gui_divide_factor_c4" value="6" />
- <parameter name="phase_shift12" value="0 ps" />
- <parameter name="gui_divide_factor_c3" value="6" />
- <parameter name="phase_shift11" value="0 ps" />
- <parameter name="gui_divide_factor_c2" value="6" />
- <parameter name="n_cnt_lo_div" value="256" />
- <parameter name="phase_shift10" value="0 ps" />
- <parameter name="gui_divide_factor_c1" value="6" />
- <parameter name="gui_divide_factor_c0" value="6" />
- <parameter name="gui_operation_mode" value="source synchronous" />
- <parameter name="gui_frac_multiply_factor" value="1" />
- <parameter name="iossm_nios_sim_clk_period_ps" value="1333" />
- <parameter name="gui_skip_sdc_generation" value="false" />
- <parameter name="gui_clock_name_global" value="false" />
- <parameter name="gui_clock_to_compensate" value="0" />
- <parameter name="gui_divide_factor_c9" value="6" />
- <parameter name="pll_clk_sw_dly" value="0" />
- <parameter name="phase_shift17" value="0 ps" />
- <parameter name="gui_divide_factor_c8" value="6" />
- <parameter name="phase_shift16" value="0 ps" />
- <parameter name="gui_divide_factor_c7" value="6" />
- <parameter name="phase_shift15" value="0 ps" />
- <parameter name="gui_divide_factor_c6" value="6" />
- <parameter name="phase_shift14" value="0 ps" />
- <parameter name="gui_divide_factor_c5" value="6" />
- <parameter name="phase_shift13" value="0 ps" />
- <parameter name="gui_refclk1_frequency" value="100.0" />
- <parameter name="gui_enable_cascade_in" value="false" />
- <parameter name="gui_pll_mode" value="Integer-N PLL" />
- <parameter name="gui_ps_units7" value="ps" />
- <parameter name="gui_pll_freqcal_en" value="true" />
- <parameter name="gui_ps_units8" value="ps" />
- <parameter name="pll_tclk_mux_en" value="false" />
- <parameter name="gui_ps_units9" value="ps" />
- <parameter name="pll_slf_rst" value="false" />
- <parameter name="duty_cycle9" value="50" />
- <parameter name="gui_pll_bandwidth_preset" value="Low" />
- <parameter name="duty_cycle7" value="50" />
- <parameter name="duty_cycle8" value="50" />
- <parameter name="duty_cycle5" value="50" />
- <parameter name="duty_cycle6" value="50" />
- <parameter name="clock_name_global" value="false" />
- <parameter name="duty_cycle3" value="50" />
- <parameter name="duty_cycle4" value="50" />
- <parameter name="clock_to_compensate" value="0" />
- <parameter name="duty_cycle1" value="50" />
- <parameter name="duty_cycle2" value="50" />
- <parameter name="duty_cycle0" value="50" />
- <parameter name="m_cnt_lo_div" value="2" />
- <parameter name="gui_actual_phase_shift9" value="0.0" />
- <parameter name="gui_actual_phase_shift8" value="0.0" />
- <parameter name="gui_actual_phase_shift7" value="0.0" />
- <parameter name="pll_m_cnt_basic" value="1" />
- <parameter name="gui_actual_phase_shift6" value="0.0" />
- <parameter name="gui_actual_phase_shift5" value="0.0" />
- <parameter name="gui_actual_phase_shift4" value="0.0" />
- <parameter name="gui_actual_phase_shift3" value="0.0" />
- <parameter name="gui_actual_phase_shift2" value="0.0" />
- <parameter name="gui_actual_phase_shift1" value="0.0" />
- <parameter name="pll_clk_loss_sw_en" value="false" />
- <parameter name="gui_phout_division" value="1" />
- <parameter name="gui_ps_units3" value="ps" />
- <parameter name="gui_ps_units4" value="ps" />
- <parameter name="gui_ps_units5" value="ps" />
- <parameter name="cal_code_hex_file" value="iossm.hex" />
- <parameter name="gui_ps_units6" value="ps" />
- <parameter name="gui_ps_units0" value="ps" />
- <parameter name="gui_ps_units1" value="ps" />
- <parameter name="gui_ps_units2" value="ps" />
- <parameter name="gui_actual_output_clock_frequency5" value="100.0" />
- <parameter name="gui_actual_duty_cycle_range15" value="50.0" />
- <parameter name="use_core_refclk" value="false" />
- <parameter name="gui_actual_output_clock_frequency4" value="100.0" />
- <parameter name="gui_actual_duty_cycle_range16" value="50.0" />
- <parameter name="gui_use_locked" value="true" />
- <parameter name="gui_actual_output_clock_frequency3" value="100.0" />
- <parameter name="gui_actual_duty_cycle_range17" value="50.0" />
- <parameter name="gui_actual_output_clock_frequency2" value="100.0" />
- <parameter name="gui_en_reconf" value="false" />
- <parameter name="gui_actual_output_clock_frequency9" value="100.0" />
- <parameter name="gui_actual_duty_cycle_range11" value="50.0" />
- <parameter name="gui_actual_output_clock_frequency8" value="100.0" />
- <parameter name="gui_actual_duty_cycle_range12" value="50.0" />
- <parameter name="gui_actual_output_clock_frequency7" value="100.0" />
- <parameter name="gui_actual_duty_cycle_range13" value="50.0" />
- <parameter name="gui_actual_output_clock_frequency6" value="100.0" />
- <parameter name="gui_actual_duty_cycle_range14" value="50.0" />
- <parameter name="pll_type" value="Arria 10" />
- <parameter name="gui_actual_duty_cycle_range10" value="50.0" />
- <parameter name="gui_actual_output_clock_frequency1" value="200.0" />
- <parameter name="gui_actual_output_clock_frequency0" value="100.0" />
- <parameter name="gui_actual_phase_shift0" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg_range12" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg_range11" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg_range10" value="0.0" />
- <parameter name="pll_cal_done" value="false" />
- <parameter name="gui_actual_phase_shift_deg_range17" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg_range16" value="0.0" />
- <parameter name="pll_output_clk_frequency" value="800.0 MHz" />
- <parameter name="gui_actual_phase_shift_deg_range15" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg_range14" value="0.0" />
- <parameter name="gui_active_clk" value="false" />
- <parameter name="gui_actual_phase_shift_deg_range13" value="0.0" />
- <parameter name="c_cnt_lo_div14" value="1" />
- <parameter name="c_cnt_lo_div15" value="1" />
- <parameter name="c_cnt_lo_div12" value="1" />
- <parameter name="c_cnt_lo_div13" value="1" />
- <parameter name="gui_use_logical" value="false" />
- <parameter name="gui_phase_shift0" value="0.0" />
- <parameter name="c_cnt_lo_div16" value="1" />
- <parameter name="gui_phase_shift1" value="0.0" />
- <parameter name="c_cnt_lo_div17" value="1" />
- <parameter name="gui_phase_shift2" value="0.0" />
- <parameter name="gui_phase_shift3" value="0.0" />
- <parameter name="gui_phase_shift4" value="0.0" />
- <parameter name="gui_phase_shift5" value="0.0" />
- <parameter name="gui_phase_shift6" value="0.0" />
- <parameter name="c_cnt_lo_div10" value="1" />
- <parameter name="gui_phase_shift7" value="0.0" />
- <parameter name="c_cnt_lo_div11" value="1" />
- <parameter name="gui_phase_shift8" value="0.0" />
- <parameter name="gui_phase_shift9" value="0.0" />
- <parameter name="pll_fractional_division" value="1" />
- <parameter name="cal_error" value="cal_clean" />
- <parameter name="gui_cascade_counter15" value="false" />
- <parameter name="gui_cascade_counter14" value="false" />
- <parameter name="gui_cascade_counter17" value="false" />
- <parameter name="gui_cascade_counter16" value="false" />
- <parameter name="fractional_vco_multiplier" value="false" />
- <parameter name="gui_phase_shift_deg0" value="0.0" />
- <parameter name="gui_phase_shift_deg7" value="0.0" />
- <parameter name="gui_phase_shift_deg8" value="0.0" />
- <parameter name="gui_phase_shift_deg5" value="0.0" />
- <parameter name="gui_phase_shift_deg6" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg10" value="0.0" />
- <parameter name="gui_phase_shift_deg3" value="0.0" />
- <parameter name="gui_phase_shift_deg4" value="0.0" />
- <parameter name="gui_phase_shift_deg1" value="0.0" />
- <parameter name="gui_phase_shift_deg2" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg15" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg16" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg17" value="0.0" />
- <parameter name="gui_cascade_counter11" value="false" />
- <parameter name="gui_actual_phase_shift_deg11" value="0.0" />
- <parameter name="gui_cascade_counter10" value="false" />
- <parameter name="gui_actual_phase_shift_deg12" value="0.0" />
- <parameter name="gui_cascade_counter13" value="false" />
- <parameter name="gui_phase_shift_deg9" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg13" value="0.0" />
- <parameter name="gui_cascade_counter12" value="false" />
- <parameter name="gui_actual_phase_shift_deg14" value="0.0" />
- <parameter name="m_cnt_bypass_en" value="false" />
- <parameter name="divide_factor0" value="1" />
- <parameter name="gui_cal_converge" value="false" />
- <parameter name="divide_factor3" value="1" />
- <parameter name="divide_factor4" value="1" />
- <parameter name="divide_factor1" value="1" />
- <parameter name="divide_factor2" value="1" />
- <parameter name="pll_m_cnt" value="1" />
- <parameter name="gui_actual_phase_shift_deg_range5" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg_range4" value="0.0" />
- <parameter name="gui_actual_phase_shift_deg_range3" value="0.0" />
- <parameter name="parameter_table_hex_file" value="seq_params_sim.hex" />
- <parameter name="gui_actual_phase_shift_deg_range2" value="0.0" />
- <parameter
- name="gui_actual_phase_shift_deg_range1"
- value="0.0,5.6,6.4,7.5,9.0,11.2" />
- <parameter
- name="mifTable_names"
- value="The MIF file specified does not yet exist" />
- <parameter
- name="gui_actual_phase_shift_deg_range0"
- value="0.0,2.8,3.2,3.8,4.5,5.6" />
- <parameter name="gui_number_of_clocks" value="2" />
- <parameter name="gui_actual_phase_shift_deg_range9" value="0.0" />
- <parameter name="c_cnt_hi_div10" value="1" />
- <parameter name="gui_actual_phase_shift_deg_range8" value="0.0" />
- <parameter name="c_cnt_hi_div11" value="1" />
- <parameter name="gui_actual_phase_shift_deg_range7" value="0.0" />
- <parameter name="c_cnt_hi_div12" value="1" />
- <parameter name="gui_actual_phase_shift_deg_range6" value="0.0" />
- <parameter name="c_cnt_hi_div13" value="1" />
- <parameter name="c_cnt_hi_div14" value="1" />
- <parameter name="c_cnt_hi_div15" value="1" />
- <parameter name="gui_cascade_outclk_index" value="0" />
- <parameter name="c_cnt_hi_div16" value="1" />
- <parameter name="c_cnt_hi_div17" value="1" />
- <parameter name="gui_c_cnt_in_src8" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_c_cnt_in_src4" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_c_cnt_in_src5" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_c_cnt_in_src6" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_c_cnt_in_src7" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="pll_bw_sel" value="Low" />
- <parameter name="gui_c_cnt_in_src0" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_c_cnt_in_src1" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_c_cnt_in_src2" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_clk_bad" value="false" />
- <parameter name="gui_c_cnt_in_src3" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_output_clock_frequency0" value="100.0" />
- <parameter name="multiply_factor" value="4" />
- <parameter name="gui_actual_phase_shift_range15" value="0.0" />
- <parameter name="output_clock_frequency10" value="0 MHz" />
- <parameter name="gui_actual_phase_shift_range14" value="0.0" />
- <parameter name="output_clock_frequency11" value="0 MHz" />
- <parameter name="gui_actual_phase_shift_range13" value="0.0" />
- <parameter name="pll_bwctrl" value="pll_bw_res_setting2" />
- <parameter name="output_clock_frequency12" value="0 MHz" />
- <parameter name="gui_actual_phase_shift_range12" value="0.0" />
- <parameter name="output_clock_frequency13" value="0 MHz" />
- <parameter name="mimic_fbclk_type" value="gclk" />
- <parameter name="gui_actual_phase_shift_range17" value="0.0" />
- <parameter name="pll_clkin_0_src" value="clk_0" />
- <parameter name="gui_actual_phase_shift_range16" value="0.0" />
- <parameter name="gui_multiply_factor" value="6" />
- <parameter name="gui_actual_phase_shift_range11" value="0.0" />
- <parameter name="output_clock_frequency14" value="0 MHz" />
- <parameter name="gui_actual_phase_shift_range10" value="0.0" />
- <parameter name="output_clock_frequency15" value="0 MHz" />
- <parameter name="output_clock_frequency16" value="0 MHz" />
- <parameter name="gui_prot_mode" value="UNUSED" />
- <parameter name="output_clock_frequency17" value="0 MHz" />
- <parameter name="gui_device_family" value="Arria 10" />
- <parameter name="n_cnt_bypass_en" value="true" />
- <parameter name="gui_actual_duty_cycle17" value="50.0" />
- <parameter name="gui_fixed_vco_frequency" value="600.0" />
- <parameter name="gui_divide_factor_c14" value="6" />
- <parameter name="gui_divide_factor_c15" value="6" />
- <parameter name="gui_divide_factor_c16" value="6" />
- <parameter name="m_cnt_odd_div_duty_en" value="false" />
- <parameter name="gui_divide_factor_c17" value="6" />
- <parameter
- name="hp_parameter_update_message"
- value="{altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_family }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_component }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_device_speed_grade }} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_dps_cntr}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_extclkout_source}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_cascade_outclk_index}} {altera_iopll::util::pll_send_message DEBUG { -- in update gui_clock_to_compensate}} {altera_iopll::util::pll_send_message DEBUG { -- in update_gui_pll_bandwidth_preset}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_vco_frequency}} {altera_iopll::util::pll_send_message DEBUG { -- Updating all outclk values in order, starting with freq 0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle0}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle1}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle2}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle3}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle4}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle5}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle6}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle7}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_output_clock_frequency8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_phase_shift8}} {altera_iopll::util::pll_send_message DEBUG {-- in update gui_actual_duty_cycle8}}" />
- <parameter name="gui_output_clock_frequency9" value="100.0" />
- <parameter name="gui_output_clock_frequency7" value="100.0" />
- <parameter name="gui_actual_duty_cycle10" value="50.0" />
- <parameter name="gui_output_clock_frequency8" value="100.0" />
- <parameter name="gui_output_clock_frequency5" value="100.0" />
- <parameter name="gui_actual_duty_cycle12" value="50.0" />
- <parameter name="pll_tclk_sel" value="pll_tclk_m_src" />
- <parameter name="gui_output_clock_frequency6" value="100.0" />
- <parameter name="gui_actual_duty_cycle11" value="50.0" />
- <parameter name="gui_divide_factor_c10" value="6" />
- <parameter name="gui_output_clock_frequency3" value="100.0" />
- <parameter name="gui_actual_duty_cycle14" value="50.0" />
- <parameter name="gui_divide_factor_c11" value="6" />
- <parameter name="gui_output_clock_frequency4" value="100.0" />
- <parameter name="gui_actual_duty_cycle13" value="50.0" />
- <parameter name="gui_divide_factor_c12" value="6" />
- <parameter name="gui_output_clock_frequency1" value="200.0" />
- <parameter name="gui_actual_duty_cycle16" value="50.0" />
- <parameter name="gui_divide_factor_c13" value="6" />
- <parameter name="gui_output_clock_frequency2" value="100.0" />
- <parameter name="gui_actual_duty_cycle15" value="50.0" />
- <parameter name="gui_en_phout_ports" value="false" />
- <parameter name="hp_actual_duty_cycle_fp17" value="50.0" />
- <parameter name="hp_actual_duty_cycle_fp14" value="50.0" />
- <parameter name="hp_actual_duty_cycle_fp13" value="50.0" />
- <parameter name="hp_actual_duty_cycle_fp16" value="50.0" />
- <parameter name="hp_actual_duty_cycle_fp15" value="50.0" />
- <parameter name="hp_actual_duty_cycle_fp10" value="50.0" />
- <parameter name="gui_enable_output_counter_cascading" value="false" />
- <parameter name="hp_actual_duty_cycle_fp12" value="50.0" />
- <parameter name="hp_actual_duty_cycle_fp11" value="50.0" />
- <parameter name="hp_actual_output_clock_frequency_fp7" value="100.0" />
- <parameter name="hp_actual_output_clock_frequency_fp6" value="100.0" />
- <parameter name="hp_actual_output_clock_frequency_fp9" value="100.0" />
- <parameter name="hp_actual_output_clock_frequency_fp8" value="100.0" />
- <parameter name="gui_refclk_switch" value="false" />
- <parameter name="hp_actual_output_clock_frequency_fp3" value="100.0" />
- <parameter name="hp_actual_output_clock_frequency_fp2" value="100.0" />
- <parameter name="hp_actual_output_clock_frequency_fp5" value="100.0" />
- <parameter name="gui_pll_cal_done" value="false" />
- <parameter name="hp_actual_output_clock_frequency_fp4" value="100.0" />
- <parameter name="hp_actual_output_clock_frequency_fp1" value="200.0" />
- <parameter name="hp_actual_output_clock_frequency_fp0" value="100.0" />
- <parameter name="pll_defer_cal_user_mode" value="true" />
- <parameter name="gui_extclkout_0_source" value="C0" />
- <parameter name="gui_actual_output_clock_frequency_range4" value="100.0" />
- <parameter name="system_info_device_component" value="10AX115U2F45E1SG" />
- <parameter name="gui_actual_output_clock_frequency_range5" value="100.0" />
- <parameter name="gui_actual_output_clock_frequency_range6" value="100.0" />
- <parameter name="gui_actual_output_clock_frequency_range7" value="100.0" />
- <parameter name="refclk1_frequency" value="100.0 MHz" />
- <parameter
- name="gui_actual_output_clock_frequency_range0"
- value="99.595142,99.607843,99.649123,100.0,100.350877,100.392157" />
- <parameter
- name="gui_actual_output_clock_frequency_range1"
- value="183.333333,185.714286,187.5,200.0,214.285714,216.666667" />
- <parameter name="gui_actual_output_clock_frequency_range2" value="100.0" />
- <parameter name="gui_actual_output_clock_frequency_range3" value="100.0" />
- <parameter name="gui_actual_output_clock_frequency_range8" value="100.0" />
- <parameter name="clock_name_1" value="frame_clk" />
- <parameter name="gui_actual_output_clock_frequency_range9" value="100.0" />
- <parameter name="clock_name_2" value="" />
- <parameter name="clock_name_0" value="link_clk" />
- <parameter name="reference_clock_frequency" value="200.0 MHz" />
- <parameter name="pll_ripplecap_ctrl" value="" />
- <parameter name="clock_name_5" value="" />
- <parameter name="clock_name_6" value="" />
- <parameter name="clock_name_3" value="" />
- <parameter name="clock_name_4" value="" />
- <parameter name="clock_name_7" value="" />
- <parameter name="clock_name_8" value="" />
- <parameter name="pll_m_cnt_in_src" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_divide_factor_n" value="1" />
- <parameter name="gui_en_extclkout_ports" value="false" />
- <parameter name="gui_output_clock_frequency12" value="100.0" />
- <parameter name="gui_en_lvds_ports" value="Disabled" />
- <parameter name="gui_output_clock_frequency13" value="100.0" />
- <parameter name="gui_existing_mif_file_path" value="~/pll.mif" />
- <parameter name="gui_output_clock_frequency10" value="100.0" />
- <parameter name="gui_output_clock_frequency11" value="100.0" />
- <parameter name="gui_output_clock_frequency16" value="100.0" />
- <parameter name="gui_output_clock_frequency17" value="100.0" />
- <parameter name="gui_output_clock_frequency14" value="100.0" />
- <parameter name="gui_output_clock_frequency15" value="100.0" />
- <parameter name="mifTable_values" value="" />
- <parameter name="c_cnt_hi_div0" value="4" />
- <parameter name="clock_name_global_0" value="false" />
- <parameter name="c_cnt_hi_div1" value="2" />
- <parameter name="c_cnt_hi_div2" value="256" />
- <parameter name="c_cnt_hi_div3" value="256" />
- <parameter name="c_cnt_hi_div4" value="256" />
- <parameter name="clock_name_global_5" value="false" />
- <parameter
- name="parameterTable_names"
- value="M-Counter Divide Setting,N-Counter Divide Setting,VCO Frequency,C-Counter-0 Divide Setting,C-Counter-1 Divide Setting,C-Counter-2 Divide Setting,C-Counter-3 Divide Setting,C-Counter-4 Divide Setting,C-Counter-5 Divide Setting,C-Counter-6 Divide Setting,C-Counter-7 Divide Setting,C-Counter-8 Divide Setting,PLL Auto Reset,M-Counter Hi Divide,M-Counter Lo Divide,M-Counter Even Duty Enable,M-Counter Bypass Enable,N-Counter Hi Divide,N-Counter Lo Divide,N-Counter Even Duty Enable,N-Counter Bypass Enable,C-Counter-0 Hi Divide,C-Counter-1 Hi Divide,C-Counter-2 Hi Divide,C-Counter-3 Hi Divide,C-Counter-4 Hi Divide,C-Counter-5 Hi Divide,C-Counter-6 Hi Divide,C-Counter-7 Hi Divide,C-Counter-8 Hi Divide,C-Counter-0 Lo Divide,C-Counter-1 Lo Divide,C-Counter-2 Lo Divide,C-Counter-3 Lo Divide,C-Counter-4 Lo Divide,C-Counter-5 Lo Divide,C-Counter-6 Lo Divide,C-Counter-7 Lo Divide,C-Counter-8 Lo Divide,C-Counter-0 Even Duty Enable,C-Counter-1 Even Duty Enable,C-Counter-2 Even Duty Enable,C-Counter-3 Even Duty Enable,C-Counter-4 Even Duty Enable,C-Counter-5 Even Duty Enable,C-Counter-6 Even Duty Enable,C-Counter-7 Even Duty Enable,C-Counter-8 Even Duty Enable,C-Counter-0 Bypass Enable,C-Counter-1 Bypass Enable,C-Counter-2 Bypass Enable,C-Counter-3 Bypass Enable,C-Counter-4 Bypass Enable,C-Counter-5 Bypass Enable,C-Counter-6 Bypass Enable,C-Counter-7 Bypass Enable,C-Counter-8 Bypass Enable,C-Counter-0 Preset,C-Counter-1 Preset,C-Counter-2 Preset,C-Counter-3 Preset,C-Counter-4 Preset,C-Counter-5 Preset,C-Counter-6 Preset,C-Counter-7 Preset,C-Counter-8 Preset,C-Counter-0 Phase Mux Preset,C-Counter-1 Phase Mux Preset,C-Counter-2 Phase Mux Preset,C-Counter-3 Phase Mux Preset,C-Counter-4 Phase Mux Preset,C-Counter-5 Phase Mux Preset,C-Counter-6 Phase Mux Preset,C-Counter-7 Phase Mux Preset,C-Counter-8 Phase Mux Preset,Charge Pump Current,Bandwidth Control" />
- <parameter name="clock_name_global_6" value="false" />
- <parameter name="clock_name_global_7" value="false" />
- <parameter name="clock_name_global_8" value="false" />
- <parameter name="clock_name_global_1" value="false" />
- <parameter name="clock_name_global_2" value="false" />
- <parameter name="clock_name_global_3" value="false" />
- <parameter name="m_cnt_hi_div" value="2" />
- <parameter name="clock_name_global_4" value="false" />
- <parameter name="c_cnt_hi_div5" value="256" />
- <parameter name="c_cnt_hi_div6" value="256" />
- <parameter name="c_cnt_hi_div7" value="256" />
- <parameter name="n_cnt_odd_div_duty_en" value="false" />
- <parameter name="c_cnt_hi_div8" value="256" />
- <parameter name="c_cnt_hi_div9" value="1" />
- <parameter name="c_cnt_ph_mux_prst8" value="0" />
- <parameter name="c_cnt_ph_mux_prst7" value="0" />
- <parameter name="c_cnt_ph_mux_prst9" value="0" />
- <parameter name="c_cnt_ph_mux_prst0" value="0" />
- <parameter name="c_cnt_ph_mux_prst2" value="0" />
- <parameter name="c_cnt_ph_mux_prst1" value="0" />
- <parameter name="c_cnt_ph_mux_prst4" value="0" />
- <parameter name="c_cnt_ph_mux_prst3" value="0" />
- <parameter name="c_cnt_ph_mux_prst6" value="0" />
- <parameter name="c_cnt_ph_mux_prst5" value="0" />
- <parameter name="gui_en_dps_ports" value="false" />
- <parameter name="system_info_device_family" value="Arria 10" />
- <parameter name="gui_switchover_mode" value="Automatic Switchover" />
- <parameter name="eff_m_cnt" value="1" />
- <parameter name="gui_extclkout_1_source" value="C0" />
- <parameter name="pll_auto_clk_sw_en" value="false" />
- <parameter name="pll_subtype" value="General" />
- <parameter name="gui_enable_cascade_out" value="false" />
- <parameter name="c_cnt_in_src17" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="c_cnt_in_src16" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="c_cnt_in_src15" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_phase_shift_deg10" value="0.0" />
- <parameter name="gui_phase_shift_deg11" value="0.0" />
- <parameter name="gui_phase_shift_deg12" value="0.0" />
- <parameter name="gui_phase_shift_deg13" value="0.0" />
- <parameter name="gui_phase_shift_deg14" value="0.0" />
- <parameter name="gui_phase_shift_deg15" value="0.0" />
- <parameter name="hp_actual_vco_frequency_fp" value="600.0" />
- <parameter name="gui_phase_shift_deg16" value="0.0" />
- <parameter name="gui_phase_shift_deg17" value="0.0" />
- <parameter name="pll_lock_fltr_cfg" value="100" />
- <parameter name="c_cnt_odd_div_duty_en0" value="false" />
- <parameter name="pll_freqcal_req_flag" value="true" />
- <parameter name="c_cnt_odd_div_duty_en1" value="false" />
- <parameter name="c_cnt_in_src14" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="c_cnt_in_src13" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="pll_freqcal_en" value="true" />
- <parameter name="c_cnt_in_src12" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="c_cnt_in_src11" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_pll_tclk_sel" value="pll_tclk_m_src" />
- <parameter name="c_cnt_in_src10" value="c_m_cnt_in_src_ph_mux_clk" />
- <parameter name="gui_use_coreclk" value="false" />
- <parameter name="gui_pll_tclk_mux_en" value="false" />
- <parameter name="gui_include_iossm" value="false" />
- <parameter name="pll_vco_div" value="1" />
- <parameter name="c_cnt_odd_div_duty_en2" value="false" />
- <parameter name="c_cnt_odd_div_duty_en3" value="false" />
- <parameter name="c_cnt_odd_div_duty_en4" value="false" />
- <parameter name="gui_dsm_out_sel" value="1st_order" />
- <parameter name="c_cnt_odd_div_duty_en5" value="false" />
- <parameter name="pll_unlock_fltr_cfg" value="2" />
- <parameter name="c_cnt_odd_div_duty_en6" value="false" />
- <parameter name="c_cnt_odd_div_duty_en7" value="false" />
- <parameter name="c_cnt_odd_div_duty_en8" value="false" />
- <parameter name="gui_cal_code_hex_file" value="iossm.hex" />
- <parameter name="c_cnt_odd_div_duty_en9" value="false" />
- <parameter name="gui_pll_freqcal_req_flag" value="true" />
- <parameter name="c_cnt_prst13" value="1" />
- <parameter name="c_cnt_prst12" value="1" />
- <parameter name="c_cnt_prst11" value="1" />
- <parameter name="c_cnt_prst10" value="1" />
- <parameter name="gui_pll_type" value="S10_Simple" />
- <parameter name="c_cnt_prst17" value="1" />
- <parameter name="c_cnt_prst16" value="1" />
- <parameter name="pll_dsm_out_sel" value="1st_order" />
- <parameter name="c_cnt_prst15" value="1" />
- <parameter name="gui_enable_permit_cal" value="false" />
- <parameter name="c_cnt_prst14" value="1" />
- <parameter name="gui_pll_vco_freq_band_0" value="pll_freq_clk0_disabled" />
- <parameter name="c_cnt_lo_div9" value="1" />
- <parameter name="c_cnt_lo_div7" value="256" />
- <parameter name="gui_pll_vco_freq_band_1" value="pll_freq_clk1_disabled" />
- <parameter name="c_cnt_lo_div8" value="256" />
- <parameter name="c_cnt_lo_div5" value="256" />
- <parameter name="pll_vco_freq_band_1" value="pll_freq_clk1_disabled" />
- <parameter name="hp_actual_phase_shift_fp14" value="0.0" />
- <parameter name="c_cnt_lo_div6" value="256" />
- <parameter name="hp_actual_phase_shift_fp15" value="0.0" />
- <parameter name="c_cnt_lo_div3" value="256" />
- <parameter name="hp_actual_phase_shift_fp16" value="0.0" />
- <parameter name="c_cnt_lo_div4" value="256" />
- <parameter name="pll_vco_freq_band_0" value="pll_freq_clk0_disabled" />
- <parameter name="hp_actual_phase_shift_fp17" value="0.0" />
- <parameter name="c_cnt_lo_div1" value="2" />
- <parameter name="c_cnt_lo_div2" value="256" />
- <parameter name="c_cnt_lo_div0" value="4" />
- <parameter name="hp_actual_phase_shift_fp10" value="0.0" />
- <parameter name="hp_actual_phase_shift_fp11" value="0.0" />
- <parameter name="hp_actual_phase_shift_fp12" value="0.0" />
- <parameter
- name="parameterTable_values"
- value="4,1,800.0 MHz,8,4,1,1,1,1,1,1,1,false,2,2,false,false,256,256,false,true,4,2,256,256,256,256,256,256,256,4,2,256,256,256,256,256,256,256,false,false,false,false,false,false,false,false,false,false,false,true,true,true,true,true,true,true,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,pll_cp_setting10,pll_bw_res_setting2" />
- <parameter name="hp_actual_phase_shift_fp13" value="0.0" />
- <parameter name="pll_cp_current" value="pll_cp_setting10" />
- <parameter name="gui_usr_device_speed_grade" value="1" />
- <parameter name="gui_duty_cycle11" value="50.0" />
- <parameter name="dprio_interface_sel" value="3" />
- <parameter name="gui_duty_cycle10" value="50.0" />
- <parameter name="gui_duty_cycle13" value="50.0" />
- <parameter name="gui_duty_cycle12" value="50.0" />
- <parameter name="number_of_outclks" value="2" />
- <parameter name="gui_duty_cycle15" value="50.0" />
- <parameter name="gui_dps_dir" value="Positive" />
- <parameter name="gui_duty_cycle14" value="50.0" />
- <parameter name="gui_duty_cycle17" value="50.0" />
- <parameter name="gui_duty_cycle16" value="50.0" />
- <parameter name="gui_actual_phase_shift16" value="0.0" />
- <parameter name="hp_actual_duty_cycle_fp0" value="50.0" />
- <parameter name="gui_actual_phase_shift17" value="0.0" />
- <parameter name="include_iossm" value="false" />
- <parameter name="hp_actual_duty_cycle_fp1" value="50.0" />
- <parameter name="gui_actual_phase_shift14" value="0.0" />
- <parameter name="gui_actual_phase_shift15" value="0.0" />
- <parameter name="gui_actual_phase_shift12" value="0.0" />
- <parameter name="gui_enable_mif_dps" value="false" />
- <parameter name="gui_actual_phase_shift13" value="0.0" />
- <parameter name="gui_actual_phase_shift10" value="0.0" />
- <parameter name="gui_actual_phase_shift11" value="0.0" />
- <parameter name="hp_actual_duty_cycle_fp8" value="50.0" />
- <parameter name="pll_clkin_1_src" value="clk_0" />
- <parameter name="hp_actual_duty_cycle_fp9" value="50.0" />
- <parameter name="hp_actual_duty_cycle_fp6" value="50.0" />
- <parameter name="hp_actual_duty_cycle_fp7" value="50.0" />
- <parameter name="gui_refclk_might_change" value="false" />
- <parameter name="hp_actual_duty_cycle_fp4" value="50.0" />
- <parameter name="pll_extclk_1_cnt_src" value="pll_extclk_cnt_src_vss" />
- <parameter name="hp_actual_duty_cycle_fp5" value="50.0" />
- <parameter name="hp_actual_duty_cycle_fp2" value="50.0" />
- <parameter name="hp_actual_duty_cycle_fp3" value="50.0" />
- <parameter name="hp_previous_num_clocks" value="1" />
- <parameter name="gui_cal_error" value="cal_clean" />
- <parameter name="c_cnt_ph_mux_prst17" value="0" />
- <parameter name="phase_shift1" value="0 ps" />
- <parameter name="c_cnt_ph_mux_prst16" value="0" />
- <parameter name="phase_shift0" value="0 ps" />
- <parameter name="c_cnt_ph_mux_prst15" value="0" />
- <parameter name="phase_shift3" value="0 ps" />
- <parameter name="c_cnt_ph_mux_prst14" value="0" />
- <parameter name="phase_shift2" value="0 ps" />
- <parameter name="c_cnt_ph_mux_prst13" value="0" />
- <parameter name="phase_shift5" value="0 ps" />
- <parameter name="c_cnt_ph_mux_prst12" value="0" />
- <parameter name="phase_shift4" value="0 ps" />
- <parameter name="c_cnt_ph_mux_prst11" value="0" />
- <parameter name="phase_shift7" value="0 ps" />
- <parameter name="c_cnt_ph_mux_prst10" value="0" />
- <parameter name="phase_shift6" value="0 ps" />
- <parameter name="phase_shift9" value="0 ps" />
- <parameter name="phase_shift8" value="0 ps" />
- <parameter name="number_of_clocks" value="2" />
- <parameter name="n_cnt_hi_div" value="256" />
- <parameter name="gui_actual_duty_cycle_range2" value="50.0" />
- <parameter name="gui_actual_duty_cycle_range3" value="50.0" />
- <parameter
- name="gui_actual_duty_cycle_range0"
- value="45.83,46.43,46.88,50.0,53.12,53.57" />
- <parameter
- name="gui_actual_duty_cycle_range1"
- value="41.67,42.86,43.75,50.0,56.25,57.14" />
- <parameter name="hp_qsys_scripting_mode" value="false" />
- <parameter name="gui_actual_duty_cycle_range6" value="50.0" />
- <parameter name="gui_actual_duty_cycle_range7" value="50.0" />
- <parameter name="gui_actual_duty_cycle_range4" value="50.0" />
- <parameter name="gui_switchover_delay" value="0" />
- <parameter name="gui_actual_duty_cycle_range5" value="50.0" />
- <parameter name="gui_clock_name_string9" value="outclk9" />
- <parameter name="gui_clock_name_string8" value="outclk8" />
- <parameter name="gui_actual_duty_cycle_range8" value="50.0" />
- <parameter name="gui_actual_duty_cycle_range9" value="50.0" />
- <parameter name="cal_converge" value="false" />
- <parameter name="gui_clock_name_string1" value="frame_clk" />
- <parameter name="gui_clock_name_string0" value="link_clk" />
- <parameter name="gui_clock_name_string3" value="outclk3" />
- <parameter name="gui_clock_name_string2" value="outclk2" />
- <parameter name="gui_clock_name_string5" value="outclk5" />
- <parameter name="gui_clock_name_string4" value="outclk4" />
- <parameter name="gui_clock_name_string7" value="outclk7" />
- <parameter name="gui_clock_name_string6" value="outclk6" />
- <parameter name="gui_cascade_counter8" value="false" />
- <parameter name="output_clock_frequency7" value="0 ps" />
- <parameter name="gui_cascade_counter7" value="false" />
- <parameter name="output_clock_frequency8" value="0 ps" />
- <parameter name="gui_cascade_counter6" value="false" />
- <parameter name="output_clock_frequency5" value="0 ps" />
- <parameter name="gui_cascade_counter5" value="false" />
- <parameter name="output_clock_frequency6" value="0 ps" />
- <parameter name="output_clock_frequency9" value="0 MHz" />
- <parameter name="gui_cascade_counter9" value="false" />
- <parameter name="c_cnt_odd_div_duty_en17" value="false" />
- <parameter name="gui_cascade_counter0" value="false" />
- <parameter name="operation_mode" value="source_synchronous" />
- <parameter name="c_cnt_odd_div_duty_en16" value="false" />
- <parameter name="c_cnt_odd_div_duty_en15" value="false" />
- <parameter name="output_clock_frequency0" value="100.000000 MHz" />
- <parameter name="c_cnt_odd_div_duty_en14" value="false" />
- <parameter name="c_cnt_odd_div_duty_en13" value="false" />
- <parameter name="gui_cascade_counter4" value="false" />
- <parameter name="c_cnt_odd_div_duty_en12" value="false" />
- <parameter name="output_clock_frequency3" value="0 ps" />
- <parameter name="gui_cascade_counter3" value="false" />
- <parameter name="c_cnt_odd_div_duty_en11" value="false" />
- <parameter name="output_clock_frequency4" value="0 ps" />
- <parameter name="gui_cascade_counter2" value="false" />
- <parameter name="c_cnt_odd_div_duty_en10" value="false" />
- <parameter name="output_clock_frequency1" value="200.000000 MHz" />
- <parameter name="gui_cascade_counter1" value="false" />
- <parameter name="output_clock_frequency2" value="0 ps" />
- <parameter name="c_cnt_bypass_en6" value="true" />
- <parameter name="c_cnt_bypass_en7" value="true" />
- <parameter name="c_cnt_bypass_en8" value="true" />
- <parameter name="c_cnt_bypass_en9" value="true" />
- <parameter name="gui_fractional_cout" value="32" />
- <parameter name="c_cnt_bypass_en0" value="false" />
- <parameter name="c_cnt_bypass_en1" value="false" />
- <parameter name="c_cnt_bypass_en2" value="true" />
- <parameter name="gui_reference_clock_frequency" value="200.0" />
- <parameter name="c_cnt_bypass_en3" value="true" />
- <parameter name="c_cnt_bypass_en4" value="true" />
- <parameter name="c_cnt_bypass_en5" value="true" />
- <generatedFiles>
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/altera_iopll_180/synth/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.v"
- attributes="" />
- </generatedFiles>
- <childGeneratedFiles>
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/altera_iopll_180/synth/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.v"
- attributes="" />
- </childGeneratedFiles>
- <sourceFiles>
- <file
- path="/home/software/Altera/18.0/ip/altera/altera_iopll/top/altera_iopll_hw.tcl" />
- </sourceFiles>
- <childSourceFiles/>
- <instantiator instantiator="ip_arria10_e1sg_jesd204b_rx_core_pll" as="core_pll" />
- <messages>
- <message level="Info" culprit="ip_arria10_e1sg_jesd204b_rx_core_pll">"Generating: ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama"</message>
- <message level="Debug" culprit="core_pll">IN HDL WRAP: reset refclk locked outclk0 outclk1</message>
- <message level="Debug" culprit="core_pll">--hdl_params: c_cnt_bypass_en0 c_cnt_bypass_en1 c_cnt_bypass_en2 c_cnt_bypass_en3 c_cnt_bypass_en4 c_cnt_bypass_en5 c_cnt_bypass_en6 c_cnt_bypass_en7 c_cnt_bypass_en8 c_cnt_hi_div0 c_cnt_hi_div1 c_cnt_hi_div2 c_cnt_hi_div3 c_cnt_hi_div4 c_cnt_hi_div5 c_cnt_hi_div6 c_cnt_hi_div7 c_cnt_hi_div8 c_cnt_in_src0 c_cnt_in_src1 c_cnt_in_src2 c_cnt_in_src3 c_cnt_in_src4 c_cnt_in_src5 c_cnt_in_src6 c_cnt_in_src7 c_cnt_in_src8 c_cnt_lo_div0 c_cnt_lo_div1 c_cnt_lo_div2 c_cnt_lo_div3 c_cnt_lo_div4 c_cnt_lo_div5 c_cnt_lo_div6 c_cnt_lo_div7 c_cnt_lo_div8 c_cnt_odd_div_duty_en0 c_cnt_odd_div_duty_en1 c_cnt_odd_div_duty_en2 c_cnt_odd_div_duty_en3 c_cnt_odd_div_duty_en4 c_cnt_odd_div_duty_en5 c_cnt_odd_div_duty_en6 c_cnt_odd_div_duty_en7 c_cnt_odd_div_duty_en8 c_cnt_ph_mux_prst0 c_cnt_ph_mux_prst1 c_cnt_ph_mux_prst2 c_cnt_ph_mux_prst3 c_cnt_ph_mux_prst4 c_cnt_ph_mux_prst5 c_cnt_ph_mux_prst6 c_cnt_ph_mux_prst7 c_cnt_ph_mux_prst8 c_cnt_prst0 c_cnt_prst1 c_cnt_prst2 c_cnt_prst3 c_cnt_prst4 c_cnt_prst5 c_cnt_prst6 c_cnt_prst7 c_cnt_prst8 clock_name_0 clock_name_1 clock_name_2 clock_name_3 clock_name_4 clock_name_5 clock_name_6 clock_name_7 clock_name_8 clock_name_global_0 clock_name_global_1 clock_name_global_2 clock_name_global_3 clock_name_global_4 clock_name_global_5 clock_name_global_6 clock_name_global_7 clock_name_global_8 duty_cycle0 duty_cycle1 duty_cycle2 duty_cycle3 duty_cycle4 duty_cycle5 duty_cycle6 duty_cycle7 duty_cycle8 m_cnt_bypass_en m_cnt_hi_div m_cnt_lo_div m_cnt_odd_div_duty_en n_cnt_bypass_en n_cnt_hi_div n_cnt_lo_div n_cnt_odd_div_duty_en number_of_clocks operation_mode output_clock_frequency0 output_clock_frequency1 output_clock_frequency2 output_clock_frequency3 output_clock_frequency4 output_clock_frequency5 output_clock_frequency6 output_clock_frequency7 output_clock_frequency8 phase_shift0 phase_shift1 phase_shift2 phase_shift3 phase_shift4 phase_shift5 phase_shift6 phase_shift7 phase_shift8 pll_bw_sel pll_bwctrl pll_cp_current pll_extclk_0_cnt_src pll_extclk_1_cnt_src pll_fbclk_mux_1 pll_fbclk_mux_2 pll_m_cnt_in_src pll_output_clk_frequency pll_slf_rst pll_subtype pll_type prot_mode reference_clock_frequency</message>
- <message level="Debug" culprit="core_pll">altera_pll_ports ports: refclk1 {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} rst {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} fbclk {DIRECT_MAPPING false MAPPING_FUNCTION map_fbclk_port TIE_OFF {}} fboutclk {DIRECT_MAPPING false MAPPING_FUNCTION map_fboutclk_port TIE_OFF {}} zdbfbclk {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} locked {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} loaden {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} phase_done {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} reconfig_to_pll {DIRECT_MAPPING false MAPPING_FUNCTION map_reconfig_to_port TIE_OFF {}} refclk {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} scanclk {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} phout {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} num_phase_shifts {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 3'b0} cntsel {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 5'b0} clkbad {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} extclk_out {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} lvds_clk {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} outclk {DIRECT_MAPPING false MAPPING_FUNCTION map_outclk_port TIE_OFF {}} phase_en {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} extswitch {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} cascade_out {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} activeclk {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }} adjpllin {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} updn {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF 1'b0} reconfig_from_pll {DIRECT_MAPPING true MAPPING_FUNCTION {} TIE_OFF { }}</message>
- <message level="Debug" culprit="core_pll">module ports: rst refclk locked outclk_0 outclk_1</message>
- </messages>
- </entity>
-</deploy>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_bb.v b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_bb.v
deleted file mode 100644
index 4c67163374202a83a0ce4b9f3dd9ae4b88a5c85e..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_bb.v
+++ /dev/null
@@ -1,9 +0,0 @@
-module ip_arria10_e1sg_jesd204b_rx_core_pll (
- output wire locked, // locked.export
- output wire outclk_0, // outclk0.clk
- output wire outclk_1, // outclk1.clk
- input wire refclk, // refclk.clk
- input wire rst // reset.reset
- );
-endmodule
-
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_generation.rpt b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_generation.rpt
deleted file mode 100644
index 1175dccbc652ef465aa8bc8f41c083d41fbc7a13..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_generation.rpt
+++ /dev/null
@@ -1,19 +0,0 @@
-Info: Generated by version: 18.0 build 219
-Info: Starting: Create simulation model
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.ip --simulation=VHDL --allow-mixed-language-simulation --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll --family="Arria 10" --part=10AX115U2F45E1SG
-Info: ip_arria10_e1sg_jesd204b_rx_core_pll.core_pll: Able to implement PLL with user settings
-Info: Skipping generation of ip_arria10_e1sg_jesd204b_rx_core_pll: files already generated.
-Info: qsys-generate succeeded.
-Info: Finished: Create simulation model
-Info: Starting: Create block symbol file (.bsf)
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.ip --block-symbol-file --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll --family="Arria 10" --part=10AX115U2F45E1SG
-Info: ip_arria10_e1sg_jesd204b_rx_core_pll.core_pll: Able to implement PLL with user settings
-Info: qsys-generate succeeded.
-Info: Finished: Create block symbol file (.bsf)
-Info:
-Info: Starting: Create HDL design files for synthesis
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.ip --synthesis=VHDL --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll --family="Arria 10" --part=10AX115U2F45E1SG
-Info: ip_arria10_e1sg_jesd204b_rx_core_pll.core_pll: Able to implement PLL with user settings
-Info: Skipping generation of ip_arria10_e1sg_jesd204b_rx_core_pll: files already generated.
-Info: qsys-generate succeeded.
-Info: Finished: Create HDL design files for synthesis
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_generation_previous.rpt b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_generation_previous.rpt
deleted file mode 100644
index 1175dccbc652ef465aa8bc8f41c083d41fbc7a13..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_generation_previous.rpt
+++ /dev/null
@@ -1,19 +0,0 @@
-Info: Generated by version: 18.0 build 219
-Info: Starting: Create simulation model
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.ip --simulation=VHDL --allow-mixed-language-simulation --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll --family="Arria 10" --part=10AX115U2F45E1SG
-Info: ip_arria10_e1sg_jesd204b_rx_core_pll.core_pll: Able to implement PLL with user settings
-Info: Skipping generation of ip_arria10_e1sg_jesd204b_rx_core_pll: files already generated.
-Info: qsys-generate succeeded.
-Info: Finished: Create simulation model
-Info: Starting: Create block symbol file (.bsf)
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.ip --block-symbol-file --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll --family="Arria 10" --part=10AX115U2F45E1SG
-Info: ip_arria10_e1sg_jesd204b_rx_core_pll.core_pll: Able to implement PLL with user settings
-Info: qsys-generate succeeded.
-Info: Finished: Create block symbol file (.bsf)
-Info:
-Info: Starting: Create HDL design files for synthesis
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.ip --synthesis=VHDL --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll --family="Arria 10" --part=10AX115U2F45E1SG
-Info: ip_arria10_e1sg_jesd204b_rx_core_pll.core_pll: Able to implement PLL with user settings
-Info: Skipping generation of ip_arria10_e1sg_jesd204b_rx_core_pll: files already generated.
-Info: qsys-generate succeeded.
-Info: Finished: Create HDL design files for synthesis
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_inst.v b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_inst.v
deleted file mode 100644
index cd0e46be39cdcfa19210f2ee9d36b07344cbadc3..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_inst.v
+++ /dev/null
@@ -1,8 +0,0 @@
- ip_arria10_e1sg_jesd204b_rx_core_pll u0 (
- .locked (_connected_to_locked_), // output, width = 1, locked.export
- .outclk_0 (_connected_to_outclk_0_), // output, width = 1, outclk0.clk
- .outclk_1 (_connected_to_outclk_1_), // output, width = 1, outclk1.clk
- .refclk (_connected_to_refclk_), // input, width = 1, refclk.clk
- .rst (_connected_to_rst_) // input, width = 1, reset.reset
- );
-
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_inst.vhd b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_inst.vhd
deleted file mode 100644
index 614a48c4a19760ff7b2231dc4ab1a49242f367da..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/ip_arria10_e1sg_jesd204b_rx_core_pll_inst.vhd
+++ /dev/null
@@ -1,19 +0,0 @@
- component ip_arria10_e1sg_jesd204b_rx_core_pll is
- port (
- locked : out std_logic; -- export
- outclk_0 : out std_logic; -- clk
- outclk_1 : out std_logic; -- clk
- refclk : in std_logic := 'X'; -- clk
- rst : in std_logic := 'X' -- reset
- );
- end component ip_arria10_e1sg_jesd204b_rx_core_pll;
-
- u0 : component ip_arria10_e1sg_jesd204b_rx_core_pll
- port map (
- locked => CONNECTED_TO_locked, -- locked.export
- outclk_0 => CONNECTED_TO_outclk_0, -- outclk0.clk
- outclk_1 => CONNECTED_TO_outclk_1, -- outclk1.clk
- refclk => CONNECTED_TO_refclk, -- refclk.clk
- rst => CONNECTED_TO_rst -- reset.reset
- );
-
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/modelsim_files.tcl b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/modelsim_files.tcl
deleted file mode 100644
index f35ab45a026dda7a1348f384795263b23e41571e..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/modelsim_files.tcl
+++ /dev/null
@@ -1,66 +0,0 @@
-
-namespace eval ip_arria10_e1sg_jesd204b_rx_core_pll {
- proc get_design_libraries {} {
- set libraries [dict create]
- dict set libraries altera_iopll_180 1
- dict set libraries ip_arria10_e1sg_jesd204b_rx_core_pll 1
- return $libraries
- }
-
- proc get_memory_files {QSYS_SIMDIR} {
- set memory_files [list]
- return $memory_files
- }
-
- proc get_common_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
- set design_files [dict create]
- return $design_files
- }
-
- proc get_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
- set design_files [list]
- lappend design_files "vlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_iopll_180/sim/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.vo"]\" -work altera_iopll_180"
- lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd"]\" -work ip_arria10_e1sg_jesd204b_rx_core_pll"
- return $design_files
- }
-
- proc get_elab_options {SIMULATOR_TOOL_BITNESS} {
- set ELAB_OPTIONS ""
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $ELAB_OPTIONS
- }
-
-
- proc get_sim_options {SIMULATOR_TOOL_BITNESS} {
- set SIM_OPTIONS ""
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $SIM_OPTIONS
- }
-
-
- proc get_env_variables {SIMULATOR_TOOL_BITNESS} {
- set ENV_VARIABLES [dict create]
- set LD_LIBRARY_PATH [dict create]
- dict set ENV_VARIABLES "LD_LIBRARY_PATH" $LD_LIBRARY_PATH
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $ENV_VARIABLES
- }
-
-
- proc normalize_path {FILEPATH} {
- if {[catch { package require fileutil } err]} {
- return $FILEPATH
- }
- set path [fileutil::lexnormalize [file join [pwd] $FILEPATH]]
- if {[file pathtype $FILEPATH] eq "relative"} {
- set path [fileutil::relative [pwd] $path]
- }
- return $path
- }
-}
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/ncsim_files.tcl b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/ncsim_files.tcl
deleted file mode 100644
index c5b9cd7375324a4baa633f7ba58dd193d1ebcab1..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/ncsim_files.tcl
+++ /dev/null
@@ -1,56 +0,0 @@
-
-namespace eval ip_arria10_e1sg_jesd204b_rx_core_pll {
- proc get_design_libraries {} {
- set libraries [dict create]
- dict set libraries altera_iopll_180 1
- dict set libraries ip_arria10_e1sg_jesd204b_rx_core_pll 1
- return $libraries
- }
-
- proc get_memory_files {QSYS_SIMDIR} {
- set memory_files [list]
- return $memory_files
- }
-
- proc get_common_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
- set design_files [dict create]
- return $design_files
- }
-
- proc get_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
- set design_files [list]
- lappend design_files "ncvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_iopll_180/sim/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.vo\" -work altera_iopll_180 -cdslib ./cds_libs/altera_iopll_180.cds.lib"
- lappend design_files "ncvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd\" -work ip_arria10_e1sg_jesd204b_rx_core_pll"
- return $design_files
- }
-
- proc get_elab_options {SIMULATOR_TOOL_BITNESS} {
- set ELAB_OPTIONS ""
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $ELAB_OPTIONS
- }
-
-
- proc get_sim_options {SIMULATOR_TOOL_BITNESS} {
- set SIM_OPTIONS ""
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $SIM_OPTIONS
- }
-
-
- proc get_env_variables {SIMULATOR_TOOL_BITNESS} {
- set ENV_VARIABLES [dict create]
- set LD_LIBRARY_PATH [dict create]
- dict set ENV_VARIABLES "LD_LIBRARY_PATH" $LD_LIBRARY_PATH
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $ENV_VARIABLES
- }
-
-
-}
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/riviera_files.tcl b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/riviera_files.tcl
deleted file mode 100644
index 18c2c88d2bd64c0c6a532389c6dd6c32f8574994..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/riviera_files.tcl
+++ /dev/null
@@ -1,66 +0,0 @@
-
-namespace eval ip_arria10_e1sg_jesd204b_rx_core_pll {
- proc get_design_libraries {} {
- set libraries [dict create]
- dict set libraries altera_iopll_180 1
- dict set libraries ip_arria10_e1sg_jesd204b_rx_core_pll 1
- return $libraries
- }
-
- proc get_memory_files {QSYS_SIMDIR} {
- set memory_files [list]
- return $memory_files
- }
-
- proc get_common_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
- set design_files [dict create]
- return $design_files
- }
-
- proc get_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
- set design_files [list]
- lappend design_files "vlog -v2k5 $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/../altera_iopll_180/sim/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.vo"]\" -work altera_iopll_180"
- lappend design_files "vcom $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"[normalize_path "$QSYS_SIMDIR/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd"]\" -work ip_arria10_e1sg_jesd204b_rx_core_pll"
- return $design_files
- }
-
- proc get_elab_options {SIMULATOR_TOOL_BITNESS} {
- set ELAB_OPTIONS ""
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $ELAB_OPTIONS
- }
-
-
- proc get_sim_options {SIMULATOR_TOOL_BITNESS} {
- set SIM_OPTIONS ""
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $SIM_OPTIONS
- }
-
-
- proc get_env_variables {SIMULATOR_TOOL_BITNESS} {
- set ENV_VARIABLES [dict create]
- set LD_LIBRARY_PATH [dict create]
- dict set ENV_VARIABLES "LD_LIBRARY_PATH" $LD_LIBRARY_PATH
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $ENV_VARIABLES
- }
-
-
- proc normalize_path {FILEPATH} {
- if {[catch { package require fileutil } err]} {
- return $FILEPATH
- }
- set path [fileutil::lexnormalize [file join [pwd] $FILEPATH]]
- if {[file pathtype $FILEPATH] eq "relative"} {
- set path [fileutil::relative [pwd] $path]
- }
- return $path
- }
-}
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/vcs_files.tcl b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/vcs_files.tcl
deleted file mode 100644
index b4489707a4650098e878320682d5fde942333650..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/vcs_files.tcl
+++ /dev/null
@@ -1,47 +0,0 @@
-
-namespace eval ip_arria10_e1sg_jesd204b_rx_core_pll {
- proc get_memory_files {QSYS_SIMDIR} {
- set memory_files [list]
- return $memory_files
- }
-
- proc get_common_design_files {QSYS_SIMDIR} {
- set design_files [dict create]
- return $design_files
- }
-
- proc get_design_files {QSYS_SIMDIR} {
- set design_files [dict create]
- error "Skipping VCS script generation since VHDL file $QSYS_SIMDIR/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd is required for simulation"
- }
-
- proc get_elab_options {SIMULATOR_TOOL_BITNESS} {
- set ELAB_OPTIONS ""
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $ELAB_OPTIONS
- }
-
-
- proc get_sim_options {SIMULATOR_TOOL_BITNESS} {
- set SIM_OPTIONS ""
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $SIM_OPTIONS
- }
-
-
- proc get_env_variables {SIMULATOR_TOOL_BITNESS} {
- set ENV_VARIABLES [dict create]
- set LD_LIBRARY_PATH [dict create]
- dict set ENV_VARIABLES "LD_LIBRARY_PATH" $LD_LIBRARY_PATH
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $ENV_VARIABLES
- }
-
-
-}
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/vcsmx_files.tcl b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/vcsmx_files.tcl
deleted file mode 100644
index 845ae01b9ec3a1006d89badec938ff04e931e651..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/vcsmx_files.tcl
+++ /dev/null
@@ -1,56 +0,0 @@
-
-namespace eval ip_arria10_e1sg_jesd204b_rx_core_pll {
- proc get_design_libraries {} {
- set libraries [dict create]
- dict set libraries altera_iopll_180 1
- dict set libraries ip_arria10_e1sg_jesd204b_rx_core_pll 1
- return $libraries
- }
-
- proc get_memory_files {QSYS_SIMDIR} {
- set memory_files [list]
- return $memory_files
- }
-
- proc get_common_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
- set design_files [dict create]
- return $design_files
- }
-
- proc get_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
- set design_files [list]
- lappend design_files "vlogan +v2k $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_iopll_180/sim/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.vo\" -work altera_iopll_180"
- lappend design_files "vhdlan -xlrm $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd\" -work ip_arria10_e1sg_jesd204b_rx_core_pll"
- return $design_files
- }
-
- proc get_elab_options {SIMULATOR_TOOL_BITNESS} {
- set ELAB_OPTIONS ""
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $ELAB_OPTIONS
- }
-
-
- proc get_sim_options {SIMULATOR_TOOL_BITNESS} {
- set SIM_OPTIONS ""
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $SIM_OPTIONS
- }
-
-
- proc get_env_variables {SIMULATOR_TOOL_BITNESS} {
- set ENV_VARIABLES [dict create]
- set LD_LIBRARY_PATH [dict create]
- dict set ENV_VARIABLES "LD_LIBRARY_PATH" $LD_LIBRARY_PATH
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $ENV_VARIABLES
- }
-
-
-}
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/xcelium_files.tcl b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/xcelium_files.tcl
deleted file mode 100644
index e1209870734dbb9bddc7b8d23ce0b09abf9fb823..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/common/xcelium_files.tcl
+++ /dev/null
@@ -1,56 +0,0 @@
-
-namespace eval ip_arria10_e1sg_jesd204b_rx_core_pll {
- proc get_design_libraries {} {
- set libraries [dict create]
- dict set libraries altera_iopll_180 1
- dict set libraries ip_arria10_e1sg_jesd204b_rx_core_pll 1
- return $libraries
- }
-
- proc get_memory_files {QSYS_SIMDIR} {
- set memory_files [list]
- return $memory_files
- }
-
- proc get_common_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
- set design_files [dict create]
- return $design_files
- }
-
- proc get_design_files {USER_DEFINED_COMPILE_OPTIONS USER_DEFINED_VERILOG_COMPILE_OPTIONS USER_DEFINED_VHDL_COMPILE_OPTIONS QSYS_SIMDIR} {
- set design_files [list]
- lappend design_files "xmvlog $USER_DEFINED_VERILOG_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/../altera_iopll_180/sim/ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama.vo\" -work altera_iopll_180 -cdslib ./cds_libs/altera_iopll_180.cds.lib"
- lappend design_files "xmvhdl -v93 $USER_DEFINED_VHDL_COMPILE_OPTIONS $USER_DEFINED_COMPILE_OPTIONS \"$QSYS_SIMDIR/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd\" -work ip_arria10_e1sg_jesd204b_rx_core_pll"
- return $design_files
- }
-
- proc get_elab_options {SIMULATOR_TOOL_BITNESS} {
- set ELAB_OPTIONS ""
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $ELAB_OPTIONS
- }
-
-
- proc get_sim_options {SIMULATOR_TOOL_BITNESS} {
- set SIM_OPTIONS ""
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $SIM_OPTIONS
- }
-
-
- proc get_env_variables {SIMULATOR_TOOL_BITNESS} {
- set ENV_VARIABLES [dict create]
- set LD_LIBRARY_PATH [dict create]
- dict set ENV_VARIABLES "LD_LIBRARY_PATH" $LD_LIBRARY_PATH
- if ![ string match "bit_64" $SIMULATOR_TOOL_BITNESS ] {
- } else {
- }
- return $ENV_VARIABLES
- }
-
-
-}
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd
deleted file mode 100644
index 2b1c174b32d69b0ead67b2e95a917d6c1918520c..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/sim/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd
+++ /dev/null
@@ -1,44 +0,0 @@
--- ip_arria10_e1sg_jesd204b_rx_core_pll.vhd
-
--- Generated using ACDS version 18.0 219
-
-library IEEE;
-library altera_iopll_180;
-use IEEE.std_logic_1164.all;
-use IEEE.numeric_std.all;
-
-entity ip_arria10_e1sg_jesd204b_rx_core_pll is
- port (
- locked : out std_logic; -- locked.export
- outclk_0 : out std_logic; -- outclk0.clk
- outclk_1 : out std_logic; -- outclk1.clk
- refclk : in std_logic := '0'; -- refclk.clk
- rst : in std_logic := '0' -- reset.reset
- );
-end entity ip_arria10_e1sg_jesd204b_rx_core_pll;
-
-architecture rtl of ip_arria10_e1sg_jesd204b_rx_core_pll is
- component ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama_cmp is
- port (
- rst : in std_logic := 'X'; -- reset
- refclk : in std_logic := 'X'; -- clk
- locked : out std_logic; -- export
- outclk_0 : out std_logic; -- clk
- outclk_1 : out std_logic -- clk
- );
- end component ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama_cmp;
-
- for core_pll : ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama_cmp
- use entity altera_iopll_180.ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama;
-begin
-
- core_pll : component ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama_cmp
- port map (
- rst => rst, -- reset.reset
- refclk => refclk, -- refclk.clk
- locked => locked, -- locked.export
- outclk_0 => outclk_0, -- outclk0.clk
- outclk_1 => outclk_1 -- outclk1.clk
- );
-
-end architecture rtl; -- of ip_arria10_e1sg_jesd204b_rx_core_pll
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/synth/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/synth/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd
deleted file mode 100644
index 2b1c174b32d69b0ead67b2e95a917d6c1918520c..0000000000000000000000000000000000000000
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll/synth/ip_arria10_e1sg_jesd204b_rx_core_pll.vhd
+++ /dev/null
@@ -1,44 +0,0 @@
--- ip_arria10_e1sg_jesd204b_rx_core_pll.vhd
-
--- Generated using ACDS version 18.0 219
-
-library IEEE;
-library altera_iopll_180;
-use IEEE.std_logic_1164.all;
-use IEEE.numeric_std.all;
-
-entity ip_arria10_e1sg_jesd204b_rx_core_pll is
- port (
- locked : out std_logic; -- locked.export
- outclk_0 : out std_logic; -- outclk0.clk
- outclk_1 : out std_logic; -- outclk1.clk
- refclk : in std_logic := '0'; -- refclk.clk
- rst : in std_logic := '0' -- reset.reset
- );
-end entity ip_arria10_e1sg_jesd204b_rx_core_pll;
-
-architecture rtl of ip_arria10_e1sg_jesd204b_rx_core_pll is
- component ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama_cmp is
- port (
- rst : in std_logic := 'X'; -- reset
- refclk : in std_logic := 'X'; -- clk
- locked : out std_logic; -- export
- outclk_0 : out std_logic; -- clk
- outclk_1 : out std_logic -- clk
- );
- end component ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama_cmp;
-
- for core_pll : ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama_cmp
- use entity altera_iopll_180.ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama;
-begin
-
- core_pll : component ip_arria10_e1sg_jesd204b_rx_core_pll_altera_iopll_180_4sgpama_cmp
- port map (
- rst => rst, -- reset.reset
- refclk => refclk, -- refclk.clk
- locked => locked, -- locked.export
- outclk_0 => outclk_0, -- outclk0.clk
- outclk_1 => outclk_1 -- outclk1.clk
- );
-
-end architecture rtl; -- of ip_arria10_e1sg_jesd204b_rx_core_pll
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.ip b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.ip
new file mode 100644
index 0000000000000000000000000000000000000000..dd2400e45d53457aaefcd0a502be71439a052188
--- /dev/null
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.ip
@@ -0,0 +1,4346 @@
+<?xml version="1.0" ?>
+<ipxact:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact2014/extensions" xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014">
+ <ipxact:vendor>Intel Corporation</ipxact:vendor>
+ <ipxact:library>ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz</ipxact:library>
+ <ipxact:name>core_pll</ipxact:name>
+ <ipxact:version>19.3.0</ipxact:version>
+ <ipxact:busInterfaces>
+ <ipxact:busInterface>
+ <ipxact:name>reset</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rst</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>NONE</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>refclk</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="clock" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="clock" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>clk</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>refclk</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="clockRate" type="longint">
+ <ipxact:name>clockRate</ipxact:name>
+ <ipxact:displayName>Clock rate</ipxact:displayName>
+ <ipxact:value>200000000</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="externallyDriven" type="bit">
+ <ipxact:name>externallyDriven</ipxact:name>
+ <ipxact:displayName>Externally driven</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ptfSchematicName" type="string">
+ <ipxact:name>ptfSchematicName</ipxact:name>
+ <ipxact:displayName>PTF schematic name</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>locked</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>export</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>locked</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>outclk0</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="clock" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="clock" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>clk</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>outclk_0</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:master></ipxact:master>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedDirectClock" type="string">
+ <ipxact:name>associatedDirectClock</ipxact:name>
+ <ipxact:displayName>Associated direct clock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clockRate" type="longint">
+ <ipxact:name>clockRate</ipxact:name>
+ <ipxact:displayName>Clock rate</ipxact:displayName>
+ <ipxact:value>100000000</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clockRateKnown" type="bit">
+ <ipxact:name>clockRateKnown</ipxact:name>
+ <ipxact:displayName>Clock rate known</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="externallyDriven" type="bit">
+ <ipxact:name>externallyDriven</ipxact:name>
+ <ipxact:displayName>Externally driven</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ptfSchematicName" type="string">
+ <ipxact:name>ptfSchematicName</ipxact:name>
+ <ipxact:displayName>PTF schematic name</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>outclk1</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="clock" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="clock" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>clk</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>outclk_1</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:master></ipxact:master>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedDirectClock" type="string">
+ <ipxact:name>associatedDirectClock</ipxact:name>
+ <ipxact:displayName>Associated direct clock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clockRate" type="longint">
+ <ipxact:name>clockRate</ipxact:name>
+ <ipxact:displayName>Clock rate</ipxact:displayName>
+ <ipxact:value>200000000</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clockRateKnown" type="bit">
+ <ipxact:name>clockRateKnown</ipxact:name>
+ <ipxact:displayName>Clock rate known</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="externallyDriven" type="bit">
+ <ipxact:name>externallyDriven</ipxact:name>
+ <ipxact:displayName>Externally driven</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ptfSchematicName" type="string">
+ <ipxact:name>ptfSchematicName</ipxact:name>
+ <ipxact:displayName>PTF schematic name</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ </ipxact:busInterfaces>
+ <ipxact:model>
+ <ipxact:views>
+ <ipxact:view>
+ <ipxact:name>QUARTUS_SYNTH</ipxact:name>
+ <ipxact:envIdentifier>:quartus.altera.com:</ipxact:envIdentifier>
+ <ipxact:componentInstantiationRef>QUARTUS_SYNTH</ipxact:componentInstantiationRef>
+ </ipxact:view>
+ </ipxact:views>
+ <ipxact:instantiations>
+ <ipxact:componentInstantiation>
+ <ipxact:name>QUARTUS_SYNTH</ipxact:name>
+ <ipxact:moduleName>altera_iopll</ipxact:moduleName>
+ <ipxact:fileSetRef>
+ <ipxact:localName>QUARTUS_SYNTH</ipxact:localName>
+ </ipxact:fileSetRef>
+ <ipxact:parameters></ipxact:parameters>
+ </ipxact:componentInstantiation>
+ </ipxact:instantiations>
+ <ipxact:ports>
+ <ipxact:port>
+ <ipxact:name>rst</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>refclk</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>locked</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>outclk_0</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>outclk_1</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ </ipxact:ports>
+ </ipxact:model>
+ <ipxact:vendorExtensions>
+ <altera:entity_info>
+ <ipxact:vendor>Intel Corporation</ipxact:vendor>
+ <ipxact:library>ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz</ipxact:library>
+ <ipxact:name>altera_iopll</ipxact:name>
+ <ipxact:version>19.3.0</ipxact:version>
+ </altera:entity_info>
+ <altera:altera_module_parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="gui_device_family" type="string">
+ <ipxact:name>gui_device_family</ipxact:name>
+ <ipxact:displayName>Device Family</ipxact:displayName>
+ <ipxact:value>Arria 10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_device_component" type="string">
+ <ipxact:name>gui_device_component</ipxact:name>
+ <ipxact:displayName>Component</ipxact:displayName>
+ <ipxact:value>10AX115U2F45E1SG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_device_speed_grade" type="int">
+ <ipxact:name>gui_device_speed_grade</ipxact:name>
+ <ipxact:displayName>Speed Grade</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_debug_mode" type="bit">
+ <ipxact:name>gui_debug_mode</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_skip_sdc_generation" type="bit">
+ <ipxact:name>gui_skip_sdc_generation</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_include_iossm" type="bit">
+ <ipxact:name>gui_include_iossm</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cal_code_hex_file" type="string">
+ <ipxact:name>gui_cal_code_hex_file</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>iossm.hex</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_parameter_table_hex_file" type="string">
+ <ipxact:name>gui_parameter_table_hex_file</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>seq_params_sim.hex</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_tclk_mux_en" type="bit">
+ <ipxact:name>gui_pll_tclk_mux_en</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_tclk_sel" type="string">
+ <ipxact:name>gui_pll_tclk_sel</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>pll_tclk_m_src</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_vco_freq_band_0" type="string">
+ <ipxact:name>gui_pll_vco_freq_band_0</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>pll_freq_clk0_disabled</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_vco_freq_band_1" type="string">
+ <ipxact:name>gui_pll_vco_freq_band_1</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>pll_freq_clk1_disabled</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_freqcal_en" type="bit">
+ <ipxact:name>gui_pll_freqcal_en</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_freqcal_req_flag" type="bit">
+ <ipxact:name>gui_pll_freqcal_req_flag</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cal_converge" type="bit">
+ <ipxact:name>gui_cal_converge</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cal_error" type="string">
+ <ipxact:name>gui_cal_error</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>cal_clean</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_cal_done" type="bit">
+ <ipxact:name>gui_pll_cal_done</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_type" type="string">
+ <ipxact:name>gui_pll_type</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>S10_Simple</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_m_cnt_in_src" type="string">
+ <ipxact:name>gui_pll_m_cnt_in_src</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_c_cnt_in_src0" type="string">
+ <ipxact:name>gui_c_cnt_in_src0</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_c_cnt_in_src1" type="string">
+ <ipxact:name>gui_c_cnt_in_src1</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_c_cnt_in_src2" type="string">
+ <ipxact:name>gui_c_cnt_in_src2</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_c_cnt_in_src3" type="string">
+ <ipxact:name>gui_c_cnt_in_src3</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_c_cnt_in_src4" type="string">
+ <ipxact:name>gui_c_cnt_in_src4</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_c_cnt_in_src5" type="string">
+ <ipxact:name>gui_c_cnt_in_src5</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_c_cnt_in_src6" type="string">
+ <ipxact:name>gui_c_cnt_in_src6</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_c_cnt_in_src7" type="string">
+ <ipxact:name>gui_c_cnt_in_src7</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_c_cnt_in_src8" type="string">
+ <ipxact:name>gui_c_cnt_in_src8</ipxact:name>
+ <ipxact:displayName></ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="system_info_device_family" type="string">
+ <ipxact:name>system_info_device_family</ipxact:name>
+ <ipxact:displayName>Device Family</ipxact:displayName>
+ <ipxact:value>Arria 10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="system_info_device_component" type="string">
+ <ipxact:name>system_info_device_component</ipxact:name>
+ <ipxact:displayName>Component</ipxact:displayName>
+ <ipxact:value>10AX115U2F45E1SG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="system_info_device_speed_grade" type="string">
+ <ipxact:name>system_info_device_speed_grade</ipxact:name>
+ <ipxact:displayName>Speed Grade</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="system_part_trait_speed_grade" type="string">
+ <ipxact:name>system_part_trait_speed_grade</ipxact:name>
+ <ipxact:displayName>Speed Grade Trait</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_usr_device_speed_grade" type="string">
+ <ipxact:name>gui_usr_device_speed_grade</ipxact:name>
+ <ipxact:displayName>Speed Grade</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_en_reconf" type="bit">
+ <ipxact:name>gui_en_reconf</ipxact:name>
+ <ipxact:displayName>Enable dynamic reconfiguration of PLL</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_en_dps_ports" type="bit">
+ <ipxact:name>gui_en_dps_ports</ipxact:name>
+ <ipxact:displayName>Enable access to dynamic phase shift ports</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_mode" type="string">
+ <ipxact:name>gui_pll_mode</ipxact:name>
+ <ipxact:displayName>PLL Mode</ipxact:displayName>
+ <ipxact:value>Integer-N PLL</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_location_type" type="string">
+ <ipxact:name>gui_location_type</ipxact:name>
+ <ipxact:displayName>IOPLL Type</ipxact:displayName>
+ <ipxact:value>I/O Bank</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_use_logical" type="bit">
+ <ipxact:name>gui_use_logical</ipxact:name>
+ <ipxact:displayName>Use logical PLL</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_reference_clock_frequency" type="real">
+ <ipxact:name>gui_reference_clock_frequency</ipxact:name>
+ <ipxact:displayName>Reference Clock Frequency</ipxact:displayName>
+ <ipxact:value>200.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_reference_clock_frequency_ps" type="real">
+ <ipxact:name>gui_reference_clock_frequency_ps</ipxact:name>
+ <ipxact:displayName>Reference Clock Frequency</ipxact:displayName>
+ <ipxact:value>5000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_use_coreclk" type="bit">
+ <ipxact:name>gui_use_coreclk</ipxact:name>
+ <ipxact:displayName>Refclk source is global clock</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_refclk_might_change" type="bit">
+ <ipxact:name>gui_refclk_might_change</ipxact:name>
+ <ipxact:displayName>My reference clock frequency might change</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_fractional_cout" type="int">
+ <ipxact:name>gui_fractional_cout</ipxact:name>
+ <ipxact:displayName>Fractional carry out</ipxact:displayName>
+ <ipxact:value>32</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_prot_mode" type="string">
+ <ipxact:name>gui_prot_mode</ipxact:name>
+ <ipxact:displayName>prot_mode</ipxact:displayName>
+ <ipxact:value>UNUSED</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_dsm_out_sel" type="string">
+ <ipxact:name>gui_dsm_out_sel</ipxact:name>
+ <ipxact:displayName>DSM Order</ipxact:displayName>
+ <ipxact:value>1st_order</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_use_locked" type="bit">
+ <ipxact:name>gui_use_locked</ipxact:name>
+ <ipxact:displayName>Enable locked output port</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_en_adv_params" type="bit">
+ <ipxact:name>gui_en_adv_params</ipxact:name>
+ <ipxact:displayName>Enable physical output clock parameters</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_bandwidth_preset" type="string">
+ <ipxact:name>gui_pll_bandwidth_preset</ipxact:name>
+ <ipxact:displayName>PLL Bandwidth Preset</ipxact:displayName>
+ <ipxact:value>Low</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_lock_setting" type="string">
+ <ipxact:name>gui_lock_setting</ipxact:name>
+ <ipxact:displayName>Lock Threshold Setting</ipxact:displayName>
+ <ipxact:value>Low Lock Time</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_auto_reset" type="bit">
+ <ipxact:name>gui_pll_auto_reset</ipxact:name>
+ <ipxact:displayName>PLL Auto Reset</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_en_lvds_ports" type="string">
+ <ipxact:name>gui_en_lvds_ports</ipxact:name>
+ <ipxact:displayName>Access to PLL LVDS_CLK/LOADEN output port</ipxact:displayName>
+ <ipxact:value>Disabled</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_operation_mode" type="string">
+ <ipxact:name>gui_operation_mode</ipxact:name>
+ <ipxact:displayName>Compensation Mode</ipxact:displayName>
+ <ipxact:value>source synchronous</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_feedback_clock" type="string">
+ <ipxact:name>gui_feedback_clock</ipxact:name>
+ <ipxact:displayName>Feedback Clock</ipxact:displayName>
+ <ipxact:value>Global Clock</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_to_compensate" type="int">
+ <ipxact:name>gui_clock_to_compensate</ipxact:name>
+ <ipxact:displayName>Compensated Outclk</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_use_NDFB_modes" type="bit">
+ <ipxact:name>gui_use_NDFB_modes</ipxact:name>
+ <ipxact:displayName>Use Nondedicated Feedback Path</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_refclk_switch" type="bit">
+ <ipxact:name>gui_refclk_switch</ipxact:name>
+ <ipxact:displayName>Create a second input clock signal 'refclk1'</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_refclk1_frequency" type="real">
+ <ipxact:name>gui_refclk1_frequency</ipxact:name>
+ <ipxact:displayName>Second Reference Clock Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_en_phout_ports" type="bit">
+ <ipxact:name>gui_en_phout_ports</ipxact:name>
+ <ipxact:displayName>Enable access to PLL DPA output port</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phout_division" type="int">
+ <ipxact:name>gui_phout_division</ipxact:name>
+ <ipxact:displayName>PLL DPA output division</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_en_extclkout_ports" type="bit">
+ <ipxact:name>gui_en_extclkout_ports</ipxact:name>
+ <ipxact:displayName>Enable access to PLL external clock output port</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_number_of_clocks" type="int">
+ <ipxact:name>gui_number_of_clocks</ipxact:name>
+ <ipxact:displayName>Number Of Clocks</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_multiply_factor" type="int">
+ <ipxact:name>gui_multiply_factor</ipxact:name>
+ <ipxact:displayName>Multiply Factor (M-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_n" type="int">
+ <ipxact:name>gui_divide_factor_n</ipxact:name>
+ <ipxact:displayName>Divide Factor (N-Counter)</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_frac_multiply_factor" type="longint">
+ <ipxact:name>gui_frac_multiply_factor</ipxact:name>
+ <ipxact:displayName>Fractional Multiply Factor (K)</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_fix_vco_frequency" type="bit">
+ <ipxact:name>gui_fix_vco_frequency</ipxact:name>
+ <ipxact:displayName>Specify VCO frequency</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_fixed_vco_frequency" type="real">
+ <ipxact:name>gui_fixed_vco_frequency</ipxact:name>
+ <ipxact:displayName>Desired VCO Frequency</ipxact:displayName>
+ <ipxact:value>600.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_fixed_vco_frequency_ps" type="real">
+ <ipxact:name>gui_fixed_vco_frequency_ps</ipxact:name>
+ <ipxact:displayName>Desired VCO Frequency</ipxact:displayName>
+ <ipxact:value>1667.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_vco_frequency" type="string">
+ <ipxact:name>gui_vco_frequency</ipxact:name>
+ <ipxact:displayName>Actual VCO Frequency</ipxact:displayName>
+ <ipxact:value>600.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_enable_output_counter_cascading" type="bit">
+ <ipxact:name>gui_enable_output_counter_cascading</ipxact:name>
+ <ipxact:displayName>Enable output counter cascading</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_mif_gen_options" type="string">
+ <ipxact:name>gui_mif_gen_options</ipxact:name>
+ <ipxact:displayName>MIF Generation Options</ipxact:displayName>
+ <ipxact:value>Generate New MIF File</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_new_mif_file_path" type="string">
+ <ipxact:name>gui_new_mif_file_path</ipxact:name>
+ <ipxact:displayName>Path to New MIF file</ipxact:displayName>
+ <ipxact:value>~/pll.mif</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_existing_mif_file_path" type="string">
+ <ipxact:name>gui_existing_mif_file_path</ipxact:name>
+ <ipxact:displayName>Path to Existing MIF file</ipxact:displayName>
+ <ipxact:value>~/pll.mif</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_mif_config_name" type="string">
+ <ipxact:name>gui_mif_config_name</ipxact:name>
+ <ipxact:displayName>Name of Current Configuration</ipxact:displayName>
+ <ipxact:value>unnamed</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_active_clk" type="bit">
+ <ipxact:name>gui_active_clk</ipxact:name>
+ <ipxact:displayName>Create an 'active_clk' signal to indicate the input clock in use</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clk_bad" type="bit">
+ <ipxact:name>gui_clk_bad</ipxact:name>
+ <ipxact:displayName>Create a 'clkbad' signal for each of the input clocks</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_switchover_mode" type="string">
+ <ipxact:name>gui_switchover_mode</ipxact:name>
+ <ipxact:displayName>Switchover Mode</ipxact:displayName>
+ <ipxact:value>Automatic Switchover</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_switchover_delay" type="int">
+ <ipxact:name>gui_switchover_delay</ipxact:name>
+ <ipxact:displayName>Switchover Delay</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_enable_cascade_out" type="bit">
+ <ipxact:name>gui_enable_cascade_out</ipxact:name>
+ <ipxact:displayName>Create a 'cascade_out' signal to connect to a downstream PLL</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_outclk_index" type="string">
+ <ipxact:name>gui_cascade_outclk_index</ipxact:name>
+ <ipxact:displayName>cascade_out source</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_enable_cascade_in" type="bit">
+ <ipxact:name>gui_enable_cascade_in</ipxact:name>
+ <ipxact:displayName>Create an 'adjpllin' (cascade in) signal to connect to an upstream PLL through IO Column Cascading</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_enable_permit_cal" type="bit">
+ <ipxact:name>gui_enable_permit_cal</ipxact:name>
+ <ipxact:displayName>Connect to an upstream PLL through Core Clock Network Cascading (create a permit_cal input signal)</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_cascading_mode" type="string">
+ <ipxact:name>gui_pll_cascading_mode</ipxact:name>
+ <ipxact:displayName>Connection Signal Type to Upstream PLL</ipxact:displayName>
+ <ipxact:value>adjpllin</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_enable_mif_dps" type="bit">
+ <ipxact:name>gui_enable_mif_dps</ipxact:name>
+ <ipxact:displayName>Enable Dynamic Phase Shift for MIF streaming</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_dps_cntr" type="string">
+ <ipxact:name>gui_dps_cntr</ipxact:name>
+ <ipxact:displayName>DPS Counter Selection</ipxact:displayName>
+ <ipxact:value>C0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_dps_num" type="int">
+ <ipxact:name>gui_dps_num</ipxact:name>
+ <ipxact:displayName>Number of Dynamic Phase Shifts</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_dps_dir" type="string">
+ <ipxact:name>gui_dps_dir</ipxact:name>
+ <ipxact:displayName>Dynamic Phase Shift Direction</ipxact:displayName>
+ <ipxact:value>Positive</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_extclkout_0_source" type="string">
+ <ipxact:name>gui_extclkout_0_source</ipxact:name>
+ <ipxact:displayName>extclk_out[0] source</ipxact:displayName>
+ <ipxact:value>C0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_extclkout_1_source" type="string">
+ <ipxact:name>gui_extclkout_1_source</ipxact:name>
+ <ipxact:displayName>extclk_out[1] source</ipxact:displayName>
+ <ipxact:value>C0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_global" type="bit">
+ <ipxact:name>gui_clock_name_global</ipxact:name>
+ <ipxact:displayName>Give clocks global names</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string0" type="string">
+ <ipxact:name>gui_clock_name_string0</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>link_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string1" type="string">
+ <ipxact:name>gui_clock_name_string1</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>frame_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string2" type="string">
+ <ipxact:name>gui_clock_name_string2</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string3" type="string">
+ <ipxact:name>gui_clock_name_string3</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk3</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string4" type="string">
+ <ipxact:name>gui_clock_name_string4</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk4</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string5" type="string">
+ <ipxact:name>gui_clock_name_string5</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk5</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string6" type="string">
+ <ipxact:name>gui_clock_name_string6</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string7" type="string">
+ <ipxact:name>gui_clock_name_string7</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk7</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string8" type="string">
+ <ipxact:name>gui_clock_name_string8</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk8</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string9" type="string">
+ <ipxact:name>gui_clock_name_string9</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk9</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string10" type="string">
+ <ipxact:name>gui_clock_name_string10</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string11" type="string">
+ <ipxact:name>gui_clock_name_string11</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk11</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string12" type="string">
+ <ipxact:name>gui_clock_name_string12</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk12</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string13" type="string">
+ <ipxact:name>gui_clock_name_string13</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk13</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string14" type="string">
+ <ipxact:name>gui_clock_name_string14</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk14</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string15" type="string">
+ <ipxact:name>gui_clock_name_string15</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk15</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string16" type="string">
+ <ipxact:name>gui_clock_name_string16</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk16</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_clock_name_string17" type="string">
+ <ipxact:name>gui_clock_name_string17</ipxact:name>
+ <ipxact:displayName>Clock Name</ipxact:displayName>
+ <ipxact:value>outclk17</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c0" type="int">
+ <ipxact:name>gui_divide_factor_c0</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c1" type="int">
+ <ipxact:name>gui_divide_factor_c1</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c2" type="int">
+ <ipxact:name>gui_divide_factor_c2</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c3" type="int">
+ <ipxact:name>gui_divide_factor_c3</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c4" type="int">
+ <ipxact:name>gui_divide_factor_c4</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c5" type="int">
+ <ipxact:name>gui_divide_factor_c5</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c6" type="int">
+ <ipxact:name>gui_divide_factor_c6</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c7" type="int">
+ <ipxact:name>gui_divide_factor_c7</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c8" type="int">
+ <ipxact:name>gui_divide_factor_c8</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c9" type="int">
+ <ipxact:name>gui_divide_factor_c9</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c10" type="int">
+ <ipxact:name>gui_divide_factor_c10</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c11" type="int">
+ <ipxact:name>gui_divide_factor_c11</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c12" type="int">
+ <ipxact:name>gui_divide_factor_c12</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c13" type="int">
+ <ipxact:name>gui_divide_factor_c13</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c14" type="int">
+ <ipxact:name>gui_divide_factor_c14</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c15" type="int">
+ <ipxact:name>gui_divide_factor_c15</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c16" type="int">
+ <ipxact:name>gui_divide_factor_c16</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_divide_factor_c17" type="int">
+ <ipxact:name>gui_divide_factor_c17</ipxact:name>
+ <ipxact:displayName>Divide Factor (C-Counter)</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter0" type="bit">
+ <ipxact:name>gui_cascade_counter0</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter1" type="bit">
+ <ipxact:name>gui_cascade_counter1</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter2" type="bit">
+ <ipxact:name>gui_cascade_counter2</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter3" type="bit">
+ <ipxact:name>gui_cascade_counter3</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter4" type="bit">
+ <ipxact:name>gui_cascade_counter4</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter5" type="bit">
+ <ipxact:name>gui_cascade_counter5</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter6" type="bit">
+ <ipxact:name>gui_cascade_counter6</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter7" type="bit">
+ <ipxact:name>gui_cascade_counter7</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter8" type="bit">
+ <ipxact:name>gui_cascade_counter8</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter9" type="bit">
+ <ipxact:name>gui_cascade_counter9</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter10" type="bit">
+ <ipxact:name>gui_cascade_counter10</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter11" type="bit">
+ <ipxact:name>gui_cascade_counter11</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter12" type="bit">
+ <ipxact:name>gui_cascade_counter12</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter13" type="bit">
+ <ipxact:name>gui_cascade_counter13</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter14" type="bit">
+ <ipxact:name>gui_cascade_counter14</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter15" type="bit">
+ <ipxact:name>gui_cascade_counter15</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter16" type="bit">
+ <ipxact:name>gui_cascade_counter16</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_cascade_counter17" type="bit">
+ <ipxact:name>gui_cascade_counter17</ipxact:name>
+ <ipxact:displayName>Make this a cascade counter</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency0" type="real">
+ <ipxact:name>gui_output_clock_frequency0</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency1" type="real">
+ <ipxact:name>gui_output_clock_frequency1</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>200.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency2" type="real">
+ <ipxact:name>gui_output_clock_frequency2</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency3" type="real">
+ <ipxact:name>gui_output_clock_frequency3</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency4" type="real">
+ <ipxact:name>gui_output_clock_frequency4</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency5" type="real">
+ <ipxact:name>gui_output_clock_frequency5</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency6" type="real">
+ <ipxact:name>gui_output_clock_frequency6</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency7" type="real">
+ <ipxact:name>gui_output_clock_frequency7</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency8" type="real">
+ <ipxact:name>gui_output_clock_frequency8</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency9" type="real">
+ <ipxact:name>gui_output_clock_frequency9</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency10" type="real">
+ <ipxact:name>gui_output_clock_frequency10</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency11" type="real">
+ <ipxact:name>gui_output_clock_frequency11</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency12" type="real">
+ <ipxact:name>gui_output_clock_frequency12</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency13" type="real">
+ <ipxact:name>gui_output_clock_frequency13</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency14" type="real">
+ <ipxact:name>gui_output_clock_frequency14</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency15" type="real">
+ <ipxact:name>gui_output_clock_frequency15</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency16" type="real">
+ <ipxact:name>gui_output_clock_frequency16</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency17" type="real">
+ <ipxact:name>gui_output_clock_frequency17</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps0" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps0</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps1" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps1</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>5000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps2" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps2</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps3" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps3</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps4" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps4</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps5" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps5</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps6" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps6</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps7" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps7</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps8" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps8</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps9" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps9</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps10" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps10</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps11" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps11</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps12" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps12</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps13" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps13</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps14" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps14</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps15" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps15</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps16" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps16</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_output_clock_frequency_ps17" type="real">
+ <ipxact:name>gui_output_clock_frequency_ps17</ipxact:name>
+ <ipxact:displayName>Desired Frequency</ipxact:displayName>
+ <ipxact:value>10000.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency0" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency0</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency1" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency1</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>200.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency2" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency2</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency3" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency3</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency4" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency4</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency5" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency5</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency6" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency6</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency7" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency7</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency8" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency8</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency9" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency9</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency10" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency10</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency11" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency11</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency12" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency12</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency13" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency13</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency14" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency14</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency15" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency15</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency16" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency16</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency17" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency17</ipxact:name>
+ <ipxact:displayName>Actual Frequency</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range0" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range0</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>99.595142,99.607843,99.649123,100.0,100.350877,100.392157</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range1" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range1</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>183.333333,185.714286,187.5,200.0,214.285714,216.666667</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range2" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range2</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range3" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range3</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range4" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range4</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range5" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range5</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range6" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range6</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range7" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range7</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range8" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range8</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range9" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range9</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range10" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range10</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range11" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range11</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range12" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range12</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range13" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range13</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range14" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range14</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range15" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range15</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range16" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range16</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_output_clock_frequency_range17" type="string">
+ <ipxact:name>gui_actual_output_clock_frequency_range17</ipxact:name>
+ <ipxact:displayName>Legal Frequencies</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units0" type="string">
+ <ipxact:name>gui_ps_units0</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units1" type="string">
+ <ipxact:name>gui_ps_units1</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units2" type="string">
+ <ipxact:name>gui_ps_units2</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units3" type="string">
+ <ipxact:name>gui_ps_units3</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units4" type="string">
+ <ipxact:name>gui_ps_units4</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units5" type="string">
+ <ipxact:name>gui_ps_units5</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units6" type="string">
+ <ipxact:name>gui_ps_units6</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units7" type="string">
+ <ipxact:name>gui_ps_units7</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units8" type="string">
+ <ipxact:name>gui_ps_units8</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units9" type="string">
+ <ipxact:name>gui_ps_units9</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units10" type="string">
+ <ipxact:name>gui_ps_units10</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units11" type="string">
+ <ipxact:name>gui_ps_units11</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units12" type="string">
+ <ipxact:name>gui_ps_units12</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units13" type="string">
+ <ipxact:name>gui_ps_units13</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units14" type="string">
+ <ipxact:name>gui_ps_units14</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units15" type="string">
+ <ipxact:name>gui_ps_units15</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units16" type="string">
+ <ipxact:name>gui_ps_units16</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_ps_units17" type="string">
+ <ipxact:name>gui_ps_units17</ipxact:name>
+ <ipxact:displayName>Phase Shift Units</ipxact:displayName>
+ <ipxact:value>ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift0" type="real">
+ <ipxact:name>gui_phase_shift0</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift1" type="real">
+ <ipxact:name>gui_phase_shift1</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift2" type="real">
+ <ipxact:name>gui_phase_shift2</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift3" type="real">
+ <ipxact:name>gui_phase_shift3</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift4" type="real">
+ <ipxact:name>gui_phase_shift4</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift5" type="real">
+ <ipxact:name>gui_phase_shift5</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift6" type="real">
+ <ipxact:name>gui_phase_shift6</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift7" type="real">
+ <ipxact:name>gui_phase_shift7</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift8" type="real">
+ <ipxact:name>gui_phase_shift8</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift9" type="real">
+ <ipxact:name>gui_phase_shift9</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift10" type="real">
+ <ipxact:name>gui_phase_shift10</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift11" type="real">
+ <ipxact:name>gui_phase_shift11</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift12" type="real">
+ <ipxact:name>gui_phase_shift12</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift13" type="real">
+ <ipxact:name>gui_phase_shift13</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift14" type="real">
+ <ipxact:name>gui_phase_shift14</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift15" type="real">
+ <ipxact:name>gui_phase_shift15</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift16" type="real">
+ <ipxact:name>gui_phase_shift16</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift17" type="real">
+ <ipxact:name>gui_phase_shift17</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg0" type="real">
+ <ipxact:name>gui_phase_shift_deg0</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg1" type="real">
+ <ipxact:name>gui_phase_shift_deg1</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg2" type="real">
+ <ipxact:name>gui_phase_shift_deg2</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg3" type="real">
+ <ipxact:name>gui_phase_shift_deg3</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg4" type="real">
+ <ipxact:name>gui_phase_shift_deg4</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg5" type="real">
+ <ipxact:name>gui_phase_shift_deg5</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg6" type="real">
+ <ipxact:name>gui_phase_shift_deg6</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg7" type="real">
+ <ipxact:name>gui_phase_shift_deg7</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg8" type="real">
+ <ipxact:name>gui_phase_shift_deg8</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg9" type="real">
+ <ipxact:name>gui_phase_shift_deg9</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg10" type="real">
+ <ipxact:name>gui_phase_shift_deg10</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg11" type="real">
+ <ipxact:name>gui_phase_shift_deg11</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg12" type="real">
+ <ipxact:name>gui_phase_shift_deg12</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg13" type="real">
+ <ipxact:name>gui_phase_shift_deg13</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg14" type="real">
+ <ipxact:name>gui_phase_shift_deg14</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg15" type="real">
+ <ipxact:name>gui_phase_shift_deg15</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg16" type="real">
+ <ipxact:name>gui_phase_shift_deg16</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_phase_shift_deg17" type="real">
+ <ipxact:name>gui_phase_shift_deg17</ipxact:name>
+ <ipxact:displayName>Desired Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift0" type="string">
+ <ipxact:name>gui_actual_phase_shift0</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift1" type="string">
+ <ipxact:name>gui_actual_phase_shift1</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift2" type="string">
+ <ipxact:name>gui_actual_phase_shift2</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift3" type="string">
+ <ipxact:name>gui_actual_phase_shift3</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift4" type="string">
+ <ipxact:name>gui_actual_phase_shift4</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift5" type="string">
+ <ipxact:name>gui_actual_phase_shift5</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift6" type="string">
+ <ipxact:name>gui_actual_phase_shift6</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift7" type="string">
+ <ipxact:name>gui_actual_phase_shift7</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift8" type="string">
+ <ipxact:name>gui_actual_phase_shift8</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift9" type="string">
+ <ipxact:name>gui_actual_phase_shift9</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift10" type="string">
+ <ipxact:name>gui_actual_phase_shift10</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift11" type="string">
+ <ipxact:name>gui_actual_phase_shift11</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift12" type="string">
+ <ipxact:name>gui_actual_phase_shift12</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift13" type="string">
+ <ipxact:name>gui_actual_phase_shift13</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift14" type="string">
+ <ipxact:name>gui_actual_phase_shift14</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift15" type="string">
+ <ipxact:name>gui_actual_phase_shift15</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift16" type="string">
+ <ipxact:name>gui_actual_phase_shift16</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift17" type="string">
+ <ipxact:name>gui_actual_phase_shift17</ipxact:name>
+ <ipxact:displayName>Actual phase shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range0" type="string">
+ <ipxact:name>gui_actual_phase_shift_range0</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0,78.1,89.3,104.2,125.0,156.2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range1" type="string">
+ <ipxact:name>gui_actual_phase_shift_range1</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0,78.1,89.3,104.2,125.0,156.2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range2" type="string">
+ <ipxact:name>gui_actual_phase_shift_range2</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range3" type="string">
+ <ipxact:name>gui_actual_phase_shift_range3</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range4" type="string">
+ <ipxact:name>gui_actual_phase_shift_range4</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range5" type="string">
+ <ipxact:name>gui_actual_phase_shift_range5</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range6" type="string">
+ <ipxact:name>gui_actual_phase_shift_range6</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range7" type="string">
+ <ipxact:name>gui_actual_phase_shift_range7</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range8" type="string">
+ <ipxact:name>gui_actual_phase_shift_range8</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range9" type="string">
+ <ipxact:name>gui_actual_phase_shift_range9</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range10" type="string">
+ <ipxact:name>gui_actual_phase_shift_range10</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range11" type="string">
+ <ipxact:name>gui_actual_phase_shift_range11</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range12" type="string">
+ <ipxact:name>gui_actual_phase_shift_range12</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range13" type="string">
+ <ipxact:name>gui_actual_phase_shift_range13</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range14" type="string">
+ <ipxact:name>gui_actual_phase_shift_range14</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range15" type="string">
+ <ipxact:name>gui_actual_phase_shift_range15</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range16" type="string">
+ <ipxact:name>gui_actual_phase_shift_range16</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_range17" type="string">
+ <ipxact:name>gui_actual_phase_shift_range17</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg0" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg0</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg1" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg1</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg2" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg2</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg3" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg3</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg4" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg4</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg5" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg5</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg6" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg6</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg7" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg7</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg8" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg8</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg9" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg9</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg10" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg10</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg11" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg11</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg12" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg12</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg13" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg13</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg14" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg14</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg15" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg15</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg16" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg16</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg17" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg17</ipxact:name>
+ <ipxact:displayName>Actual Phase Shift</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range0" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range0</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0,2.8,3.2,3.8,4.5,5.6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range1" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range1</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0,5.6,6.4,7.5,9.0,11.2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range2" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range2</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range3" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range3</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range4" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range4</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range5" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range5</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range6" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range6</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range7" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range7</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range8" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range8</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range9" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range9</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range10" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range10</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range11" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range11</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range12" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range12</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range13" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range13</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range14" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range14</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range15" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range15</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range16" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range16</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_phase_shift_deg_range17" type="string">
+ <ipxact:name>gui_actual_phase_shift_deg_range17</ipxact:name>
+ <ipxact:displayName>Legal Phase Shifts</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle0" type="real">
+ <ipxact:name>gui_duty_cycle0</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle1" type="real">
+ <ipxact:name>gui_duty_cycle1</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle2" type="real">
+ <ipxact:name>gui_duty_cycle2</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle3" type="real">
+ <ipxact:name>gui_duty_cycle3</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle4" type="real">
+ <ipxact:name>gui_duty_cycle4</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle5" type="real">
+ <ipxact:name>gui_duty_cycle5</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle6" type="real">
+ <ipxact:name>gui_duty_cycle6</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle7" type="real">
+ <ipxact:name>gui_duty_cycle7</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle8" type="real">
+ <ipxact:name>gui_duty_cycle8</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle9" type="real">
+ <ipxact:name>gui_duty_cycle9</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle10" type="real">
+ <ipxact:name>gui_duty_cycle10</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle11" type="real">
+ <ipxact:name>gui_duty_cycle11</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle12" type="real">
+ <ipxact:name>gui_duty_cycle12</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle13" type="real">
+ <ipxact:name>gui_duty_cycle13</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle14" type="real">
+ <ipxact:name>gui_duty_cycle14</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle15" type="real">
+ <ipxact:name>gui_duty_cycle15</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle16" type="real">
+ <ipxact:name>gui_duty_cycle16</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_duty_cycle17" type="real">
+ <ipxact:name>gui_duty_cycle17</ipxact:name>
+ <ipxact:displayName>Desired Duty Cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle0" type="string">
+ <ipxact:name>gui_actual_duty_cycle0</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle1" type="string">
+ <ipxact:name>gui_actual_duty_cycle1</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle2" type="string">
+ <ipxact:name>gui_actual_duty_cycle2</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle3" type="string">
+ <ipxact:name>gui_actual_duty_cycle3</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle4" type="string">
+ <ipxact:name>gui_actual_duty_cycle4</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle5" type="string">
+ <ipxact:name>gui_actual_duty_cycle5</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle6" type="string">
+ <ipxact:name>gui_actual_duty_cycle6</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle7" type="string">
+ <ipxact:name>gui_actual_duty_cycle7</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle8" type="string">
+ <ipxact:name>gui_actual_duty_cycle8</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle9" type="string">
+ <ipxact:name>gui_actual_duty_cycle9</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle10" type="string">
+ <ipxact:name>gui_actual_duty_cycle10</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle11" type="string">
+ <ipxact:name>gui_actual_duty_cycle11</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle12" type="string">
+ <ipxact:name>gui_actual_duty_cycle12</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle13" type="string">
+ <ipxact:name>gui_actual_duty_cycle13</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle14" type="string">
+ <ipxact:name>gui_actual_duty_cycle14</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle15" type="string">
+ <ipxact:name>gui_actual_duty_cycle15</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle16" type="string">
+ <ipxact:name>gui_actual_duty_cycle16</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle17" type="string">
+ <ipxact:name>gui_actual_duty_cycle17</ipxact:name>
+ <ipxact:displayName>Actual duty cycle</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range0" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range0</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>45.83,46.43,46.88,50.0,53.12,53.57</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range1" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range1</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>41.67,42.86,43.75,50.0,56.25,57.14</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range2" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range2</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range3" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range3</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range4" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range4</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range5" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range5</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range6" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range6</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range7" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range7</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range8" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range8</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range9" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range9</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range10" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range10</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range11" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range11</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range12" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range12</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range13" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range13</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range14" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range14</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range15" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range15</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range16" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range16</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_actual_duty_cycle_range17" type="string">
+ <ipxact:name>gui_actual_duty_cycle_range17</ipxact:name>
+ <ipxact:displayName>Legal Duty Cycles</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="parameterTable_names" type="string">
+ <ipxact:name>parameterTable_names</ipxact:name>
+ <ipxact:displayName>Parameter Names</ipxact:displayName>
+ <ipxact:value>M-Counter Divide Setting,N-Counter Divide Setting,VCO Frequency,C-Counter-0 Divide Setting,C-Counter-1 Divide Setting,C-Counter-2 Divide Setting,C-Counter-3 Divide Setting,C-Counter-4 Divide Setting,C-Counter-5 Divide Setting,C-Counter-6 Divide Setting,C-Counter-7 Divide Setting,C-Counter-8 Divide Setting,PLL Auto Reset,M-Counter Hi Divide,M-Counter Lo Divide,M-Counter Even Duty Enable,M-Counter Bypass Enable,N-Counter Hi Divide,N-Counter Lo Divide,N-Counter Even Duty Enable,N-Counter Bypass Enable,C-Counter-0 Hi Divide,C-Counter-1 Hi Divide,C-Counter-2 Hi Divide,C-Counter-3 Hi Divide,C-Counter-4 Hi Divide,C-Counter-5 Hi Divide,C-Counter-6 Hi Divide,C-Counter-7 Hi Divide,C-Counter-8 Hi Divide,C-Counter-0 Lo Divide,C-Counter-1 Lo Divide,C-Counter-2 Lo Divide,C-Counter-3 Lo Divide,C-Counter-4 Lo Divide,C-Counter-5 Lo Divide,C-Counter-6 Lo Divide,C-Counter-7 Lo Divide,C-Counter-8 Lo Divide,C-Counter-0 Even Duty Enable,C-Counter-1 Even Duty Enable,C-Counter-2 Even Duty Enable,C-Counter-3 Even Duty Enable,C-Counter-4 Even Duty Enable,C-Counter-5 Even Duty Enable,C-Counter-6 Even Duty Enable,C-Counter-7 Even Duty Enable,C-Counter-8 Even Duty Enable,C-Counter-0 Bypass Enable,C-Counter-1 Bypass Enable,C-Counter-2 Bypass Enable,C-Counter-3 Bypass Enable,C-Counter-4 Bypass Enable,C-Counter-5 Bypass Enable,C-Counter-6 Bypass Enable,C-Counter-7 Bypass Enable,C-Counter-8 Bypass Enable,C-Counter-0 Preset,C-Counter-1 Preset,C-Counter-2 Preset,C-Counter-3 Preset,C-Counter-4 Preset,C-Counter-5 Preset,C-Counter-6 Preset,C-Counter-7 Preset,C-Counter-8 Preset,C-Counter-0 Phase Mux Preset,C-Counter-1 Phase Mux Preset,C-Counter-2 Phase Mux Preset,C-Counter-3 Phase Mux Preset,C-Counter-4 Phase Mux Preset,C-Counter-5 Phase Mux Preset,C-Counter-6 Phase Mux Preset,C-Counter-7 Phase Mux Preset,C-Counter-8 Phase Mux Preset,Charge Pump Current,Bandwidth Control</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="parameterTable_values" type="string">
+ <ipxact:name>parameterTable_values</ipxact:name>
+ <ipxact:displayName>Parameter Values</ipxact:displayName>
+ <ipxact:value>4,1,800.0 MHz,8,4,1,1,1,1,1,1,1,false,2,2,false,false,256,256,false,true,4,2,256,256,256,256,256,256,256,4,2,256,256,256,256,256,256,256,false,false,false,false,false,false,false,false,false,false,false,true,true,true,true,true,true,true,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,pll_cp_setting10,pll_bw_res_setting2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="mifTable_names" type="string">
+ <ipxact:name>mifTable_names</ipxact:name>
+ <ipxact:displayName>MIF File Property</ipxact:displayName>
+ <ipxact:value>The MIF file specified does not yet exist</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="mifTable_values" type="string">
+ <ipxact:name>mifTable_values</ipxact:name>
+ <ipxact:displayName>Values</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_m_cnt_basic" type="int">
+ <ipxact:name>pll_m_cnt_basic</ipxact:name>
+ <ipxact:displayName>pll_m_cnt_basic</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_m_cnt" type="int">
+ <ipxact:name>pll_m_cnt</ipxact:name>
+ <ipxact:displayName>pll_m_cnt</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prot_mode" type="string">
+ <ipxact:name>prot_mode</ipxact:name>
+ <ipxact:displayName>prot_mode</ipxact:displayName>
+ <ipxact:value>BASIC</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="m_cnt_hi_div" type="int">
+ <ipxact:name>m_cnt_hi_div</ipxact:name>
+ <ipxact:displayName>m_cnt_hi_div</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="eff_m_cnt" type="int">
+ <ipxact:name>eff_m_cnt</ipxact:name>
+ <ipxact:displayName>eff_m_cnt</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="multiply_factor" type="int">
+ <ipxact:name>multiply_factor</ipxact:name>
+ <ipxact:displayName>multiply_factor</ipxact:displayName>
+ <ipxact:value>4</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="use_core_refclk" type="bit">
+ <ipxact:name>use_core_refclk</ipxact:name>
+ <ipxact:displayName>use_core_refclk</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="m_cnt_lo_div" type="int">
+ <ipxact:name>m_cnt_lo_div</ipxact:name>
+ <ipxact:displayName>m_cnt_lo_div</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="n_cnt_hi_div" type="int">
+ <ipxact:name>n_cnt_hi_div</ipxact:name>
+ <ipxact:displayName>n_cnt_hi_div</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="n_cnt_lo_div" type="int">
+ <ipxact:name>n_cnt_lo_div</ipxact:name>
+ <ipxact:displayName>n_cnt_lo_div</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="m_cnt_bypass_en" type="bit">
+ <ipxact:name>m_cnt_bypass_en</ipxact:name>
+ <ipxact:displayName>m_cnt_bypass_en</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="n_cnt_bypass_en" type="bit">
+ <ipxact:name>n_cnt_bypass_en</ipxact:name>
+ <ipxact:displayName>n_cnt_bypass_en</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="m_cnt_odd_div_duty_en" type="bit">
+ <ipxact:name>m_cnt_odd_div_duty_en</ipxact:name>
+ <ipxact:displayName>m_cnt_odd_div_duty_en</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="n_cnt_odd_div_duty_en" type="bit">
+ <ipxact:name>n_cnt_odd_div_duty_en</ipxact:name>
+ <ipxact:displayName>n_cnt_odd_div_duty_en</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_vco_div" type="int">
+ <ipxact:name>pll_vco_div</ipxact:name>
+ <ipxact:displayName>pll_vco_div</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_cp_current" type="string">
+ <ipxact:name>pll_cp_current</ipxact:name>
+ <ipxact:displayName>pll_cp_current</ipxact:displayName>
+ <ipxact:value>pll_cp_setting10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_bwctrl" type="string">
+ <ipxact:name>pll_bwctrl</ipxact:name>
+ <ipxact:displayName>pll_bwctrl</ipxact:displayName>
+ <ipxact:value>pll_bw_res_setting2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_ripplecap_ctrl" type="string">
+ <ipxact:name>pll_ripplecap_ctrl</ipxact:name>
+ <ipxact:displayName>pll_ripplecap_ctrl</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_fractional_division" type="int">
+ <ipxact:name>pll_fractional_division</ipxact:name>
+ <ipxact:displayName>pll_fractional_division</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="fractional_vco_multiplier" type="bit">
+ <ipxact:name>fractional_vco_multiplier</ipxact:name>
+ <ipxact:displayName>fractional_vco_multiplier</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="reference_clock_frequency" type="string">
+ <ipxact:name>reference_clock_frequency</ipxact:name>
+ <ipxact:displayName>reference_clock_frequency</ipxact:displayName>
+ <ipxact:value>200.0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_fractional_cout" type="int">
+ <ipxact:name>pll_fractional_cout</ipxact:name>
+ <ipxact:displayName>pll_fractional_cout</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_dsm_out_sel" type="string">
+ <ipxact:name>pll_dsm_out_sel</ipxact:name>
+ <ipxact:displayName>pll_dsm_out_sel</ipxact:displayName>
+ <ipxact:value>1st_order</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="operation_mode" type="string">
+ <ipxact:name>operation_mode</ipxact:name>
+ <ipxact:displayName>operation_mode</ipxact:displayName>
+ <ipxact:value>source_synchronous</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="number_of_clocks" type="int">
+ <ipxact:name>number_of_clocks</ipxact:name>
+ <ipxact:displayName>number_of_clocks</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="number_of_outclks" type="int">
+ <ipxact:name>number_of_outclks</ipxact:name>
+ <ipxact:displayName>number_of_outclks</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_vcoph_div" type="int">
+ <ipxact:name>pll_vcoph_div</ipxact:name>
+ <ipxact:displayName>pll_vcoph_div</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_type" type="string">
+ <ipxact:name>pll_type</ipxact:name>
+ <ipxact:displayName>pll_type</ipxact:displayName>
+ <ipxact:value>Arria 10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_subtype" type="string">
+ <ipxact:name>pll_subtype</ipxact:name>
+ <ipxact:displayName>pll_subtype</ipxact:displayName>
+ <ipxact:value>General</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_output_clk_frequency" type="string">
+ <ipxact:name>pll_output_clk_frequency</ipxact:name>
+ <ipxact:displayName>pll_output_clk_frequency</ipxact:displayName>
+ <ipxact:value>800.0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_pfd_frequency" type="string">
+ <ipxact:name>pll_pfd_frequency</ipxact:name>
+ <ipxact:displayName>pll_pfd_frequency</ipxact:displayName>
+ <ipxact:value>200.0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="mimic_fbclk_type" type="string">
+ <ipxact:name>mimic_fbclk_type</ipxact:name>
+ <ipxact:displayName>mimic_fbclk_type</ipxact:displayName>
+ <ipxact:value>gclk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_bw_sel" type="string">
+ <ipxact:name>pll_bw_sel</ipxact:name>
+ <ipxact:displayName>pll_bw_sel</ipxact:displayName>
+ <ipxact:value>Low</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_slf_rst" type="bit">
+ <ipxact:name>pll_slf_rst</ipxact:name>
+ <ipxact:displayName>pll_slf_rst</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_fbclk_mux_1" type="string">
+ <ipxact:name>pll_fbclk_mux_1</ipxact:name>
+ <ipxact:displayName>pll_fbclk_mux_1</ipxact:displayName>
+ <ipxact:value>pll_fbclk_mux_1_glb</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_fbclk_mux_2" type="string">
+ <ipxact:name>pll_fbclk_mux_2</ipxact:name>
+ <ipxact:displayName>pll_fbclk_mux_2</ipxact:displayName>
+ <ipxact:value>pll_fbclk_mux_2_fb_1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_m_cnt_in_src" type="string">
+ <ipxact:name>pll_m_cnt_in_src</ipxact:name>
+ <ipxact:displayName>pll_m_cnt_in_src</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_clkin_0_src" type="string">
+ <ipxact:name>pll_clkin_0_src</ipxact:name>
+ <ipxact:displayName>pll_clkin_0_src</ipxact:displayName>
+ <ipxact:value>clk_0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="refclk1_frequency" type="string">
+ <ipxact:name>refclk1_frequency</ipxact:name>
+ <ipxact:displayName>refclk1_frequency</ipxact:displayName>
+ <ipxact:value>100.0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_clk_loss_sw_en" type="bit">
+ <ipxact:name>pll_clk_loss_sw_en</ipxact:name>
+ <ipxact:displayName>pll_clk_loss_sw_en</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_manu_clk_sw_en" type="bit">
+ <ipxact:name>pll_manu_clk_sw_en</ipxact:name>
+ <ipxact:displayName>pll_manu_clk_sw_en</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_auto_clk_sw_en" type="bit">
+ <ipxact:name>pll_auto_clk_sw_en</ipxact:name>
+ <ipxact:displayName>pll_auto_clk_sw_en</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_clkin_1_src" type="string">
+ <ipxact:name>pll_clkin_1_src</ipxact:name>
+ <ipxact:displayName>pll_clkin_1_src</ipxact:displayName>
+ <ipxact:value>clk_0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_clk_sw_dly" type="int">
+ <ipxact:name>pll_clk_sw_dly</ipxact:name>
+ <ipxact:displayName>pll_clk_sw_dly</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_extclk_0_cnt_src" type="string">
+ <ipxact:name>pll_extclk_0_cnt_src</ipxact:name>
+ <ipxact:displayName>pll_extclk_0_cnt_src</ipxact:displayName>
+ <ipxact:value>pll_extclk_cnt_src_vss</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_extclk_1_cnt_src" type="string">
+ <ipxact:name>pll_extclk_1_cnt_src</ipxact:name>
+ <ipxact:displayName>pll_extclk_1_cnt_src</ipxact:displayName>
+ <ipxact:value>pll_extclk_cnt_src_vss</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_lock_fltr_cfg" type="int">
+ <ipxact:name>pll_lock_fltr_cfg</ipxact:name>
+ <ipxact:displayName>pll_lock_fltr_cfg</ipxact:displayName>
+ <ipxact:value>100</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_unlock_fltr_cfg" type="int">
+ <ipxact:name>pll_unlock_fltr_cfg</ipxact:name>
+ <ipxact:displayName>pll_unlock_fltr_cfg</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="lock_mode" type="string">
+ <ipxact:name>lock_mode</ipxact:name>
+ <ipxact:displayName>lock_mode</ipxact:displayName>
+ <ipxact:value>low_lock_time</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_to_compensate" type="int">
+ <ipxact:name>clock_to_compensate</ipxact:name>
+ <ipxact:displayName>clock_to_compensate</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_global" type="bit">
+ <ipxact:name>clock_name_global</ipxact:name>
+ <ipxact:displayName>clock_name_global</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_freqcal_en" type="bit">
+ <ipxact:name>pll_freqcal_en</ipxact:name>
+ <ipxact:displayName>pll_freqcal_en</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_defer_cal_user_mode" type="bit">
+ <ipxact:name>pll_defer_cal_user_mode</ipxact:name>
+ <ipxact:displayName>pll_defer_cal_user_mode</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="dprio_interface_sel" type="int">
+ <ipxact:name>dprio_interface_sel</ipxact:name>
+ <ipxact:displayName>dprio_interface_sel</ipxact:displayName>
+ <ipxact:value>3</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="merging_permitted" type="bit">
+ <ipxact:name>merging_permitted</ipxact:name>
+ <ipxact:displayName>merging_permitted</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div0" type="int">
+ <ipxact:name>c_cnt_hi_div0</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div0</ipxact:displayName>
+ <ipxact:value>4</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div1" type="int">
+ <ipxact:name>c_cnt_hi_div1</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div1</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div2" type="int">
+ <ipxact:name>c_cnt_hi_div2</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div2</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div3" type="int">
+ <ipxact:name>c_cnt_hi_div3</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div3</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div4" type="int">
+ <ipxact:name>c_cnt_hi_div4</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div4</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div5" type="int">
+ <ipxact:name>c_cnt_hi_div5</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div5</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div6" type="int">
+ <ipxact:name>c_cnt_hi_div6</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div6</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div7" type="int">
+ <ipxact:name>c_cnt_hi_div7</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div7</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div8" type="int">
+ <ipxact:name>c_cnt_hi_div8</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div8</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div9" type="int">
+ <ipxact:name>c_cnt_hi_div9</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div9</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div10" type="int">
+ <ipxact:name>c_cnt_hi_div10</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div10</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div11" type="int">
+ <ipxact:name>c_cnt_hi_div11</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div11</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div12" type="int">
+ <ipxact:name>c_cnt_hi_div12</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div12</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div13" type="int">
+ <ipxact:name>c_cnt_hi_div13</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div13</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div14" type="int">
+ <ipxact:name>c_cnt_hi_div14</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div14</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div15" type="int">
+ <ipxact:name>c_cnt_hi_div15</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div15</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div16" type="int">
+ <ipxact:name>c_cnt_hi_div16</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div16</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_hi_div17" type="int">
+ <ipxact:name>c_cnt_hi_div17</ipxact:name>
+ <ipxact:displayName>c_cnt_hi_div17</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div0" type="int">
+ <ipxact:name>c_cnt_lo_div0</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div0</ipxact:displayName>
+ <ipxact:value>4</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div1" type="int">
+ <ipxact:name>c_cnt_lo_div1</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div1</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div2" type="int">
+ <ipxact:name>c_cnt_lo_div2</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div2</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div3" type="int">
+ <ipxact:name>c_cnt_lo_div3</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div3</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div4" type="int">
+ <ipxact:name>c_cnt_lo_div4</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div4</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div5" type="int">
+ <ipxact:name>c_cnt_lo_div5</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div5</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div6" type="int">
+ <ipxact:name>c_cnt_lo_div6</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div6</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div7" type="int">
+ <ipxact:name>c_cnt_lo_div7</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div7</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div8" type="int">
+ <ipxact:name>c_cnt_lo_div8</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div8</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div9" type="int">
+ <ipxact:name>c_cnt_lo_div9</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div9</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div10" type="int">
+ <ipxact:name>c_cnt_lo_div10</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div10</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div11" type="int">
+ <ipxact:name>c_cnt_lo_div11</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div11</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div12" type="int">
+ <ipxact:name>c_cnt_lo_div12</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div12</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div13" type="int">
+ <ipxact:name>c_cnt_lo_div13</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div13</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div14" type="int">
+ <ipxact:name>c_cnt_lo_div14</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div14</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div15" type="int">
+ <ipxact:name>c_cnt_lo_div15</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div15</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div16" type="int">
+ <ipxact:name>c_cnt_lo_div16</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div16</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_lo_div17" type="int">
+ <ipxact:name>c_cnt_lo_div17</ipxact:name>
+ <ipxact:displayName>c_cnt_lo_div17</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst0" type="int">
+ <ipxact:name>c_cnt_prst0</ipxact:name>
+ <ipxact:displayName>c_cnt_prst0</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst1" type="int">
+ <ipxact:name>c_cnt_prst1</ipxact:name>
+ <ipxact:displayName>c_cnt_prst1</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst2" type="int">
+ <ipxact:name>c_cnt_prst2</ipxact:name>
+ <ipxact:displayName>c_cnt_prst2</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst3" type="int">
+ <ipxact:name>c_cnt_prst3</ipxact:name>
+ <ipxact:displayName>c_cnt_prst3</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst4" type="int">
+ <ipxact:name>c_cnt_prst4</ipxact:name>
+ <ipxact:displayName>c_cnt_prst4</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst5" type="int">
+ <ipxact:name>c_cnt_prst5</ipxact:name>
+ <ipxact:displayName>c_cnt_prst5</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst6" type="int">
+ <ipxact:name>c_cnt_prst6</ipxact:name>
+ <ipxact:displayName>c_cnt_prst6</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst7" type="int">
+ <ipxact:name>c_cnt_prst7</ipxact:name>
+ <ipxact:displayName>c_cnt_prst7</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst8" type="int">
+ <ipxact:name>c_cnt_prst8</ipxact:name>
+ <ipxact:displayName>c_cnt_prst8</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst9" type="int">
+ <ipxact:name>c_cnt_prst9</ipxact:name>
+ <ipxact:displayName>c_cnt_prst9</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst10" type="int">
+ <ipxact:name>c_cnt_prst10</ipxact:name>
+ <ipxact:displayName>c_cnt_prst10</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst11" type="int">
+ <ipxact:name>c_cnt_prst11</ipxact:name>
+ <ipxact:displayName>c_cnt_prst11</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst12" type="int">
+ <ipxact:name>c_cnt_prst12</ipxact:name>
+ <ipxact:displayName>c_cnt_prst12</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst13" type="int">
+ <ipxact:name>c_cnt_prst13</ipxact:name>
+ <ipxact:displayName>c_cnt_prst13</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst14" type="int">
+ <ipxact:name>c_cnt_prst14</ipxact:name>
+ <ipxact:displayName>c_cnt_prst14</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst15" type="int">
+ <ipxact:name>c_cnt_prst15</ipxact:name>
+ <ipxact:displayName>c_cnt_prst15</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst16" type="int">
+ <ipxact:name>c_cnt_prst16</ipxact:name>
+ <ipxact:displayName>c_cnt_prst16</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_prst17" type="int">
+ <ipxact:name>c_cnt_prst17</ipxact:name>
+ <ipxact:displayName>c_cnt_prst17</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst0" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst0</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst0</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst1" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst1</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst1</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst2" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst2</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst2</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst3" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst3</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst3</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst4" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst4</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst4</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst5" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst5</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst5</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst6" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst6</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst6</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst7" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst7</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst7</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst8" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst8</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst8</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst9" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst9</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst9</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst10" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst10</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst10</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst11" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst11</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst11</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst12" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst12</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst12</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst13" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst13</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst13</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst14" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst14</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst14</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst15" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst15</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst15</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst16" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst16</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst16</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_ph_mux_prst17" type="int">
+ <ipxact:name>c_cnt_ph_mux_prst17</ipxact:name>
+ <ipxact:displayName>c_cnt_ph_mux_prst17</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src0" type="string">
+ <ipxact:name>c_cnt_in_src0</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src0</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src1" type="string">
+ <ipxact:name>c_cnt_in_src1</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src1</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src2" type="string">
+ <ipxact:name>c_cnt_in_src2</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src2</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src3" type="string">
+ <ipxact:name>c_cnt_in_src3</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src3</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src4" type="string">
+ <ipxact:name>c_cnt_in_src4</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src4</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src5" type="string">
+ <ipxact:name>c_cnt_in_src5</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src5</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src6" type="string">
+ <ipxact:name>c_cnt_in_src6</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src6</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src7" type="string">
+ <ipxact:name>c_cnt_in_src7</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src7</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src8" type="string">
+ <ipxact:name>c_cnt_in_src8</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src8</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src9" type="string">
+ <ipxact:name>c_cnt_in_src9</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src9</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src10" type="string">
+ <ipxact:name>c_cnt_in_src10</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src10</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src11" type="string">
+ <ipxact:name>c_cnt_in_src11</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src11</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src12" type="string">
+ <ipxact:name>c_cnt_in_src12</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src12</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src13" type="string">
+ <ipxact:name>c_cnt_in_src13</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src13</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src14" type="string">
+ <ipxact:name>c_cnt_in_src14</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src14</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src15" type="string">
+ <ipxact:name>c_cnt_in_src15</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src15</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src16" type="string">
+ <ipxact:name>c_cnt_in_src16</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src16</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_in_src17" type="string">
+ <ipxact:name>c_cnt_in_src17</ipxact:name>
+ <ipxact:displayName>c_cnt_in_src17</ipxact:displayName>
+ <ipxact:value>c_m_cnt_in_src_ph_mux_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en0" type="bit">
+ <ipxact:name>c_cnt_bypass_en0</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en0</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en1" type="bit">
+ <ipxact:name>c_cnt_bypass_en1</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en1</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en2" type="bit">
+ <ipxact:name>c_cnt_bypass_en2</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en2</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en3" type="bit">
+ <ipxact:name>c_cnt_bypass_en3</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en3</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en4" type="bit">
+ <ipxact:name>c_cnt_bypass_en4</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en4</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en5" type="bit">
+ <ipxact:name>c_cnt_bypass_en5</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en5</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en6" type="bit">
+ <ipxact:name>c_cnt_bypass_en6</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en6</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en7" type="bit">
+ <ipxact:name>c_cnt_bypass_en7</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en7</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en8" type="bit">
+ <ipxact:name>c_cnt_bypass_en8</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en8</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en9" type="bit">
+ <ipxact:name>c_cnt_bypass_en9</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en9</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en10" type="bit">
+ <ipxact:name>c_cnt_bypass_en10</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en10</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en11" type="bit">
+ <ipxact:name>c_cnt_bypass_en11</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en11</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en12" type="bit">
+ <ipxact:name>c_cnt_bypass_en12</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en12</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en13" type="bit">
+ <ipxact:name>c_cnt_bypass_en13</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en13</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en14" type="bit">
+ <ipxact:name>c_cnt_bypass_en14</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en14</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en15" type="bit">
+ <ipxact:name>c_cnt_bypass_en15</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en15</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en16" type="bit">
+ <ipxact:name>c_cnt_bypass_en16</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en16</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_bypass_en17" type="bit">
+ <ipxact:name>c_cnt_bypass_en17</ipxact:name>
+ <ipxact:displayName>c_cnt_bypass_en17</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en0" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en0</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en0</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en1" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en1</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en1</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en2" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en2</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en2</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en3" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en3</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en3</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en4" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en4</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en4</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en5" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en5</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en5</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en6" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en6</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en6</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en7" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en7</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en7</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en8" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en8</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en8</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en9" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en9</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en9</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en10" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en10</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en10</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en11" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en11</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en11</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en12" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en12</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en12</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en13" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en13</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en13</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en14" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en14</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en14</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en15" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en15</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en15</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en16" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en16</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en16</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="c_cnt_odd_div_duty_en17" type="bit">
+ <ipxact:name>c_cnt_odd_div_duty_en17</ipxact:name>
+ <ipxact:displayName>c_cnt_odd_div_duty_en17</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency0" type="string">
+ <ipxact:name>output_clock_frequency0</ipxact:name>
+ <ipxact:displayName>output_clock_frequency0</ipxact:displayName>
+ <ipxact:value>100.0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency1" type="string">
+ <ipxact:name>output_clock_frequency1</ipxact:name>
+ <ipxact:displayName>output_clock_frequency1</ipxact:displayName>
+ <ipxact:value>200.0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency2" type="string">
+ <ipxact:name>output_clock_frequency2</ipxact:name>
+ <ipxact:displayName>output_clock_frequency2</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency3" type="string">
+ <ipxact:name>output_clock_frequency3</ipxact:name>
+ <ipxact:displayName>output_clock_frequency3</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency4" type="string">
+ <ipxact:name>output_clock_frequency4</ipxact:name>
+ <ipxact:displayName>output_clock_frequency4</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency5" type="string">
+ <ipxact:name>output_clock_frequency5</ipxact:name>
+ <ipxact:displayName>output_clock_frequency5</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency6" type="string">
+ <ipxact:name>output_clock_frequency6</ipxact:name>
+ <ipxact:displayName>output_clock_frequency6</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency7" type="string">
+ <ipxact:name>output_clock_frequency7</ipxact:name>
+ <ipxact:displayName>output_clock_frequency7</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency8" type="string">
+ <ipxact:name>output_clock_frequency8</ipxact:name>
+ <ipxact:displayName>output_clock_frequency8</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency9" type="string">
+ <ipxact:name>output_clock_frequency9</ipxact:name>
+ <ipxact:displayName>output_clock_frequency9</ipxact:displayName>
+ <ipxact:value>0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency10" type="string">
+ <ipxact:name>output_clock_frequency10</ipxact:name>
+ <ipxact:displayName>output_clock_frequency10</ipxact:displayName>
+ <ipxact:value>0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency11" type="string">
+ <ipxact:name>output_clock_frequency11</ipxact:name>
+ <ipxact:displayName>output_clock_frequency11</ipxact:displayName>
+ <ipxact:value>0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency12" type="string">
+ <ipxact:name>output_clock_frequency12</ipxact:name>
+ <ipxact:displayName>output_clock_frequency12</ipxact:displayName>
+ <ipxact:value>0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency13" type="string">
+ <ipxact:name>output_clock_frequency13</ipxact:name>
+ <ipxact:displayName>output_clock_frequency13</ipxact:displayName>
+ <ipxact:value>0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency14" type="string">
+ <ipxact:name>output_clock_frequency14</ipxact:name>
+ <ipxact:displayName>output_clock_frequency14</ipxact:displayName>
+ <ipxact:value>0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency15" type="string">
+ <ipxact:name>output_clock_frequency15</ipxact:name>
+ <ipxact:displayName>output_clock_frequency15</ipxact:displayName>
+ <ipxact:value>0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency16" type="string">
+ <ipxact:name>output_clock_frequency16</ipxact:name>
+ <ipxact:displayName>output_clock_frequency16</ipxact:displayName>
+ <ipxact:value>0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="output_clock_frequency17" type="string">
+ <ipxact:name>output_clock_frequency17</ipxact:name>
+ <ipxact:displayName>output_clock_frequency17</ipxact:displayName>
+ <ipxact:value>0 MHz</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift0" type="string">
+ <ipxact:name>phase_shift0</ipxact:name>
+ <ipxact:displayName>phase_shift0</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift1" type="string">
+ <ipxact:name>phase_shift1</ipxact:name>
+ <ipxact:displayName>phase_shift1</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift2" type="string">
+ <ipxact:name>phase_shift2</ipxact:name>
+ <ipxact:displayName>phase_shift2</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift3" type="string">
+ <ipxact:name>phase_shift3</ipxact:name>
+ <ipxact:displayName>phase_shift3</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift4" type="string">
+ <ipxact:name>phase_shift4</ipxact:name>
+ <ipxact:displayName>phase_shift4</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift5" type="string">
+ <ipxact:name>phase_shift5</ipxact:name>
+ <ipxact:displayName>phase_shift5</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift6" type="string">
+ <ipxact:name>phase_shift6</ipxact:name>
+ <ipxact:displayName>phase_shift6</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift7" type="string">
+ <ipxact:name>phase_shift7</ipxact:name>
+ <ipxact:displayName>phase_shift7</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift8" type="string">
+ <ipxact:name>phase_shift8</ipxact:name>
+ <ipxact:displayName>phase_shift8</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift9" type="string">
+ <ipxact:name>phase_shift9</ipxact:name>
+ <ipxact:displayName>phase_shift9</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift10" type="string">
+ <ipxact:name>phase_shift10</ipxact:name>
+ <ipxact:displayName>phase_shift10</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift11" type="string">
+ <ipxact:name>phase_shift11</ipxact:name>
+ <ipxact:displayName>phase_shift11</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift12" type="string">
+ <ipxact:name>phase_shift12</ipxact:name>
+ <ipxact:displayName>phase_shift12</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift13" type="string">
+ <ipxact:name>phase_shift13</ipxact:name>
+ <ipxact:displayName>phase_shift13</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift14" type="string">
+ <ipxact:name>phase_shift14</ipxact:name>
+ <ipxact:displayName>phase_shift14</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift15" type="string">
+ <ipxact:name>phase_shift15</ipxact:name>
+ <ipxact:displayName>phase_shift15</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift16" type="string">
+ <ipxact:name>phase_shift16</ipxact:name>
+ <ipxact:displayName>phase_shift16</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="phase_shift17" type="string">
+ <ipxact:name>phase_shift17</ipxact:name>
+ <ipxact:displayName>phase_shift17</ipxact:displayName>
+ <ipxact:value>0 ps</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle0" type="int">
+ <ipxact:name>duty_cycle0</ipxact:name>
+ <ipxact:displayName>duty_cycle0</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle1" type="int">
+ <ipxact:name>duty_cycle1</ipxact:name>
+ <ipxact:displayName>duty_cycle1</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle2" type="int">
+ <ipxact:name>duty_cycle2</ipxact:name>
+ <ipxact:displayName>duty_cycle2</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle3" type="int">
+ <ipxact:name>duty_cycle3</ipxact:name>
+ <ipxact:displayName>duty_cycle3</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle4" type="int">
+ <ipxact:name>duty_cycle4</ipxact:name>
+ <ipxact:displayName>duty_cycle4</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle5" type="int">
+ <ipxact:name>duty_cycle5</ipxact:name>
+ <ipxact:displayName>duty_cycle5</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle6" type="int">
+ <ipxact:name>duty_cycle6</ipxact:name>
+ <ipxact:displayName>duty_cycle6</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle7" type="int">
+ <ipxact:name>duty_cycle7</ipxact:name>
+ <ipxact:displayName>duty_cycle7</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle8" type="int">
+ <ipxact:name>duty_cycle8</ipxact:name>
+ <ipxact:displayName>duty_cycle8</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle9" type="int">
+ <ipxact:name>duty_cycle9</ipxact:name>
+ <ipxact:displayName>duty_cycle9</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle10" type="int">
+ <ipxact:name>duty_cycle10</ipxact:name>
+ <ipxact:displayName>duty_cycle10</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle11" type="int">
+ <ipxact:name>duty_cycle11</ipxact:name>
+ <ipxact:displayName>duty_cycle11</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle12" type="int">
+ <ipxact:name>duty_cycle12</ipxact:name>
+ <ipxact:displayName>duty_cycle12</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle13" type="int">
+ <ipxact:name>duty_cycle13</ipxact:name>
+ <ipxact:displayName>duty_cycle13</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle14" type="int">
+ <ipxact:name>duty_cycle14</ipxact:name>
+ <ipxact:displayName>duty_cycle14</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle15" type="int">
+ <ipxact:name>duty_cycle15</ipxact:name>
+ <ipxact:displayName>duty_cycle15</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle16" type="int">
+ <ipxact:name>duty_cycle16</ipxact:name>
+ <ipxact:displayName>duty_cycle16</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="duty_cycle17" type="int">
+ <ipxact:name>duty_cycle17</ipxact:name>
+ <ipxact:displayName>duty_cycle17</ipxact:displayName>
+ <ipxact:value>50</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_0" type="string">
+ <ipxact:name>clock_name_0</ipxact:name>
+ <ipxact:displayName>clock_name_0</ipxact:displayName>
+ <ipxact:value>link_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_1" type="string">
+ <ipxact:name>clock_name_1</ipxact:name>
+ <ipxact:displayName>clock_name_1</ipxact:displayName>
+ <ipxact:value>frame_clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_2" type="string">
+ <ipxact:name>clock_name_2</ipxact:name>
+ <ipxact:displayName>clock_name_2</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_3" type="string">
+ <ipxact:name>clock_name_3</ipxact:name>
+ <ipxact:displayName>clock_name_3</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_4" type="string">
+ <ipxact:name>clock_name_4</ipxact:name>
+ <ipxact:displayName>clock_name_4</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_5" type="string">
+ <ipxact:name>clock_name_5</ipxact:name>
+ <ipxact:displayName>clock_name_5</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_6" type="string">
+ <ipxact:name>clock_name_6</ipxact:name>
+ <ipxact:displayName>clock_name_6</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_7" type="string">
+ <ipxact:name>clock_name_7</ipxact:name>
+ <ipxact:displayName>clock_name_7</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_8" type="string">
+ <ipxact:name>clock_name_8</ipxact:name>
+ <ipxact:displayName>clock_name_8</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_global_0" type="bit">
+ <ipxact:name>clock_name_global_0</ipxact:name>
+ <ipxact:displayName>clock_name_global_0</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_global_1" type="bit">
+ <ipxact:name>clock_name_global_1</ipxact:name>
+ <ipxact:displayName>clock_name_global_1</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_global_2" type="bit">
+ <ipxact:name>clock_name_global_2</ipxact:name>
+ <ipxact:displayName>clock_name_global_2</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_global_3" type="bit">
+ <ipxact:name>clock_name_global_3</ipxact:name>
+ <ipxact:displayName>clock_name_global_3</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_global_4" type="bit">
+ <ipxact:name>clock_name_global_4</ipxact:name>
+ <ipxact:displayName>clock_name_global_4</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_global_5" type="bit">
+ <ipxact:name>clock_name_global_5</ipxact:name>
+ <ipxact:displayName>clock_name_global_5</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_global_6" type="bit">
+ <ipxact:name>clock_name_global_6</ipxact:name>
+ <ipxact:displayName>clock_name_global_6</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_global_7" type="bit">
+ <ipxact:name>clock_name_global_7</ipxact:name>
+ <ipxact:displayName>clock_name_global_7</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="clock_name_global_8" type="bit">
+ <ipxact:name>clock_name_global_8</ipxact:name>
+ <ipxact:displayName>clock_name_global_8</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="divide_factor0" type="int">
+ <ipxact:name>divide_factor0</ipxact:name>
+ <ipxact:displayName>divide_factor0</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="divide_factor1" type="int">
+ <ipxact:name>divide_factor1</ipxact:name>
+ <ipxact:displayName>divide_factor1</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="divide_factor2" type="int">
+ <ipxact:name>divide_factor2</ipxact:name>
+ <ipxact:displayName>divide_factor2</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="divide_factor3" type="int">
+ <ipxact:name>divide_factor3</ipxact:name>
+ <ipxact:displayName>divide_factor3</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="divide_factor4" type="int">
+ <ipxact:name>divide_factor4</ipxact:name>
+ <ipxact:displayName>divide_factor4</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="divide_factor5" type="int">
+ <ipxact:name>divide_factor5</ipxact:name>
+ <ipxact:displayName>divide_factor5</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="divide_factor6" type="int">
+ <ipxact:name>divide_factor6</ipxact:name>
+ <ipxact:displayName>divide_factor6</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="divide_factor7" type="int">
+ <ipxact:name>divide_factor7</ipxact:name>
+ <ipxact:displayName>divide_factor7</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="divide_factor8" type="int">
+ <ipxact:name>divide_factor8</ipxact:name>
+ <ipxact:displayName>divide_factor8</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_tclk_mux_en" type="bit">
+ <ipxact:name>pll_tclk_mux_en</ipxact:name>
+ <ipxact:displayName>pll_tclk_mux_en</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_tclk_sel" type="string">
+ <ipxact:name>pll_tclk_sel</ipxact:name>
+ <ipxact:displayName>pll_tclk_sel</ipxact:displayName>
+ <ipxact:value>pll_tclk_m_src</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_vco_freq_band_0" type="string">
+ <ipxact:name>pll_vco_freq_band_0</ipxact:name>
+ <ipxact:displayName>pll_vco_freq_band_0</ipxact:displayName>
+ <ipxact:value>pll_freq_clk0_disabled</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_vco_freq_band_1" type="string">
+ <ipxact:name>pll_vco_freq_band_1</ipxact:name>
+ <ipxact:displayName>pll_vco_freq_band_1</ipxact:displayName>
+ <ipxact:value>pll_freq_clk1_disabled</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_freqcal_req_flag" type="bit">
+ <ipxact:name>pll_freqcal_req_flag</ipxact:name>
+ <ipxact:displayName>pll_freqcal_req_flag</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="cal_converge" type="bit">
+ <ipxact:name>cal_converge</ipxact:name>
+ <ipxact:displayName>cal_converge</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="cal_error" type="string">
+ <ipxact:name>cal_error</ipxact:name>
+ <ipxact:displayName>cal_error</ipxact:displayName>
+ <ipxact:value>cal_clean</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="pll_cal_done" type="bit">
+ <ipxact:name>pll_cal_done</ipxact:name>
+ <ipxact:displayName>pll_cal_done</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="include_iossm" type="bit">
+ <ipxact:name>include_iossm</ipxact:name>
+ <ipxact:displayName>include_iossm</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="cal_code_hex_file" type="string">
+ <ipxact:name>cal_code_hex_file</ipxact:name>
+ <ipxact:displayName>cal_code_hex_file</ipxact:displayName>
+ <ipxact:value>iossm.hex</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="parameter_table_hex_file" type="string">
+ <ipxact:name>parameter_table_hex_file</ipxact:name>
+ <ipxact:displayName>parameter_table_hex_file</ipxact:displayName>
+ <ipxact:value>seq_params_sim.hex</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="iossm_nios_sim_clk_period_ps" type="int">
+ <ipxact:name>iossm_nios_sim_clk_period_ps</ipxact:name>
+ <ipxact:displayName>iossm_nios_sim_clk_period_ps</ipxact:displayName>
+ <ipxact:value>1333</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_number_of_family_allowable_clocks" type="int">
+ <ipxact:name>hp_number_of_family_allowable_clocks</ipxact:name>
+ <ipxact:displayName>hp_number_of_family_allowable_clocks</ipxact:displayName>
+ <ipxact:value>9</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_previous_num_clocks" type="int">
+ <ipxact:name>hp_previous_num_clocks</ipxact:name>
+ <ipxact:displayName>hp_previous_num_clocks</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_vco_frequency_fp" type="real">
+ <ipxact:name>hp_actual_vco_frequency_fp</ipxact:name>
+ <ipxact:displayName>hp_actual_vco_frequency_fp</ipxact:displayName>
+ <ipxact:value>600.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_parameter_update_message" type="string">
+ <ipxact:name>hp_parameter_update_message</ipxact:name>
+ <ipxact:displayName>hp_parameter_update_message</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_qsys_scripting_mode" type="bit">
+ <ipxact:name>hp_qsys_scripting_mode</ipxact:name>
+ <ipxact:displayName>hp_qsys_scripting_mode</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp0" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp0</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp0</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp1" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp1</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp1</ipxact:displayName>
+ <ipxact:value>200.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp2" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp2</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp2</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp3" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp3</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp3</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp4" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp4</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp4</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp5" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp5</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp5</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp6" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp6</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp6</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp7" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp7</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp7</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp8" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp8</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp8</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp9" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp9</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp9</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp10" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp10</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp10</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp11" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp11</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp11</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp12" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp12</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp12</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp13" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp13</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp13</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp14" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp14</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp14</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp15" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp15</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp15</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp16" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp16</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp16</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_output_clock_frequency_fp17" type="real">
+ <ipxact:name>hp_actual_output_clock_frequency_fp17</ipxact:name>
+ <ipxact:displayName>hp_actual_output_clock_frequency_fp17</ipxact:displayName>
+ <ipxact:value>100.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp0" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp0</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp0</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp1" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp1</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp1</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp2" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp2</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp2</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp3" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp3</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp3</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp4" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp4</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp4</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp5" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp5</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp5</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp6" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp6</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp6</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp7" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp7</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp7</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp8" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp8</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp8</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp9" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp9</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp9</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp10" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp10</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp10</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp11" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp11</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp11</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp12" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp12</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp12</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp13" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp13</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp13</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp14" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp14</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp14</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp15" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp15</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp15</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp16" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp16</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp16</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_phase_shift_fp17" type="real">
+ <ipxact:name>hp_actual_phase_shift_fp17</ipxact:name>
+ <ipxact:displayName>hp_actual_phase_shift_fp17</ipxact:displayName>
+ <ipxact:value>0.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp0" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp0</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp0</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp1" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp1</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp1</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp2" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp2</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp2</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp3" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp3</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp3</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp4" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp4</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp4</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp5" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp5</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp5</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp6" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp6</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp6</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp7" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp7</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp7</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp8" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp8</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp8</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp9" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp9</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp9</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp10" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp10</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp10</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp11" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp11</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp11</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp12" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp12</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp12</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp13" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp13</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp13</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp14" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp14</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp14</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp15" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp15</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp15</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp16" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp16</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp16</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hp_actual_duty_cycle_fp17" type="real">
+ <ipxact:name>hp_actual_duty_cycle_fp17</ipxact:name>
+ <ipxact:displayName>hp_actual_duty_cycle_fp17</ipxact:displayName>
+ <ipxact:value>50.0</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_module_parameters>
+ <altera:altera_assignments>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="embeddedsw.dts.compatible" type="string">
+ <ipxact:name>embeddedsw.dts.compatible</ipxact:name>
+ <ipxact:value>altr,pll</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="embeddedsw.dts.group" type="string">
+ <ipxact:name>embeddedsw.dts.group</ipxact:name>
+ <ipxact:value>clock</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="embeddedsw.dts.vendor" type="string">
+ <ipxact:name>embeddedsw.dts.vendor</ipxact:name>
+ <ipxact:value>altr</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_assignments>
+ <altera:altera_system_parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="device" type="string">
+ <ipxact:name>device</ipxact:name>
+ <ipxact:displayName>Device</ipxact:displayName>
+ <ipxact:value>10AX115U2F45E1SG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="deviceFamily" type="string">
+ <ipxact:name>deviceFamily</ipxact:name>
+ <ipxact:displayName>Device family</ipxact:displayName>
+ <ipxact:value>Arria 10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="deviceSpeedGrade" type="string">
+ <ipxact:name>deviceSpeedGrade</ipxact:name>
+ <ipxact:displayName>Device Speed Grade</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="generationId" type="int">
+ <ipxact:name>generationId</ipxact:name>
+ <ipxact:displayName>Generation Id</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bonusData" type="string">
+ <ipxact:name>bonusData</ipxact:name>
+ <ipxact:displayName>bonusData</ipxact:displayName>
+ <ipxact:value>bonusData
+{
+ element $system
+ {
+ datum _originalDeviceFamily
+ {
+ value = "Arria 10";
+ type = "String";
+ }
+ }
+ element core_pll
+ {
+ datum _sortIndex
+ {
+ value = "0";
+ type = "int";
+ }
+ }
+}
+</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hideFromIPCatalog" type="bit">
+ <ipxact:name>hideFromIPCatalog</ipxact:name>
+ <ipxact:displayName>Hide from IP Catalog</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="lockedInterfaceDefinition" type="string">
+ <ipxact:name>lockedInterfaceDefinition</ipxact:name>
+ <ipxact:displayName>lockedInterfaceDefinition</ipxact:displayName>
+ <ipxact:value><boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rst</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>refclk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>refclk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>200000000</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>locked</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>locked</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>outclk0</name>
+ <type>clock</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>outclk_0</name>
+ <role>clk</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedDirectClock</key>
+ </entry>
+ <entry>
+ <key>clockRate</key>
+ <value>100000000</value>
+ </entry>
+ <entry>
+ <key>clockRateKnown</key>
+ <value>true</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>outclk1</name>
+ <type>clock</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>outclk_1</name>
+ <role>clk</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedDirectClock</key>
+ </entry>
+ <entry>
+ <key>clockRate</key>
+ <value>200000000</value>
+ </entry>
+ <entry>
+ <key>clockRateKnown</key>
+ <value>true</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="systemInfos" type="string">
+ <ipxact:name>systemInfos</ipxact:name>
+ <ipxact:displayName>systemInfos</ipxact:displayName>
+ <ipxact:value><systemInfosDefinition>
+ <connPtSystemInfos>
+ <entry>
+ <key>outclk0</key>
+ <value>
+ <connectionPointName>outclk0</connectionPointName>
+ <suppliedSystemInfos/>
+ <consumedSystemInfos>
+ <entry>
+ <key>CLOCK_RATE</key>
+ <value>100000000</value>
+ </entry>
+ </consumedSystemInfos>
+ </value>
+ </entry>
+ <entry>
+ <key>outclk1</key>
+ <value>
+ <connectionPointName>outclk1</connectionPointName>
+ <suppliedSystemInfos/>
+ <consumedSystemInfos>
+ <entry>
+ <key>CLOCK_RATE</key>
+ <value>200000000</value>
+ </entry>
+ </consumedSystemInfos>
+ </value>
+ </entry>
+ </connPtSystemInfos>
+</systemInfosDefinition></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </altera:altera_system_parameters>
+ <altera:altera_interface_boundary>
+ <altera:interface_mapping altera:name="locked" altera:internal="core_pll.locked" altera:type="conduit" altera:dir="end">
+ <altera:port_mapping altera:name="locked" altera:internal="locked"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="outclk0" altera:internal="core_pll.outclk0" altera:type="clock" altera:dir="start">
+ <altera:port_mapping altera:name="outclk_0" altera:internal="outclk_0"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="outclk1" altera:internal="core_pll.outclk1" altera:type="clock" altera:dir="start">
+ <altera:port_mapping altera:name="outclk_1" altera:internal="outclk_1"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="refclk" altera:internal="core_pll.refclk" altera:type="clock" altera:dir="end">
+ <altera:port_mapping altera:name="refclk" altera:internal="refclk"></altera:port_mapping>
+ </altera:interface_mapping>
+ <altera:interface_mapping altera:name="reset" altera:internal="core_pll.reset" altera:type="reset" altera:dir="end">
+ <altera:port_mapping altera:name="rst" altera:internal="rst"></altera:port_mapping>
+ </altera:interface_mapping>
+ </altera:altera_interface_boundary>
+ <altera:altera_has_warnings>false</altera:altera_has_warnings>
+ <altera:altera_has_errors>false</altera:altera_has_errors>
+ </ipxact:vendorExtensions>
+</ipxact:component>
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.qsys b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.qsys
similarity index 59%
rename from libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.qsys
rename to libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.qsys
index 4d2e0cc4067c0013bccc79c0640eaec0d7a5d194..54d51724bd607a1f157b66a1c62b4e59bf8d88c9 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.qsys
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.qsys
@@ -1,12 +1,12 @@
<?xml version="1.0" encoding="UTF-8"?>
-<system name="ip_arria10_e1sg_jesd204b_rx_core_pll">
+<system name="ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz">
<component
name="$${FILENAME}"
displayName="$${FILENAME}"
version="1.0"
description=""
tags=""
- categories=""
+ categories="System"
tool="QsysPro" />
<parameter name="bonusData"><![CDATA[bonusData
{
@@ -20,7 +20,6 @@
}
}
]]></parameter>
- <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
<parameter name="device" value="10AX115U2F45E1SG" />
<parameter name="deviceFamily" value="Arria 10" />
<parameter name="deviceSpeedGrade" value="1" />
@@ -31,23 +30,10 @@
<parameter name="hdlLanguage" value="VERILOG" />
<parameter name="hideFromIPCatalog" value="false" />
<parameter name="lockedInterfaceDefinition" value="" />
- <parameter name="maxAdditionalLatency" value="1" />
<parameter name="sopcBorderPoints" value="false" />
<parameter name="systemHash" value="0" />
<parameter name="systemInfos"><![CDATA[<systemInfosDefinition>
<connPtSystemInfos>
- <entry>
- <key>clk</key>
- <value>
- <connectionPointName>clk</connectionPointName>
- <suppliedSystemInfos>
- <entry>
- <key>CLOCK_RATE</key>
- </entry>
- </suppliedSystemInfos>
- <consumedSystemInfos/>
- </value>
- </entry>
<entry>
<key>outclk0</key>
<value>
@@ -297,11 +283,37 @@
</boundary>
<originalModuleInfo>
<className>altera_iopll</className>
- <version>18.0</version>
+ <version>19.3.0</version>
<displayName>IOPLL Intel FPGA IP</displayName>
</originalModuleInfo>
<systemInfoParameterDescriptors>
- <descriptors/>
+ <descriptors>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>system_info_device_component</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfotype>DEVICE</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>system_info_device_family</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfotype>DEVICE_FAMILY</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>system_info_device_speed_grade</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfotype>DEVICE_SPEEDGRADE</systemInfotype>
+ </descriptor>
+ <descriptor>
+ <parameterDefaultValue></parameterDefaultValue>
+ <parameterName>system_part_trait_speed_grade</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfoArgs>DEVICE_SPEEDGRADE</systemInfoArgs>
+ <systemInfotype>PART_TRAIT</systemInfotype>
+ </descriptor>
+ </descriptors>
</systemInfoParameterDescriptors>
<systemInfos>
<connPtSystemInfos>
@@ -334,31 +346,234 @@
</connPtSystemInfos>
</systemInfos>
</componentDefinition>]]></parameter>
+ <parameter name="defaultBoundary"><![CDATA[<boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>locked</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>locked</name>
+ <role>export</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>outclk0</name>
+ <type>clock</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>outclk_0</name>
+ <role>clk</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedDirectClock</key>
+ </entry>
+ <entry>
+ <key>clockRate</key>
+ <value>100000000</value>
+ </entry>
+ <entry>
+ <key>clockRateKnown</key>
+ <value>true</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>outclk1</name>
+ <type>clock</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>outclk_1</name>
+ <role>clk</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedDirectClock</key>
+ </entry>
+ <entry>
+ <key>clockRate</key>
+ <value>200000000</value>
+ </entry>
+ <entry>
+ <key>clockRateKnown</key>
+ <value>true</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>refclk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>refclk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>200000000</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rst</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
- <hdlLibraryName>ip_arria10_e1sg_jesd204b_rx_core_pll</hdlLibraryName>
+ <hdlLibraryName>ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz</hdlLibraryName>
<fileSets>
<fileSet>
- <fileSetName>ip_arria10_e1sg_jesd204b_rx_core_pll</fileSetName>
- <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_core_pll</fileSetFixedName>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz</fileSetFixedName>
<fileSetKind>QUARTUS_SYNTH</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>ip_arria10_e1sg_jesd204b_rx_core_pll</fileSetName>
- <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_core_pll</fileSetFixedName>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz</fileSetFixedName>
<fileSetKind>SIM_VERILOG</fileSetKind>
<fileSetFiles/>
</fileSet>
<fileSet>
- <fileSetName>ip_arria10_e1sg_jesd204b_rx_core_pll</fileSetName>
- <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_core_pll</fileSetFixedName>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz</fileSetFixedName>
<fileSetKind>SIM_VHDL</fileSetKind>
<fileSetFiles/>
</fileSet>
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_core_pll.ip</parameter>
+ <parameter name="logicalView">ip_arria10_e1sg_jesd204b_rx_core_pll_200MHz.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap>
<entry>
@@ -377,8 +592,4 @@
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
- <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
- <interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
- <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
- <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip
index cfab00f197e2d447c7fdeedc793195d533d401ba..9e8b24e40a8cd86429539faba071fc63b1414c72 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip
@@ -1,1446 +1,1564 @@
<?xml version="1.0" ?>
-<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
- <spirit:vendor>Intel Corporation</spirit:vendor>
- <spirit:library>ip_arria10_e1sg_jesd204b_rx_reset_seq</spirit:library>
- <spirit:name>reset_seq</spirit:name>
- <spirit:version>18.0</spirit:version>
- <spirit:busInterfaces>
- <spirit:busInterface>
- <spirit:name>av_csr</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="avalon" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>address</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>av_address</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>readdata</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>av_readdata</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>read</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>av_read</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>writedata</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>av_writedata</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>write</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>av_write</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>addressAlignment</spirit:name>
- <spirit:displayName>Slave addressing</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="addressAlignment">DYNAMIC</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>addressGroup</spirit:name>
- <spirit:displayName>Address group</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="addressGroup">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>addressSpan</spirit:name>
- <spirit:displayName>Address span</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="addressSpan">256</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>addressUnits</spirit:name>
- <spirit:displayName>Address units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="addressUnits">SYMBOLS</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>alwaysBurstMaxBurst</spirit:name>
- <spirit:displayName>Always burst maximum burst</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="alwaysBurstMaxBurst">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>Associated reset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset">csr_reset</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bitsPerSymbol</spirit:name>
- <spirit:displayName>Bits per symbol</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="bitsPerSymbol">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bridgedAddressOffset</spirit:name>
- <spirit:displayName>Bridged Address Offset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="bridgedAddressOffset">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bridgesToMaster</spirit:name>
- <spirit:displayName>Bridges to master</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="bridgesToMaster"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>burstOnBurstBoundariesOnly</spirit:name>
- <spirit:displayName>Burst on burst boundaries only</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="burstOnBurstBoundariesOnly">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>burstcountUnits</spirit:name>
- <spirit:displayName>Burstcount units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="burstcountUnits">SYMBOLS</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>constantBurstBehavior</spirit:name>
- <spirit:displayName>Constant burst behavior</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="constantBurstBehavior">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>explicitAddressSpan</spirit:name>
- <spirit:displayName>Explicit address span</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="explicitAddressSpan">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>holdTime</spirit:name>
- <spirit:displayName>Hold</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="holdTime">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>interleaveBursts</spirit:name>
- <spirit:displayName>Interleave bursts</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="interleaveBursts">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>isBigEndian</spirit:name>
- <spirit:displayName>Big endian</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="isBigEndian">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>isFlash</spirit:name>
- <spirit:displayName>Flash memory</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="isFlash">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>isMemoryDevice</spirit:name>
- <spirit:displayName>Memory device</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="isMemoryDevice">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>isNonVolatileStorage</spirit:name>
- <spirit:displayName>Non-volatile storage</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="isNonVolatileStorage">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>linewrapBursts</spirit:name>
- <spirit:displayName>Linewrap bursts</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="linewrapBursts">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>maximumPendingReadTransactions</spirit:name>
- <spirit:displayName>Maximum pending read transactions</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="maximumPendingReadTransactions">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>maximumPendingWriteTransactions</spirit:name>
- <spirit:displayName>Maximum pending write transactions</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="maximumPendingWriteTransactions">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>minimumReadLatency</spirit:name>
- <spirit:displayName>minimumReadLatency</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="minimumReadLatency">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>minimumResponseLatency</spirit:name>
- <spirit:displayName>Minimum response latency</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="minimumResponseLatency">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>minimumUninterruptedRunLength</spirit:name>
- <spirit:displayName>Minimum uninterrupted run length</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="minimumUninterruptedRunLength">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>printableDevice</spirit:name>
- <spirit:displayName>Can receive stdout/stderr</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="printableDevice">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>readLatency</spirit:name>
- <spirit:displayName>Read latency</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="readLatency">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>readWaitStates</spirit:name>
- <spirit:displayName>Read wait states</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="readWaitStates">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>readWaitTime</spirit:name>
- <spirit:displayName>Read wait</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="readWaitTime">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>registerIncomingSignals</spirit:name>
- <spirit:displayName>Register incoming signals</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="registerIncomingSignals">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>registerOutgoingSignals</spirit:name>
- <spirit:displayName>Register outgoing signals</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="registerOutgoingSignals">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>setupTime</spirit:name>
- <spirit:displayName>Setup</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="setupTime">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>timingUnits</spirit:name>
- <spirit:displayName>Timing units</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="timingUnits">Cycles</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>transparentBridge</spirit:name>
- <spirit:displayName>Transparent bridge</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="transparentBridge">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>waitrequestAllowance</spirit:name>
- <spirit:displayName>Waitrequest allowance</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="waitrequestAllowance">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>wellBehavedWaitrequest</spirit:name>
- <spirit:displayName>Well-behaved waitrequest</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="wellBehavedWaitrequest">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>writeLatency</spirit:name>
- <spirit:displayName>Write latency</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="writeLatency">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>writeWaitStates</spirit:name>
- <spirit:displayName>Write wait states</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="writeWaitStates">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>writeWaitTime</spirit:name>
- <spirit:displayName>Write wait</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="writeWaitTime">0</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
+<ipxact:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact2014/extensions" xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014">
+ <ipxact:vendor>Intel Corporation</ipxact:vendor>
+ <ipxact:library>ip_arria10_e1sg_jesd204b_rx_reset_seq</ipxact:library>
+ <ipxact:name>reset_seq</ipxact:name>
+ <ipxact:version>19.1</ipxact:version>
+ <ipxact:busInterfaces>
+ <ipxact:busInterface>
+ <ipxact:name>clk</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="clock" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="clock" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>clk</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>clk</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="clockRate" type="longint">
+ <ipxact:name>clockRate</ipxact:name>
+ <ipxact:displayName>Clock rate</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="externallyDriven" type="bit">
+ <ipxact:name>externallyDriven</ipxact:name>
+ <ipxact:displayName>Externally driven</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ptfSchematicName" type="string">
+ <ipxact:name>ptfSchematicName</ipxact:name>
+ <ipxact:displayName>PTF schematic name</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset_in0</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset_in0</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>NONE</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset_out0</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset_out0</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:master></ipxact:master>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedDirectReset" type="string">
+ <ipxact:name>associatedDirectReset</ipxact:name>
+ <ipxact:displayName>Associated direct reset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedResetSinks" type="string">
+ <ipxact:name>associatedResetSinks</ipxact:name>
+ <ipxact:displayName>Associated reset sinks</ipxact:displayName>
+ <ipxact:value>reset_in0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>BOTH</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset_out1</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset_out1</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:master></ipxact:master>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedDirectReset" type="string">
+ <ipxact:name>associatedDirectReset</ipxact:name>
+ <ipxact:displayName>Associated direct reset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedResetSinks" type="string">
+ <ipxact:name>associatedResetSinks</ipxact:name>
+ <ipxact:displayName>Associated reset sinks</ipxact:displayName>
+ <ipxact:value>reset_in0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>BOTH</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset_out2</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset_out2</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:master></ipxact:master>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedDirectReset" type="string">
+ <ipxact:name>associatedDirectReset</ipxact:name>
+ <ipxact:displayName>Associated direct reset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedResetSinks" type="string">
+ <ipxact:name>associatedResetSinks</ipxact:name>
+ <ipxact:displayName>Associated reset sinks</ipxact:displayName>
+ <ipxact:value>reset_in0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>BOTH</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset_out3</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset_out3</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:master></ipxact:master>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedDirectReset" type="string">
+ <ipxact:name>associatedDirectReset</ipxact:name>
+ <ipxact:displayName>Associated direct reset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedResetSinks" type="string">
+ <ipxact:name>associatedResetSinks</ipxact:name>
+ <ipxact:displayName>Associated reset sinks</ipxact:displayName>
+ <ipxact:value>reset_in0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>BOTH</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset_out4</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset_out4</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:master></ipxact:master>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedDirectReset" type="string">
+ <ipxact:name>associatedDirectReset</ipxact:name>
+ <ipxact:displayName>Associated direct reset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedResetSinks" type="string">
+ <ipxact:name>associatedResetSinks</ipxact:name>
+ <ipxact:displayName>Associated reset sinks</ipxact:displayName>
+ <ipxact:value>reset_in0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>BOTH</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset_out5</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset_out5</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:master></ipxact:master>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedDirectReset" type="string">
+ <ipxact:name>associatedDirectReset</ipxact:name>
+ <ipxact:displayName>Associated direct reset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedResetSinks" type="string">
+ <ipxact:name>associatedResetSinks</ipxact:name>
+ <ipxact:displayName>Associated reset sinks</ipxact:displayName>
+ <ipxact:value>reset_in0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>BOTH</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset_out6</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset_out6</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:master></ipxact:master>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedDirectReset" type="string">
+ <ipxact:name>associatedDirectReset</ipxact:name>
+ <ipxact:displayName>Associated direct reset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedResetSinks" type="string">
+ <ipxact:name>associatedResetSinks</ipxact:name>
+ <ipxact:displayName>Associated reset sinks</ipxact:displayName>
+ <ipxact:value>reset_in0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>BOTH</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset_out7</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset_out7</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:master></ipxact:master>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedDirectReset" type="string">
+ <ipxact:name>associatedDirectReset</ipxact:name>
+ <ipxact:displayName>Associated direct reset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedResetSinks" type="string">
+ <ipxact:name>associatedResetSinks</ipxact:name>
+ <ipxact:displayName>Associated reset sinks</ipxact:displayName>
+ <ipxact:value>reset_in0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>BOTH</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset1_dsrt_qual</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset1_dsrt_qual</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset1_dsrt_qual</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset2_dsrt_qual</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset2_dsrt_qual</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset2_dsrt_qual</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset5_dsrt_qual</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset5_dsrt_qual</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset5_dsrt_qual</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>csr_reset</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>csr_reset</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>NONE</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>av_csr</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="avalon" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="avalon" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>address</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>av_address</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>readdata</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>av_readdata</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>read</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>av_read</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>writedata</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>av_writedata</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>write</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>av_write</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="addressAlignment" type="string">
+ <ipxact:name>addressAlignment</ipxact:name>
+ <ipxact:displayName>Slave addressing</ipxact:displayName>
+ <ipxact:value>DYNAMIC</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="addressGroup" type="int">
+ <ipxact:name>addressGroup</ipxact:name>
+ <ipxact:displayName>Address group</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="addressSpan" type="string">
+ <ipxact:name>addressSpan</ipxact:name>
+ <ipxact:displayName>Address span</ipxact:displayName>
+ <ipxact:value>256</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="addressUnits" type="string">
+ <ipxact:name>addressUnits</ipxact:name>
+ <ipxact:displayName>Address units</ipxact:displayName>
+ <ipxact:value>SYMBOLS</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="alwaysBurstMaxBurst" type="bit">
+ <ipxact:name>alwaysBurstMaxBurst</ipxact:name>
+ <ipxact:displayName>Always burst maximum burst</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>Associated reset</ipxact:displayName>
+ <ipxact:value>csr_reset</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bitsPerSymbol" type="int">
+ <ipxact:name>bitsPerSymbol</ipxact:name>
+ <ipxact:displayName>Bits per symbol</ipxact:displayName>
+ <ipxact:value>8</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bridgedAddressOffset" type="string">
+ <ipxact:name>bridgedAddressOffset</ipxact:name>
+ <ipxact:displayName>Bridged Address Offset</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bridgesToMaster" type="string">
+ <ipxact:name>bridgesToMaster</ipxact:name>
+ <ipxact:displayName>Bridges to master</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="burstOnBurstBoundariesOnly" type="bit">
+ <ipxact:name>burstOnBurstBoundariesOnly</ipxact:name>
+ <ipxact:displayName>Burst on burst boundaries only</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="burstcountUnits" type="string">
+ <ipxact:name>burstcountUnits</ipxact:name>
+ <ipxact:displayName>Burstcount units</ipxact:displayName>
+ <ipxact:value>SYMBOLS</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="constantBurstBehavior" type="bit">
+ <ipxact:name>constantBurstBehavior</ipxact:name>
+ <ipxact:displayName>Constant burst behavior</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="explicitAddressSpan" type="string">
+ <ipxact:name>explicitAddressSpan</ipxact:name>
+ <ipxact:displayName>Explicit address span</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="holdTime" type="int">
+ <ipxact:name>holdTime</ipxact:name>
+ <ipxact:displayName>Hold</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="interleaveBursts" type="bit">
+ <ipxact:name>interleaveBursts</ipxact:name>
+ <ipxact:displayName>Interleave bursts</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="isBigEndian" type="bit">
+ <ipxact:name>isBigEndian</ipxact:name>
+ <ipxact:displayName>Big endian</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="isFlash" type="bit">
+ <ipxact:name>isFlash</ipxact:name>
+ <ipxact:displayName>Flash memory</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="isMemoryDevice" type="bit">
+ <ipxact:name>isMemoryDevice</ipxact:name>
+ <ipxact:displayName>Memory device</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="isNonVolatileStorage" type="bit">
+ <ipxact:name>isNonVolatileStorage</ipxact:name>
+ <ipxact:displayName>Non-volatile storage</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="linewrapBursts" type="bit">
+ <ipxact:name>linewrapBursts</ipxact:name>
+ <ipxact:displayName>Linewrap bursts</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="maximumPendingReadTransactions" type="int">
+ <ipxact:name>maximumPendingReadTransactions</ipxact:name>
+ <ipxact:displayName>Maximum pending read transactions</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="maximumPendingWriteTransactions" type="int">
+ <ipxact:name>maximumPendingWriteTransactions</ipxact:name>
+ <ipxact:displayName>Maximum pending write transactions</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="minimumReadLatency" type="int">
+ <ipxact:name>minimumReadLatency</ipxact:name>
+ <ipxact:displayName>minimumReadLatency</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="minimumResponseLatency" type="int">
+ <ipxact:name>minimumResponseLatency</ipxact:name>
+ <ipxact:displayName>Minimum response latency</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="minimumUninterruptedRunLength" type="int">
+ <ipxact:name>minimumUninterruptedRunLength</ipxact:name>
+ <ipxact:displayName>Minimum uninterrupted run length</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="printableDevice" type="bit">
+ <ipxact:name>printableDevice</ipxact:name>
+ <ipxact:displayName>Can receive stdout/stderr</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readLatency" type="int">
+ <ipxact:name>readLatency</ipxact:name>
+ <ipxact:displayName>Read latency</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readWaitStates" type="int">
+ <ipxact:name>readWaitStates</ipxact:name>
+ <ipxact:displayName>Read wait states</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="readWaitTime" type="int">
+ <ipxact:name>readWaitTime</ipxact:name>
+ <ipxact:displayName>Read wait</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="registerIncomingSignals" type="bit">
+ <ipxact:name>registerIncomingSignals</ipxact:name>
+ <ipxact:displayName>Register incoming signals</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="registerOutgoingSignals" type="bit">
+ <ipxact:name>registerOutgoingSignals</ipxact:name>
+ <ipxact:displayName>Register outgoing signals</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="setupTime" type="int">
+ <ipxact:name>setupTime</ipxact:name>
+ <ipxact:displayName>Setup</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="timingUnits" type="string">
+ <ipxact:name>timingUnits</ipxact:name>
+ <ipxact:displayName>Timing units</ipxact:displayName>
+ <ipxact:value>Cycles</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="transparentBridge" type="bit">
+ <ipxact:name>transparentBridge</ipxact:name>
+ <ipxact:displayName>Transparent bridge</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="waitrequestAllowance" type="int">
+ <ipxact:name>waitrequestAllowance</ipxact:name>
+ <ipxact:displayName>Waitrequest allowance</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="wellBehavedWaitrequest" type="bit">
+ <ipxact:name>wellBehavedWaitrequest</ipxact:name>
+ <ipxact:displayName>Well-behaved waitrequest</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="writeLatency" type="int">
+ <ipxact:name>writeLatency</ipxact:name>
+ <ipxact:displayName>Write latency</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="writeWaitStates" type="int">
+ <ipxact:name>writeWaitStates</ipxact:name>
+ <ipxact:displayName>Write wait states</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="writeWaitTime" type="int">
+ <ipxact:name>writeWaitTime</ipxact:name>
+ <ipxact:displayName>Write wait</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
<altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>embeddedsw.configuration.isFlash</spirit:name>
- <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isFlash">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>embeddedsw.configuration.isMemoryDevice</spirit:name>
- <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isMemoryDevice">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>embeddedsw.configuration.isNonVolatileStorage</spirit:name>
- <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isNonVolatileStorage">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>embeddedsw.configuration.isPrintableDevice</spirit:name>
- <spirit:value spirit:format="string" spirit:id="embeddedsw.configuration.isPrintableDevice">0</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="embeddedsw.configuration.isFlash" type="string">
+ <ipxact:name>embeddedsw.configuration.isFlash</ipxact:name>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="embeddedsw.configuration.isMemoryDevice" type="string">
+ <ipxact:name>embeddedsw.configuration.isMemoryDevice</ipxact:name>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="embeddedsw.configuration.isNonVolatileStorage" type="string">
+ <ipxact:name>embeddedsw.configuration.isNonVolatileStorage</ipxact:name>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="embeddedsw.configuration.isPrintableDevice" type="string">
+ <ipxact:name>embeddedsw.configuration.isPrintableDevice</ipxact:name>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
</altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>av_csr_irq</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="interrupt" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>irq</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>irq</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedAddressablePoint</spirit:name>
- <spirit:displayName>Associated addressable interface</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedAddressablePoint">ip_arria10_e1sg_jesd204b_rx_reset_seq.av_csr</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>Associated reset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset">csr_reset</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bridgedReceiverOffset</spirit:name>
- <spirit:displayName>Bridged receiver offset</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="bridgedReceiverOffset">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bridgesToReceiver</spirit:name>
- <spirit:displayName>Bridges to receiver</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="bridgesToReceiver"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>irqScheme</spirit:name>
- <spirit:displayName>Interrupt scheme</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="irqScheme">NONE</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>clk</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>clk</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>clk</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>clockRate</spirit:name>
- <spirit:displayName>Clock rate</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>externallyDriven</spirit:name>
- <spirit:displayName>Externally driven</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ptfSchematicName</spirit:name>
- <spirit:displayName>PTF schematic name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>csr_reset</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>csr_reset</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">NONE</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset1_dsrt_qual</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset1_dsrt_qual</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset1_dsrt_qual</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset2_dsrt_qual</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset2_dsrt_qual</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset2_dsrt_qual</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset5_dsrt_qual</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset5_dsrt_qual</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset5_dsrt_qual</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset_in0</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset_in0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">NONE</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset_out0</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:master></spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset_out0</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedDirectReset</spirit:name>
- <spirit:displayName>Associated direct reset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedDirectReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedResetSinks</spirit:name>
- <spirit:displayName>Associated reset sinks</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedResetSinks">reset_in0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">BOTH</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset_out1</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:master></spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset_out1</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedDirectReset</spirit:name>
- <spirit:displayName>Associated direct reset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedDirectReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedResetSinks</spirit:name>
- <spirit:displayName>Associated reset sinks</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedResetSinks">reset_in0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">BOTH</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset_out2</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:master></spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset_out2</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedDirectReset</spirit:name>
- <spirit:displayName>Associated direct reset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedDirectReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedResetSinks</spirit:name>
- <spirit:displayName>Associated reset sinks</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedResetSinks">reset_in0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">BOTH</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset_out3</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:master></spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset_out3</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedDirectReset</spirit:name>
- <spirit:displayName>Associated direct reset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedDirectReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedResetSinks</spirit:name>
- <spirit:displayName>Associated reset sinks</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedResetSinks">reset_in0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">BOTH</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset_out4</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:master></spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset_out4</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedDirectReset</spirit:name>
- <spirit:displayName>Associated direct reset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedDirectReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedResetSinks</spirit:name>
- <spirit:displayName>Associated reset sinks</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedResetSinks">reset_in0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">BOTH</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset_out5</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:master></spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset_out5</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedDirectReset</spirit:name>
- <spirit:displayName>Associated direct reset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedDirectReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedResetSinks</spirit:name>
- <spirit:displayName>Associated reset sinks</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedResetSinks">reset_in0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">BOTH</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset_out6</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:master></spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset_out6</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedDirectReset</spirit:name>
- <spirit:displayName>Associated direct reset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedDirectReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedResetSinks</spirit:name>
- <spirit:displayName>Associated reset sinks</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedResetSinks">reset_in0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">BOTH</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset_out7</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:master></spirit:master>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset_out7</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock">clk</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedDirectReset</spirit:name>
- <spirit:displayName>Associated direct reset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedDirectReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedResetSinks</spirit:name>
- <spirit:displayName>Associated reset sinks</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedResetSinks">reset_in0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">BOTH</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- </spirit:busInterfaces>
- <spirit:model>
- <spirit:views>
- <spirit:view>
- <spirit:name>QUARTUS_SYNTH</spirit:name>
- <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
- <spirit:modelName>altera_reset_sequencer</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>QUARTUS_SYNTH</spirit:localName>
- </spirit:fileSetRef>
- </spirit:view>
- </spirit:views>
- <spirit:ports>
- <spirit:port>
- <spirit:name>clk</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset_in0</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset_out0</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset_out1</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset_out2</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset_out3</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset_out4</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset_out5</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset_out6</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset_out7</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset1_dsrt_qual</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset2_dsrt_qual</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset5_dsrt_qual</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>csr_reset</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>av_address</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left>0</spirit:left>
- <spirit:right>7</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>av_readdata</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left>0</spirit:left>
- <spirit:right>31</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>av_read</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>av_writedata</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left>0</spirit:left>
- <spirit:right>31</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>av_write</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>irq</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- </spirit:ports>
- </spirit:model>
- <spirit:vendorExtensions>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>av_csr_irq</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="interrupt" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="interrupt" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>irq</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>irq</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedAddressablePoint" type="string">
+ <ipxact:name>associatedAddressablePoint</ipxact:name>
+ <ipxact:displayName>Associated addressable interface</ipxact:displayName>
+ <ipxact:value>ip_arria10_e1sg_jesd204b_rx_reset_seq.av_csr</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value>clk</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>Associated reset</ipxact:displayName>
+ <ipxact:value>csr_reset</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bridgedReceiverOffset" type="longint">
+ <ipxact:name>bridgedReceiverOffset</ipxact:name>
+ <ipxact:displayName>Bridged receiver offset</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bridgesToReceiver" type="string">
+ <ipxact:name>bridgesToReceiver</ipxact:name>
+ <ipxact:displayName>Bridges to receiver</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="irqScheme" type="string">
+ <ipxact:name>irqScheme</ipxact:name>
+ <ipxact:displayName>Interrupt scheme</ipxact:displayName>
+ <ipxact:value>NONE</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ </ipxact:busInterfaces>
+ <ipxact:model>
+ <ipxact:views>
+ <ipxact:view>
+ <ipxact:name>QUARTUS_SYNTH</ipxact:name>
+ <ipxact:envIdentifier>:quartus.altera.com:</ipxact:envIdentifier>
+ <ipxact:componentInstantiationRef>QUARTUS_SYNTH</ipxact:componentInstantiationRef>
+ </ipxact:view>
+ </ipxact:views>
+ <ipxact:instantiations>
+ <ipxact:componentInstantiation>
+ <ipxact:name>QUARTUS_SYNTH</ipxact:name>
+ <ipxact:moduleName>altera_reset_sequencer</ipxact:moduleName>
+ <ipxact:fileSetRef>
+ <ipxact:localName>QUARTUS_SYNTH</ipxact:localName>
+ </ipxact:fileSetRef>
+ <ipxact:parameters></ipxact:parameters>
+ </ipxact:componentInstantiation>
+ </ipxact:instantiations>
+ <ipxact:ports>
+ <ipxact:port>
+ <ipxact:name>clk</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset_in0</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset_out0</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset_out1</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset_out2</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset_out3</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset_out4</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset_out5</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset_out6</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset_out7</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset1_dsrt_qual</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset2_dsrt_qual</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset5_dsrt_qual</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>csr_reset</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>av_address</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>7</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>av_readdata</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>31</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>av_read</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>av_writedata</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>31</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>av_write</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>irq</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ </ipxact:ports>
+ </ipxact:model>
+ <ipxact:vendorExtensions>
<altera:entity_info>
- <spirit:vendor>Intel Corporation</spirit:vendor>
- <spirit:library>ip_arria10_e1sg_jesd204b_rx_reset_seq</spirit:library>
- <spirit:name>altera_reset_sequencer</spirit:name>
- <spirit:version>18.0</spirit:version>
+ <ipxact:vendor>Intel Corporation</ipxact:vendor>
+ <ipxact:library>ip_arria10_e1sg_jesd204b_rx_reset_seq</ipxact:library>
+ <ipxact:name>altera_reset_sequencer</ipxact:name>
+ <ipxact:version>19.1</ipxact:version>
</altera:entity_info>
<altera:altera_module_parameters>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>NUM_OUTPUTS</spirit:name>
- <spirit:displayName>Number of reset outputs</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="NUM_OUTPUTS">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>NUM_INPUTS</spirit:name>
- <spirit:displayName>Number of reset inputs</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="NUM_INPUTS">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ENABLE_RESET_REQUEST_INPUT</spirit:name>
- <spirit:displayName>Enable reset request as input to sequencer</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ENABLE_RESET_REQUEST_INPUT">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ENABLE_DEASSERTION_INPUT_QUAL</spirit:name>
- <spirit:displayName>Bit-wise enable for input signal qualification</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ENABLE_DEASSERTION_INPUT_QUAL">38</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ENABLE_ASSERTION_SEQUENCE</spirit:name>
- <spirit:displayName>Enable reset assertion sequence</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ENABLE_ASSERTION_SEQUENCE">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ENABLE_DEASSERTION_SEQUENCE</spirit:name>
- <spirit:displayName>Enable reset de-assertion sequence</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ENABLE_DEASSERTION_SEQUENCE">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>MIN_ASRT_TIME</spirit:name>
- <spirit:displayName>Minimum reset assertion time</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="MIN_ASRT_TIME">20</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_DELAY0</spirit:name>
- <spirit:displayName>Assertion Delay between reset_in to reset0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_DELAY0">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_DELAY0</spirit:name>
- <spirit:displayName>De-assertion Delay between reset_in to reset0</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_DELAY0">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_REMAP0</spirit:name>
- <spirit:displayName>reset_out0 assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_REMAP0">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_REMAP0</spirit:name>
- <spirit:displayName>reset_out0 de-assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_REMAP0">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_QUALCNT_0</spirit:name>
- <spirit:displayName>Deglitch count for de-assertion of reset0_drst_qual</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_QUALCNT_0">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_DELAY1</spirit:name>
- <spirit:displayName>Assertion Delay between reset0 to reset1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_DELAY1">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_DELAY1</spirit:name>
- <spirit:displayName>De-assertion Delay between reset0 to reset1</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_DELAY1">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_REMAP1</spirit:name>
- <spirit:displayName>reset_out1 assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_REMAP1">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_REMAP1</spirit:name>
- <spirit:displayName>reset_out1 de-assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_REMAP1">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_QUALCNT_1</spirit:name>
- <spirit:displayName>Deglitch count for de-assertion of reset1_drst_qual</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_QUALCNT_1">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_DELAY2</spirit:name>
- <spirit:displayName>Assertion Delay between reset1 to reset2</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_DELAY2">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_DELAY2</spirit:name>
- <spirit:displayName>De-assertion Delay between reset1 to reset2</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_DELAY2">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_REMAP2</spirit:name>
- <spirit:displayName>reset_out2 assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_REMAP2">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_REMAP2</spirit:name>
- <spirit:displayName>reset_out2 de-assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_REMAP2">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_QUALCNT_2</spirit:name>
- <spirit:displayName>Deglitch count for de-assertion of reset2_drst_qual</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_QUALCNT_2">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_DELAY3</spirit:name>
- <spirit:displayName>Assertion Delay between reset2 to reset3</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_DELAY3">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_DELAY3</spirit:name>
- <spirit:displayName>De-assertion Delay between reset2 to reset3</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_DELAY3">20</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_REMAP3</spirit:name>
- <spirit:displayName>reset_out3 assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_REMAP3">3</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_REMAP3</spirit:name>
- <spirit:displayName>reset_out3 de-assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_REMAP3">3</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_QUALCNT_3</spirit:name>
- <spirit:displayName>Deglitch count for de-assertion of reset3_drst_qual</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_QUALCNT_3">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_DELAY4</spirit:name>
- <spirit:displayName>Assertion Delay between reset3 to reset4</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_DELAY4">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_DELAY4</spirit:name>
- <spirit:displayName>De-assertion Delay between reset3 to reset4</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_DELAY4">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_REMAP4</spirit:name>
- <spirit:displayName>reset_out4 assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_REMAP4">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_REMAP4</spirit:name>
- <spirit:displayName>reset_out4 de-assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_REMAP4">4</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_QUALCNT_4</spirit:name>
- <spirit:displayName>Deglitch count for de-assertion of reset4_drst_qual</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_QUALCNT_4">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_DELAY5</spirit:name>
- <spirit:displayName>Assertion Delay between reset4 to reset5</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_DELAY5">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_DELAY5</spirit:name>
- <spirit:displayName>De-assertion Delay between reset4 to reset5</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_DELAY5">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_REMAP5</spirit:name>
- <spirit:displayName>reset_out5 assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_REMAP5">5</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_REMAP5</spirit:name>
- <spirit:displayName>reset_out5 de-assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_REMAP5">5</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_QUALCNT_5</spirit:name>
- <spirit:displayName>Deglitch count for de-assertion of reset5_drst_qual</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_QUALCNT_5">2</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_DELAY6</spirit:name>
- <spirit:displayName>Assertion Delay between reset5 to reset6</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_DELAY6">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_DELAY6</spirit:name>
- <spirit:displayName>De-assertion Delay between reset5 to reset6</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_DELAY6">20</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_REMAP6</spirit:name>
- <spirit:displayName>reset_out6 assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_REMAP6">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_REMAP6</spirit:name>
- <spirit:displayName>reset_out6 de-assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_REMAP6">6</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_QUALCNT_6</spirit:name>
- <spirit:displayName>Deglitch count for de-assertion of reset6_drst_qual</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_QUALCNT_6">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_DELAY7</spirit:name>
- <spirit:displayName>Assertion Delay between reset6 to reset7</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_DELAY7">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_DELAY7</spirit:name>
- <spirit:displayName>De-assertion Delay between reset6 to reset7</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_DELAY7">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_REMAP7</spirit:name>
- <spirit:displayName>reset_out7 assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_REMAP7">7</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_REMAP7</spirit:name>
- <spirit:displayName>reset_out7 de-assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_REMAP7">7</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_QUALCNT_7</spirit:name>
- <spirit:displayName>Deglitch count for de-assertion of reset7_drst_qual</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_QUALCNT_7">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_DELAY8</spirit:name>
- <spirit:displayName>Assertion Delay between reset7 to reset8</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_DELAY8">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_DELAY8</spirit:name>
- <spirit:displayName>De-assertion Delay between reset7 to reset8</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_DELAY8">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_REMAP8</spirit:name>
- <spirit:displayName>reset_out8 assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_REMAP8">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_REMAP8</spirit:name>
- <spirit:displayName>reset_out8 de-assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_REMAP8">8</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_QUALCNT_8</spirit:name>
- <spirit:displayName>Deglitch count for de-assertion of reset8_drst_qual</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_QUALCNT_8">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_DELAY9</spirit:name>
- <spirit:displayName>Assertion Delay between reset8 to reset9</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_DELAY9">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_DELAY9</spirit:name>
- <spirit:displayName>De-assertion Delay between reset8 to reset9</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_DELAY9">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_REMAP9</spirit:name>
- <spirit:displayName>reset_out9 assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ASRT_REMAP9">9</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_REMAP9</spirit:name>
- <spirit:displayName>reset_out9 de-assert sequence #</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_REMAP9">9</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_QUALCNT_9</spirit:name>
- <spirit:displayName>Deglitch count for de-assertion of reset9_drst_qual</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="DSRT_QUALCNT_9">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ENABLE_CSR</spirit:name>
- <spirit:displayName>Enable Reset Sequencer CSR</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="ENABLE_CSR">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RESET_OUT_NAME</spirit:name>
- <spirit:displayName>reset_out#</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="RESET_OUT_NAME">reset_out0,reset_out1,reset_out2,reset_out3,reset_out4,reset_out5,reset_out6,reset_out7</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LIST_ASRT_SEQ</spirit:name>
- <spirit:displayName>ASRT Seq#</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="LIST_ASRT_SEQ">0,1,2,3,4,5,6,7,8,9</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LIST_DSRT_SEQ</spirit:name>
- <spirit:displayName>DSRT Seq #</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="LIST_DSRT_SEQ">0,1,2,3,4,5,6,7,8,9</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LIST_ASRT_DELAY</spirit:name>
- <spirit:displayName>ASRT Delay Cycle#</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="LIST_ASRT_DELAY">0,0,0,0,0,0,0,0,0,0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>LIST_DSRT_DELAY</spirit:name>
- <spirit:displayName>DSRT Delay Cycle# / Deglitch#</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="LIST_DSRT_DELAY">2,2,2,20,0,2,20,0,0,0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>USE_DSRT_QUAL</spirit:name>
- <spirit:displayName>USE_DSRT_QUAL</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="USE_DSRT_QUAL">0,1,1,0,0,1,0,0,0,0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ASRT_SEQ_MSG</spirit:name>
- <spirit:displayName>Assertion Sequence</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ASRT_SEQ_MSG">SEQUENCE DISABLED (All Delays are 0)</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>DSRT_SEQ_MSG</spirit:name>
- <spirit:displayName>De-assertion Sequence</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="DSRT_SEQ_MSG"><![CDATA[reset_in_deasserted-> #2-> reset_out0 ->wait_dqual1-> reset_out1 ->wait_dqual2-> reset_out2 -> #20-> reset_out3 + reset_out4 ->wait_dqual5-> reset_out5 -> #20-> reset_out6 + reset_out7]]></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="NUM_OUTPUTS" type="int">
+ <ipxact:name>NUM_OUTPUTS</ipxact:name>
+ <ipxact:displayName>Number of reset outputs</ipxact:displayName>
+ <ipxact:value>8</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="NUM_INPUTS" type="int">
+ <ipxact:name>NUM_INPUTS</ipxact:name>
+ <ipxact:displayName>Number of reset inputs</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ENABLE_RESET_REQUEST_INPUT" type="int">
+ <ipxact:name>ENABLE_RESET_REQUEST_INPUT</ipxact:name>
+ <ipxact:displayName>Enable reset request as input to sequencer</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ENABLE_DEASSERTION_INPUT_QUAL" type="int">
+ <ipxact:name>ENABLE_DEASSERTION_INPUT_QUAL</ipxact:name>
+ <ipxact:displayName>Bit-wise enable for input signal qualification</ipxact:displayName>
+ <ipxact:value>38</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ENABLE_ASSERTION_SEQUENCE" type="int">
+ <ipxact:name>ENABLE_ASSERTION_SEQUENCE</ipxact:name>
+ <ipxact:displayName>Enable reset assertion sequence</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ENABLE_DEASSERTION_SEQUENCE" type="int">
+ <ipxact:name>ENABLE_DEASSERTION_SEQUENCE</ipxact:name>
+ <ipxact:displayName>Enable reset de-assertion sequence</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="MIN_ASRT_TIME" type="int">
+ <ipxact:name>MIN_ASRT_TIME</ipxact:name>
+ <ipxact:displayName>Minimum reset assertion time</ipxact:displayName>
+ <ipxact:value>20</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_DELAY0" type="int">
+ <ipxact:name>ASRT_DELAY0</ipxact:name>
+ <ipxact:displayName>Assertion Delay between reset_in to reset0</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_DELAY0" type="int">
+ <ipxact:name>DSRT_DELAY0</ipxact:name>
+ <ipxact:displayName>De-assertion Delay between reset_in to reset0</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_REMAP0" type="int">
+ <ipxact:name>ASRT_REMAP0</ipxact:name>
+ <ipxact:displayName>reset_out0 assert sequence #</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_REMAP0" type="int">
+ <ipxact:name>DSRT_REMAP0</ipxact:name>
+ <ipxact:displayName>reset_out0 de-assert sequence #</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_QUALCNT_0" type="int">
+ <ipxact:name>DSRT_QUALCNT_0</ipxact:name>
+ <ipxact:displayName>Deglitch count for de-assertion of reset0_drst_qual</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_DELAY1" type="int">
+ <ipxact:name>ASRT_DELAY1</ipxact:name>
+ <ipxact:displayName>Assertion Delay between reset0 to reset1</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_DELAY1" type="int">
+ <ipxact:name>DSRT_DELAY1</ipxact:name>
+ <ipxact:displayName>De-assertion Delay between reset0 to reset1</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_REMAP1" type="int">
+ <ipxact:name>ASRT_REMAP1</ipxact:name>
+ <ipxact:displayName>reset_out1 assert sequence #</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_REMAP1" type="int">
+ <ipxact:name>DSRT_REMAP1</ipxact:name>
+ <ipxact:displayName>reset_out1 de-assert sequence #</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_QUALCNT_1" type="int">
+ <ipxact:name>DSRT_QUALCNT_1</ipxact:name>
+ <ipxact:displayName>Deglitch count for de-assertion of reset1_drst_qual</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_DELAY2" type="int">
+ <ipxact:name>ASRT_DELAY2</ipxact:name>
+ <ipxact:displayName>Assertion Delay between reset1 to reset2</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_DELAY2" type="int">
+ <ipxact:name>DSRT_DELAY2</ipxact:name>
+ <ipxact:displayName>De-assertion Delay between reset1 to reset2</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_REMAP2" type="int">
+ <ipxact:name>ASRT_REMAP2</ipxact:name>
+ <ipxact:displayName>reset_out2 assert sequence #</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_REMAP2" type="int">
+ <ipxact:name>DSRT_REMAP2</ipxact:name>
+ <ipxact:displayName>reset_out2 de-assert sequence #</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_QUALCNT_2" type="int">
+ <ipxact:name>DSRT_QUALCNT_2</ipxact:name>
+ <ipxact:displayName>Deglitch count for de-assertion of reset2_drst_qual</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_DELAY3" type="int">
+ <ipxact:name>ASRT_DELAY3</ipxact:name>
+ <ipxact:displayName>Assertion Delay between reset2 to reset3</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_DELAY3" type="int">
+ <ipxact:name>DSRT_DELAY3</ipxact:name>
+ <ipxact:displayName>De-assertion Delay between reset2 to reset3</ipxact:displayName>
+ <ipxact:value>20</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_REMAP3" type="int">
+ <ipxact:name>ASRT_REMAP3</ipxact:name>
+ <ipxact:displayName>reset_out3 assert sequence #</ipxact:displayName>
+ <ipxact:value>3</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_REMAP3" type="int">
+ <ipxact:name>DSRT_REMAP3</ipxact:name>
+ <ipxact:displayName>reset_out3 de-assert sequence #</ipxact:displayName>
+ <ipxact:value>3</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_QUALCNT_3" type="int">
+ <ipxact:name>DSRT_QUALCNT_3</ipxact:name>
+ <ipxact:displayName>Deglitch count for de-assertion of reset3_drst_qual</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_DELAY4" type="int">
+ <ipxact:name>ASRT_DELAY4</ipxact:name>
+ <ipxact:displayName>Assertion Delay between reset3 to reset4</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_DELAY4" type="int">
+ <ipxact:name>DSRT_DELAY4</ipxact:name>
+ <ipxact:displayName>De-assertion Delay between reset3 to reset4</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_REMAP4" type="int">
+ <ipxact:name>ASRT_REMAP4</ipxact:name>
+ <ipxact:displayName>reset_out4 assert sequence #</ipxact:displayName>
+ <ipxact:value>4</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_REMAP4" type="int">
+ <ipxact:name>DSRT_REMAP4</ipxact:name>
+ <ipxact:displayName>reset_out4 de-assert sequence #</ipxact:displayName>
+ <ipxact:value>4</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_QUALCNT_4" type="int">
+ <ipxact:name>DSRT_QUALCNT_4</ipxact:name>
+ <ipxact:displayName>Deglitch count for de-assertion of reset4_drst_qual</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_DELAY5" type="int">
+ <ipxact:name>ASRT_DELAY5</ipxact:name>
+ <ipxact:displayName>Assertion Delay between reset4 to reset5</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_DELAY5" type="int">
+ <ipxact:name>DSRT_DELAY5</ipxact:name>
+ <ipxact:displayName>De-assertion Delay between reset4 to reset5</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_REMAP5" type="int">
+ <ipxact:name>ASRT_REMAP5</ipxact:name>
+ <ipxact:displayName>reset_out5 assert sequence #</ipxact:displayName>
+ <ipxact:value>5</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_REMAP5" type="int">
+ <ipxact:name>DSRT_REMAP5</ipxact:name>
+ <ipxact:displayName>reset_out5 de-assert sequence #</ipxact:displayName>
+ <ipxact:value>5</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_QUALCNT_5" type="int">
+ <ipxact:name>DSRT_QUALCNT_5</ipxact:name>
+ <ipxact:displayName>Deglitch count for de-assertion of reset5_drst_qual</ipxact:displayName>
+ <ipxact:value>2</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_DELAY6" type="int">
+ <ipxact:name>ASRT_DELAY6</ipxact:name>
+ <ipxact:displayName>Assertion Delay between reset5 to reset6</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_DELAY6" type="int">
+ <ipxact:name>DSRT_DELAY6</ipxact:name>
+ <ipxact:displayName>De-assertion Delay between reset5 to reset6</ipxact:displayName>
+ <ipxact:value>20</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_REMAP6" type="int">
+ <ipxact:name>ASRT_REMAP6</ipxact:name>
+ <ipxact:displayName>reset_out6 assert sequence #</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_REMAP6" type="int">
+ <ipxact:name>DSRT_REMAP6</ipxact:name>
+ <ipxact:displayName>reset_out6 de-assert sequence #</ipxact:displayName>
+ <ipxact:value>6</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_QUALCNT_6" type="int">
+ <ipxact:name>DSRT_QUALCNT_6</ipxact:name>
+ <ipxact:displayName>Deglitch count for de-assertion of reset6_drst_qual</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_DELAY7" type="int">
+ <ipxact:name>ASRT_DELAY7</ipxact:name>
+ <ipxact:displayName>Assertion Delay between reset6 to reset7</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_DELAY7" type="int">
+ <ipxact:name>DSRT_DELAY7</ipxact:name>
+ <ipxact:displayName>De-assertion Delay between reset6 to reset7</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_REMAP7" type="int">
+ <ipxact:name>ASRT_REMAP7</ipxact:name>
+ <ipxact:displayName>reset_out7 assert sequence #</ipxact:displayName>
+ <ipxact:value>7</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_REMAP7" type="int">
+ <ipxact:name>DSRT_REMAP7</ipxact:name>
+ <ipxact:displayName>reset_out7 de-assert sequence #</ipxact:displayName>
+ <ipxact:value>7</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_QUALCNT_7" type="int">
+ <ipxact:name>DSRT_QUALCNT_7</ipxact:name>
+ <ipxact:displayName>Deglitch count for de-assertion of reset7_drst_qual</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_DELAY8" type="int">
+ <ipxact:name>ASRT_DELAY8</ipxact:name>
+ <ipxact:displayName>Assertion Delay between reset7 to reset8</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_DELAY8" type="int">
+ <ipxact:name>DSRT_DELAY8</ipxact:name>
+ <ipxact:displayName>De-assertion Delay between reset7 to reset8</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_REMAP8" type="int">
+ <ipxact:name>ASRT_REMAP8</ipxact:name>
+ <ipxact:displayName>reset_out8 assert sequence #</ipxact:displayName>
+ <ipxact:value>8</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_REMAP8" type="int">
+ <ipxact:name>DSRT_REMAP8</ipxact:name>
+ <ipxact:displayName>reset_out8 de-assert sequence #</ipxact:displayName>
+ <ipxact:value>8</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_QUALCNT_8" type="int">
+ <ipxact:name>DSRT_QUALCNT_8</ipxact:name>
+ <ipxact:displayName>Deglitch count for de-assertion of reset8_drst_qual</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_DELAY9" type="int">
+ <ipxact:name>ASRT_DELAY9</ipxact:name>
+ <ipxact:displayName>Assertion Delay between reset8 to reset9</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_DELAY9" type="int">
+ <ipxact:name>DSRT_DELAY9</ipxact:name>
+ <ipxact:displayName>De-assertion Delay between reset8 to reset9</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_REMAP9" type="int">
+ <ipxact:name>ASRT_REMAP9</ipxact:name>
+ <ipxact:displayName>reset_out9 assert sequence #</ipxact:displayName>
+ <ipxact:value>9</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_REMAP9" type="int">
+ <ipxact:name>DSRT_REMAP9</ipxact:name>
+ <ipxact:displayName>reset_out9 de-assert sequence #</ipxact:displayName>
+ <ipxact:value>9</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_QUALCNT_9" type="int">
+ <ipxact:name>DSRT_QUALCNT_9</ipxact:name>
+ <ipxact:displayName>Deglitch count for de-assertion of reset9_drst_qual</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ENABLE_CSR" type="int">
+ <ipxact:name>ENABLE_CSR</ipxact:name>
+ <ipxact:displayName>Enable Reset Sequencer CSR</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="RESET_OUT_NAME" type="string">
+ <ipxact:name>RESET_OUT_NAME</ipxact:name>
+ <ipxact:displayName>reset_out#</ipxact:displayName>
+ <ipxact:value>reset_out0,reset_out1,reset_out2,reset_out3,reset_out4,reset_out5,reset_out6,reset_out7</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LIST_ASRT_SEQ" type="string">
+ <ipxact:name>LIST_ASRT_SEQ</ipxact:name>
+ <ipxact:displayName>ASRT Seq#</ipxact:displayName>
+ <ipxact:value>0,1,2,3,4,5,6,7,8,9</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LIST_DSRT_SEQ" type="string">
+ <ipxact:name>LIST_DSRT_SEQ</ipxact:name>
+ <ipxact:displayName>DSRT Seq #</ipxact:displayName>
+ <ipxact:value>0,1,2,3,4,5,6,7,8,9</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LIST_ASRT_DELAY" type="string">
+ <ipxact:name>LIST_ASRT_DELAY</ipxact:name>
+ <ipxact:displayName>ASRT Delay Cycle#</ipxact:displayName>
+ <ipxact:value>0,0,0,0,0,0,0,0,0,0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="LIST_DSRT_DELAY" type="string">
+ <ipxact:name>LIST_DSRT_DELAY</ipxact:name>
+ <ipxact:displayName>DSRT Delay Cycle# / Deglitch#</ipxact:displayName>
+ <ipxact:value>2,2,2,20,0,2,20,0,0,0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="USE_DSRT_QUAL" type="string">
+ <ipxact:name>USE_DSRT_QUAL</ipxact:name>
+ <ipxact:displayName>USE_DSRT_QUAL</ipxact:displayName>
+ <ipxact:value>0,1,1,0,0,1,0,0,0,0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ASRT_SEQ_MSG" type="string">
+ <ipxact:name>ASRT_SEQ_MSG</ipxact:name>
+ <ipxact:displayName>Assertion Sequence</ipxact:displayName>
+ <ipxact:value>SEQUENCE DISABLED (All Delays are 0)</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="DSRT_SEQ_MSG" type="string">
+ <ipxact:name>DSRT_SEQ_MSG</ipxact:name>
+ <ipxact:displayName>De-assertion Sequence</ipxact:displayName>
+ <ipxact:value>reset_in_deasserted-> #2-> reset_out0 ->wait_dqual1-> reset_out1 ->wait_dqual2-> reset_out2 -> #20-> reset_out3 + reset_out4 ->wait_dqual5-> reset_out5 -> #20-> reset_out6 + reset_out7</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
</altera:altera_module_parameters>
<altera:altera_system_parameters>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>device</spirit:name>
- <spirit:displayName>Device</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>deviceFamily</spirit:name>
- <spirit:displayName>Device family</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>deviceSpeedGrade</spirit:name>
- <spirit:displayName>Device Speed Grade</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>generationId</spirit:name>
- <spirit:displayName>Generation Id</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bonusData</spirit:name>
- <spirit:displayName>bonusData</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="bonusData">bonusData
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="device" type="string">
+ <ipxact:name>device</ipxact:name>
+ <ipxact:displayName>Device</ipxact:displayName>
+ <ipxact:value>10AX115U2F45E1SG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="deviceFamily" type="string">
+ <ipxact:name>deviceFamily</ipxact:name>
+ <ipxact:displayName>Device family</ipxact:displayName>
+ <ipxact:value>Arria 10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="deviceSpeedGrade" type="string">
+ <ipxact:name>deviceSpeedGrade</ipxact:name>
+ <ipxact:displayName>Device Speed Grade</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="generationId" type="int">
+ <ipxact:name>generationId</ipxact:name>
+ <ipxact:displayName>Generation Id</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bonusData" type="string">
+ <ipxact:name>bonusData</ipxact:name>
+ <ipxact:displayName>bonusData</ipxact:displayName>
+ <ipxact:value>bonusData
{
+ element $system
+ {
+ datum _originalDeviceFamily
+ {
+ value = "Arria 10";
+ type = "String";
+ }
+ }
element reset_seq
{
datum _sortIndex
@@ -1450,813 +1568,813 @@
}
}
}
-</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hideFromIPCatalog</spirit:name>
- <spirit:displayName>Hide from IP Catalog</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>lockedInterfaceDefinition</spirit:name>
- <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
- <interfaces>
- <interface>
- <name>av_csr</name>
- <type>avalon</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>av_address</name>
- <role>address</role>
- <direction>Input</direction>
- <width>8</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- <port>
- <name>av_readdata</name>
- <role>readdata</role>
- <direction>Output</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- <port>
- <name>av_read</name>
- <role>read</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- <port>
- <name>av_writedata</name>
- <role>writedata</role>
- <direction>Input</direction>
- <width>32</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- <port>
- <name>av_write</name>
- <role>write</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>embeddedsw.configuration.isFlash</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isMemoryDevice</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isNonVolatileStorage</key>
- <value>0</value>
- </entry>
- <entry>
- <key>embeddedsw.configuration.isPrintableDevice</key>
- <value>0</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>addressAlignment</key>
- <value>DYNAMIC</value>
- </entry>
- <entry>
- <key>addressGroup</key>
- <value>0</value>
- </entry>
- <entry>
- <key>addressSpan</key>
- <value>256</value>
- </entry>
- <entry>
- <key>addressUnits</key>
- <value>SYMBOLS</value>
- </entry>
- <entry>
- <key>alwaysBurstMaxBurst</key>
- <value>false</value>
- </entry>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>associatedReset</key>
- <value>csr_reset</value>
- </entry>
- <entry>
- <key>bitsPerSymbol</key>
- <value>8</value>
- </entry>
- <entry>
- <key>bridgedAddressOffset</key>
- <value>0</value>
- </entry>
- <entry>
- <key>bridgesToMaster</key>
- </entry>
- <entry>
- <key>burstOnBurstBoundariesOnly</key>
- <value>false</value>
- </entry>
- <entry>
- <key>burstcountUnits</key>
- <value>SYMBOLS</value>
- </entry>
- <entry>
- <key>constantBurstBehavior</key>
- <value>false</value>
- </entry>
- <entry>
- <key>explicitAddressSpan</key>
- <value>0</value>
- </entry>
- <entry>
- <key>holdTime</key>
- <value>0</value>
- </entry>
- <entry>
- <key>interleaveBursts</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isBigEndian</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isFlash</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isMemoryDevice</key>
- <value>false</value>
- </entry>
- <entry>
- <key>isNonVolatileStorage</key>
- <value>false</value>
- </entry>
- <entry>
- <key>linewrapBursts</key>
- <value>false</value>
- </entry>
- <entry>
- <key>maximumPendingReadTransactions</key>
- <value>0</value>
- </entry>
- <entry>
- <key>maximumPendingWriteTransactions</key>
- <value>0</value>
- </entry>
- <entry>
- <key>minimumReadLatency</key>
- <value>1</value>
- </entry>
- <entry>
- <key>minimumResponseLatency</key>
- <value>1</value>
- </entry>
- <entry>
- <key>minimumUninterruptedRunLength</key>
- <value>1</value>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- <entry>
- <key>printableDevice</key>
- <value>false</value>
- </entry>
- <entry>
- <key>readLatency</key>
- <value>2</value>
- </entry>
- <entry>
- <key>readWaitStates</key>
- <value>0</value>
- </entry>
- <entry>
- <key>readWaitTime</key>
- <value>0</value>
- </entry>
- <entry>
- <key>registerIncomingSignals</key>
- <value>false</value>
- </entry>
- <entry>
- <key>registerOutgoingSignals</key>
- <value>false</value>
- </entry>
- <entry>
- <key>setupTime</key>
- <value>0</value>
- </entry>
- <entry>
- <key>timingUnits</key>
- <value>Cycles</value>
- </entry>
- <entry>
- <key>transparentBridge</key>
- <value>false</value>
- </entry>
- <entry>
- <key>waitrequestAllowance</key>
- <value>0</value>
- </entry>
- <entry>
- <key>wellBehavedWaitrequest</key>
- <value>false</value>
- </entry>
- <entry>
- <key>writeLatency</key>
- <value>0</value>
- </entry>
- <entry>
- <key>writeWaitStates</key>
- <value>0</value>
- </entry>
- <entry>
- <key>writeWaitTime</key>
- <value>0</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>av_csr_irq</name>
- <type>interrupt</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>irq</name>
- <role>irq</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedAddressablePoint</key>
- <value>altjesd_ss_RX_reset_seq.av_csr</value>
- </entry>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>associatedReset</key>
- <value>csr_reset</value>
- </entry>
- <entry>
- <key>bridgedReceiverOffset</key>
- <value>0</value>
- </entry>
- <entry>
- <key>bridgesToReceiver</key>
- </entry>
- <entry>
- <key>irqScheme</key>
- <value>NONE</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>clk</name>
- <type>clock</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>clk</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>clockRate</key>
- <value>0</value>
- </entry>
- <entry>
- <key>externallyDriven</key>
- <value>false</value>
- </entry>
- <entry>
- <key>ptfSchematicName</key>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>csr_reset</name>
- <type>reset</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>csr_reset</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>NONE</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset1_dsrt_qual</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>reset1_dsrt_qual</name>
- <role>reset1_dsrt_qual</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset2_dsrt_qual</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>reset2_dsrt_qual</name>
- <role>reset2_dsrt_qual</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset5_dsrt_qual</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>reset5_dsrt_qual</name>
- <role>reset5_dsrt_qual</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset_in0</name>
- <type>reset</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>reset_in0</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>NONE</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset_out0</name>
- <type>reset</type>
- <isStart>true</isStart>
- <ports>
- <port>
- <name>reset_out0</name>
- <role>reset</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>associatedDirectReset</key>
- </entry>
- <entry>
- <key>associatedResetSinks</key>
- <value>reset_in0</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>BOTH</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset_out1</name>
- <type>reset</type>
- <isStart>true</isStart>
- <ports>
- <port>
- <name>reset_out1</name>
- <role>reset</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>associatedDirectReset</key>
- </entry>
- <entry>
- <key>associatedResetSinks</key>
- <value>reset_in0</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>BOTH</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset_out2</name>
- <type>reset</type>
- <isStart>true</isStart>
- <ports>
- <port>
- <name>reset_out2</name>
- <role>reset</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>associatedDirectReset</key>
- </entry>
- <entry>
- <key>associatedResetSinks</key>
- <value>reset_in0</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>BOTH</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset_out3</name>
- <type>reset</type>
- <isStart>true</isStart>
- <ports>
- <port>
- <name>reset_out3</name>
- <role>reset</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>associatedDirectReset</key>
- </entry>
- <entry>
- <key>associatedResetSinks</key>
- <value>reset_in0</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>BOTH</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset_out4</name>
- <type>reset</type>
- <isStart>true</isStart>
- <ports>
- <port>
- <name>reset_out4</name>
- <role>reset</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>associatedDirectReset</key>
- </entry>
- <entry>
- <key>associatedResetSinks</key>
- <value>reset_in0</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>BOTH</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset_out5</name>
- <type>reset</type>
- <isStart>true</isStart>
- <ports>
- <port>
- <name>reset_out5</name>
- <role>reset</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>associatedDirectReset</key>
- </entry>
- <entry>
- <key>associatedResetSinks</key>
- <value>reset_in0</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>BOTH</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset_out6</name>
- <type>reset</type>
- <isStart>true</isStart>
- <ports>
- <port>
- <name>reset_out6</name>
- <role>reset</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>associatedDirectReset</key>
- </entry>
- <entry>
- <key>associatedResetSinks</key>
- <value>reset_in0</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>BOTH</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset_out7</name>
- <type>reset</type>
- <isStart>true</isStart>
- <ports>
- <port>
- <name>reset_out7</name>
- <role>reset</role>
- <direction>Output</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- <value>clk</value>
- </entry>
- <entry>
- <key>associatedDirectReset</key>
- </entry>
- <entry>
- <key>associatedResetSinks</key>
- <value>reset_in0</value>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>BOTH</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- </interfaces>
-</boundaryDefinition>]]></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>systemInfos</spirit:name>
- <spirit:displayName>systemInfos</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
- <connPtSystemInfos>
- <entry>
- <key>av_csr</key>
- <value>
- <connectionPointName>av_csr</connectionPointName>
- <suppliedSystemInfos/>
- <consumedSystemInfos>
- <entry>
- <key>ADDRESS_MAP</key>
- <value><address-map><slave name='av_csr' start='0x0' end='0x100' datawidth='32' /></address-map></value>
- </entry>
- <entry>
- <key>ADDRESS_WIDTH</key>
- <value>8</value>
- </entry>
- <entry>
- <key>MAX_SLAVE_DATA_WIDTH</key>
- <value>32</value>
- </entry>
- </consumedSystemInfos>
- </value>
- </entry>
- </connPtSystemInfos>
-</systemInfosDefinition>]]></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
+</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hideFromIPCatalog" type="bit">
+ <ipxact:name>hideFromIPCatalog</ipxact:name>
+ <ipxact:displayName>Hide from IP Catalog</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="lockedInterfaceDefinition" type="string">
+ <ipxact:name>lockedInterfaceDefinition</ipxact:name>
+ <ipxact:displayName>lockedInterfaceDefinition</ipxact:displayName>
+ <ipxact:value><boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_in0</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset_in0</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out0</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out0</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out1</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out1</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out2</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out2</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out3</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out3</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out4</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out4</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out5</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out5</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out6</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out6</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out7</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out7</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset1_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset1_dsrt_qual</name>
+ <role>reset1_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset2_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset2_dsrt_qual</name>
+ <role>reset2_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset5_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset5_dsrt_qual</name>
+ <role>reset5_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>av_csr</name>
+ <type>avalon</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>av_address</name>
+ <role>address</role>
+ <direction>Input</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_readdata</name>
+ <role>readdata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>av_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_write</name>
+ <role>write</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
+ </entry>
+ <entry>
+ <key>addressGroup</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>256</value>
+ </entry>
+ <entry>
+ <key>addressUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>alwaysBurstMaxBurst</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bitsPerSymbol</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToMaster</key>
+ </entry>
+ <entry>
+ <key>burstOnBurstBoundariesOnly</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>burstcountUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>constantBurstBehavior</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>holdTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>interleaveBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isBigEndian</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isFlash</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isMemoryDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isNonVolatileStorage</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>linewrapBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maximumPendingReadTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>maximumPendingWriteTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>minimumReadLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumResponseLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumUninterruptedRunLength</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readLatency</key>
+ <value>2</value>
+ </entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>readWaitTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>registerIncomingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>registerOutgoingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>setupTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>timingUnits</key>
+ <value>Cycles</value>
+ </entry>
+ <entry>
+ <key>transparentBridge</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>waitrequestAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>writeLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitTime</key>
+ <value>0</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>av_csr_irq</name>
+ <type>interrupt</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>irq</name>
+ <role>irq</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedAddressablePoint</key>
+ <value>ip_arria10_e1sg_jesd204b_rx_reset_seq.av_csr</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bridgedReceiverOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToReceiver</key>
+ </entry>
+ <entry>
+ <key>irqScheme</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="systemInfos" type="string">
+ <ipxact:name>systemInfos</ipxact:name>
+ <ipxact:displayName>systemInfos</ipxact:displayName>
+ <ipxact:value><systemInfosDefinition>
+ <connPtSystemInfos>
+ <entry>
+ <key>av_csr</key>
+ <value>
+ <connectionPointName>av_csr</connectionPointName>
+ <suppliedSystemInfos/>
+ <consumedSystemInfos>
+ <entry>
+ <key>ADDRESS_MAP</key>
+ <value>&lt;address-map&gt;&lt;slave name='av_csr' start='0x0' end='0x100' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+ </entry>
+ <entry>
+ <key>ADDRESS_WIDTH</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>MAX_SLAVE_DATA_WIDTH</key>
+ <value>32</value>
+ </entry>
+ </consumedSystemInfos>
+ </value>
+ </entry>
+ </connPtSystemInfos>
+</systemInfosDefinition></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
</altera:altera_system_parameters>
<altera:altera_interface_boundary>
<altera:interface_mapping altera:name="av_csr" altera:internal="reset_seq.av_csr" altera:type="avalon" altera:dir="end">
@@ -2314,5 +2432,5 @@
</altera:altera_interface_boundary>
<altera:altera_has_warnings>false</altera:altera_has_warnings>
<altera:altera_has_errors>false</altera:altera_has_errors>
- </spirit:vendorExtensions>
-</spirit:component>
\ No newline at end of file
+ </ipxact:vendorExtensions>
+</ipxact:component>
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys
index 319d8cdc4ae022b6c759dd006a0efa9583c4a79b..63fccf43ce61339cce4a3338faba6c328ac2ccb8 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys
@@ -6,10 +6,13 @@
version="1.0"
description=""
tags=""
- categories=""
+ categories="System"
tool="QsysPro" />
<parameter name="bonusData"><![CDATA[bonusData
{
+ element $system
+ {
+ }
element reset_sequencer_0
{
datum _sortIndex
@@ -20,7 +23,6 @@
}
}
]]></parameter>
- <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
<parameter name="device" value="10AX115U2F45E1SG" />
<parameter name="deviceFamily" value="Arria 10" />
<parameter name="deviceSpeedGrade" value="1" />
@@ -31,7 +33,6 @@
<parameter name="hdlLanguage" value="VERILOG" />
<parameter name="hideFromIPCatalog" value="false" />
<parameter name="lockedInterfaceDefinition" value="" />
- <parameter name="maxAdditionalLatency" value="1" />
<parameter name="sopcBorderPoints" value="false" />
<parameter name="systemHash" value="0" />
<parameter name="systemInfos"><![CDATA[<systemInfosDefinition>
@@ -57,18 +58,6 @@
</consumedSystemInfos>
</value>
</entry>
- <entry>
- <key>clk</key>
- <value>
- <connectionPointName>clk</connectionPointName>
- <suppliedSystemInfos>
- <entry>
- <key>CLOCK_RATE</key>
- </entry>
- </suppliedSystemInfos>
- <consumedSystemInfos/>
- </value>
- </entry>
</connPtSystemInfos>
</systemInfosDefinition>]]></parameter>
<parameter name="systemScripts" value="" />
@@ -926,7 +915,7 @@
</boundary>
<originalModuleInfo>
<className>altera_reset_sequencer</className>
- <version>18.0</version>
+ <version>19.1</version>
<displayName>Reset Sequencer Intel FPGA IP</displayName>
</originalModuleInfo>
<systemInfoParameterDescriptors>
@@ -958,6 +947,772 @@
</connPtSystemInfos>
</systemInfos>
</componentDefinition>]]></parameter>
+ <parameter name="defaultBoundary"><![CDATA[<boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>av_csr</name>
+ <type>avalon</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>av_address</name>
+ <role>address</role>
+ <direction>Input</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_readdata</name>
+ <role>readdata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>av_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_write</name>
+ <role>write</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
+ </entry>
+ <entry>
+ <key>addressGroup</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>256</value>
+ </entry>
+ <entry>
+ <key>addressUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>alwaysBurstMaxBurst</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bitsPerSymbol</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToMaster</key>
+ </entry>
+ <entry>
+ <key>burstOnBurstBoundariesOnly</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>burstcountUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>constantBurstBehavior</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>holdTime</key>
+ <value>0</value>
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+ <value>0</value>
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+ <value>1</value>
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+ <entry>
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+ <value>1</value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
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+ <key>readLatency</key>
+ <value>2</value>
+ </entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>0</value>
+ </entry>
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+ <value>0</value>
+ </entry>
+ <entry>
+ <key>registerIncomingSignals</key>
+ <value>false</value>
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+ <key>timingUnits</key>
+ <value>Cycles</value>
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+ <entry>
+ <key>transparentBridge</key>
+ <value>false</value>
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+ <entry>
+ <key>waitrequestAllowance</key>
+ <value>0</value>
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+ <entry>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>writeLatency</key>
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+ <entry>
+ <key>writeWaitStates</key>
+ <value>0</value>
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+ <entry>
+ <key>writeWaitTime</key>
+ <value>0</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>av_csr_irq</name>
+ <type>interrupt</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>irq</name>
+ <role>irq</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedAddressablePoint</key>
+ <value>reset_sequencer_0.av_csr</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bridgedReceiverOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToReceiver</key>
+ </entry>
+ <entry>
+ <key>irqScheme</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset1_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset1_dsrt_qual</name>
+ <role>reset1_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset2_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset2_dsrt_qual</name>
+ <role>reset2_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset5_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset5_dsrt_qual</name>
+ <role>reset5_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_in0</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset_in0</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out0</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out0</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out1</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out1</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out2</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out2</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out3</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out3</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out4</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out4</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out5</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out5</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out6</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out6</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out7</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out7</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
<hdlLibraryName>ip_arria10_e1sg_jesd204b_rx_reset_seq</hdlLibraryName>
<fileSets>
@@ -982,14 +1737,10 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip</parameter>
+ <parameter name="logicalView">ip_arria10_e1sg_jesd204b_rx_reset_seq.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
- <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
- <interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
- <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
- <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.bsf b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.bsf
index dfcafbe53366597654d241c241588c646f7d889f..5b4ada6e030863eb6e4e349792e111415d9663a1 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.bsf
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.bsf
@@ -4,9 +4,9 @@ editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
-Copyright (C) 2018 Intel Corporation. All rights reserved.
+Copyright (C) 2019 Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions
-and other software and tools, and its AMPP partner logic
+and other software and tools, and any partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
@@ -16,230 +16,231 @@ the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors. Please
-refer to the applicable agreement for further details.
+refer to the applicable agreement for further details, at
+https://fpgasoftware.intel.com/eula.
*/
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- (line (pt 0 296)(pt 112 296)(line_width 1))
+ (text "reset2_dsrt_qual_reset2_dsrt_qual" (rect 0 0 140 12)(font "Arial" (font_size 8)))
+ (text "reset2_dsrt_qual_reset2_dsrt_qual" (rect 4 285 202 296)(font "Arial" (font_size 8)))
+ (line (pt 0 296)(pt 192 296)(line_width 1))
)
(port
(pt 0 336)
(input)
- (text "reset5_dsrt_qual" (rect 0 0 67 12)(font "Arial" (font_size 8)))
- (text "reset5_dsrt_qual" (rect 4 325 100 336)(font "Arial" (font_size 8)))
- (line (pt 0 336)(pt 112 336)(line_width 1))
+ (text "reset5_dsrt_qual_reset5_dsrt_qual" (rect 0 0 140 12)(font "Arial" (font_size 8)))
+ (text "reset5_dsrt_qual_reset5_dsrt_qual" (rect 4 325 202 336)(font "Arial" (font_size 8)))
+ (line (pt 0 336)(pt 192 336)(line_width 1))
)
(port
(pt 0 376)
(input)
- (text "reset_in0" (rect 0 0 36 12)(font "Arial" (font_size 8)))
- (text "reset_in0" (rect 4 365 58 376)(font "Arial" (font_size 8)))
- (line (pt 0 376)(pt 112 376)(line_width 1))
+ (text "reset_in0_reset" (rect 0 0 62 12)(font "Arial" (font_size 8)))
+ (text "reset_in0_reset" (rect 4 365 94 376)(font "Arial" (font_size 8)))
+ (line (pt 0 376)(pt 192 376)(line_width 1))
)
(port
(pt 0 88)
(output)
- (text "av_readdata[31..0]" (rect 0 0 74 12)(font "Arial" (font_size 8)))
- (text "av_readdata[31..0]" (rect 4 77 112 88)(font "Arial" (font_size 8)))
- (line (pt 0 88)(pt 112 88)(line_width 3))
+ (text "av_csr_readdata[31..0]" (rect 0 0 93 12)(font "Arial" (font_size 8)))
+ (text "av_csr_readdata[31..0]" (rect 4 77 136 88)(font "Arial" (font_size 8)))
+ (line (pt 0 88)(pt 192 88)(line_width 3))
)
(port
- (pt 336 72)
+ (pt 496 72)
(output)
- (text "irq" (rect 0 0 9 12)(font "Arial" (font_size 8)))
- (text "irq" (rect 322 61 340 72)(font "Arial" (font_size 8)))
- (line (pt 336 72)(pt 224 72)(line_width 1))
+ (text "irq_irq" (rect 0 0 24 12)(font "Arial" (font_size 8)))
+ (text "irq_irq" (rect 463 61 505 72)(font "Arial" (font_size 8)))
+ (line (pt 496 72)(pt 304 72)(line_width 1))
)
(port
- (pt 336 112)
+ (pt 496 112)
(output)
- (text "reset_out0" (rect 0 0 42 12)(font "Arial" (font_size 8)))
- (text "reset_out0" (rect 281 101 341 112)(font "Arial" (font_size 8)))
- (line (pt 336 112)(pt 224 112)(line_width 1))
+ (text "reset_out0_reset" (rect 0 0 68 12)(font "Arial" (font_size 8)))
+ (text "reset_out0_reset" (rect 409 101 505 112)(font "Arial" (font_size 8)))
+ (line (pt 496 112)(pt 304 112)(line_width 1))
)
(port
- (pt 336 152)
+ (pt 496 152)
(output)
- (text "reset_out1" (rect 0 0 41 12)(font "Arial" (font_size 8)))
- (text "reset_out1" (rect 283 141 343 152)(font "Arial" (font_size 8)))
- (line (pt 336 152)(pt 224 152)(line_width 1))
+ (text "reset_out1_reset" (rect 0 0 67 12)(font "Arial" (font_size 8)))
+ (text "reset_out1_reset" (rect 411 141 507 152)(font "Arial" (font_size 8)))
+ (line (pt 496 152)(pt 304 152)(line_width 1))
)
(port
- (pt 336 192)
+ (pt 496 192)
(output)
- (text "reset_out2" (rect 0 0 42 12)(font "Arial" (font_size 8)))
- (text "reset_out2" (rect 281 181 341 192)(font "Arial" (font_size 8)))
- (line (pt 336 192)(pt 224 192)(line_width 1))
+ (text "reset_out2_reset" (rect 0 0 68 12)(font "Arial" (font_size 8)))
+ (text "reset_out2_reset" (rect 409 181 505 192)(font "Arial" (font_size 8)))
+ (line (pt 496 192)(pt 304 192)(line_width 1))
)
(port
- (pt 336 232)
+ (pt 496 232)
(output)
- (text "reset_out3" (rect 0 0 42 12)(font "Arial" (font_size 8)))
- (text "reset_out3" (rect 281 221 341 232)(font "Arial" (font_size 8)))
- (line (pt 336 232)(pt 224 232)(line_width 1))
+ (text "reset_out3_reset" (rect 0 0 68 12)(font "Arial" (font_size 8)))
+ (text "reset_out3_reset" (rect 409 221 505 232)(font "Arial" (font_size 8)))
+ (line (pt 496 232)(pt 304 232)(line_width 1))
)
(port
- (pt 336 272)
+ (pt 496 272)
(output)
- (text "reset_out4" (rect 0 0 43 12)(font "Arial" (font_size 8)))
- (text "reset_out4" (rect 281 261 341 272)(font "Arial" (font_size 8)))
- (line (pt 336 272)(pt 224 272)(line_width 1))
+ (text "reset_out4_reset" (rect 0 0 69 12)(font "Arial" (font_size 8)))
+ (text "reset_out4_reset" (rect 409 261 505 272)(font "Arial" (font_size 8)))
+ (line (pt 496 272)(pt 304 272)(line_width 1))
)
(port
- (pt 336 312)
+ (pt 496 312)
(output)
- (text "reset_out5" (rect 0 0 42 12)(font "Arial" (font_size 8)))
- (text "reset_out5" (rect 281 301 341 312)(font "Arial" (font_size 8)))
- (line (pt 336 312)(pt 224 312)(line_width 1))
+ (text "reset_out5_reset" (rect 0 0 68 12)(font "Arial" (font_size 8)))
+ (text "reset_out5_reset" (rect 409 301 505 312)(font "Arial" (font_size 8)))
+ (line (pt 496 312)(pt 304 312)(line_width 1))
)
(port
- (pt 336 352)
+ (pt 496 352)
(output)
- (text "reset_out6" (rect 0 0 42 12)(font "Arial" (font_size 8)))
- (text "reset_out6" (rect 281 341 341 352)(font "Arial" (font_size 8)))
- (line (pt 336 352)(pt 224 352)(line_width 1))
+ (text "reset_out6_reset" (rect 0 0 68 12)(font "Arial" (font_size 8)))
+ (text "reset_out6_reset" (rect 409 341 505 352)(font "Arial" (font_size 8)))
+ (line (pt 496 352)(pt 304 352)(line_width 1))
)
(port
- (pt 336 392)
+ (pt 496 392)
(output)
- (text "reset_out7" (rect 0 0 42 12)(font "Arial" (font_size 8)))
- (text "reset_out7" (rect 281 381 341 392)(font "Arial" (font_size 8)))
- (line (pt 336 392)(pt 224 392)(line_width 1))
+ (text "reset_out7_reset" (rect 0 0 68 12)(font "Arial" (font_size 8)))
+ (text "reset_out7_reset" (rect 409 381 505 392)(font "Arial" (font_size 8)))
+ (line (pt 496 392)(pt 304 392)(line_width 1))
)
(drawing
- (text "av_csr" (rect 74 43 184 99)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "address" (rect 117 67 276 144)(font "Arial" (color 0 0 0)))
- (text "readdata" (rect 117 83 282 176)(font "Arial" (color 0 0 0)))
- (text "read" (rect 117 99 258 208)(font "Arial" (color 0 0 0)))
- (text "writedata" (rect 117 115 288 240)(font "Arial" (color 0 0 0)))
- (text "write" (rect 117 131 264 272)(font "Arial" (color 0 0 0)))
- (text "av_csr_irq" (rect 225 43 510 99)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "irq" (rect 210 67 438 144)(font "Arial" (color 0 0 0)))
- (text "clk" (rect 97 147 212 307)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "clk" (rect 117 171 252 352)(font "Arial" (color 0 0 0)))
- (text "csr_reset" (rect 57 187 168 387)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset" (rect 117 211 264 432)(font "Arial" (color 0 0 0)))
- (text "reset1_dsrt_qual" (rect 15 227 126 467)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset1_dsrt_qual" (rect 117 251 330 512)(font "Arial" (color 0 0 0)))
- (text "reset2_dsrt_qual" (rect 13 267 122 547)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset2_dsrt_qual" (rect 117 291 330 592)(font "Arial" (color 0 0 0)))
- (text "reset5_dsrt_qual" (rect 13 307 122 627)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset5_dsrt_qual" (rect 117 331 330 672)(font "Arial" (color 0 0 0)))
- (text "reset_in0" (rect 58 347 170 707)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset" (rect 117 371 264 752)(font "Arial" (color 0 0 0)))
- (text "reset_out0" (rect 225 83 510 179)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset" (rect 199 107 428 224)(font "Arial" (color 0 0 0)))
- (text "reset_out1" (rect 225 123 510 259)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset" (rect 199 147 428 304)(font "Arial" (color 0 0 0)))
- (text "reset_out2" (rect 225 163 510 339)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset" (rect 199 187 428 384)(font "Arial" (color 0 0 0)))
- (text "reset_out3" (rect 225 203 510 419)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset" (rect 199 227 428 464)(font "Arial" (color 0 0 0)))
- (text "reset_out4" (rect 225 243 510 499)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset" (rect 199 267 428 544)(font "Arial" (color 0 0 0)))
- (text "reset_out5" (rect 225 283 510 579)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset" (rect 199 307 428 624)(font "Arial" (color 0 0 0)))
- (text "reset_out6" (rect 225 323 510 659)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset" (rect 199 347 428 704)(font "Arial" (color 0 0 0)))
- (text "reset_out7" (rect 225 363 510 739)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset" (rect 199 387 428 784)(font "Arial" (color 0 0 0)))
- (text " ip_arria10_e1sg_jesd204b_rx_reset_seq " (rect 158 408 550 826)(font "Arial" ))
- (line (pt 112 32)(pt 224 32)(line_width 1))
- (line (pt 224 32)(pt 224 408)(line_width 1))
- (line (pt 112 408)(pt 224 408)(line_width 1))
- (line (pt 112 32)(pt 112 408)(line_width 1))
- (line (pt 113 52)(pt 113 140)(line_width 1))
- (line (pt 114 52)(pt 114 140)(line_width 1))
- (line (pt 223 52)(pt 223 76)(line_width 1))
- (line (pt 222 52)(pt 222 76)(line_width 1))
- (line (pt 113 156)(pt 113 180)(line_width 1))
- (line (pt 114 156)(pt 114 180)(line_width 1))
- (line (pt 113 196)(pt 113 220)(line_width 1))
- (line (pt 114 196)(pt 114 220)(line_width 1))
- (line (pt 113 236)(pt 113 260)(line_width 1))
- (line (pt 114 236)(pt 114 260)(line_width 1))
- (line (pt 113 276)(pt 113 300)(line_width 1))
- (line (pt 114 276)(pt 114 300)(line_width 1))
- (line (pt 113 316)(pt 113 340)(line_width 1))
- (line (pt 114 316)(pt 114 340)(line_width 1))
- (line (pt 113 356)(pt 113 380)(line_width 1))
- (line (pt 114 356)(pt 114 380)(line_width 1))
- (line (pt 223 92)(pt 223 116)(line_width 1))
- (line (pt 222 92)(pt 222 116)(line_width 1))
- (line (pt 223 132)(pt 223 156)(line_width 1))
- (line (pt 222 132)(pt 222 156)(line_width 1))
- (line (pt 223 172)(pt 223 196)(line_width 1))
- (line (pt 222 172)(pt 222 196)(line_width 1))
- (line (pt 223 212)(pt 223 236)(line_width 1))
- (line (pt 222 212)(pt 222 236)(line_width 1))
- (line (pt 223 252)(pt 223 276)(line_width 1))
- (line (pt 222 252)(pt 222 276)(line_width 1))
- (line (pt 223 292)(pt 223 316)(line_width 1))
- (line (pt 222 292)(pt 222 316)(line_width 1))
- (line (pt 223 332)(pt 223 356)(line_width 1))
- (line (pt 222 332)(pt 222 356)(line_width 1))
- (line (pt 223 372)(pt 223 396)(line_width 1))
- (line (pt 222 372)(pt 222 396)(line_width 1))
- (line (pt 0 0)(pt 336 0)(line_width 1))
- (line (pt 336 0)(pt 336 424)(line_width 1))
- (line (pt 0 424)(pt 336 424)(line_width 1))
+ (text "av_csr" (rect 154 43 344 99)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "address" (rect 197 67 436 144)(font "Arial" (color 0 0 0)))
+ (text "readdata" (rect 197 83 442 176)(font "Arial" (color 0 0 0)))
+ (text "read" (rect 197 99 418 208)(font "Arial" (color 0 0 0)))
+ (text "writedata" (rect 197 115 448 240)(font "Arial" (color 0 0 0)))
+ (text "write" (rect 197 131 424 272)(font "Arial" (color 0 0 0)))
+ (text "irq" (rect 305 43 628 99)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "irq" (rect 290 67 598 144)(font "Arial" (color 0 0 0)))
+ (text "clk" (rect 177 147 372 307)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "clk" (rect 197 171 412 352)(font "Arial" (color 0 0 0)))
+ (text "csr_reset" (rect 137 187 328 387)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset" (rect 197 211 424 432)(font "Arial" (color 0 0 0)))
+ (text "reset1_dsrt_qual" (rect 95 227 286 467)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset1_dsrt_qual" (rect 197 251 490 512)(font "Arial" (color 0 0 0)))
+ (text "reset2_dsrt_qual" (rect 93 267 282 547)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset2_dsrt_qual" (rect 197 291 490 592)(font "Arial" (color 0 0 0)))
+ (text "reset5_dsrt_qual" (rect 93 307 282 627)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset5_dsrt_qual" (rect 197 331 490 672)(font "Arial" (color 0 0 0)))
+ (text "reset_in0" (rect 138 347 330 707)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset" (rect 197 371 424 752)(font "Arial" (color 0 0 0)))
+ (text "reset_out0" (rect 305 83 670 179)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset" (rect 279 107 588 224)(font "Arial" (color 0 0 0)))
+ (text "reset_out1" (rect 305 123 670 259)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset" (rect 279 147 588 304)(font "Arial" (color 0 0 0)))
+ (text "reset_out2" (rect 305 163 670 339)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset" (rect 279 187 588 384)(font "Arial" (color 0 0 0)))
+ (text "reset_out3" (rect 305 203 670 419)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset" (rect 279 227 588 464)(font "Arial" (color 0 0 0)))
+ (text "reset_out4" (rect 305 243 670 499)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset" (rect 279 267 588 544)(font "Arial" (color 0 0 0)))
+ (text "reset_out5" (rect 305 283 670 579)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset" (rect 279 307 588 624)(font "Arial" (color 0 0 0)))
+ (text "reset_out6" (rect 305 323 670 659)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset" (rect 279 347 588 704)(font "Arial" (color 0 0 0)))
+ (text "reset_out7" (rect 305 363 670 739)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset" (rect 279 387 588 784)(font "Arial" (color 0 0 0)))
+ (text " ip_arria10_e1sg_jesd204b_rx_reset_seq " (rect 318 408 870 826)(font "Arial" ))
+ (line (pt 192 32)(pt 304 32)(line_width 1))
+ (line (pt 304 32)(pt 304 408)(line_width 1))
+ (line (pt 192 408)(pt 304 408)(line_width 1))
+ (line (pt 192 32)(pt 192 408)(line_width 1))
+ (line (pt 193 52)(pt 193 140)(line_width 1))
+ (line (pt 194 52)(pt 194 140)(line_width 1))
+ (line (pt 303 52)(pt 303 76)(line_width 1))
+ (line (pt 302 52)(pt 302 76)(line_width 1))
+ (line (pt 193 156)(pt 193 180)(line_width 1))
+ (line (pt 194 156)(pt 194 180)(line_width 1))
+ (line (pt 193 196)(pt 193 220)(line_width 1))
+ (line (pt 194 196)(pt 194 220)(line_width 1))
+ (line (pt 193 236)(pt 193 260)(line_width 1))
+ (line (pt 194 236)(pt 194 260)(line_width 1))
+ (line (pt 193 276)(pt 193 300)(line_width 1))
+ (line (pt 194 276)(pt 194 300)(line_width 1))
+ (line (pt 193 316)(pt 193 340)(line_width 1))
+ (line (pt 194 316)(pt 194 340)(line_width 1))
+ (line (pt 193 356)(pt 193 380)(line_width 1))
+ (line (pt 194 356)(pt 194 380)(line_width 1))
+ (line (pt 303 92)(pt 303 116)(line_width 1))
+ (line (pt 302 92)(pt 302 116)(line_width 1))
+ (line (pt 303 132)(pt 303 156)(line_width 1))
+ (line (pt 302 132)(pt 302 156)(line_width 1))
+ (line (pt 303 172)(pt 303 196)(line_width 1))
+ (line (pt 302 172)(pt 302 196)(line_width 1))
+ (line (pt 303 212)(pt 303 236)(line_width 1))
+ (line (pt 302 212)(pt 302 236)(line_width 1))
+ (line (pt 303 252)(pt 303 276)(line_width 1))
+ (line (pt 302 252)(pt 302 276)(line_width 1))
+ (line (pt 303 292)(pt 303 316)(line_width 1))
+ (line (pt 302 292)(pt 302 316)(line_width 1))
+ (line (pt 303 332)(pt 303 356)(line_width 1))
+ (line (pt 302 332)(pt 302 356)(line_width 1))
+ (line (pt 303 372)(pt 303 396)(line_width 1))
+ (line (pt 302 372)(pt 302 396)(line_width 1))
+ (line (pt 0 0)(pt 496 0)(line_width 1))
+ (line (pt 496 0)(pt 496 424)(line_width 1))
+ (line (pt 0 424)(pt 496 424)(line_width 1))
(line (pt 0 0)(pt 0 424)(line_width 1))
)
)
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.cmp b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.cmp
index 9a1c8a3cf87ee2ab2a1e29de5ae3b3fd9acd3d12..7c806008043582844d5f18c46d3f6236b6c196a7 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.cmp
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.cmp
@@ -1,82 +1,25 @@
component ip_arria10_e1sg_jesd204b_rx_reset_seq is
- generic (
- NUM_OUTPUTS : integer := 3;
- ENABLE_DEASSERTION_INPUT_QUAL : integer := 0;
- ENABLE_ASSERTION_SEQUENCE : integer := 0;
- ENABLE_DEASSERTION_SEQUENCE : integer := 0;
- MIN_ASRT_TIME : integer := 0;
- ASRT_DELAY0 : integer := 0;
- DSRT_DELAY0 : integer := 0;
- ASRT_REMAP0 : integer := 0;
- DSRT_REMAP0 : integer := 0;
- DSRT_QUALCNT_0 : integer := 0;
- ASRT_DELAY1 : integer := 0;
- DSRT_DELAY1 : integer := 0;
- ASRT_REMAP1 : integer := 1;
- DSRT_REMAP1 : integer := 1;
- DSRT_QUALCNT_1 : integer := 0;
- ASRT_DELAY2 : integer := 0;
- DSRT_DELAY2 : integer := 0;
- ASRT_REMAP2 : integer := 2;
- DSRT_REMAP2 : integer := 2;
- DSRT_QUALCNT_2 : integer := 0;
- ASRT_DELAY3 : integer := 0;
- DSRT_DELAY3 : integer := 0;
- ASRT_REMAP3 : integer := 3;
- DSRT_REMAP3 : integer := 3;
- DSRT_QUALCNT_3 : integer := 0;
- ASRT_DELAY4 : integer := 0;
- DSRT_DELAY4 : integer := 0;
- ASRT_REMAP4 : integer := 4;
- DSRT_REMAP4 : integer := 4;
- DSRT_QUALCNT_4 : integer := 0;
- ASRT_DELAY5 : integer := 0;
- DSRT_DELAY5 : integer := 0;
- ASRT_REMAP5 : integer := 5;
- DSRT_REMAP5 : integer := 5;
- DSRT_QUALCNT_5 : integer := 0;
- ASRT_DELAY6 : integer := 0;
- DSRT_DELAY6 : integer := 0;
- ASRT_REMAP6 : integer := 6;
- DSRT_REMAP6 : integer := 6;
- DSRT_QUALCNT_6 : integer := 0;
- ASRT_DELAY7 : integer := 0;
- DSRT_DELAY7 : integer := 0;
- ASRT_REMAP7 : integer := 7;
- DSRT_REMAP7 : integer := 7;
- DSRT_QUALCNT_7 : integer := 0;
- ASRT_DELAY8 : integer := 0;
- DSRT_DELAY8 : integer := 0;
- ASRT_REMAP8 : integer := 8;
- DSRT_REMAP8 : integer := 8;
- DSRT_QUALCNT_8 : integer := 0;
- ASRT_DELAY9 : integer := 0;
- DSRT_DELAY9 : integer := 0;
- ASRT_REMAP9 : integer := 9;
- DSRT_REMAP9 : integer := 9;
- DSRT_QUALCNT_9 : integer := 0
- );
port (
- av_address : in std_logic_vector(7 downto 0) := (others => 'X'); -- address
- av_readdata : out std_logic_vector(31 downto 0); -- readdata
- av_read : in std_logic := 'X'; -- read
- av_writedata : in std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
- av_write : in std_logic := 'X'; -- write
- irq : out std_logic; -- irq
- clk : in std_logic := 'X'; -- clk
- csr_reset : in std_logic := 'X'; -- reset
- reset1_dsrt_qual : in std_logic := 'X'; -- reset1_dsrt_qual
- reset2_dsrt_qual : in std_logic := 'X'; -- reset2_dsrt_qual
- reset5_dsrt_qual : in std_logic := 'X'; -- reset5_dsrt_qual
- reset_in0 : in std_logic := 'X'; -- reset
- reset_out0 : out std_logic; -- reset
- reset_out1 : out std_logic; -- reset
- reset_out2 : out std_logic; -- reset
- reset_out3 : out std_logic; -- reset
- reset_out4 : out std_logic; -- reset
- reset_out5 : out std_logic; -- reset
- reset_out6 : out std_logic; -- reset
- reset_out7 : out std_logic -- reset
+ av_csr_address : in std_logic_vector(7 downto 0) := (others => 'X'); -- address
+ av_csr_readdata : out std_logic_vector(31 downto 0); -- readdata
+ av_csr_read : in std_logic := 'X'; -- read
+ av_csr_writedata : in std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
+ av_csr_write : in std_logic := 'X'; -- write
+ irq_irq : out std_logic; -- irq
+ clk_clk : in std_logic := 'X'; -- clk
+ csr_reset_reset : in std_logic := 'X'; -- reset
+ reset1_dsrt_qual_reset1_dsrt_qual : in std_logic := 'X'; -- reset1_dsrt_qual
+ reset2_dsrt_qual_reset2_dsrt_qual : in std_logic := 'X'; -- reset2_dsrt_qual
+ reset5_dsrt_qual_reset5_dsrt_qual : in std_logic := 'X'; -- reset5_dsrt_qual
+ reset_in0_reset : in std_logic := 'X'; -- reset
+ reset_out0_reset : out std_logic; -- reset
+ reset_out1_reset : out std_logic; -- reset
+ reset_out2_reset : out std_logic; -- reset
+ reset_out3_reset : out std_logic; -- reset
+ reset_out4_reset : out std_logic; -- reset
+ reset_out5_reset : out std_logic; -- reset
+ reset_out6_reset : out std_logic; -- reset
+ reset_out7_reset : out std_logic -- reset
);
end component ip_arria10_e1sg_jesd204b_rx_reset_seq;
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.html b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.html
index 2b685b4ced45e3266a49af7885dfd2edf64bc738..57869c9d2b691d199b680f137ea0b12faba2b3a9 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.html
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.html
@@ -67,7 +67,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
</table>
<table class="blueBar">
<tr>
- <td class="l">2019.11.25.08:22:08</td>
+ <td class="l">2020.11.26.17:19:53</td>
<td class="r">Datasheet</td>
</tr>
</table>
@@ -84,8 +84,8 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<div style="display:inline-block ; text-align:left"><span>
<br/>All Components
<br/>  
- <a href="#module_reset_seq"><b>reset_seq</b>
- </a> altera_reset_sequencer 18.0</span>
+ <a href="#module_reset_sequencer_0"><b>reset_sequencer_0</b>
+ </a> altera_reset_sequencer 19.1</span>
</div>
</div>
<div style="width:100% ; height:10px"> </div>
@@ -96,7 +96,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
</tr>
<tr>
<td class="slavemodule"> 
- <a href="#module_reset_seq"><b>reset_seq</b>
+ <a href="#module_reset_sequencer_0"><b>reset_sequencer_0</b>
</a>
</td>
</tr>
@@ -104,10 +104,10 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="slaveb">av_csr </td>
</tr>
</table>
- <a name="module_reset_seq"> </a>
+ <a name="module_reset_sequencer_0"> </a>
<div>
<hr/>
- <h2>reset_seq</h2>altera_reset_sequencer v18.0
+ <h2>reset_sequencer_0</h2>altera_reset_sequencer v19.1
<br/>
<br/>
<br/>
@@ -116,58 +116,6 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametersbox">
<h2>Parameters</h2>
<table>
- <tr>
- <td class="parametername">NUM_OUTPUTS</td>
- <td class="parametervalue">8</td>
- </tr>
- <tr>
- <td class="parametername">NUM_INPUTS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">MIN_ASRT_TIME</td>
- <td class="parametervalue">20</td>
- </tr>
- <tr>
- <td class="parametername">ENABLE_CSR</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">RESET_OUT_NAME</td>
- <td class="parametervalue">reset_out0,reset_out1,reset_out2,reset_out3,reset_out4,reset_out5,reset_out6,reset_out7</td>
- </tr>
- <tr>
- <td class="parametername">LIST_ASRT_SEQ</td>
- <td class="parametervalue">0,1,2,3,4,5,6,7,8,9</td>
- </tr>
- <tr>
- <td class="parametername">LIST_DSRT_SEQ</td>
- <td class="parametervalue">0,1,2,3,4,5,6,7,8,9</td>
- </tr>
- <tr>
- <td class="parametername">LIST_ASRT_DELAY</td>
- <td class="parametervalue">0,0,0,0,0,0,0,0,0,0</td>
- </tr>
- <tr>
- <td class="parametername">LIST_DSRT_DELAY</td>
- <td class="parametervalue">2,2,2,20,0,2,20,0,0,0</td>
- </tr>
- <tr>
- <td class="parametername">USE_DSRT_QUAL</td>
- <td class="parametervalue">0,1,1,0,0,1,0,0,0,0</td>
- </tr>
- <tr>
- <td class="parametername">ASRT_SEQ_MSG</td>
- <td class="parametervalue">SEQUENCE DISABLED (All Delays are 0)</td>
- </tr>
- <tr>
- <td class="parametername">DSRT_SEQ_MSG</td>
- <td class="parametervalue">reset_in_deasserted-> #2-> reset_out0 ->wait_dqual1-> reset_out1 ->wait_dqual2-> reset_out2 -> #20-> reset_out3 + reset_out4 ->wait_dqual5-> reset_out5 -> #20-> reset_out6 + reset_out7</td>
- </tr>
- <tr>
- <td class="parametername">deviceFamily</td>
- <td class="parametervalue">UNKNOWN</td>
- </tr>
<tr>
<td class="parametername">generateLegacySim</td>
<td class="parametervalue">false</td>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.qgsynthc b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.qgsynthc
index 4358624f39cdc33b42769d99cf0d285ddbcaf275..0f5b261b231d21af3c24f69f9099935d49f47dbf 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.qgsynthc
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.qgsynthc
@@ -3,16 +3,7 @@
<instanceKey xsi:type="xs:string">ip_arria10_e1sg_jesd204b_rx_reset_seq</instanceKey>
<instanceData xsi:type="data">
<parameters></parameters>
- <interconnectAssignments>
- <interconnectAssignment>
- <name>$system.qsys_mm.clockCrossingAdapter</name>
- <value>HANDSHAKE</value>
- </interconnectAssignment>
- <interconnectAssignment>
- <name>$system.qsys_mm.maxAdditionalLatency</name>
- <value>0</value>
- </interconnectAssignment>
- </interconnectAssignments>
+ <interconnectAssignments></interconnectAssignments>
<className>ip_arria10_e1sg_jesd204b_rx_reset_seq</className>
<version>1.0</version>
<name>ip_arria10_e1sg_jesd204b_rx_reset_seq</name>
@@ -22,283 +13,1636 @@
</instanceData>
<children>
<node>
- <instanceKey xsi:type="xs:string">reset_seq</instanceKey>
+ <instanceKey xsi:type="xs:string">reset_sequencer_0</instanceKey>
<instanceData xsi:type="data">
<parameters>
<parameter>
- <name>ASRT_DELAY0</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>ASRT_DELAY1</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>ASRT_DELAY2</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>ASRT_DELAY3</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>ASRT_DELAY4</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>ASRT_DELAY5</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>ASRT_DELAY6</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>ASRT_DELAY7</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>ASRT_DELAY8</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>ASRT_DELAY9</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>ASRT_REMAP0</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>ASRT_REMAP1</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>ASRT_REMAP2</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>ASRT_REMAP3</name>
- <value>3</value>
- </parameter>
- <parameter>
- <name>ASRT_REMAP4</name>
- <value>4</value>
- </parameter>
- <parameter>
- <name>ASRT_REMAP5</name>
- <value>5</value>
- </parameter>
- <parameter>
- <name>ASRT_REMAP6</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>ASRT_REMAP7</name>
- <value>7</value>
- </parameter>
- <parameter>
- <name>ASRT_REMAP8</name>
- <value>8</value>
- </parameter>
- <parameter>
- <name>ASRT_REMAP9</name>
- <value>9</value>
- </parameter>
- <parameter>
- <name>ASRT_SEQ_MSG</name>
- <value>SEQUENCE DISABLED (All Delays are 0)</value>
- </parameter>
- <parameter>
- <name>DSRT_DELAY0</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>DSRT_DELAY1</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_DELAY2</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_DELAY3</name>
- <value>20</value>
- </parameter>
- <parameter>
- <name>DSRT_DELAY4</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_DELAY5</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_DELAY6</name>
- <value>20</value>
- </parameter>
- <parameter>
- <name>DSRT_DELAY7</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_DELAY8</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_DELAY9</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_QUALCNT_0</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_QUALCNT_1</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>DSRT_QUALCNT_2</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>DSRT_QUALCNT_3</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_QUALCNT_4</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_QUALCNT_5</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>DSRT_QUALCNT_6</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_QUALCNT_7</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_QUALCNT_8</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_QUALCNT_9</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_REMAP0</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>DSRT_REMAP1</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>DSRT_REMAP2</name>
- <value>2</value>
- </parameter>
- <parameter>
- <name>DSRT_REMAP3</name>
- <value>3</value>
- </parameter>
- <parameter>
- <name>DSRT_REMAP4</name>
- <value>4</value>
- </parameter>
- <parameter>
- <name>DSRT_REMAP5</name>
- <value>5</value>
- </parameter>
- <parameter>
- <name>DSRT_REMAP6</name>
- <value>6</value>
- </parameter>
- <parameter>
- <name>DSRT_REMAP7</name>
- <value>7</value>
- </parameter>
- <parameter>
- <name>DSRT_REMAP8</name>
- <value>8</value>
- </parameter>
- <parameter>
- <name>DSRT_REMAP9</name>
- <value>9</value>
- </parameter>
- <parameter>
- <name>DSRT_SEQ_MSG</name>
- <value><![CDATA[reset_in_deasserted-> #2-> reset_out0 ->wait_dqual1-> reset_out1 ->wait_dqual2-> reset_out2 -> #20-> reset_out3 + reset_out4 ->wait_dqual5-> reset_out5 -> #20-> reset_out6 + reset_out7]]></value>
- </parameter>
- <parameter>
- <name>ENABLE_ASSERTION_SEQUENCE</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>ENABLE_CSR</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>ENABLE_DEASSERTION_INPUT_QUAL</name>
- <value>38</value>
- </parameter>
- <parameter>
- <name>ENABLE_DEASSERTION_SEQUENCE</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>ENABLE_RESET_REQUEST_INPUT</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>LIST_ASRT_DELAY</name>
- <value>0,0,0,0,0,0,0,0,0,0</value>
- </parameter>
- <parameter>
- <name>LIST_ASRT_SEQ</name>
- <value>0,1,2,3,4,5,6,7,8,9</value>
- </parameter>
- <parameter>
- <name>LIST_DSRT_DELAY</name>
- <value>2,2,2,20,0,2,20,0,0,0</value>
- </parameter>
- <parameter>
- <name>LIST_DSRT_SEQ</name>
- <value>0,1,2,3,4,5,6,7,8,9</value>
- </parameter>
- <parameter>
- <name>MIN_ASRT_TIME</name>
- <value>20</value>
- </parameter>
- <parameter>
- <name>NUM_INPUTS</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>NUM_OUTPUTS</name>
- <value>8</value>
- </parameter>
- <parameter>
- <name>RESET_OUT_NAME</name>
- <value>reset_out0,reset_out1,reset_out2,reset_out3,reset_out4,reset_out5,reset_out6,reset_out7</value>
- </parameter>
- <parameter>
- <name>USE_DSRT_QUAL</name>
- <value>0,1,1,0,0,1,0,0,0,0</value>
+ <name>componentDefinition</name>
+ <value><componentDefinition>
+ <boundary>
+ <interfaces>
+ <interface>
+ <name>av_csr</name>
+ <type>avalon</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>av_address</name>
+ <role>address</role>
+ <direction>Input</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_readdata</name>
+ <role>readdata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>av_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_write</name>
+ <role>write</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
+ </entry>
+ <entry>
+ <key>addressGroup</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>256</value>
+ </entry>
+ <entry>
+ <key>addressUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>alwaysBurstMaxBurst</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bitsPerSymbol</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToMaster</key>
+ </entry>
+ <entry>
+ <key>burstOnBurstBoundariesOnly</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>burstcountUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>constantBurstBehavior</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>holdTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>interleaveBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isBigEndian</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isFlash</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isMemoryDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isNonVolatileStorage</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>linewrapBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maximumPendingReadTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>maximumPendingWriteTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>minimumReadLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumResponseLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumUninterruptedRunLength</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readLatency</key>
+ <value>2</value>
+ </entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>readWaitTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>registerIncomingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>registerOutgoingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>setupTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>timingUnits</key>
+ <value>Cycles</value>
+ </entry>
+ <entry>
+ <key>transparentBridge</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>waitrequestAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>writeLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitTime</key>
+ <value>0</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>av_csr_irq</name>
+ <type>interrupt</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>irq</name>
+ <role>irq</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedAddressablePoint</key>
+ <value>reset_sequencer_0.av_csr</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bridgedReceiverOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToReceiver</key>
+ </entry>
+ <entry>
+ <key>irqScheme</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset1_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset1_dsrt_qual</name>
+ <role>reset1_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset2_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset2_dsrt_qual</name>
+ <role>reset2_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset5_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset5_dsrt_qual</name>
+ <role>reset5_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_in0</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset_in0</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out0</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out0</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out1</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out1</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out2</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out2</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out3</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out3</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out4</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out4</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out5</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out5</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out6</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out6</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out7</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out7</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+ </boundary>
+ <originalModuleInfo>
+ <className>altera_reset_sequencer</className>
+ <version>19.1</version>
+ <displayName>Reset Sequencer Intel FPGA IP</displayName>
+ </originalModuleInfo>
+ <systemInfoParameterDescriptors>
+ <descriptors/>
+ </systemInfoParameterDescriptors>
+ <systemInfos>
+ <connPtSystemInfos>
+ <entry>
+ <key>av_csr</key>
+ <value>
+ <connectionPointName>av_csr</connectionPointName>
+ <suppliedSystemInfos>
+ <entry>
+ <key>ADDRESS_MAP</key>
+ <value>&lt;address-map&gt;&lt;slave name='av_csr' start='0x0' end='0x100' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+ </entry>
+ <entry>
+ <key>ADDRESS_WIDTH</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>MAX_SLAVE_DATA_WIDTH</key>
+ <value>32</value>
+ </entry>
+ </suppliedSystemInfos>
+ <consumedSystemInfos/>
+ </value>
+ </entry>
+ </connPtSystemInfos>
+ </systemInfos>
+</componentDefinition></value>
+ </parameter>
+ <parameter>
+ <name>defaultBoundary</name>
+ <value><boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>av_csr</name>
+ <type>avalon</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>av_address</name>
+ <role>address</role>
+ <direction>Input</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_readdata</name>
+ <role>readdata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>av_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_write</name>
+ <role>write</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
+ </entry>
+ <entry>
+ <key>addressGroup</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>256</value>
+ </entry>
+ <entry>
+ <key>addressUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>alwaysBurstMaxBurst</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bitsPerSymbol</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToMaster</key>
+ </entry>
+ <entry>
+ <key>burstOnBurstBoundariesOnly</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>burstcountUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>constantBurstBehavior</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>holdTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>interleaveBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isBigEndian</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isFlash</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isMemoryDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isNonVolatileStorage</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>linewrapBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maximumPendingReadTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>maximumPendingWriteTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>minimumReadLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumResponseLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumUninterruptedRunLength</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readLatency</key>
+ <value>2</value>
+ </entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>readWaitTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>registerIncomingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>registerOutgoingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>setupTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>timingUnits</key>
+ <value>Cycles</value>
+ </entry>
+ <entry>
+ <key>transparentBridge</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>waitrequestAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>writeLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitTime</key>
+ <value>0</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>av_csr_irq</name>
+ <type>interrupt</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>irq</name>
+ <role>irq</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedAddressablePoint</key>
+ <value>reset_sequencer_0.av_csr</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bridgedReceiverOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToReceiver</key>
+ </entry>
+ <entry>
+ <key>irqScheme</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset1_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset1_dsrt_qual</name>
+ <role>reset1_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset2_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset2_dsrt_qual</name>
+ <role>reset2_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset5_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset5_dsrt_qual</name>
+ <role>reset5_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_in0</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset_in0</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out0</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out0</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out1</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out1</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out2</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out2</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out3</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out3</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out4</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out4</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out5</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out5</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out6</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out6</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out7</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out7</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition></value>
+ </parameter>
+ <parameter>
+ <name>generationInfoDefinition</name>
+ <value><generationInfoDefinition>
+ <hdlLibraryName>ip_arria10_e1sg_jesd204b_rx_reset_seq</hdlLibraryName>
+ <fileSets>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetFixedName>
+ <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetFixedName>
+ <fileSetKind>SIM_VERILOG</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetFixedName>
+ <fileSetKind>SIM_VHDL</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ </fileSets>
+</generationInfoDefinition></value>
+ </parameter>
+ <parameter>
+ <name>hlsFile</name>
+ <value></value>
+ </parameter>
+ <parameter>
+ <name>logicalView</name>
+ <value>ip_arria10_e1sg_jesd204b_rx_reset_seq.ip</value>
+ </parameter>
+ <parameter>
+ <name>moduleAssignmentDefinition</name>
+ <value><assignmentDefinition>
+ <assignmentValueMap/>
+</assignmentDefinition></value>
+ </parameter>
+ <parameter>
+ <name>svInterfaceDefinition</name>
+ <value></value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>altera_reset_sequencer</className>
- <version>18.0</version>
- <name>reset_seq</name>
- <uniqueName>altera_reset_sequencer</uniqueName>
- <fixedName>altera_reset_sequencer</fixedName>
+ <className>altera_generic_component</className>
+ <version>1.0</version>
+ <name>reset_sequencer_0</name>
+ <uniqueName>ip_arria10_e1sg_jesd204b_rx_reset_seq</uniqueName>
+ <fixedName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fixedName>
<nonce>0</nonce>
<incidentConnections></incidentConnections>
- <path>ip_arria10_e1sg_jesd204b_rx_reset_seq.reset_seq</path>
+ <path>ip_arria10_e1sg_jesd204b_rx_reset_seq.reset_sequencer_0</path>
</instanceData>
<children></children>
</node>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.qip b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.qip
index ba90c8ce02992e74c2041283b7a0c0fb246aca63..d2965d4ad26a3f58aa6fb8058a1fa61e5788de57 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.qip
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.qip
@@ -1,99 +1,34 @@
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_TOOL_NAME "QsysPrimePro"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_TOOL_VERSION "18.0"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_TOOL_VERSION "19.4"
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_TOOL_ENV "QsysPrimePro"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_TOOL_VENDOR_NAME "Intel Corporation"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_TOP_LEVEL_COMPONENT_NAME "altera_reset_sequencer"
set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name SOPCINFO_FILE [file join $::quartus(qip_path) "ip_arria10_e1sg_jesd204b_rx_reset_seq.sopcinfo"]
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name SLD_INFO "QSYS_NAME ip_arria10_e1sg_jesd204b_rx_reset_seq HAS_SOPCINFO 1 GENERATION_ID 0"
set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name MISC_FILE [file join $::quartus(qip_path) "ip_arria10_e1sg_jesd204b_rx_reset_seq.cmp"]
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_TARGETED_DEVICE_FAMILY "Arria 10"
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_GENERATED_DEVICE_FAMILY "{Arria 10}"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_QSYS_MODE "STANDALONE"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_QSYS_MODE "SYSTEM"
set_global_assignment -name SYNTHESIS_ONLY_QIP ON
-set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name MISC_FILE [file join $::quartus(qip_path) "../ip_arria10_e1sg_jesd204b_rx_reset_seq.ip"]
+set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name MISC_FILE [file join $::quartus(qip_path) "../ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys"]
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_NAME "YWx0ZXJhX3Jlc2V0X3NlcXVlbmNlcg=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_DISPLAY_NAME "UmVzZXQgU2VxdWVuY2VyIEludGVsIEZQR0EgSVA="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_INTERNAL "Off"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_VERSION "MTguMA=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_DESCRIPTION "QmFzZWQgb24gdGhlIGlucHV0IHJlc2V0LCBjb250cm9scyB0aGUgcmVzZXQgYXNzZXJ0aW9uIGFuZCBkZS1hc3NlcnRpb24gc2VxdWVuY2UgYmFzZWQgb24gY29tcG9uZW50IHBhcmFtZXRlcml6YXRpb24="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "TlVNX09VVFBVVFM=::OA==::TnVtYmVyIG9mIHJlc2V0IG91dHB1dHM="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "TlVNX0lOUFVUUw==::MQ==::TnVtYmVyIG9mIHJlc2V0IGlucHV0cw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RU5BQkxFX1JFU0VUX1JFUVVFU1RfSU5QVVQ=::MA==::RW5hYmxlIHJlc2V0IHJlcXVlc3QgYXMgaW5wdXQgdG8gc2VxdWVuY2Vy"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RU5BQkxFX0RFQVNTRVJUSU9OX0lOUFVUX1FVQUw=::Mzg=::Qml0LXdpc2UgZW5hYmxlIGZvciBpbnB1dCBzaWduYWwgcXVhbGlmaWNhdGlvbg=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RU5BQkxFX0FTU0VSVElPTl9TRVFVRU5DRQ==::MA==::RW5hYmxlIHJlc2V0IGFzc2VydGlvbiBzZXF1ZW5jZQ=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RU5BQkxFX0RFQVNTRVJUSU9OX1NFUVVFTkNF::MQ==::RW5hYmxlIHJlc2V0IGRlLWFzc2VydGlvbiBzZXF1ZW5jZQ=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "TUlOX0FTUlRfVElNRQ==::MjA=::TWluaW11bSByZXNldCBhc3NlcnRpb24gdGltZQ=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9ERUxBWTA=::MA==::QXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXRfaW4gdG8gcmVzZXQw"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9ERUxBWTA=::Mg==::RGUtYXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXRfaW4gdG8gcmVzZXQw"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9SRU1BUDA=::MA==::cmVzZXRfb3V0MCBhc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9SRU1BUDA=::MA==::cmVzZXRfb3V0MCBkZS1hc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9RVUFMQ05UXzA=::MA==::RGVnbGl0Y2ggY291bnQgZm9yIGRlLWFzc2VydGlvbiBvZiByZXNldDBfZHJzdF9xdWFs"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9ERUxBWTE=::MA==::QXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQwIHRvIHJlc2V0MQ=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9ERUxBWTE=::MA==::RGUtYXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQwIHRvIHJlc2V0MQ=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9SRU1BUDE=::MQ==::cmVzZXRfb3V0MSBhc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9SRU1BUDE=::MQ==::cmVzZXRfb3V0MSBkZS1hc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9RVUFMQ05UXzE=::Mg==::RGVnbGl0Y2ggY291bnQgZm9yIGRlLWFzc2VydGlvbiBvZiByZXNldDFfZHJzdF9xdWFs"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9ERUxBWTI=::MA==::QXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQxIHRvIHJlc2V0Mg=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9ERUxBWTI=::MA==::RGUtYXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQxIHRvIHJlc2V0Mg=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9SRU1BUDI=::Mg==::cmVzZXRfb3V0MiBhc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9SRU1BUDI=::Mg==::cmVzZXRfb3V0MiBkZS1hc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9RVUFMQ05UXzI=::Mg==::RGVnbGl0Y2ggY291bnQgZm9yIGRlLWFzc2VydGlvbiBvZiByZXNldDJfZHJzdF9xdWFs"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9ERUxBWTM=::MA==::QXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQyIHRvIHJlc2V0Mw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9ERUxBWTM=::MjA=::RGUtYXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQyIHRvIHJlc2V0Mw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9SRU1BUDM=::Mw==::cmVzZXRfb3V0MyBhc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9SRU1BUDM=::Mw==::cmVzZXRfb3V0MyBkZS1hc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9RVUFMQ05UXzM=::MA==::RGVnbGl0Y2ggY291bnQgZm9yIGRlLWFzc2VydGlvbiBvZiByZXNldDNfZHJzdF9xdWFs"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9ERUxBWTQ=::MA==::QXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQzIHRvIHJlc2V0NA=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9ERUxBWTQ=::MA==::RGUtYXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQzIHRvIHJlc2V0NA=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9SRU1BUDQ=::NA==::cmVzZXRfb3V0NCBhc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9SRU1BUDQ=::NA==::cmVzZXRfb3V0NCBkZS1hc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9RVUFMQ05UXzQ=::MA==::RGVnbGl0Y2ggY291bnQgZm9yIGRlLWFzc2VydGlvbiBvZiByZXNldDRfZHJzdF9xdWFs"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9ERUxBWTU=::MA==::QXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQ0IHRvIHJlc2V0NQ=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9ERUxBWTU=::MA==::RGUtYXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQ0IHRvIHJlc2V0NQ=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9SRU1BUDU=::NQ==::cmVzZXRfb3V0NSBhc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9SRU1BUDU=::NQ==::cmVzZXRfb3V0NSBkZS1hc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9RVUFMQ05UXzU=::Mg==::RGVnbGl0Y2ggY291bnQgZm9yIGRlLWFzc2VydGlvbiBvZiByZXNldDVfZHJzdF9xdWFs"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9ERUxBWTY=::MA==::QXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQ1IHRvIHJlc2V0Ng=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9ERUxBWTY=::MjA=::RGUtYXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQ1IHRvIHJlc2V0Ng=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9SRU1BUDY=::Ng==::cmVzZXRfb3V0NiBhc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9SRU1BUDY=::Ng==::cmVzZXRfb3V0NiBkZS1hc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9RVUFMQ05UXzY=::MA==::RGVnbGl0Y2ggY291bnQgZm9yIGRlLWFzc2VydGlvbiBvZiByZXNldDZfZHJzdF9xdWFs"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9ERUxBWTc=::MA==::QXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQ2IHRvIHJlc2V0Nw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9ERUxBWTc=::MA==::RGUtYXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQ2IHRvIHJlc2V0Nw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9SRU1BUDc=::Nw==::cmVzZXRfb3V0NyBhc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9SRU1BUDc=::Nw==::cmVzZXRfb3V0NyBkZS1hc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9RVUFMQ05UXzc=::MA==::RGVnbGl0Y2ggY291bnQgZm9yIGRlLWFzc2VydGlvbiBvZiByZXNldDdfZHJzdF9xdWFs"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9ERUxBWTg=::MA==::QXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQ3IHRvIHJlc2V0OA=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9ERUxBWTg=::MA==::RGUtYXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQ3IHRvIHJlc2V0OA=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9SRU1BUDg=::OA==::cmVzZXRfb3V0OCBhc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9SRU1BUDg=::OA==::cmVzZXRfb3V0OCBkZS1hc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9RVUFMQ05UXzg=::MA==::RGVnbGl0Y2ggY291bnQgZm9yIGRlLWFzc2VydGlvbiBvZiByZXNldDhfZHJzdF9xdWFs"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9ERUxBWTk=::MA==::QXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQ4IHRvIHJlc2V0OQ=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9ERUxBWTk=::MA==::RGUtYXNzZXJ0aW9uIERlbGF5IGJldHdlZW4gcmVzZXQ4IHRvIHJlc2V0OQ=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9SRU1BUDk=::OQ==::cmVzZXRfb3V0OSBhc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9SRU1BUDk=::OQ==::cmVzZXRfb3V0OSBkZS1hc3NlcnQgc2VxdWVuY2UgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9RVUFMQ05UXzk=::MA==::RGVnbGl0Y2ggY291bnQgZm9yIGRlLWFzc2VydGlvbiBvZiByZXNldDlfZHJzdF9xdWFs"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RU5BQkxFX0NTUg==::MQ==::RW5hYmxlIFJlc2V0IFNlcXVlbmNlciBDU1I="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "UkVTRVRfT1VUX05BTUU=::cmVzZXRfb3V0MCxyZXNldF9vdXQxLHJlc2V0X291dDIscmVzZXRfb3V0MyxyZXNldF9vdXQ0LHJlc2V0X291dDUscmVzZXRfb3V0NixyZXNldF9vdXQ3::cmVzZXRfb3V0Iw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "TElTVF9BU1JUX1NFUQ==::MCwxLDIsMyw0LDUsNiw3LDgsOQ==::QVNSVCBTZXEj"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "TElTVF9EU1JUX1NFUQ==::MCwxLDIsMyw0LDUsNiw3LDgsOQ==::RFNSVCBTZXEgIw=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "TElTVF9BU1JUX0RFTEFZ::MCwwLDAsMCwwLDAsMCwwLDAsMA==::QVNSVCBEZWxheSBDeWNsZSM="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "TElTVF9EU1JUX0RFTEFZ::MiwyLDIsMjAsMCwyLDIwLDAsMCww::RFNSVCBEZWxheSBDeWNsZSMgLyBEZWdsaXRjaCM="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "VVNFX0RTUlRfUVVBTA==::MCwxLDEsMCwwLDEsMCwwLDAsMA==::VVNFX0RTUlRfUVVBTA=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "QVNSVF9TRVFfTVNH::U0VRVUVOQ0UgRElTQUJMRUQgKEFsbCBEZWxheXMgYXJlIDAp::QXNzZXJ0aW9uIFNlcXVlbmNl"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_PARAMETER "RFNSVF9TRVFfTVNH::cmVzZXRfaW5fZGVhc3NlcnRlZC0+ICMyLT4gcmVzZXRfb3V0MCAtPndhaXRfZHF1YWwxLT4gcmVzZXRfb3V0MSAtPndhaXRfZHF1YWwyLT4gcmVzZXRfb3V0MiAtPiAjMjAtPiByZXNldF9vdXQzICsgcmVzZXRfb3V0NCAtPndhaXRfZHF1YWw1LT4gcmVzZXRfb3V0NSAtPiAjMjAtPiByZXNldF9vdXQ2ICsgcmVzZXRfb3V0Nw==::RGUtYXNzZXJ0aW9uIFNlcXVlbmNl"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_GROUP "QmFzaWMgRnVuY3Rpb25zL0Nsb2NrczsgUExMcyBhbmQgUmVzZXRz"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly93d3cuYWx0ZXJhLmNvbS9kb2N1bWVudGF0aW9uLy9qYnIxNDM3NDI2NjU3NjA1Lmh0bWwjbXdoMTQwOTk1ODk1NDMyMg=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly93d3cuYWx0ZXJhLmNvbS9kb2N1bWVudGF0aW9uLy9qYnIxNDM3NDI2NjU3NjA1Lmh0bWwjbXdoMTQwOTk1ODk1NDMyMg=="
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MjE2OTgwNDIwODcvaGNvMTQyMTY5ODAxMzQwOA=="
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2plc2QyMDRiX3J4X3Jlc2V0X3NlcQ=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_DISPLAY_NAME "c3lzdGVt"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_DISPLAY_NAME "R2VuZXJpYyBDb21wb25lbnQ="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_INTERNAL "Off"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_VERSION "MS4w"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_DESCRIPTION "QSBkeW5hbWljIGNvbXBvbmVudCB3aGVyZSB5b3UgY2FuIGFkZCwgbW9kaWZ5IG9yIHJlbW92ZSBpbnRlcmZhY2VzIGFuZCBwb3J0cyBvbiB0aGUgZmx5"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_PARAMETER "Y29tcG9uZW50RGVmaW5pdGlvbg==::<componentDefinition>
    <boundary>
        <interfaces>
            <interface>
                <name>av_csr</name>
                <type>avalon</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>av_address</name>
                        <role>address</role>
                        <direction>Input</direction>
                        <width>8</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                    </port>
                    <port>
                        <name>av_readdata</name>
                        <role>readdata</role>
                        <direction>Output</direction>
                        <width>32</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                    </port>
                    <port>
                        <name>av_read</name>
                        <role>read</role>
                        <direction>Input</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                    <port>
                        <name>av_writedata</name>
                        <role>writedata</role>
                        <direction>Input</direction>
                        <width>32</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                    </port>
                    <port>
                        <name>av_write</name>
                        <role>write</role>
                        <direction>Input</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap>
                        <entry>
                            <key>embeddedsw.configuration.isFlash</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>embeddedsw.configuration.isMemoryDevice</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>embeddedsw.configuration.isNonVolatileStorage</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>embeddedsw.configuration.isPrintableDevice</key>
                            <value>0</value>
                        </entry>
                    </assignmentValueMap>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>addressAlignment</key>
                            <value>DYNAMIC</value>
                        </entry>
                        <entry>
                            <key>addressGroup</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>addressSpan</key>
                            <value>256</value>
                        </entry>
                        <entry>
                            <key>addressUnits</key>
                            <value>SYMBOLS</value>
                        </entry>
                        <entry>
                            <key>alwaysBurstMaxBurst</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>associatedClock</key>
                            <value>clk</value>
                        </entry>
                        <entry>
                            <key>associatedReset</key>
                            <value>csr_reset</value>
                        </entry>
                        <entry>
                            <key>bitsPerSymbol</key>
                            <value>8</value>
                        </entry>
                        <entry>
                            <key>bridgedAddressOffset</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>bridgesToMaster</key>
                        </entry>
                        <entry>
                            <key>burstOnBurstBoundariesOnly</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>burstcountUnits</key>
                            <value>SYMBOLS</value>
                        </entry>
                        <entry>
                            <key>constantBurstBehavior</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>explicitAddressSpan</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>holdTime</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>interleaveBursts</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>isBigEndian</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>isFlash</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>isMemoryDevice</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>isNonVolatileStorage</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>linewrapBursts</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>maximumPendingReadTransactions</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>maximumPendingWriteTransactions</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>minimumReadLatency</key>
                            <value>1</value>
                        </entry>
                        <entry>
                            <key>minimumResponseLatency</key>
                            <value>1</value>
                        </entry>
                        <entry>
                            <key>minimumUninterruptedRunLength</key>
                            <value>1</value>
                        </entry>
                        <entry>
                            <key>prSafe</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>printableDevice</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>readLatency</key>
                            <value>2</value>
                        </entry>
                        <entry>
                            <key>readWaitStates</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>readWaitTime</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>registerIncomingSignals</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>registerOutgoingSignals</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>setupTime</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>timingUnits</key>
                            <value>Cycles</value>
                        </entry>
                        <entry>
                            <key>transparentBridge</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>waitrequestAllowance</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>wellBehavedWaitrequest</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>writeLatency</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>writeWaitStates</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>writeWaitTime</key>
                            <value>0</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>av_csr_irq</name>
                <type>interrupt</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>irq</name>
                        <role>irq</role>
                        <direction>Output</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedAddressablePoint</key>
                            <value>reset_sequencer_0.av_csr</value>
                        </entry>
                        <entry>
                            <key>associatedClock</key>
                            <value>clk</value>
                        </entry>
                        <entry>
                            <key>associatedReset</key>
                            <value>csr_reset</value>
                        </entry>
                        <entry>
                            <key>bridgedReceiverOffset</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>bridgesToReceiver</key>
                        </entry>
                        <entry>
                            <key>irqScheme</key>
                            <value>NONE</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>clk</name>
                <type>clock</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>clk</name>
                        <role>clk</role>
                        <direction>Input</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>clockRate</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>externallyDriven</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>ptfSchematicName</key>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>csr_reset</name>
                <type>reset</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>csr_reset</name>
                        <role>reset</role>
                        <direction>Input</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                        </entry>
                        <entry>
                            <key>synchronousEdges</key>
                            <value>NONE</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset1_dsrt_qual</name>
                <type>conduit</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>reset1_dsrt_qual</name>
                        <role>reset1_dsrt_qual</role>
                        <direction>Input</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                        </entry>
                        <entry>
                            <key>associatedReset</key>
                        </entry>
                        <entry>
                            <key>prSafe</key>
                            <value>false</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset2_dsrt_qual</name>
                <type>conduit</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>reset2_dsrt_qual</name>
                        <role>reset2_dsrt_qual</role>
                        <direction>Input</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                        </entry>
                        <entry>
                            <key>associatedReset</key>
                        </entry>
                        <entry>
                            <key>prSafe</key>
                            <value>false</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset5_dsrt_qual</name>
                <type>conduit</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>reset5_dsrt_qual</name>
                        <role>reset5_dsrt_qual</role>
                        <direction>Input</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                        </entry>
                        <entry>
                            <key>associatedReset</key>
                        </entry>
                        <entry>
                            <key>prSafe</key>
                            <value>false</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset_in0</name>
                <type>reset</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>reset_in0</name>
                        <role>reset</role>
                        <direction>Input</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                        </entry>
                        <entry>
                            <key>synchronousEdges</key>
                            <value>NONE</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset_out0</name>
                <type>reset</type>
                <isStart>true</isStart>
                <ports>
                    <port>
                        <name>reset_out0</name>
                        <role>reset</role>
                        <direction>Output</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                            <value>clk</value>
                        </entry>
                        <entry>
                            <key>associatedDirectReset</key>
                        </entry>
                        <entry>
                            <key>associatedResetSinks</key>
                            <value>reset_in0</value>
                        </entry>
                        <entry>
                            <key>synchronousEdges</key>
                            <value>BOTH</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset_out1</name>
                <type>reset</type>
                <isStart>true</isStart>
                <ports>
                    <port>
                        <name>reset_out1</name>
                        <role>reset</role>
                        <direction>Output</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                            <value>clk</value>
                        </entry>
                        <entry>
                            <key>associatedDirectReset</key>
                        </entry>
                        <entry>
                            <key>associatedResetSinks</key>
                            <value>reset_in0</value>
                        </entry>
                        <entry>
                            <key>synchronousEdges</key>
                            <value>BOTH</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset_out2</name>
                <type>reset</type>
                <isStart>true</isStart>
                <ports>
                    <port>
                        <name>reset_out2</name>
                        <role>reset</role>
                        <direction>Output</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                            <value>clk</value>
                        </entry>
                        <entry>
                            <key>associatedDirectReset</key>
                        </entry>
                        <entry>
                            <key>associatedResetSinks</key>
                            <value>reset_in0</value>
                        </entry>
                        <entry>
                            <key>synchronousEdges</key>
                            <value>BOTH</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset_out3</name>
                <type>reset</type>
                <isStart>true</isStart>
                <ports>
                    <port>
                        <name>reset_out3</name>
                        <role>reset</role>
                        <direction>Output</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                            <value>clk</value>
                        </entry>
                        <entry>
                            <key>associatedDirectReset</key>
                        </entry>
                        <entry>
                            <key>associatedResetSinks</key>
                            <value>reset_in0</value>
                        </entry>
                        <entry>
                            <key>synchronousEdges</key>
                            <value>BOTH</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset_out4</name>
                <type>reset</type>
                <isStart>true</isStart>
                <ports>
                    <port>
                        <name>reset_out4</name>
                        <role>reset</role>
                        <direction>Output</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                            <value>clk</value>
                        </entry>
                        <entry>
                            <key>associatedDirectReset</key>
                        </entry>
                        <entry>
                            <key>associatedResetSinks</key>
                            <value>reset_in0</value>
                        </entry>
                        <entry>
                            <key>synchronousEdges</key>
                            <value>BOTH</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset_out5</name>
                <type>reset</type>
                <isStart>true</isStart>
                <ports>
                    <port>
                        <name>reset_out5</name>
                        <role>reset</role>
                        <direction>Output</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                            <value>clk</value>
                        </entry>
                        <entry>
                            <key>associatedDirectReset</key>
                        </entry>
                        <entry>
                            <key>associatedResetSinks</key>
                            <value>reset_in0</value>
                        </entry>
                        <entry>
                            <key>synchronousEdges</key>
                            <value>BOTH</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset_out6</name>
                <type>reset</type>
                <isStart>true</isStart>
                <ports>
                    <port>
                        <name>reset_out6</name>
                        <role>reset</role>
                        <direction>Output</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                            <value>clk</value>
                        </entry>
                        <entry>
                            <key>associatedDirectReset</key>
                        </entry>
                        <entry>
                            <key>associatedResetSinks</key>
                            <value>reset_in0</value>
                        </entry>
                        <entry>
                            <key>synchronousEdges</key>
                            <value>BOTH</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset_out7</name>
                <type>reset</type>
                <isStart>true</isStart>
                <ports>
                    <port>
                        <name>reset_out7</name>
                        <role>reset</role>
                        <direction>Output</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                            <value>clk</value>
                        </entry>
                        <entry>
                            <key>associatedDirectReset</key>
                        </entry>
                        <entry>
                            <key>associatedResetSinks</key>
                            <value>reset_in0</value>
                        </entry>
                        <entry>
                            <key>synchronousEdges</key>
                            <value>BOTH</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
        </interfaces>
    </boundary>
    <originalModuleInfo>
        <className>altera_reset_sequencer</className>
        <version>19.1</version>
        <displayName>Reset Sequencer Intel FPGA IP</displayName>
    </originalModuleInfo>
    <systemInfoParameterDescriptors>
        <descriptors/>
    </systemInfoParameterDescriptors>
    <systemInfos>
        <connPtSystemInfos>
            <entry>
                <key>av_csr</key>
                <value>
                    <connectionPointName>av_csr</connectionPointName>
                    <suppliedSystemInfos>
                        <entry>
                            <key>ADDRESS_MAP</key>
                            <value>&lt;address-map&gt;&lt;slave name='av_csr' start='0x0' end='0x100' datawidth='32' /&gt;&lt;/address-map&gt;</value>
                        </entry>
                        <entry>
                            <key>ADDRESS_WIDTH</key>
                            <value>8</value>
                        </entry>
                        <entry>
                            <key>MAX_SLAVE_DATA_WIDTH</key>
                            <value>32</value>
                        </entry>
                    </suppliedSystemInfos>
                    <consumedSystemInfos/>
                </value>
            </entry>
        </connPtSystemInfos>
    </systemInfos>
</componentDefinition>::Q29tcG9uZW50IGRlZmluaXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_PARAMETER "Z2VuZXJhdGlvbkluZm9EZWZpbml0aW9u::PGdlbmVyYXRpb25JbmZvRGVmaW5pdGlvbj4KICAgIDxoZGxMaWJyYXJ5TmFtZT5pcF9hcnJpYTEwX2Uxc2dfamVzZDIwNGJfcnhfcmVzZXRfc2VxPC9oZGxMaWJyYXJ5TmFtZT4KICAgIDxmaWxlU2V0cz4KICAgICAgICA8ZmlsZVNldD4KICAgICAgICAgICAgPGZpbGVTZXROYW1lPmlwX2FycmlhMTBfZTFzZ19qZXNkMjA0Yl9yeF9yZXNldF9zZXE8L2ZpbGVTZXROYW1lPgogICAgICAgICAgICA8ZmlsZVNldEZpeGVkTmFtZT5pcF9hcnJpYTEwX2Uxc2dfamVzZDIwNGJfcnhfcmVzZXRfc2VxPC9maWxlU2V0Rml4ZWROYW1lPgogICAgICAgICAgICA8ZmlsZVNldEtpbmQ+UVVBUlRVU19TWU5USDwvZmlsZVNldEtpbmQ+CiAgICAgICAgICAgIDxmaWxlU2V0RmlsZXMvPgogICAgICAgIDwvZmlsZVNldD4KICAgICAgICA8ZmlsZVNldD4KICAgICAgICAgICAgPGZpbGVTZXROYW1lPmlwX2FycmlhMTBfZTFzZ19qZXNkMjA0Yl9yeF9yZXNldF9zZXE8L2ZpbGVTZXROYW1lPgogICAgICAgICAgICA8ZmlsZVNldEZpeGVkTmFtZT5pcF9hcnJpYTEwX2Uxc2dfamVzZDIwNGJfcnhfcmVzZXRfc2VxPC9maWxlU2V0Rml4ZWROYW1lPgogICAgICAgICAgICA8ZmlsZVNldEtpbmQ+U0lNX1ZFUklMT0c8L2ZpbGVTZXRLaW5kPgogICAgICAgICAgICA8ZmlsZVNldEZpbGVzLz4KICAgICAgICA8L2ZpbGVTZXQ+CiAgICAgICAgPGZpbGVTZXQ+CiAgICAgICAgICAgIDxmaWxlU2V0TmFtZT5pcF9hcnJpYTEwX2Uxc2dfamVzZDIwNGJfcnhfcmVzZXRfc2VxPC9maWxlU2V0TmFtZT4KICAgICAgICAgICAgPGZpbGVTZXRGaXhlZE5hbWU+aXBfYXJyaWExMF9lMXNnX2plc2QyMDRiX3J4X3Jlc2V0X3NlcTwvZmlsZVNldEZpeGVkTmFtZT4KICAgICAgICAgICAgPGZpbGVTZXRLaW5kPlNJTV9WSERMPC9maWxlU2V0S2luZD4KICAgICAgICAgICAgPGZpbGVTZXRGaWxlcy8+CiAgICAgICAgPC9maWxlU2V0PgogICAgPC9maWxlU2V0cz4KPC9nZW5lcmF0aW9uSW5mb0RlZmluaXRpb24+::R2VuZXJhdGlvbiBCZWhhdmlvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_PARAMETER "bG9naWNhbFZpZXc=::aXBfYXJyaWExMF9lMXNnX2plc2QyMDRiX3J4X3Jlc2V0X3NlcS5pcA==::TG9naWNhbCB2aWV3"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_PARAMETER "ZGVmYXVsdEJvdW5kYXJ5::<boundaryDefinition>
    <interfaces>
        <interface>
            <name>av_csr</name>
            <type>avalon</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>av_address</name>
                    <role>address</role>
                    <direction>Input</direction>
                    <width>8</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                </port>
                <port>
                    <name>av_readdata</name>
                    <role>readdata</role>
                    <direction>Output</direction>
                    <width>32</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                </port>
                <port>
                    <name>av_read</name>
                    <role>read</role>
                    <direction>Input</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
                <port>
                    <name>av_writedata</name>
                    <role>writedata</role>
                    <direction>Input</direction>
                    <width>32</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                </port>
                <port>
                    <name>av_write</name>
                    <role>write</role>
                    <direction>Input</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap>
                    <entry>
                        <key>embeddedsw.configuration.isFlash</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>embeddedsw.configuration.isMemoryDevice</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>embeddedsw.configuration.isNonVolatileStorage</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>embeddedsw.configuration.isPrintableDevice</key>
                        <value>0</value>
                    </entry>
                </assignmentValueMap>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>addressAlignment</key>
                        <value>DYNAMIC</value>
                    </entry>
                    <entry>
                        <key>addressGroup</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>addressSpan</key>
                        <value>256</value>
                    </entry>
                    <entry>
                        <key>addressUnits</key>
                        <value>SYMBOLS</value>
                    </entry>
                    <entry>
                        <key>alwaysBurstMaxBurst</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>associatedClock</key>
                        <value>clk</value>
                    </entry>
                    <entry>
                        <key>associatedReset</key>
                        <value>csr_reset</value>
                    </entry>
                    <entry>
                        <key>bitsPerSymbol</key>
                        <value>8</value>
                    </entry>
                    <entry>
                        <key>bridgedAddressOffset</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>bridgesToMaster</key>
                    </entry>
                    <entry>
                        <key>burstOnBurstBoundariesOnly</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>burstcountUnits</key>
                        <value>SYMBOLS</value>
                    </entry>
                    <entry>
                        <key>constantBurstBehavior</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>explicitAddressSpan</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>holdTime</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>interleaveBursts</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>isBigEndian</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>isFlash</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>isMemoryDevice</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>isNonVolatileStorage</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>linewrapBursts</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>maximumPendingReadTransactions</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>maximumPendingWriteTransactions</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>minimumReadLatency</key>
                        <value>1</value>
                    </entry>
                    <entry>
                        <key>minimumResponseLatency</key>
                        <value>1</value>
                    </entry>
                    <entry>
                        <key>minimumUninterruptedRunLength</key>
                        <value>1</value>
                    </entry>
                    <entry>
                        <key>prSafe</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>printableDevice</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>readLatency</key>
                        <value>2</value>
                    </entry>
                    <entry>
                        <key>readWaitStates</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>readWaitTime</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>registerIncomingSignals</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>registerOutgoingSignals</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>setupTime</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>timingUnits</key>
                        <value>Cycles</value>
                    </entry>
                    <entry>
                        <key>transparentBridge</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>waitrequestAllowance</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>wellBehavedWaitrequest</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>writeLatency</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>writeWaitStates</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>writeWaitTime</key>
                        <value>0</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>av_csr_irq</name>
            <type>interrupt</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>irq</name>
                    <role>irq</role>
                    <direction>Output</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedAddressablePoint</key>
                        <value>reset_sequencer_0.av_csr</value>
                    </entry>
                    <entry>
                        <key>associatedClock</key>
                        <value>clk</value>
                    </entry>
                    <entry>
                        <key>associatedReset</key>
                        <value>csr_reset</value>
                    </entry>
                    <entry>
                        <key>bridgedReceiverOffset</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>bridgesToReceiver</key>
                    </entry>
                    <entry>
                        <key>irqScheme</key>
                        <value>NONE</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>clk</name>
            <type>clock</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>clk</name>
                    <role>clk</role>
                    <direction>Input</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>clockRate</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>externallyDriven</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>ptfSchematicName</key>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>csr_reset</name>
            <type>reset</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>csr_reset</name>
                    <role>reset</role>
                    <direction>Input</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                    </entry>
                    <entry>
                        <key>synchronousEdges</key>
                        <value>NONE</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset1_dsrt_qual</name>
            <type>conduit</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>reset1_dsrt_qual</name>
                    <role>reset1_dsrt_qual</role>
                    <direction>Input</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                    </entry>
                    <entry>
                        <key>associatedReset</key>
                    </entry>
                    <entry>
                        <key>prSafe</key>
                        <value>false</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset2_dsrt_qual</name>
            <type>conduit</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>reset2_dsrt_qual</name>
                    <role>reset2_dsrt_qual</role>
                    <direction>Input</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                    </entry>
                    <entry>
                        <key>associatedReset</key>
                    </entry>
                    <entry>
                        <key>prSafe</key>
                        <value>false</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset5_dsrt_qual</name>
            <type>conduit</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>reset5_dsrt_qual</name>
                    <role>reset5_dsrt_qual</role>
                    <direction>Input</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                    </entry>
                    <entry>
                        <key>associatedReset</key>
                    </entry>
                    <entry>
                        <key>prSafe</key>
                        <value>false</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset_in0</name>
            <type>reset</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>reset_in0</name>
                    <role>reset</role>
                    <direction>Input</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                    </entry>
                    <entry>
                        <key>synchronousEdges</key>
                        <value>NONE</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset_out0</name>
            <type>reset</type>
            <isStart>true</isStart>
            <ports>
                <port>
                    <name>reset_out0</name>
                    <role>reset</role>
                    <direction>Output</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                        <value>clk</value>
                    </entry>
                    <entry>
                        <key>associatedDirectReset</key>
                    </entry>
                    <entry>
                        <key>associatedResetSinks</key>
                        <value>reset_in0</value>
                    </entry>
                    <entry>
                        <key>synchronousEdges</key>
                        <value>BOTH</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset_out1</name>
            <type>reset</type>
            <isStart>true</isStart>
            <ports>
                <port>
                    <name>reset_out1</name>
                    <role>reset</role>
                    <direction>Output</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                        <value>clk</value>
                    </entry>
                    <entry>
                        <key>associatedDirectReset</key>
                    </entry>
                    <entry>
                        <key>associatedResetSinks</key>
                        <value>reset_in0</value>
                    </entry>
                    <entry>
                        <key>synchronousEdges</key>
                        <value>BOTH</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset_out2</name>
            <type>reset</type>
            <isStart>true</isStart>
            <ports>
                <port>
                    <name>reset_out2</name>
                    <role>reset</role>
                    <direction>Output</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                        <value>clk</value>
                    </entry>
                    <entry>
                        <key>associatedDirectReset</key>
                    </entry>
                    <entry>
                        <key>associatedResetSinks</key>
                        <value>reset_in0</value>
                    </entry>
                    <entry>
                        <key>synchronousEdges</key>
                        <value>BOTH</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset_out3</name>
            <type>reset</type>
            <isStart>true</isStart>
            <ports>
                <port>
                    <name>reset_out3</name>
                    <role>reset</role>
                    <direction>Output</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                        <value>clk</value>
                    </entry>
                    <entry>
                        <key>associatedDirectReset</key>
                    </entry>
                    <entry>
                        <key>associatedResetSinks</key>
                        <value>reset_in0</value>
                    </entry>
                    <entry>
                        <key>synchronousEdges</key>
                        <value>BOTH</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset_out4</name>
            <type>reset</type>
            <isStart>true</isStart>
            <ports>
                <port>
                    <name>reset_out4</name>
                    <role>reset</role>
                    <direction>Output</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                        <value>clk</value>
                    </entry>
                    <entry>
                        <key>associatedDirectReset</key>
                    </entry>
                    <entry>
                        <key>associatedResetSinks</key>
                        <value>reset_in0</value>
                    </entry>
                    <entry>
                        <key>synchronousEdges</key>
                        <value>BOTH</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset_out5</name>
            <type>reset</type>
            <isStart>true</isStart>
            <ports>
                <port>
                    <name>reset_out5</name>
                    <role>reset</role>
                    <direction>Output</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                        <value>clk</value>
                    </entry>
                    <entry>
                        <key>associatedDirectReset</key>
                    </entry>
                    <entry>
                        <key>associatedResetSinks</key>
                        <value>reset_in0</value>
                    </entry>
                    <entry>
                        <key>synchronousEdges</key>
                        <value>BOTH</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset_out6</name>
            <type>reset</type>
            <isStart>true</isStart>
            <ports>
                <port>
                    <name>reset_out6</name>
                    <role>reset</role>
                    <direction>Output</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                        <value>clk</value>
                    </entry>
                    <entry>
                        <key>associatedDirectReset</key>
                    </entry>
                    <entry>
                        <key>associatedResetSinks</key>
                        <value>reset_in0</value>
                    </entry>
                    <entry>
                        <key>synchronousEdges</key>
                        <value>BOTH</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset_out7</name>
            <type>reset</type>
            <isStart>true</isStart>
            <ports>
                <port>
                    <name>reset_out7</name>
                    <role>reset</role>
                    <direction>Output</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                        <value>clk</value>
                    </entry>
                    <entry>
                        <key>associatedDirectReset</key>
                    </entry>
                    <entry>
                        <key>associatedResetSinks</key>
                        <value>reset_in0</value>
                    </entry>
                    <entry>
                        <key>synchronousEdges</key>
                        <value>BOTH</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
    </interfaces>
</boundaryDefinition>::RGVmYXVsdCBib3VuZGFyeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_PARAMETER "bW9kdWxlQXNzaWdubWVudERlZmluaXRpb24=::PGFzc2lnbm1lbnREZWZpbml0aW9uPgogICAgPGFzc2lnbm1lbnRWYWx1ZU1hcC8+CjwvYXNzaWdubWVudERlZmluaXRpb24+::TW9kdWxlIEFzc2lnbm1lbnRz"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::QXJyaWEgMTA=::QXV0byBERVZJQ0VfRkFNSUxZ"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::MTBBWDExNVUyRjQ1RTFTRw==::QXV0byBERVZJQ0U="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_GROUP "R2VuZXJpYyBDb21wb25lbnQ="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2plc2QyMDRiX3J4X3Jlc2V0X3NlcQ=="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_DISPLAY_NAME "aXBfYXJyaWExMF9lMXNnX2plc2QyMDRiX3J4X3Jlc2V0X3NlcQ=="
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_REPORT_HIERARCHY "On"
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_INTERNAL "Off"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_VERSION "MS4w"
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_PARAMETER "QVVUT19HRU5FUkFUSU9OX0lE::MA==::QXV0byBHRU5FUkFUSU9OX0lE"
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::QXJyaWEgMTA=::QXV0byBERVZJQ0VfRkFNSUxZ"
@@ -105,19 +40,5 @@ set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_reset_seq" -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name IP_COMPONENT_GROUP "U3lzdGVt"
-set_global_assignment -library "altera_reset_sequencer_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_reset_sequencer_180/synth/altera_reset_sequencer.sv"]
-set_global_assignment -library "altera_reset_sequencer_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_reset_sequencer_180/synth/altera_reset_sequencer_main.sv"]
-set_global_assignment -library "altera_reset_sequencer_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_reset_sequencer_180/synth/altera_reset_sequencer_seq.sv"]
-set_global_assignment -library "altera_reset_sequencer_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_reset_sequencer_180/synth/altera_reset_sequencer_deglitch.sv"]
-set_global_assignment -library "altera_reset_sequencer_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_reset_sequencer_180/synth/altera_reset_sequencer_deglitch_main.sv"]
-set_global_assignment -library "altera_reset_sequencer_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_reset_sequencer_180/synth/altera_reset_sequencer_dlycntr.sv"]
-set_global_assignment -library "altera_reset_sequencer_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_reset_sequencer_180/synth/altera_reset_sequencer_av_csr.sv"]
-set_global_assignment -library "altera_reset_sequencer_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_reset_sequencer_180/synth/altera_reset_controller.v"]
-set_global_assignment -library "altera_reset_sequencer_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_reset_sequencer_180/synth/altera_reset_synchronizer.v"]
set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_reset_seq" -name VHDL_FILE [file join $::quartus(qip_path) "synth/ip_arria10_e1sg_jesd204b_rx_reset_seq.vhd"]
-
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_TOOL_NAME "altera_reset_sequencer"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_TOOL_VERSION "18.0"
-set_global_assignment -entity "altera_reset_sequencer" -library "altera_reset_sequencer_180" -name IP_TOOL_ENV "QsysPrimePro"
-
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.sopcinfo b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.sopcinfo
index 5f48eb2546d9b0135680eae2de5a8aee15631abb..80c6f5e7f015b2d35acbdbce2bce4b6b013ce904 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.sopcinfo
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.sopcinfo
@@ -4,8 +4,8 @@
kind="ip_arria10_e1sg_jesd204b_rx_reset_seq"
version="1.0"
fabric="QSYS">
- <!-- Format version 18.0 219 (Future versions may contain additional information.) -->
- <!-- 2019.11.25.08:22:08 -->
+ <!-- Format version 19.4 64 (Future versions may contain additional information.) -->
+ <!-- 2020.11.26.17:19:53 -->
<!-- A collection of modules and connections -->
<parameter name="AUTO_GENERATION_ID">
<type>java.lang.Integer</type>
@@ -100,547 +100,1686 @@
<valid>true</valid>
</parameter>
<module
- name="reset_seq"
+ name="reset_sequencer_0"
kind="altera_reset_sequencer"
- version="18.0"
- path="reset_seq">
+ version="19.1"
+ entity="ip_arria10_e1sg_jesd204b_rx_reset_seq"
+ library="ip_arria10_e1sg_jesd204b_rx_reset_seq"
+ path="reset_sequencer_0"
+ hpath="reset_sequencer_0">
<!-- Describes a single module. Module parameters are
the requested settings for a module instance. -->
- <parameter name="NUM_OUTPUTS">
- <type>int</type>
- <value>8</value>
+ <parameter name="componentDefinition">
+ <type>com.altera.qsys.blackboxmodule.definitions.ComponentDefinition</type>
+ <value><![CDATA[<componentDefinition>
+ <boundary>
+ <interfaces>
+ <interface>
+ <name>av_csr</name>
+ <type>avalon</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>av_address</name>
+ <role>address</role>
+ <direction>Input</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_readdata</name>
+ <role>readdata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>av_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_write</name>
+ <role>write</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
+ </entry>
+ <entry>
+ <key>addressGroup</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>256</value>
+ </entry>
+ <entry>
+ <key>addressUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>alwaysBurstMaxBurst</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bitsPerSymbol</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToMaster</key>
+ </entry>
+ <entry>
+ <key>burstOnBurstBoundariesOnly</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>burstcountUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>constantBurstBehavior</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>holdTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>interleaveBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isBigEndian</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isFlash</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isMemoryDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isNonVolatileStorage</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>linewrapBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maximumPendingReadTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>maximumPendingWriteTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>minimumReadLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumResponseLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumUninterruptedRunLength</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readLatency</key>
+ <value>2</value>
+ </entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>readWaitTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>registerIncomingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>registerOutgoingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>setupTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>timingUnits</key>
+ <value>Cycles</value>
+ </entry>
+ <entry>
+ <key>transparentBridge</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>waitrequestAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>writeLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitTime</key>
+ <value>0</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>av_csr_irq</name>
+ <type>interrupt</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>irq</name>
+ <role>irq</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedAddressablePoint</key>
+ <value>reset_sequencer_0.av_csr</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bridgedReceiverOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToReceiver</key>
+ </entry>
+ <entry>
+ <key>irqScheme</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset1_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset1_dsrt_qual</name>
+ <role>reset1_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset2_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset2_dsrt_qual</name>
+ <role>reset2_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset5_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset5_dsrt_qual</name>
+ <role>reset5_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_in0</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset_in0</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out0</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out0</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out1</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out1</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out2</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out2</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out3</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out3</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out4</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out4</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out5</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out5</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out6</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out6</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out7</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out7</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+ </boundary>
+ <originalModuleInfo>
+ <className>altera_reset_sequencer</className>
+ <version>19.1</version>
+ <displayName>Reset Sequencer Intel FPGA IP</displayName>
+ </originalModuleInfo>
+ <systemInfoParameterDescriptors>
+ <descriptors/>
+ </systemInfoParameterDescriptors>
+ <systemInfos>
+ <connPtSystemInfos>
+ <entry>
+ <key>av_csr</key>
+ <value>
+ <connectionPointName>av_csr</connectionPointName>
+ <suppliedSystemInfos>
+ <entry>
+ <key>ADDRESS_MAP</key>
+ <value><address-map><slave name='av_csr' start='0x0' end='0x100' datawidth='32' /></address-map></value>
+ </entry>
+ <entry>
+ <key>ADDRESS_WIDTH</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>MAX_SLAVE_DATA_WIDTH</key>
+ <value>32</value>
+ </entry>
+ </suppliedSystemInfos>
+ <consumedSystemInfos/>
+ </value>
+ </entry>
+ </connPtSystemInfos>
+ </systemInfos>
+</componentDefinition>]]></value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="NUM_INPUTS">
- <type>int</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ENABLE_RESET_REQUEST_INPUT">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ENABLE_DEASSERTION_INPUT_QUAL">
- <type>int</type>
- <value>38</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ENABLE_ASSERTION_SEQUENCE">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ENABLE_DEASSERTION_SEQUENCE">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="MIN_ASRT_TIME">
- <type>int</type>
- <value>20</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_DELAY0">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_DELAY0">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_REMAP0">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_REMAP0">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_QUALCNT_0">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_DELAY1">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_DELAY1">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_REMAP1">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_REMAP1">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_QUALCNT_1">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_DELAY2">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_DELAY2">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_REMAP2">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_REMAP2">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_QUALCNT_2">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_DELAY3">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_DELAY3">
- <type>int</type>
- <value>20</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_REMAP3">
- <type>int</type>
- <value>3</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_REMAP3">
- <type>int</type>
- <value>3</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_QUALCNT_3">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_DELAY4">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_DELAY4">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_REMAP4">
- <type>int</type>
- <value>4</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_REMAP4">
- <type>int</type>
- <value>4</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_QUALCNT_4">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_DELAY5">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_DELAY5">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_REMAP5">
- <type>int</type>
- <value>5</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_REMAP5">
- <type>int</type>
- <value>5</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_QUALCNT_5">
- <type>int</type>
- <value>2</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_DELAY6">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_DELAY6">
- <type>int</type>
- <value>20</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_REMAP6">
- <type>int</type>
- <value>6</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_REMAP6">
- <type>int</type>
- <value>6</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_QUALCNT_6">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_DELAY7">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_DELAY7">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_REMAP7">
- <type>int</type>
- <value>7</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_REMAP7">
- <type>int</type>
- <value>7</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_QUALCNT_7">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_DELAY8">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_DELAY8">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_REMAP8">
- <type>int</type>
- <value>8</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_REMAP8">
- <type>int</type>
- <value>8</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_QUALCNT_8">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_DELAY9">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_DELAY9">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="ASRT_REMAP9">
- <type>int</type>
- <value>9</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_REMAP9">
- <type>int</type>
- <value>9</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="DSRT_QUALCNT_9">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="ENABLE_CSR">
- <type>int</type>
- <value>1</value>
+ <parameter name="generationInfoDefinition">
+ <type>com.altera.qsys.blackboxmodule.definitions.GenerationInfoDefinition</type>
+ <value><![CDATA[<generationInfoDefinition>
+ <hdlLibraryName>ip_arria10_e1sg_jesd204b_rx_reset_seq</hdlLibraryName>
+ <fileSets>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetFixedName>
+ <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetFixedName>
+ <fileSetKind>SIM_VERILOG</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetFixedName>
+ <fileSetKind>SIM_VHDL</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ </fileSets>
+</generationInfoDefinition>]]></value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="RESET_OUT_NAME">
- <type>[Ljava.lang.String;</type>
- <value>reset_out0,reset_out1,reset_out2,reset_out3,reset_out4,reset_out5,reset_out6,reset_out7</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="LIST_ASRT_SEQ">
- <type>[Ljava.lang.String;</type>
- <value>0,1,2,3,4,5,6,7,8,9</value>
+ <parameter name="hlsFile">
+ <type>java.lang.String</type>
+ <value></value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="LIST_DSRT_SEQ">
- <type>[Ljava.lang.String;</type>
- <value>0,1,2,3,4,5,6,7,8,9</value>
+ <parameter name="logicalView">
+ <type>java.lang.String</type>
+ <value>ip_arria10_e1sg_jesd204b_rx_reset_seq.ip</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="LIST_ASRT_DELAY">
- <type>[Ljava.lang.String;</type>
- <value>0,0,0,0,0,0,0,0,0,0</value>
+ <parameter name="defaultBoundary">
+ <type>com.altera.sopcmodel.definition.BoundaryDefinition</type>
+ <value><![CDATA[<boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>av_csr</name>
+ <type>avalon</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>av_address</name>
+ <role>address</role>
+ <direction>Input</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_readdata</name>
+ <role>readdata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>av_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_write</name>
+ <role>write</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
+ </entry>
+ <entry>
+ <key>addressGroup</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>256</value>
+ </entry>
+ <entry>
+ <key>addressUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>alwaysBurstMaxBurst</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bitsPerSymbol</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToMaster</key>
+ </entry>
+ <entry>
+ <key>burstOnBurstBoundariesOnly</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>burstcountUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>constantBurstBehavior</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>holdTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>interleaveBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isBigEndian</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isFlash</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isMemoryDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isNonVolatileStorage</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>linewrapBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maximumPendingReadTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>maximumPendingWriteTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>minimumReadLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumResponseLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumUninterruptedRunLength</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readLatency</key>
+ <value>2</value>
+ </entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>readWaitTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>registerIncomingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>registerOutgoingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>setupTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>timingUnits</key>
+ <value>Cycles</value>
+ </entry>
+ <entry>
+ <key>transparentBridge</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>waitrequestAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>writeLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitTime</key>
+ <value>0</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>av_csr_irq</name>
+ <type>interrupt</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>irq</name>
+ <role>irq</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedAddressablePoint</key>
+ <value>reset_sequencer_0.av_csr</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bridgedReceiverOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToReceiver</key>
+ </entry>
+ <entry>
+ <key>irqScheme</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset1_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset1_dsrt_qual</name>
+ <role>reset1_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset2_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset2_dsrt_qual</name>
+ <role>reset2_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset5_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset5_dsrt_qual</name>
+ <role>reset5_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_in0</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset_in0</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out0</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out0</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out1</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out1</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out2</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out2</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out3</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out3</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out4</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out4</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out5</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out5</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out6</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out6</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out7</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out7</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition>]]></value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="LIST_DSRT_DELAY">
- <type>[Ljava.lang.String;</type>
- <value>2,2,2,20,0,2,20,0,0,0</value>
+ <parameter name="moduleAssignmentDefinition">
+ <type>com.altera.sopcmodel.definition.AssignmentDefinition</type>
+ <value><![CDATA[<assignmentDefinition>
+ <assignmentValueMap/>
+</assignmentDefinition>]]></value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="USE_DSRT_QUAL">
- <type>[Ljava.lang.Integer;</type>
- <value>0,1,1,0,0,1,0,0,0,0</value>
+ <parameter name="svInterfaceDefinition">
+ <type>com.altera.qsys.blackboxmodule.definitions.ModuleSvInterfaceDefinition</type>
+ <value></value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="ASRT_SEQ_MSG">
+ <parameter name="AUTO_DEVICE_FAMILY">
<type>java.lang.String</type>
- <value>SEQUENCE DISABLED (All Delays are 0)</value>
+ <value>ARRIA10</value>
<derived>true</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
+ <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
</parameter>
- <parameter name="DSRT_SEQ_MSG">
+ <parameter name="AUTO_DEVICE">
<type>java.lang.String</type>
- <value>reset_in_deasserted-> #2-> reset_out0 ->wait_dqual1-> reset_out1 ->wait_dqual2-> reset_out2 -> #20-> reset_out3 + reset_out4 ->wait_dqual5-> reset_out5 -> #20-> reset_out6 + reset_out7</value>
+ <value>10AX115U2F45E1SG</value>
<derived>true</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
+ <sysinfo_type>DEVICE</sysinfo_type>
</parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
- <value>UNKNOWN</value>
- <derived>false</derived>
+ <value>Arria 10</value>
+ <derived>true</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
+ <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
</parameter>
<parameter name="generateLegacySim">
<type>boolean</type>
@@ -650,371 +1789,349 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <interface name="clk" kind="clock_sink" version="18.0">
+ <interface name="av_csr" kind="avalon_slave" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
- <parameter name="externallyDriven">
- <type>boolean</type>
- <value>false</value>
+ <assignment>
+ <name>embeddedsw.configuration.isFlash</name>
+ <value>0</value>
+ </assignment>
+ <assignment>
+ <name>embeddedsw.configuration.isMemoryDevice</name>
+ <value>0</value>
+ </assignment>
+ <assignment>
+ <name>embeddedsw.configuration.isNonVolatileStorage</name>
+ <value>0</value>
+ </assignment>
+ <assignment>
+ <name>embeddedsw.configuration.isPrintableDevice</name>
+ <value>0</value>
+ </assignment>
+ <parameter name="addressAlignment">
+ <type>com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment</type>
+ <value>DYNAMIC</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="ptfSchematicName">
- <type>java.lang.String</type>
- <value></value>
+ <parameter name="addressGroup">
+ <type>int</type>
+ <value>0</value>
<derived>false</derived>
<enabled>true</enabled>
+ <visible>true</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="addressSpan">
+ <type>java.math.BigInteger</type>
+ <value>256</value>
+ <derived>true</derived>
+ <enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
+ <parameter name="addressUnits">
+ <type>com.altera.sopcmodel.avalon.EAddrBurstUnits</type>
+ <value>SYMBOLS</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="generateLegacySim">
+ <parameter name="alwaysBurstMaxBurst">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <type>clock</type>
- <isStart>false</isStart>
- <port>
- <name>clk</name>
- <direction>Input</direction>
- <width>1</width>
- <role>clk</role>
- </port>
- </interface>
- <interface name="reset_in0" kind="reset_sink" version="18.0">
- <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
<parameter name="associatedClock">
<type>java.lang.String</type>
- <value></value>
+ <value>clk</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="synchronousEdges">
- <type>com.altera.sopcmodel.reset.Reset$Edges</type>
- <value>NONE</value>
+ <parameter name="associatedReset">
+ <type>java.lang.String</type>
+ <value>csr_reset</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
+ <parameter name="bitsPerSymbol">
+ <type>int</type>
+ <value>8</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="generateLegacySim">
- <type>boolean</type>
- <value>false</value>
+ <parameter name="bridgedAddressOffset">
+ <type>java.math.BigInteger</type>
+ <value>0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <type>reset</type>
- <isStart>false</isStart>
- <port>
- <name>reset_in0</name>
- <direction>Input</direction>
- <width>1</width>
- <role>reset</role>
- </port>
- </interface>
- <interface name="reset_out0" kind="reset_source" version="18.0">
- <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
- <parameter name="associatedClock">
- <type>java.lang.String</type>
- <value>clk</value>
+ <parameter name="bridgesToMaster">
+ <type>com.altera.entityinterfaces.IConnectionPoint</type>
+ <value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedDirectReset">
- <type>java.lang.String</type>
- <value></value>
+ <parameter name="burstOnBurstBoundariesOnly">
+ <type>boolean</type>
+ <value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedResetSinks">
- <type>[Ljava.lang.String;</type>
- <value>reset_in0</value>
+ <parameter name="burstcountUnits">
+ <type>com.altera.sopcmodel.avalon.EAddrBurstUnits</type>
+ <value>SYMBOLS</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="synchronousEdges">
- <type>com.altera.sopcmodel.reset.Reset$Edges</type>
- <value>BOTH</value>
+ <parameter name="constantBurstBehavior">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="explicitAddressSpan">
+ <type>java.math.BigInteger</type>
+ <value>0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
+ <parameter name="holdTime">
+ <type>int</type>
+ <value>0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="generateLegacySim">
+ <parameter name="interleaveBursts">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <type>reset</type>
- <isStart>true</isStart>
- <port>
- <name>reset_out0</name>
- <direction>Output</direction>
- <width>1</width>
- <role>reset</role>
- </port>
- </interface>
- <interface name="reset_out1" kind="reset_source" version="18.0">
- <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
- <parameter name="associatedClock">
- <type>java.lang.String</type>
- <value>clk</value>
+ <parameter name="isBigEndian">
+ <type>boolean</type>
+ <value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedDirectReset">
- <type>java.lang.String</type>
- <value></value>
+ <parameter name="isFlash">
+ <type>boolean</type>
+ <value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedResetSinks">
- <type>[Ljava.lang.String;</type>
- <value>reset_in0</value>
+ <parameter name="isMemoryDevice">
+ <type>boolean</type>
+ <value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="synchronousEdges">
- <type>com.altera.sopcmodel.reset.Reset$Edges</type>
- <value>BOTH</value>
+ <parameter name="isNonVolatileStorage">
+ <type>boolean</type>
+ <value>false</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="linewrapBursts">
+ <type>boolean</type>
+ <value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
+ <parameter name="maximumPendingReadTransactions">
+ <type>int</type>
+ <value>0</value>
+ <derived>false</derived>
+ <enabled>false</enabled>
+ <visible>true</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="maximumPendingWriteTransactions">
+ <type>int</type>
+ <value>0</value>
+ <derived>false</derived>
+ <enabled>false</enabled>
+ <visible>true</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="minimumReadLatency">
+ <type>int</type>
+ <value>1</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="minimumResponseLatency">
+ <type>int</type>
+ <value>1</value>
<derived>false</derived>
- <enabled>true</enabled>
+ <enabled>false</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="generateLegacySim">
- <type>boolean</type>
- <value>false</value>
+ <parameter name="minimumUninterruptedRunLength">
+ <type>int</type>
+ <value>1</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <type>reset</type>
- <isStart>true</isStart>
- <port>
- <name>reset_out1</name>
- <direction>Output</direction>
- <width>1</width>
- <role>reset</role>
- </port>
- </interface>
- <interface name="reset_out2" kind="reset_source" version="18.0">
- <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
- <parameter name="associatedClock">
- <type>java.lang.String</type>
- <value>clk</value>
+ <parameter name="prSafe">
+ <type>boolean</type>
+ <value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedDirectReset">
- <type>java.lang.String</type>
- <value></value>
+ <parameter name="printableDevice">
+ <type>boolean</type>
+ <value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedResetSinks">
- <type>[Ljava.lang.String;</type>
- <value>reset_in0</value>
+ <parameter name="readLatency">
+ <type>int</type>
+ <value>2</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="synchronousEdges">
- <type>com.altera.sopcmodel.reset.Reset$Edges</type>
- <value>BOTH</value>
+ <parameter name="readWaitStates">
+ <type>int</type>
+ <value>0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
+ <parameter name="readWaitTime">
+ <type>int</type>
+ <value>0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="generateLegacySim">
+ <parameter name="registerIncomingSignals">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <type>reset</type>
- <isStart>true</isStart>
- <port>
- <name>reset_out2</name>
- <direction>Output</direction>
- <width>1</width>
- <role>reset</role>
- </port>
- </interface>
- <interface name="reset_out3" kind="reset_source" version="18.0">
- <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
- <parameter name="associatedClock">
- <type>java.lang.String</type>
- <value>clk</value>
+ <parameter name="registerOutgoingSignals">
+ <type>boolean</type>
+ <value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedDirectReset">
- <type>java.lang.String</type>
- <value></value>
+ <parameter name="setupTime">
+ <type>int</type>
+ <value>0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedResetSinks">
- <type>[Ljava.lang.String;</type>
- <value>reset_in0</value>
+ <parameter name="timingUnits">
+ <type>com.altera.sopcmodel.avalon.TimingUnits</type>
+ <value>Cycles</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="synchronousEdges">
- <type>com.altera.sopcmodel.reset.Reset$Edges</type>
- <value>BOTH</value>
+ <parameter name="transparentBridge">
+ <type>boolean</type>
+ <value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
+ <parameter name="waitrequestAllowance">
+ <type>int</type>
+ <value>0</value>
<derived>false</derived>
- <enabled>true</enabled>
+ <enabled>false</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="generateLegacySim">
+ <parameter name="wellBehavedWaitrequest">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <type>reset</type>
- <isStart>true</isStart>
- <port>
- <name>reset_out3</name>
- <direction>Output</direction>
- <width>1</width>
- <role>reset</role>
- </port>
- </interface>
- <interface name="reset_out4" kind="reset_source" version="18.0">
- <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
- <parameter name="associatedClock">
- <type>java.lang.String</type>
- <value>clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedDirectReset">
- <type>java.lang.String</type>
- <value></value>
+ <parameter name="writeLatency">
+ <type>int</type>
+ <value>0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedResetSinks">
- <type>[Ljava.lang.String;</type>
- <value>reset_in0</value>
+ <parameter name="writeWaitStates">
+ <type>int</type>
+ <value>0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="synchronousEdges">
- <type>com.altera.sopcmodel.reset.Reset$Edges</type>
- <value>BOTH</value>
+ <parameter name="writeWaitTime">
+ <type>int</type>
+ <value>0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
@@ -1036,51 +2153,91 @@ parameters are a RESULT of the module parameters. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <type>reset</type>
- <isStart>true</isStart>
+ <type>avalon</type>
+ <isStart>false</isStart>
<port>
- <name>reset_out4</name>
+ <name>av_address</name>
+ <direction>Input</direction>
+ <width>8</width>
+ <role>address</role>
+ </port>
+ <port>
+ <name>av_readdata</name>
<direction>Output</direction>
+ <width>32</width>
+ <role>readdata</role>
+ </port>
+ <port>
+ <name>av_read</name>
+ <direction>Input</direction>
<width>1</width>
- <role>reset</role>
+ <role>read</role>
+ </port>
+ <port>
+ <name>av_writedata</name>
+ <direction>Input</direction>
+ <width>32</width>
+ <role>writedata</role>
+ </port>
+ <port>
+ <name>av_write</name>
+ <direction>Input</direction>
+ <width>1</width>
+ <role>write</role>
</port>
</interface>
- <interface name="reset_out5" kind="reset_source" version="18.0">
+ <interface name="av_csr_irq" kind="interrupt_sender" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
+ <parameter name="associatedAddressablePoint">
+ <type>com.altera.entityinterfaces.IConnectionPoint</type>
+ <value>reset_sequencer_0.av_csr</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="associatedClock">
<type>java.lang.String</type>
<value>clk</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedDirectReset">
+ <parameter name="associatedReset">
<type>java.lang.String</type>
- <value></value>
+ <value>csr_reset</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedResetSinks">
- <type>[Ljava.lang.String;</type>
- <value>reset_in0</value>
+ <parameter name="bridgedReceiverOffset">
+ <type>java.lang.Integer</type>
+ <value>0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="synchronousEdges">
- <type>com.altera.sopcmodel.reset.Reset$Edges</type>
- <value>BOTH</value>
+ <parameter name="bridgesToReceiver">
+ <type>com.altera.entityinterfaces.IConnectionPoint</type>
+ <value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
+ <parameter name="irqScheme">
+ <type>com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme</type>
+ <value>NONE</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>false</visible>
+ <valid>true</valid>
+ </parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
@@ -1097,49 +2254,33 @@ parameters are a RESULT of the module parameters. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <type>reset</type>
- <isStart>true</isStart>
+ <type>interrupt</type>
+ <isStart>false</isStart>
<port>
- <name>reset_out5</name>
+ <name>irq</name>
<direction>Output</direction>
<width>1</width>
- <role>reset</role>
+ <role>irq</role>
</port>
</interface>
- <interface name="reset_out6" kind="reset_source" version="18.0">
+ <interface name="clk" kind="clock_sink" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
- <parameter name="associatedClock">
- <type>java.lang.String</type>
- <value>clk</value>
+ <parameter name="externallyDriven">
+ <type>boolean</type>
+ <value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedDirectReset">
+ <parameter name="ptfSchematicName">
<type>java.lang.String</type>
- <value></value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="associatedResetSinks">
- <type>[Ljava.lang.String;</type>
- <value>reset_in0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="synchronousEdges">
- <type>com.altera.sopcmodel.reset.Reset$Edges</type>
- <value>BOTH</value>
+ <value></value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="deviceFamily">
@@ -1158,28 +2299,20 @@ parameters are a RESULT of the module parameters. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <type>reset</type>
- <isStart>true</isStart>
+ <type>clock</type>
+ <isStart>false</isStart>
<port>
- <name>reset_out6</name>
- <direction>Output</direction>
+ <name>clk</name>
+ <direction>Input</direction>
<width>1</width>
- <role>reset</role>
+ <role>clk</role>
</port>
</interface>
- <interface name="reset_out7" kind="reset_source" version="18.0">
+ <interface name="csr_reset" kind="reset_sink" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
<parameter name="associatedClock">
- <type>java.lang.String</type>
- <value>clk</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="associatedDirectReset">
<type>java.lang.String</type>
<value></value>
<derived>false</derived>
@@ -1187,17 +2320,9 @@ parameters are a RESULT of the module parameters. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedResetSinks">
- <type>[Ljava.lang.String;</type>
- <value>reset_in0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
<parameter name="synchronousEdges">
<type>com.altera.sopcmodel.reset.Reset$Edges</type>
- <value>BOTH</value>
+ <value>NONE</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
@@ -1220,15 +2345,15 @@ parameters are a RESULT of the module parameters. -->
<valid>true</valid>
</parameter>
<type>reset</type>
- <isStart>true</isStart>
+ <isStart>false</isStart>
<port>
- <name>reset_out7</name>
- <direction>Output</direction>
+ <name>csr_reset</name>
+ <direction>Input</direction>
<width>1</width>
<role>reset</role>
</port>
</interface>
- <interface name="reset1_dsrt_qual" kind="conduit_end" version="18.0">
+ <interface name="reset1_dsrt_qual" kind="conduit_end" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -1281,7 +2406,7 @@ parameters are a RESULT of the module parameters. -->
<role>reset1_dsrt_qual</role>
</port>
</interface>
- <interface name="reset2_dsrt_qual" kind="conduit_end" version="18.0">
+ <interface name="reset2_dsrt_qual" kind="conduit_end" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -1334,7 +2459,7 @@ parameters are a RESULT of the module parameters. -->
<role>reset2_dsrt_qual</role>
</port>
</interface>
- <interface name="reset5_dsrt_qual" kind="conduit_end" version="18.0">
+ <interface name="reset5_dsrt_qual" kind="conduit_end" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -1387,7 +2512,7 @@ parameters are a RESULT of the module parameters. -->
<role>reset5_dsrt_qual</role>
</port>
</interface>
- <interface name="csr_reset" kind="reset_sink" version="18.0">
+ <interface name="reset_in0" kind="reset_sink" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -1426,351 +2551,409 @@ parameters are a RESULT of the module parameters. -->
<type>reset</type>
<isStart>false</isStart>
<port>
- <name>csr_reset</name>
+ <name>reset_in0</name>
<direction>Input</direction>
<width>1</width>
<role>reset</role>
</port>
</interface>
- <interface name="av_csr" kind="avalon_slave" version="18.0">
+ <interface name="reset_out0" kind="reset_source" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
- <assignment>
- <name>embeddedsw.configuration.isMemoryDevice</name>
- <value>false</value>
- </assignment>
- <assignment>
- <name>embeddedsw.configuration.isNonVolatileStorage</name>
- <value>false</value>
- </assignment>
- <assignment>
- <name>embeddedsw.configuration.isPrintableDevice</name>
- <value>false</value>
- </assignment>
- <parameter name="addressAlignment">
- <type>com.altera.sopcmodel.avalon.AvalonConnectionPoint$AddressAlignment</type>
- <value>DYNAMIC</value>
+ <parameter name="associatedClock">
+ <type>java.lang.String</type>
+ <value>clk</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="addressGroup">
- <type>int</type>
- <value>0</value>
+ <parameter name="associatedDirectReset">
+ <type>java.lang.String</type>
+ <value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="addressSpan">
- <type>java.math.BigInteger</type>
- <value>256</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="addressUnits">
- <type>com.altera.sopcmodel.avalon.EAddrBurstUnits</type>
- <value>SYMBOLS</value>
+ <parameter name="associatedResetSinks">
+ <type>[Ljava.lang.String;</type>
+ <value>reset_in0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="alwaysBurstMaxBurst">
- <type>boolean</type>
- <value>false</value>
+ <parameter name="synchronousEdges">
+ <type>com.altera.sopcmodel.reset.Reset$Edges</type>
+ <value>BOTH</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedClock">
+ <parameter name="deviceFamily">
<type>java.lang.String</type>
- <value>clk</value>
+ <value>UNKNOWN</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedReset">
- <type>java.lang.String</type>
- <value>csr_reset</value>
+ <parameter name="generateLegacySim">
+ <type>boolean</type>
+ <value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="bitsPerSymbol">
- <type>int</type>
- <value>8</value>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <port>
+ <name>reset_out0</name>
+ <direction>Output</direction>
+ <width>1</width>
+ <role>reset</role>
+ </port>
+ </interface>
+ <interface name="reset_out1" kind="reset_source" version="19.4">
+ <!-- The connection points exposed by a module instance for the
+particular module parameters. Connection points and their
+parameters are a RESULT of the module parameters. -->
+ <parameter name="associatedClock">
+ <type>java.lang.String</type>
+ <value>clk</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="bridgedAddressOffset">
- <type>java.math.BigInteger</type>
+ <parameter name="associatedDirectReset">
+ <type>java.lang.String</type>
<value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="bridgesToMaster">
- <type>com.altera.entityinterfaces.IConnectionPoint</type>
- <value></value>
+ <parameter name="associatedResetSinks">
+ <type>[Ljava.lang.String;</type>
+ <value>reset_in0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="burstOnBurstBoundariesOnly">
- <type>boolean</type>
- <value>false</value>
+ <parameter name="synchronousEdges">
+ <type>com.altera.sopcmodel.reset.Reset$Edges</type>
+ <value>BOTH</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="burstcountUnits">
- <type>com.altera.sopcmodel.avalon.EAddrBurstUnits</type>
- <value>SYMBOLS</value>
+ <parameter name="deviceFamily">
+ <type>java.lang.String</type>
+ <value>UNKNOWN</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="constantBurstBehavior">
+ <parameter name="generateLegacySim">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="explicitAddressSpan">
- <type>java.math.BigInteger</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="holdTime">
- <type>int</type>
- <value>0</value>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <port>
+ <name>reset_out1</name>
+ <direction>Output</direction>
+ <width>1</width>
+ <role>reset</role>
+ </port>
+ </interface>
+ <interface name="reset_out2" kind="reset_source" version="19.4">
+ <!-- The connection points exposed by a module instance for the
+particular module parameters. Connection points and their
+parameters are a RESULT of the module parameters. -->
+ <parameter name="associatedClock">
+ <type>java.lang.String</type>
+ <value>clk</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="interleaveBursts">
- <type>boolean</type>
- <value>false</value>
+ <parameter name="associatedDirectReset">
+ <type>java.lang.String</type>
+ <value></value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="isBigEndian">
- <type>boolean</type>
- <value>false</value>
+ <parameter name="associatedResetSinks">
+ <type>[Ljava.lang.String;</type>
+ <value>reset_in0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="isFlash">
- <type>boolean</type>
- <value>false</value>
+ <parameter name="synchronousEdges">
+ <type>com.altera.sopcmodel.reset.Reset$Edges</type>
+ <value>BOTH</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="isMemoryDevice">
- <type>boolean</type>
- <value>false</value>
+ <parameter name="deviceFamily">
+ <type>java.lang.String</type>
+ <value>UNKNOWN</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="isNonVolatileStorage">
+ <parameter name="generateLegacySim">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="linewrapBursts">
- <type>boolean</type>
- <value>false</value>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <port>
+ <name>reset_out2</name>
+ <direction>Output</direction>
+ <width>1</width>
+ <role>reset</role>
+ </port>
+ </interface>
+ <interface name="reset_out3" kind="reset_source" version="19.4">
+ <!-- The connection points exposed by a module instance for the
+particular module parameters. Connection points and their
+parameters are a RESULT of the module parameters. -->
+ <parameter name="associatedClock">
+ <type>java.lang.String</type>
+ <value>clk</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="maximumPendingReadTransactions">
- <type>int</type>
- <value>0</value>
+ <parameter name="associatedDirectReset">
+ <type>java.lang.String</type>
+ <value></value>
<derived>false</derived>
- <enabled>false</enabled>
+ <enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="maximumPendingWriteTransactions">
- <type>int</type>
- <value>0</value>
+ <parameter name="associatedResetSinks">
+ <type>[Ljava.lang.String;</type>
+ <value>reset_in0</value>
<derived>false</derived>
- <enabled>false</enabled>
+ <enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="minimumReadLatency">
- <type>int</type>
- <value>1</value>
+ <parameter name="synchronousEdges">
+ <type>com.altera.sopcmodel.reset.Reset$Edges</type>
+ <value>BOTH</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="minimumResponseLatency">
- <type>int</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>false</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="minimumUninterruptedRunLength">
- <type>int</type>
- <value>1</value>
+ <parameter name="deviceFamily">
+ <type>java.lang.String</type>
+ <value>UNKNOWN</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="prSafe">
+ <parameter name="generateLegacySim">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="printableDevice">
- <type>boolean</type>
- <value>false</value>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <port>
+ <name>reset_out3</name>
+ <direction>Output</direction>
+ <width>1</width>
+ <role>reset</role>
+ </port>
+ </interface>
+ <interface name="reset_out4" kind="reset_source" version="19.4">
+ <!-- The connection points exposed by a module instance for the
+particular module parameters. Connection points and their
+parameters are a RESULT of the module parameters. -->
+ <parameter name="associatedClock">
+ <type>java.lang.String</type>
+ <value>clk</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="readLatency">
- <type>int</type>
- <value>2</value>
+ <parameter name="associatedDirectReset">
+ <type>java.lang.String</type>
+ <value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="readWaitStates">
- <type>int</type>
- <value>0</value>
+ <parameter name="associatedResetSinks">
+ <type>[Ljava.lang.String;</type>
+ <value>reset_in0</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="readWaitTime">
- <type>int</type>
- <value>0</value>
+ <parameter name="synchronousEdges">
+ <type>com.altera.sopcmodel.reset.Reset$Edges</type>
+ <value>BOTH</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="registerIncomingSignals">
- <type>boolean</type>
- <value>false</value>
+ <parameter name="deviceFamily">
+ <type>java.lang.String</type>
+ <value>UNKNOWN</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="registerOutgoingSignals">
+ <parameter name="generateLegacySim">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="setupTime">
- <type>int</type>
- <value>0</value>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <port>
+ <name>reset_out4</name>
+ <direction>Output</direction>
+ <width>1</width>
+ <role>reset</role>
+ </port>
+ </interface>
+ <interface name="reset_out5" kind="reset_source" version="19.4">
+ <!-- The connection points exposed by a module instance for the
+particular module parameters. Connection points and their
+parameters are a RESULT of the module parameters. -->
+ <parameter name="associatedClock">
+ <type>java.lang.String</type>
+ <value>clk</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="timingUnits">
- <type>com.altera.sopcmodel.avalon.TimingUnits</type>
- <value>Cycles</value>
+ <parameter name="associatedDirectReset">
+ <type>java.lang.String</type>
+ <value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="transparentBridge">
- <type>boolean</type>
- <value>false</value>
+ <parameter name="associatedResetSinks">
+ <type>[Ljava.lang.String;</type>
+ <value>reset_in0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="waitrequestAllowance">
- <type>int</type>
- <value>0</value>
+ <parameter name="synchronousEdges">
+ <type>com.altera.sopcmodel.reset.Reset$Edges</type>
+ <value>BOTH</value>
<derived>false</derived>
- <enabled>false</enabled>
+ <enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="wellBehavedWaitrequest">
+ <parameter name="deviceFamily">
+ <type>java.lang.String</type>
+ <value>UNKNOWN</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>true</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="generateLegacySim">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="writeLatency">
- <type>int</type>
- <value>0</value>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <port>
+ <name>reset_out5</name>
+ <direction>Output</direction>
+ <width>1</width>
+ <role>reset</role>
+ </port>
+ </interface>
+ <interface name="reset_out6" kind="reset_source" version="19.4">
+ <!-- The connection points exposed by a module instance for the
+particular module parameters. Connection points and their
+parameters are a RESULT of the module parameters. -->
+ <parameter name="associatedClock">
+ <type>java.lang.String</type>
+ <value>clk</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="writeWaitStates">
- <type>int</type>
- <value>0</value>
+ <parameter name="associatedDirectReset">
+ <type>java.lang.String</type>
+ <value></value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="writeWaitTime">
- <type>int</type>
- <value>0</value>
+ <parameter name="associatedResetSinks">
+ <type>[Ljava.lang.String;</type>
+ <value>reset_in0</value>
+ <derived>false</derived>
+ <enabled>true</enabled>
+ <visible>true</visible>
+ <valid>true</valid>
+ </parameter>
+ <parameter name="synchronousEdges">
+ <type>com.altera.sopcmodel.reset.Reset$Edges</type>
+ <value>BOTH</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
@@ -1792,89 +2975,49 @@ parameters are a RESULT of the module parameters. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <type>avalon</type>
- <isStart>false</isStart>
- <port>
- <name>av_address</name>
- <direction>Input</direction>
- <width>8</width>
- <role>address</role>
- </port>
+ <type>reset</type>
+ <isStart>true</isStart>
<port>
- <name>av_readdata</name>
+ <name>reset_out6</name>
<direction>Output</direction>
- <width>32</width>
- <role>readdata</role>
- </port>
- <port>
- <name>av_read</name>
- <direction>Input</direction>
- <width>1</width>
- <role>read</role>
- </port>
- <port>
- <name>av_writedata</name>
- <direction>Input</direction>
- <width>32</width>
- <role>writedata</role>
- </port>
- <port>
- <name>av_write</name>
- <direction>Input</direction>
<width>1</width>
- <role>write</role>
+ <role>reset</role>
</port>
</interface>
- <interface name="av_csr_irq" kind="interrupt_sender" version="18.0">
+ <interface name="reset_out7" kind="reset_source" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
- <parameter name="associatedAddressablePoint">
- <type>com.altera.entityinterfaces.IConnectionPoint</type>
- <value>reset_seq.av_csr</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
<parameter name="associatedClock">
<type>java.lang.String</type>
<value>clk</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="associatedReset">
+ <parameter name="associatedDirectReset">
<type>java.lang.String</type>
- <value>csr_reset</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="bridgedReceiverOffset">
- <type>java.lang.Integer</type>
<value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="bridgesToReceiver">
- <type>com.altera.entityinterfaces.IConnectionPoint</type>
- <value></value>
+ <parameter name="associatedResetSinks">
+ <type>[Ljava.lang.String;</type>
+ <value>reset_in0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
- <parameter name="irqScheme">
- <type>com.altera.sopcmodel.interrupt.InterruptConnectionPoint$EIrqScheme</type>
- <value>NONE</value>
+ <parameter name="synchronousEdges">
+ <type>com.altera.sopcmodel.reset.Reset$Edges</type>
+ <value>BOTH</value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>false</visible>
+ <visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="deviceFamily">
@@ -1893,72 +3036,72 @@ parameters are a RESULT of the module parameters. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <type>interrupt</type>
- <isStart>false</isStart>
+ <type>reset</type>
+ <isStart>true</isStart>
<port>
- <name>irq</name>
+ <name>reset_out7</name>
<direction>Output</direction>
<width>1</width>
- <role>irq</role>
+ <role>reset</role>
</port>
</interface>
</module>
<plugin>
<instanceCount>1</instanceCount>
- <name>altera_reset_sequencer</name>
+ <name>altera_generic_component</name>
<type>com.altera.entityinterfaces.IElementClass</type>
- <subtype>com.altera.entityinterfaces.IModule</subtype>
- <displayName>Reset Sequencer Intel FPGA IP</displayName>
- <version>18.0</version>
+ <subtype></subtype>
+ <displayName>Generic Component</displayName>
+ <version>1.0</version>
</plugin>
<plugin>
<instanceCount>1</instanceCount>
- <name>clock_sink</name>
+ <name>avalon_slave</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
- <displayName>Clock Input</displayName>
- <version>18.0</version>
+ <displayName>Avalon Memory Mapped Slave</displayName>
+ <version>19.4</version>
</plugin>
<plugin>
- <instanceCount>2</instanceCount>
- <name>reset_sink</name>
+ <instanceCount>1</instanceCount>
+ <name>interrupt_sender</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
- <displayName>Reset Input</displayName>
- <version>18.0</version>
+ <displayName>Interrupt Sender</displayName>
+ <version>19.4</version>
</plugin>
<plugin>
- <instanceCount>8</instanceCount>
- <name>reset_source</name>
+ <instanceCount>1</instanceCount>
+ <name>clock_sink</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
- <displayName>Reset Output</displayName>
- <version>18.0</version>
+ <displayName>Clock Input</displayName>
+ <version>19.4</version>
</plugin>
<plugin>
- <instanceCount>3</instanceCount>
- <name>conduit_end</name>
+ <instanceCount>2</instanceCount>
+ <name>reset_sink</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
- <displayName>Conduit</displayName>
- <version>18.0</version>
+ <displayName>Reset Input</displayName>
+ <version>19.4</version>
</plugin>
<plugin>
- <instanceCount>1</instanceCount>
- <name>avalon_slave</name>
+ <instanceCount>3</instanceCount>
+ <name>conduit_end</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
- <displayName>Avalon Memory Mapped Slave</displayName>
- <version>18.0</version>
+ <displayName>Conduit</displayName>
+ <version>19.4</version>
</plugin>
<plugin>
- <instanceCount>1</instanceCount>
- <name>interrupt_sender</name>
+ <instanceCount>8</instanceCount>
+ <name>reset_source</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
- <displayName>Interrupt Sender</displayName>
- <version>18.0</version>
+ <displayName>Reset Output</displayName>
+ <version>19.4</version>
</plugin>
- <reportVersion>18.0 219</reportVersion>
+ <reportVersion>19.4 64</reportVersion>
<uniqueIdentifier></uniqueIdentifier>
</EnsembleReport>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.xml b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.xml
index 632067f73f9d11c9e677fde0148d74cfee38670b..bb530894924706b691a6e0a50ee639d5e0ea9706 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.xml
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq.xml
@@ -1,7 +1,7 @@
<?xml version="1.0" encoding="UTF-8"?>
<deploy
- date="2019.11.25.08:22:09"
- outputDirectory="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/">
+ date="2020.11.26.17:19:53"
+ outputDirectory="/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/">
<perimeter>
<parameter
name="AUTO_GENERATION_ID"
@@ -93,13 +93,13 @@
<property name="writeLatency" value="0" />
<property name="writeWaitStates" value="0" />
<property name="writeWaitTime" value="0" />
- <port name="av_address" direction="input" role="address" width="8" />
- <port name="av_readdata" direction="output" role="readdata" width="32" />
- <port name="av_read" direction="input" role="read" width="1" />
- <port name="av_writedata" direction="input" role="writedata" width="32" />
- <port name="av_write" direction="input" role="write" width="1" />
+ <port name="av_csr_address" direction="input" role="address" width="8" />
+ <port name="av_csr_readdata" direction="output" role="readdata" width="32" />
+ <port name="av_csr_read" direction="input" role="read" width="1" />
+ <port name="av_csr_writedata" direction="input" role="writedata" width="32" />
+ <port name="av_csr_write" direction="input" role="write" width="1" />
</interface>
- <interface name="av_csr_irq" kind="interrupt" start="0">
+ <interface name="irq" kind="interrupt" start="0">
<property
name="associatedAddressablePoint"
value="ip_arria10_e1sg_jesd204b_rx_reset_seq.av_csr" />
@@ -108,25 +108,25 @@
<property name="bridgedReceiverOffset" value="0" />
<property name="bridgesToReceiver" value="" />
<property name="irqScheme" value="NONE" />
- <port name="irq" direction="output" role="irq" width="1" />
+ <port name="irq_irq" direction="output" role="irq" width="1" />
</interface>
<interface name="clk" kind="clock" start="0">
<property name="clockRate" value="0" />
<property name="externallyDriven" value="false" />
<property name="ptfSchematicName" value="" />
- <port name="clk" direction="input" role="clk" width="1" />
+ <port name="clk_clk" direction="input" role="clk" width="1" />
</interface>
<interface name="csr_reset" kind="reset" start="0">
<property name="associatedClock" value="" />
<property name="synchronousEdges" value="NONE" />
- <port name="csr_reset" direction="input" role="reset" width="1" />
+ <port name="csr_reset_reset" direction="input" role="reset" width="1" />
</interface>
<interface name="reset1_dsrt_qual" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<property name="prSafe" value="false" />
<port
- name="reset1_dsrt_qual"
+ name="reset1_dsrt_qual_reset1_dsrt_qual"
direction="input"
role="reset1_dsrt_qual"
width="1" />
@@ -136,7 +136,7 @@
<property name="associatedReset" value="" />
<property name="prSafe" value="false" />
<port
- name="reset2_dsrt_qual"
+ name="reset2_dsrt_qual_reset2_dsrt_qual"
direction="input"
role="reset2_dsrt_qual"
width="1" />
@@ -146,7 +146,7 @@
<property name="associatedReset" value="" />
<property name="prSafe" value="false" />
<port
- name="reset5_dsrt_qual"
+ name="reset5_dsrt_qual_reset5_dsrt_qual"
direction="input"
role="reset5_dsrt_qual"
width="1" />
@@ -154,63 +154,63 @@
<interface name="reset_in0" kind="reset" start="0">
<property name="associatedClock" value="" />
<property name="synchronousEdges" value="NONE" />
- <port name="reset_in0" direction="input" role="reset" width="1" />
+ <port name="reset_in0_reset" direction="input" role="reset" width="1" />
</interface>
<interface name="reset_out0" kind="reset" start="1">
<property name="associatedClock" value="clk" />
<property name="associatedDirectReset" value="" />
<property name="associatedResetSinks" value="reset_in0" />
<property name="synchronousEdges" value="BOTH" />
- <port name="reset_out0" direction="output" role="reset" width="1" />
+ <port name="reset_out0_reset" direction="output" role="reset" width="1" />
</interface>
<interface name="reset_out1" kind="reset" start="1">
<property name="associatedClock" value="clk" />
<property name="associatedDirectReset" value="" />
<property name="associatedResetSinks" value="reset_in0" />
<property name="synchronousEdges" value="BOTH" />
- <port name="reset_out1" direction="output" role="reset" width="1" />
+ <port name="reset_out1_reset" direction="output" role="reset" width="1" />
</interface>
<interface name="reset_out2" kind="reset" start="1">
<property name="associatedClock" value="clk" />
<property name="associatedDirectReset" value="" />
<property name="associatedResetSinks" value="reset_in0" />
<property name="synchronousEdges" value="BOTH" />
- <port name="reset_out2" direction="output" role="reset" width="1" />
+ <port name="reset_out2_reset" direction="output" role="reset" width="1" />
</interface>
<interface name="reset_out3" kind="reset" start="1">
<property name="associatedClock" value="clk" />
<property name="associatedDirectReset" value="" />
<property name="associatedResetSinks" value="reset_in0" />
<property name="synchronousEdges" value="BOTH" />
- <port name="reset_out3" direction="output" role="reset" width="1" />
+ <port name="reset_out3_reset" direction="output" role="reset" width="1" />
</interface>
<interface name="reset_out4" kind="reset" start="1">
<property name="associatedClock" value="clk" />
<property name="associatedDirectReset" value="" />
<property name="associatedResetSinks" value="reset_in0" />
<property name="synchronousEdges" value="BOTH" />
- <port name="reset_out4" direction="output" role="reset" width="1" />
+ <port name="reset_out4_reset" direction="output" role="reset" width="1" />
</interface>
<interface name="reset_out5" kind="reset" start="1">
<property name="associatedClock" value="clk" />
<property name="associatedDirectReset" value="" />
<property name="associatedResetSinks" value="reset_in0" />
<property name="synchronousEdges" value="BOTH" />
- <port name="reset_out5" direction="output" role="reset" width="1" />
+ <port name="reset_out5_reset" direction="output" role="reset" width="1" />
</interface>
<interface name="reset_out6" kind="reset" start="1">
<property name="associatedClock" value="clk" />
<property name="associatedDirectReset" value="" />
<property name="associatedResetSinks" value="reset_in0" />
<property name="synchronousEdges" value="BOTH" />
- <port name="reset_out6" direction="output" role="reset" width="1" />
+ <port name="reset_out6_reset" direction="output" role="reset" width="1" />
</interface>
<interface name="reset_out7" kind="reset" start="1">
<property name="associatedClock" value="clk" />
<property name="associatedDirectReset" value="" />
<property name="associatedResetSinks" value="reset_in0" />
<property name="synchronousEdges" value="BOTH" />
- <port name="reset_out7" direction="output" role="reset" width="1" />
+ <port name="reset_out7_reset" direction="output" role="reset" width="1" />
</interface>
</perimeter>
<entity
@@ -227,110 +227,1643 @@
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="1" />
<generatedFiles>
<file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/synth/ip_arria10_e1sg_jesd204b_rx_reset_seq.vhd"
+ path="/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/synth/ip_arria10_e1sg_jesd204b_rx_reset_seq.vhd"
attributes="CONTAINS_INLINE_CONFIGURATION" />
</generatedFiles>
<childGeneratedFiles>
<file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/synth/ip_arria10_e1sg_jesd204b_rx_reset_seq.vhd"
+ path="/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/synth/ip_arria10_e1sg_jesd204b_rx_reset_seq.vhd"
attributes="CONTAINS_INLINE_CONFIGURATION" />
</childGeneratedFiles>
<sourceFiles>
<file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip" />
+ path="/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys" />
</sourceFiles>
- <childSourceFiles>
- <file
- path="/home/software/Altera/18.0/ip/altera/merlin/altera_reset_sequencer/altera_reset_sequencer_hw.tcl" />
- </childSourceFiles>
+ <childSourceFiles/>
<messages>
<message level="Info" culprit="ip_arria10_e1sg_jesd204b_rx_reset_seq">"Generating: ip_arria10_e1sg_jesd204b_rx_reset_seq"</message>
- <message level="Info" culprit="ip_arria10_e1sg_jesd204b_rx_reset_seq">"Generating: altera_reset_sequencer"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_jesd204b_rx_reset_seq">"Generating: ip_arria10_e1sg_jesd204b_rx_reset_seq"</message>
</messages>
</entity>
<entity
- kind="altera_reset_sequencer"
- version="18.0"
- name="altera_reset_sequencer">
- <parameter name="USE_DSRT_QUAL" value="0,1,1,0,0,1,0,0,0,0" />
- <parameter name="ENABLE_CSR" value="1" />
- <parameter name="LIST_DSRT_SEQ" value="0,1,2,3,4,5,6,7,8,9" />
- <parameter name="ASRT_SEQ_MSG" value="SEQUENCE DISABLED (All Delays are 0)" />
+ kind="altera_generic_component"
+ version="1.0"
+ name="ip_arria10_e1sg_jesd204b_rx_reset_seq">
+ <parameter name="hlsFile" value="" />
+ <parameter name="svInterfaceDefinition" value="" />
+ <parameter name="AUTO_DEVICE" value="10AX115U2F45E1SG" />
+ <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
<parameter
- name="DSRT_SEQ_MSG"
- value="reset_in_deasserted-> #2-> reset_out0 ->wait_dqual1-> reset_out1 ->wait_dqual2-> reset_out2 -> #20-> reset_out3 + reset_out4 ->wait_dqual5-> reset_out5 -> #20-> reset_out6 + reset_out7" />
+ name="defaultBoundary"
+ value="<boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>av_csr</name>
+ <type>avalon</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>av_address</name>
+ <role>address</role>
+ <direction>Input</direction>
+ <width>8</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_readdata</name>
+ <role>readdata</role>
+ <direction>Output</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_read</name>
+ <role>read</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ <port>
+ <name>av_writedata</name>
+ <role>writedata</role>
+ <direction>Input</direction>
+ <width>32</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ <port>
+ <name>av_write</name>
+ <role>write</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>embeddedsw.configuration.isFlash</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isMemoryDevice</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isNonVolatileStorage</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>embeddedsw.configuration.isPrintableDevice</key>
+ <value>0</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>addressAlignment</key>
+ <value>DYNAMIC</value>
+ </entry>
+ <entry>
+ <key>addressGroup</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>addressSpan</key>
+ <value>256</value>
+ </entry>
+ <entry>
+ <key>addressUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>alwaysBurstMaxBurst</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bitsPerSymbol</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>bridgedAddressOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToMaster</key>
+ </entry>
+ <entry>
+ <key>burstOnBurstBoundariesOnly</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>burstcountUnits</key>
+ <value>SYMBOLS</value>
+ </entry>
+ <entry>
+ <key>constantBurstBehavior</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>explicitAddressSpan</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>holdTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>interleaveBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isBigEndian</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isFlash</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isMemoryDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>isNonVolatileStorage</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>linewrapBursts</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>maximumPendingReadTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>maximumPendingWriteTransactions</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>minimumReadLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumResponseLatency</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>minimumUninterruptedRunLength</key>
+ <value>1</value>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>printableDevice</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>readLatency</key>
+ <value>2</value>
+ </entry>
+ <entry>
+ <key>readWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>readWaitTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>registerIncomingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>registerOutgoingSignals</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>setupTime</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>timingUnits</key>
+ <value>Cycles</value>
+ </entry>
+ <entry>
+ <key>transparentBridge</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>waitrequestAllowance</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>wellBehavedWaitrequest</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>writeLatency</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitStates</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>writeWaitTime</key>
+ <value>0</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>av_csr_irq</name>
+ <type>interrupt</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>irq</name>
+ <role>irq</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedAddressablePoint</key>
+ <value>reset_sequencer_0.av_csr</value>
+ </entry>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ <value>csr_reset</value>
+ </entry>
+ <entry>
+ <key>bridgedReceiverOffset</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>bridgesToReceiver</key>
+ </entry>
+ <entry>
+ <key>irqScheme</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>clk</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clk</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>csr_reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>csr_reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset1_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset1_dsrt_qual</name>
+ <role>reset1_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset2_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset2_dsrt_qual</name>
+ <role>reset2_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset5_dsrt_qual</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset5_dsrt_qual</name>
+ <role>reset5_dsrt_qual</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_in0</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset_in0</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out0</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out0</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out1</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out1</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out2</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out2</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out3</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out3</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out4</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out4</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out5</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out5</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out6</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out6</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset_out7</name>
+ <type>reset</type>
+ <isStart>true</isStart>
+ <ports>
+ <port>
+ <name>reset_out7</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition>" />
<parameter
- name="RESET_OUT_NAME"
- value="reset_out0,reset_out1,reset_out2,reset_out3,reset_out4,reset_out5,reset_out6,reset_out7" />
- <parameter name="LIST_ASRT_SEQ" value="0,1,2,3,4,5,6,7,8,9" />
- <parameter name="LIST_DSRT_DELAY" value="2,2,2,20,0,2,20,0,0,0" />
- <parameter name="LIST_ASRT_DELAY" value="0,0,0,0,0,0,0,0,0,0" />
- <generatedFiles>
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/altera_reset_sequencer_180/synth/altera_reset_sequencer.sv"
- attributes="" />
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/altera_reset_sequencer_180/synth/altera_reset_sequencer_main.sv"
- attributes="" />
- <file
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+ <name>reset_out7</name>
+ <role>reset</role>
+ <direction>Output</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ <value>clk</value>
+ </entry>
+ <entry>
+ <key>associatedDirectReset</key>
+ </entry>
+ <entry>
+ <key>associatedResetSinks</key>
+ <value>reset_in0</value>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>BOTH</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+ </boundary>
+ <originalModuleInfo>
+ <className>altera_reset_sequencer</className>
+ <version>19.1</version>
+ <displayName>Reset Sequencer Intel FPGA IP</displayName>
+ </originalModuleInfo>
+ <systemInfoParameterDescriptors>
+ <descriptors/>
+ </systemInfoParameterDescriptors>
+ <systemInfos>
+ <connPtSystemInfos>
+ <entry>
+ <key>av_csr</key>
+ <value>
+ <connectionPointName>av_csr</connectionPointName>
+ <suppliedSystemInfos>
+ <entry>
+ <key>ADDRESS_MAP</key>
+ <value>&lt;address-map&gt;&lt;slave name='av_csr' start='0x0' end='0x100' datawidth='32' /&gt;&lt;/address-map&gt;</value>
+ </entry>
+ <entry>
+ <key>ADDRESS_WIDTH</key>
+ <value>8</value>
+ </entry>
+ <entry>
+ <key>MAX_SLAVE_DATA_WIDTH</key>
+ <value>32</value>
+ </entry>
+ </suppliedSystemInfos>
+ <consumedSystemInfos/>
+ </value>
+ </entry>
+ </connPtSystemInfos>
+ </systemInfos>
+</componentDefinition>" />
+ <parameter
+ name="generationInfoDefinition"
+ value="<generationInfoDefinition>
+ <hdlLibraryName>ip_arria10_e1sg_jesd204b_rx_reset_seq</hdlLibraryName>
+ <fileSets>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetFixedName>
+ <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetFixedName>
+ <fileSetKind>SIM_VERILOG</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_reset_seq</fileSetFixedName>
+ <fileSetKind>SIM_VHDL</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ </fileSets>
+</generationInfoDefinition>" />
+ <parameter name="logicalView" value="ip_arria10_e1sg_jesd204b_rx_reset_seq.ip" />
+ <parameter
+ name="moduleAssignmentDefinition"
+ value="<assignmentDefinition>
+ <assignmentValueMap/>
+</assignmentDefinition>" />
+ <generatedFiles/>
+ <childGeneratedFiles/>
+ <sourceFiles/>
<childSourceFiles/>
- <instantiator instantiator="ip_arria10_e1sg_jesd204b_rx_reset_seq" as="reset_seq" />
+ <instantiator
+ instantiator="ip_arria10_e1sg_jesd204b_rx_reset_seq"
+ as="reset_sequencer_0" />
<messages>
- <message level="Info" culprit="ip_arria10_e1sg_jesd204b_rx_reset_seq">"Generating: altera_reset_sequencer"</message>
+ <message level="Info" culprit="ip_arria10_e1sg_jesd204b_rx_reset_seq">"Generating: ip_arria10_e1sg_jesd204b_rx_reset_seq"</message>
</messages>
</entity>
</deploy>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_bb.v b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_bb.v
index 48f95d5c03039b781281fffb64fa0726be7300dd..a13df633a82a696d747be39b58199d807b2aca41 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_bb.v
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_bb.v
@@ -1,80 +1,24 @@
-module ip_arria10_e1sg_jesd204b_rx_reset_seq #(
- parameter NUM_OUTPUTS = 8,
- parameter ENABLE_DEASSERTION_INPUT_QUAL = 38,
- parameter ENABLE_ASSERTION_SEQUENCE = 0,
- parameter ENABLE_DEASSERTION_SEQUENCE = 1,
- parameter MIN_ASRT_TIME = 20,
- parameter ASRT_DELAY0 = 0,
- parameter DSRT_DELAY0 = 2,
- parameter ASRT_REMAP0 = 0,
- parameter DSRT_REMAP0 = 0,
- parameter DSRT_QUALCNT_0 = 0,
- parameter ASRT_DELAY1 = 0,
- parameter DSRT_DELAY1 = 0,
- parameter ASRT_REMAP1 = 1,
- parameter DSRT_REMAP1 = 1,
- parameter DSRT_QUALCNT_1 = 2,
- parameter ASRT_DELAY2 = 0,
- parameter DSRT_DELAY2 = 0,
- parameter ASRT_REMAP2 = 2,
- parameter DSRT_REMAP2 = 2,
- parameter DSRT_QUALCNT_2 = 2,
- parameter ASRT_DELAY3 = 0,
- parameter DSRT_DELAY3 = 20,
- parameter ASRT_REMAP3 = 3,
- parameter DSRT_REMAP3 = 3,
- parameter DSRT_QUALCNT_3 = 0,
- parameter ASRT_DELAY4 = 0,
- parameter DSRT_DELAY4 = 0,
- parameter ASRT_REMAP4 = 4,
- parameter DSRT_REMAP4 = 4,
- parameter DSRT_QUALCNT_4 = 0,
- parameter ASRT_DELAY5 = 0,
- parameter DSRT_DELAY5 = 0,
- parameter ASRT_REMAP5 = 5,
- parameter DSRT_REMAP5 = 5,
- parameter DSRT_QUALCNT_5 = 2,
- parameter ASRT_DELAY6 = 0,
- parameter DSRT_DELAY6 = 20,
- parameter ASRT_REMAP6 = 6,
- parameter DSRT_REMAP6 = 6,
- parameter DSRT_QUALCNT_6 = 0,
- parameter ASRT_DELAY7 = 0,
- parameter DSRT_DELAY7 = 0,
- parameter ASRT_REMAP7 = 7,
- parameter DSRT_REMAP7 = 7,
- parameter DSRT_QUALCNT_7 = 0,
- parameter ASRT_DELAY8 = 0,
- parameter DSRT_DELAY8 = 0,
- parameter ASRT_REMAP8 = 8,
- parameter DSRT_REMAP8 = 8,
- parameter DSRT_QUALCNT_8 = 0,
- parameter ASRT_DELAY9 = 0,
- parameter DSRT_DELAY9 = 0,
- parameter ASRT_REMAP9 = 9,
- parameter DSRT_REMAP9 = 9,
- parameter DSRT_QUALCNT_9 = 0
- ) (
- input wire [7:0] av_address, // av_csr.address
- output wire [31:0] av_readdata, // .readdata
- input wire av_read, // .read
- input wire [31:0] av_writedata, // .writedata
- input wire av_write, // .write
- output wire irq, // av_csr_irq.irq
- input wire clk, // clk.clk
- input wire csr_reset, // csr_reset.reset
- input wire reset1_dsrt_qual, // reset1_dsrt_qual.reset1_dsrt_qual
- input wire reset2_dsrt_qual, // reset2_dsrt_qual.reset2_dsrt_qual
- input wire reset5_dsrt_qual, // reset5_dsrt_qual.reset5_dsrt_qual
- input wire reset_in0, // reset_in0.reset
- output wire reset_out0, // reset_out0.reset
- output wire reset_out1, // reset_out1.reset
- output wire reset_out2, // reset_out2.reset
- output wire reset_out3, // reset_out3.reset
- output wire reset_out4, // reset_out4.reset
- output wire reset_out5, // reset_out5.reset
- output wire reset_out6, // reset_out6.reset
- output wire reset_out7 // reset_out7.reset
+module ip_arria10_e1sg_jesd204b_rx_reset_seq (
+ input wire [7:0] av_csr_address, // av_csr.address
+ output wire [31:0] av_csr_readdata, // .readdata
+ input wire av_csr_read, // .read
+ input wire [31:0] av_csr_writedata, // .writedata
+ input wire av_csr_write, // .write
+ output wire irq_irq, // irq.irq
+ input wire clk_clk, // clk.clk
+ input wire csr_reset_reset, // csr_reset.reset
+ input wire reset1_dsrt_qual_reset1_dsrt_qual, // reset1_dsrt_qual.reset1_dsrt_qual
+ input wire reset2_dsrt_qual_reset2_dsrt_qual, // reset2_dsrt_qual.reset2_dsrt_qual
+ input wire reset5_dsrt_qual_reset5_dsrt_qual, // reset5_dsrt_qual.reset5_dsrt_qual
+ input wire reset_in0_reset, // reset_in0.reset
+ output wire reset_out0_reset, // reset_out0.reset
+ output wire reset_out1_reset, // reset_out1.reset
+ output wire reset_out2_reset, // reset_out2.reset
+ output wire reset_out3_reset, // reset_out3.reset
+ output wire reset_out4_reset, // reset_out4.reset
+ output wire reset_out5_reset, // reset_out5.reset
+ output wire reset_out6_reset, // reset_out6.reset
+ output wire reset_out7_reset // reset_out7.reset
);
endmodule
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_generation.rpt b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_generation.rpt
index fe03f148f2af8d154e058e05d86884b011442e2c..035ae08f6f0aca644addbbed7c4170b057986d2e 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_generation.rpt
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_generation.rpt
@@ -1,16 +1,35 @@
-Info: Generated by version: 18.0 build 219
-Info: Starting: Create simulation model
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip --simulation=VHDL --allow-mixed-language-simulation --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq --family="Arria 10" --part=10AX115U2F45E1SG
-Info: Skipping generation of ip_arria10_e1sg_jesd204b_rx_reset_seq: files already generated.
-Info: qsys-generate succeeded.
-Info: Finished: Create simulation model
+Info: Generated by version: 19.4 build 64
Info: Starting: Create block symbol file (.bsf)
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip --block-symbol-file --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq --family="Arria 10" --part=10AX115U2F45E1SG
+Info: qsys-generate /home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys --block-symbol-file --output-directory=/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq --family="Arria 10" --part=10AX115U2F45E1SG
+Progress: Loading jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys
+Progress: Reading input file
+Progress: Adding reset_sequencer_0 [altera_generic_component 1.0]
+Progress: Parameterizing module reset_sequencer_0
+Progress: Building connections
+Progress: Parameterizing connections
+Progress: Validating
+Progress: Done reading input file
Info: qsys-generate succeeded.
Info: Finished: Create block symbol file (.bsf)
Info:
Info: Starting: Create HDL design files for synthesis
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip --synthesis=VHDL --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq --family="Arria 10" --part=10AX115U2F45E1SG
-Info: Skipping generation of ip_arria10_e1sg_jesd204b_rx_reset_seq: files already generated.
+Info: qsys-generate /home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys --synthesis=VHDL --output-directory=/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq --family="Arria 10" --part=10AX115U2F45E1SG
+Progress: Loading jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.qsys
+Progress: Reading input file
+Progress: Adding reset_sequencer_0 [altera_generic_component 1.0]
+Progress: Parameterizing module reset_sequencer_0
+Progress: Building connections
+Progress: Parameterizing connections
+Progress: Validating
+Progress: Done reading input file
+Info: ip_arria10_e1sg_jesd204b_rx_reset_seq: "Transforming system: ip_arria10_e1sg_jesd204b_rx_reset_seq"
+Info: ip_arria10_e1sg_jesd204b_rx_reset_seq: "Naming system components in system: ip_arria10_e1sg_jesd204b_rx_reset_seq"
+Info: ip_arria10_e1sg_jesd204b_rx_reset_seq: "Processing generation queue"
+Info: ip_arria10_e1sg_jesd204b_rx_reset_seq: "Generating: ip_arria10_e1sg_jesd204b_rx_reset_seq"
+Info: ip_arria10_e1sg_jesd204b_rx_reset_seq: "Generating: ip_arria10_e1sg_jesd204b_rx_reset_seq"
+Info: ip_arria10_e1sg_jesd204b_rx_reset_seq: Done "ip_arria10_e1sg_jesd204b_rx_reset_seq" with 2 modules, 1 files
Info: qsys-generate succeeded.
Info: Finished: Create HDL design files for synthesis
+Info: Starting: Generate IP Core Documentation
+Info: No documentation filesets were found for components in ip_arria10_e1sg_jesd204b_rx_reset_seq. No files generated.
+Info: Finished: Generate IP Core Documentation
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_generation_previous.rpt b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_generation_previous.rpt
index fe03f148f2af8d154e058e05d86884b011442e2c..c1039597a336dc672cdaec18077529823c402500 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_generation_previous.rpt
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_generation_previous.rpt
@@ -1,16 +1,19 @@
-Info: Generated by version: 18.0 build 219
-Info: Starting: Create simulation model
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip --simulation=VHDL --allow-mixed-language-simulation --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq --family="Arria 10" --part=10AX115U2F45E1SG
-Info: Skipping generation of ip_arria10_e1sg_jesd204b_rx_reset_seq: files already generated.
-Info: qsys-generate succeeded.
-Info: Finished: Create simulation model
+Info: Generated by version: 19.4 build 64
Info: Starting: Create block symbol file (.bsf)
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip --block-symbol-file --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq --family="Arria 10" --part=10AX115U2F45E1SG
+Info: qsys-generate /home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip --block-symbol-file --output-directory=/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq --family="Arria 10" --part=10AX115U2F45E1SG
Info: qsys-generate succeeded.
Info: Finished: Create block symbol file (.bsf)
Info:
Info: Starting: Create HDL design files for synthesis
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip --synthesis=VHDL --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq --family="Arria 10" --part=10AX115U2F45E1SG
-Info: Skipping generation of ip_arria10_e1sg_jesd204b_rx_reset_seq: files already generated.
+Info: qsys-generate /home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq.ip --synthesis=VHDL --output-directory=/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq --family="Arria 10" --part=10AX115U2F45E1SG
+Info: ip_arria10_e1sg_jesd204b_rx_reset_seq: "Transforming system: ip_arria10_e1sg_jesd204b_rx_reset_seq"
+Info: ip_arria10_e1sg_jesd204b_rx_reset_seq: "Naming system components in system: ip_arria10_e1sg_jesd204b_rx_reset_seq"
+Info: ip_arria10_e1sg_jesd204b_rx_reset_seq: "Processing generation queue"
+Info: ip_arria10_e1sg_jesd204b_rx_reset_seq: "Generating: ip_arria10_e1sg_jesd204b_rx_reset_seq"
+Info: ip_arria10_e1sg_jesd204b_rx_reset_seq: "Generating: altera_reset_sequencer"
+Info: ip_arria10_e1sg_jesd204b_rx_reset_seq: Done "ip_arria10_e1sg_jesd204b_rx_reset_seq" with 2 modules, 10 files
Info: qsys-generate succeeded.
Info: Finished: Create HDL design files for synthesis
+Info: Starting: Generate IP Core Documentation
+Info: No documentation filesets were found for components in ip_arria10_e1sg_jesd204b_rx_reset_seq. No files generated.
+Info: Finished: Generate IP Core Documentation
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_inst.v b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_inst.v
index b85d8c0ffd596d09c86a059521888b358d612ad6..314d9efc7ae7cc8d66696150e412b33501babe89 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_inst.v
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_inst.v
@@ -1,79 +1,23 @@
- ip_arria10_e1sg_jesd204b_rx_reset_seq #(
- .NUM_OUTPUTS (INTEGER_VALUE_FOR_NUM_OUTPUTS),
- .ENABLE_DEASSERTION_INPUT_QUAL (INTEGER_VALUE_FOR_ENABLE_DEASSERTION_INPUT_QUAL),
- .ENABLE_ASSERTION_SEQUENCE (INTEGER_VALUE_FOR_ENABLE_ASSERTION_SEQUENCE),
- .ENABLE_DEASSERTION_SEQUENCE (INTEGER_VALUE_FOR_ENABLE_DEASSERTION_SEQUENCE),
- .MIN_ASRT_TIME (INTEGER_VALUE_FOR_MIN_ASRT_TIME),
- .ASRT_DELAY0 (INTEGER_VALUE_FOR_ASRT_DELAY0),
- .DSRT_DELAY0 (INTEGER_VALUE_FOR_DSRT_DELAY0),
- .ASRT_REMAP0 (INTEGER_VALUE_FOR_ASRT_REMAP0),
- .DSRT_REMAP0 (INTEGER_VALUE_FOR_DSRT_REMAP0),
- .DSRT_QUALCNT_0 (INTEGER_VALUE_FOR_DSRT_QUALCNT_0),
- .ASRT_DELAY1 (INTEGER_VALUE_FOR_ASRT_DELAY1),
- .DSRT_DELAY1 (INTEGER_VALUE_FOR_DSRT_DELAY1),
- .ASRT_REMAP1 (INTEGER_VALUE_FOR_ASRT_REMAP1),
- .DSRT_REMAP1 (INTEGER_VALUE_FOR_DSRT_REMAP1),
- .DSRT_QUALCNT_1 (INTEGER_VALUE_FOR_DSRT_QUALCNT_1),
- .ASRT_DELAY2 (INTEGER_VALUE_FOR_ASRT_DELAY2),
- .DSRT_DELAY2 (INTEGER_VALUE_FOR_DSRT_DELAY2),
- .ASRT_REMAP2 (INTEGER_VALUE_FOR_ASRT_REMAP2),
- .DSRT_REMAP2 (INTEGER_VALUE_FOR_DSRT_REMAP2),
- .DSRT_QUALCNT_2 (INTEGER_VALUE_FOR_DSRT_QUALCNT_2),
- .ASRT_DELAY3 (INTEGER_VALUE_FOR_ASRT_DELAY3),
- .DSRT_DELAY3 (INTEGER_VALUE_FOR_DSRT_DELAY3),
- .ASRT_REMAP3 (INTEGER_VALUE_FOR_ASRT_REMAP3),
- .DSRT_REMAP3 (INTEGER_VALUE_FOR_DSRT_REMAP3),
- .DSRT_QUALCNT_3 (INTEGER_VALUE_FOR_DSRT_QUALCNT_3),
- .ASRT_DELAY4 (INTEGER_VALUE_FOR_ASRT_DELAY4),
- .DSRT_DELAY4 (INTEGER_VALUE_FOR_DSRT_DELAY4),
- .ASRT_REMAP4 (INTEGER_VALUE_FOR_ASRT_REMAP4),
- .DSRT_REMAP4 (INTEGER_VALUE_FOR_DSRT_REMAP4),
- .DSRT_QUALCNT_4 (INTEGER_VALUE_FOR_DSRT_QUALCNT_4),
- .ASRT_DELAY5 (INTEGER_VALUE_FOR_ASRT_DELAY5),
- .DSRT_DELAY5 (INTEGER_VALUE_FOR_DSRT_DELAY5),
- .ASRT_REMAP5 (INTEGER_VALUE_FOR_ASRT_REMAP5),
- .DSRT_REMAP5 (INTEGER_VALUE_FOR_DSRT_REMAP5),
- .DSRT_QUALCNT_5 (INTEGER_VALUE_FOR_DSRT_QUALCNT_5),
- .ASRT_DELAY6 (INTEGER_VALUE_FOR_ASRT_DELAY6),
- .DSRT_DELAY6 (INTEGER_VALUE_FOR_DSRT_DELAY6),
- .ASRT_REMAP6 (INTEGER_VALUE_FOR_ASRT_REMAP6),
- .DSRT_REMAP6 (INTEGER_VALUE_FOR_DSRT_REMAP6),
- .DSRT_QUALCNT_6 (INTEGER_VALUE_FOR_DSRT_QUALCNT_6),
- .ASRT_DELAY7 (INTEGER_VALUE_FOR_ASRT_DELAY7),
- .DSRT_DELAY7 (INTEGER_VALUE_FOR_DSRT_DELAY7),
- .ASRT_REMAP7 (INTEGER_VALUE_FOR_ASRT_REMAP7),
- .DSRT_REMAP7 (INTEGER_VALUE_FOR_DSRT_REMAP7),
- .DSRT_QUALCNT_7 (INTEGER_VALUE_FOR_DSRT_QUALCNT_7),
- .ASRT_DELAY8 (INTEGER_VALUE_FOR_ASRT_DELAY8),
- .DSRT_DELAY8 (INTEGER_VALUE_FOR_DSRT_DELAY8),
- .ASRT_REMAP8 (INTEGER_VALUE_FOR_ASRT_REMAP8),
- .DSRT_REMAP8 (INTEGER_VALUE_FOR_DSRT_REMAP8),
- .DSRT_QUALCNT_8 (INTEGER_VALUE_FOR_DSRT_QUALCNT_8),
- .ASRT_DELAY9 (INTEGER_VALUE_FOR_ASRT_DELAY9),
- .DSRT_DELAY9 (INTEGER_VALUE_FOR_DSRT_DELAY9),
- .ASRT_REMAP9 (INTEGER_VALUE_FOR_ASRT_REMAP9),
- .DSRT_REMAP9 (INTEGER_VALUE_FOR_DSRT_REMAP9),
- .DSRT_QUALCNT_9 (INTEGER_VALUE_FOR_DSRT_QUALCNT_9)
- ) u0 (
- .av_address (_connected_to_av_address_), // input, width = 8, av_csr.address
- .av_readdata (_connected_to_av_readdata_), // output, width = 32, .readdata
- .av_read (_connected_to_av_read_), // input, width = 1, .read
- .av_writedata (_connected_to_av_writedata_), // input, width = 32, .writedata
- .av_write (_connected_to_av_write_), // input, width = 1, .write
- .irq (_connected_to_irq_), // output, width = 1, av_csr_irq.irq
- .clk (_connected_to_clk_), // input, width = 1, clk.clk
- .csr_reset (_connected_to_csr_reset_), // input, width = 1, csr_reset.reset
- .reset1_dsrt_qual (_connected_to_reset1_dsrt_qual_), // input, width = 1, reset1_dsrt_qual.reset1_dsrt_qual
- .reset2_dsrt_qual (_connected_to_reset2_dsrt_qual_), // input, width = 1, reset2_dsrt_qual.reset2_dsrt_qual
- .reset5_dsrt_qual (_connected_to_reset5_dsrt_qual_), // input, width = 1, reset5_dsrt_qual.reset5_dsrt_qual
- .reset_in0 (_connected_to_reset_in0_), // input, width = 1, reset_in0.reset
- .reset_out0 (_connected_to_reset_out0_), // output, width = 1, reset_out0.reset
- .reset_out1 (_connected_to_reset_out1_), // output, width = 1, reset_out1.reset
- .reset_out2 (_connected_to_reset_out2_), // output, width = 1, reset_out2.reset
- .reset_out3 (_connected_to_reset_out3_), // output, width = 1, reset_out3.reset
- .reset_out4 (_connected_to_reset_out4_), // output, width = 1, reset_out4.reset
- .reset_out5 (_connected_to_reset_out5_), // output, width = 1, reset_out5.reset
- .reset_out6 (_connected_to_reset_out6_), // output, width = 1, reset_out6.reset
- .reset_out7 (_connected_to_reset_out7_) // output, width = 1, reset_out7.reset
+ ip_arria10_e1sg_jesd204b_rx_reset_seq u0 (
+ .av_csr_address (_connected_to_av_csr_address_), // input, width = 8, av_csr.address
+ .av_csr_readdata (_connected_to_av_csr_readdata_), // output, width = 32, .readdata
+ .av_csr_read (_connected_to_av_csr_read_), // input, width = 1, .read
+ .av_csr_writedata (_connected_to_av_csr_writedata_), // input, width = 32, .writedata
+ .av_csr_write (_connected_to_av_csr_write_), // input, width = 1, .write
+ .irq_irq (_connected_to_irq_irq_), // output, width = 1, irq.irq
+ .clk_clk (_connected_to_clk_clk_), // input, width = 1, clk.clk
+ .csr_reset_reset (_connected_to_csr_reset_reset_), // input, width = 1, csr_reset.reset
+ .reset1_dsrt_qual_reset1_dsrt_qual (_connected_to_reset1_dsrt_qual_reset1_dsrt_qual_), // input, width = 1, reset1_dsrt_qual.reset1_dsrt_qual
+ .reset2_dsrt_qual_reset2_dsrt_qual (_connected_to_reset2_dsrt_qual_reset2_dsrt_qual_), // input, width = 1, reset2_dsrt_qual.reset2_dsrt_qual
+ .reset5_dsrt_qual_reset5_dsrt_qual (_connected_to_reset5_dsrt_qual_reset5_dsrt_qual_), // input, width = 1, reset5_dsrt_qual.reset5_dsrt_qual
+ .reset_in0_reset (_connected_to_reset_in0_reset_), // input, width = 1, reset_in0.reset
+ .reset_out0_reset (_connected_to_reset_out0_reset_), // output, width = 1, reset_out0.reset
+ .reset_out1_reset (_connected_to_reset_out1_reset_), // output, width = 1, reset_out1.reset
+ .reset_out2_reset (_connected_to_reset_out2_reset_), // output, width = 1, reset_out2.reset
+ .reset_out3_reset (_connected_to_reset_out3_reset_), // output, width = 1, reset_out3.reset
+ .reset_out4_reset (_connected_to_reset_out4_reset_), // output, width = 1, reset_out4.reset
+ .reset_out5_reset (_connected_to_reset_out5_reset_), // output, width = 1, reset_out5.reset
+ .reset_out6_reset (_connected_to_reset_out6_reset_), // output, width = 1, reset_out6.reset
+ .reset_out7_reset (_connected_to_reset_out7_reset_) // output, width = 1, reset_out7.reset
);
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_inst.vhd b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_inst.vhd
index 31fd9d0c75875e47427101458b4e89b75e94e9b7..7abdd715d652b1e8ec815a0b5f690976a2004e50 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_inst.vhd
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/ip_arria10_e1sg_jesd204b_rx_reset_seq_inst.vhd
@@ -1,163 +1,49 @@
component ip_arria10_e1sg_jesd204b_rx_reset_seq is
- generic (
- NUM_OUTPUTS : integer := 3;
- ENABLE_DEASSERTION_INPUT_QUAL : integer := 0;
- ENABLE_ASSERTION_SEQUENCE : integer := 0;
- ENABLE_DEASSERTION_SEQUENCE : integer := 0;
- MIN_ASRT_TIME : integer := 0;
- ASRT_DELAY0 : integer := 0;
- DSRT_DELAY0 : integer := 0;
- ASRT_REMAP0 : integer := 0;
- DSRT_REMAP0 : integer := 0;
- DSRT_QUALCNT_0 : integer := 0;
- ASRT_DELAY1 : integer := 0;
- DSRT_DELAY1 : integer := 0;
- ASRT_REMAP1 : integer := 1;
- DSRT_REMAP1 : integer := 1;
- DSRT_QUALCNT_1 : integer := 0;
- ASRT_DELAY2 : integer := 0;
- DSRT_DELAY2 : integer := 0;
- ASRT_REMAP2 : integer := 2;
- DSRT_REMAP2 : integer := 2;
- DSRT_QUALCNT_2 : integer := 0;
- ASRT_DELAY3 : integer := 0;
- DSRT_DELAY3 : integer := 0;
- ASRT_REMAP3 : integer := 3;
- DSRT_REMAP3 : integer := 3;
- DSRT_QUALCNT_3 : integer := 0;
- ASRT_DELAY4 : integer := 0;
- DSRT_DELAY4 : integer := 0;
- ASRT_REMAP4 : integer := 4;
- DSRT_REMAP4 : integer := 4;
- DSRT_QUALCNT_4 : integer := 0;
- ASRT_DELAY5 : integer := 0;
- DSRT_DELAY5 : integer := 0;
- ASRT_REMAP5 : integer := 5;
- DSRT_REMAP5 : integer := 5;
- DSRT_QUALCNT_5 : integer := 0;
- ASRT_DELAY6 : integer := 0;
- DSRT_DELAY6 : integer := 0;
- ASRT_REMAP6 : integer := 6;
- DSRT_REMAP6 : integer := 6;
- DSRT_QUALCNT_6 : integer := 0;
- ASRT_DELAY7 : integer := 0;
- DSRT_DELAY7 : integer := 0;
- ASRT_REMAP7 : integer := 7;
- DSRT_REMAP7 : integer := 7;
- DSRT_QUALCNT_7 : integer := 0;
- ASRT_DELAY8 : integer := 0;
- DSRT_DELAY8 : integer := 0;
- ASRT_REMAP8 : integer := 8;
- DSRT_REMAP8 : integer := 8;
- DSRT_QUALCNT_8 : integer := 0;
- ASRT_DELAY9 : integer := 0;
- DSRT_DELAY9 : integer := 0;
- ASRT_REMAP9 : integer := 9;
- DSRT_REMAP9 : integer := 9;
- DSRT_QUALCNT_9 : integer := 0
- );
port (
- av_address : in std_logic_vector(7 downto 0) := (others => 'X'); -- address
- av_readdata : out std_logic_vector(31 downto 0); -- readdata
- av_read : in std_logic := 'X'; -- read
- av_writedata : in std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
- av_write : in std_logic := 'X'; -- write
- irq : out std_logic; -- irq
- clk : in std_logic := 'X'; -- clk
- csr_reset : in std_logic := 'X'; -- reset
- reset1_dsrt_qual : in std_logic := 'X'; -- reset1_dsrt_qual
- reset2_dsrt_qual : in std_logic := 'X'; -- reset2_dsrt_qual
- reset5_dsrt_qual : in std_logic := 'X'; -- reset5_dsrt_qual
- reset_in0 : in std_logic := 'X'; -- reset
- reset_out0 : out std_logic; -- reset
- reset_out1 : out std_logic; -- reset
- reset_out2 : out std_logic; -- reset
- reset_out3 : out std_logic; -- reset
- reset_out4 : out std_logic; -- reset
- reset_out5 : out std_logic; -- reset
- reset_out6 : out std_logic; -- reset
- reset_out7 : out std_logic -- reset
+ av_csr_address : in std_logic_vector(7 downto 0) := (others => 'X'); -- address
+ av_csr_readdata : out std_logic_vector(31 downto 0); -- readdata
+ av_csr_read : in std_logic := 'X'; -- read
+ av_csr_writedata : in std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
+ av_csr_write : in std_logic := 'X'; -- write
+ irq_irq : out std_logic; -- irq
+ clk_clk : in std_logic := 'X'; -- clk
+ csr_reset_reset : in std_logic := 'X'; -- reset
+ reset1_dsrt_qual_reset1_dsrt_qual : in std_logic := 'X'; -- reset1_dsrt_qual
+ reset2_dsrt_qual_reset2_dsrt_qual : in std_logic := 'X'; -- reset2_dsrt_qual
+ reset5_dsrt_qual_reset5_dsrt_qual : in std_logic := 'X'; -- reset5_dsrt_qual
+ reset_in0_reset : in std_logic := 'X'; -- reset
+ reset_out0_reset : out std_logic; -- reset
+ reset_out1_reset : out std_logic; -- reset
+ reset_out2_reset : out std_logic; -- reset
+ reset_out3_reset : out std_logic; -- reset
+ reset_out4_reset : out std_logic; -- reset
+ reset_out5_reset : out std_logic; -- reset
+ reset_out6_reset : out std_logic; -- reset
+ reset_out7_reset : out std_logic -- reset
);
end component ip_arria10_e1sg_jesd204b_rx_reset_seq;
u0 : component ip_arria10_e1sg_jesd204b_rx_reset_seq
- generic map (
- NUM_OUTPUTS => INTEGER_VALUE_FOR_NUM_OUTPUTS,
- ENABLE_DEASSERTION_INPUT_QUAL => INTEGER_VALUE_FOR_ENABLE_DEASSERTION_INPUT_QUAL,
- ENABLE_ASSERTION_SEQUENCE => INTEGER_VALUE_FOR_ENABLE_ASSERTION_SEQUENCE,
- ENABLE_DEASSERTION_SEQUENCE => INTEGER_VALUE_FOR_ENABLE_DEASSERTION_SEQUENCE,
- MIN_ASRT_TIME => INTEGER_VALUE_FOR_MIN_ASRT_TIME,
- ASRT_DELAY0 => INTEGER_VALUE_FOR_ASRT_DELAY0,
- DSRT_DELAY0 => INTEGER_VALUE_FOR_DSRT_DELAY0,
- ASRT_REMAP0 => INTEGER_VALUE_FOR_ASRT_REMAP0,
- DSRT_REMAP0 => INTEGER_VALUE_FOR_DSRT_REMAP0,
- DSRT_QUALCNT_0 => INTEGER_VALUE_FOR_DSRT_QUALCNT_0,
- ASRT_DELAY1 => INTEGER_VALUE_FOR_ASRT_DELAY1,
- DSRT_DELAY1 => INTEGER_VALUE_FOR_DSRT_DELAY1,
- ASRT_REMAP1 => INTEGER_VALUE_FOR_ASRT_REMAP1,
- DSRT_REMAP1 => INTEGER_VALUE_FOR_DSRT_REMAP1,
- DSRT_QUALCNT_1 => INTEGER_VALUE_FOR_DSRT_QUALCNT_1,
- ASRT_DELAY2 => INTEGER_VALUE_FOR_ASRT_DELAY2,
- DSRT_DELAY2 => INTEGER_VALUE_FOR_DSRT_DELAY2,
- ASRT_REMAP2 => INTEGER_VALUE_FOR_ASRT_REMAP2,
- DSRT_REMAP2 => INTEGER_VALUE_FOR_DSRT_REMAP2,
- DSRT_QUALCNT_2 => INTEGER_VALUE_FOR_DSRT_QUALCNT_2,
- ASRT_DELAY3 => INTEGER_VALUE_FOR_ASRT_DELAY3,
- DSRT_DELAY3 => INTEGER_VALUE_FOR_DSRT_DELAY3,
- ASRT_REMAP3 => INTEGER_VALUE_FOR_ASRT_REMAP3,
- DSRT_REMAP3 => INTEGER_VALUE_FOR_DSRT_REMAP3,
- DSRT_QUALCNT_3 => INTEGER_VALUE_FOR_DSRT_QUALCNT_3,
- ASRT_DELAY4 => INTEGER_VALUE_FOR_ASRT_DELAY4,
- DSRT_DELAY4 => INTEGER_VALUE_FOR_DSRT_DELAY4,
- ASRT_REMAP4 => INTEGER_VALUE_FOR_ASRT_REMAP4,
- DSRT_REMAP4 => INTEGER_VALUE_FOR_DSRT_REMAP4,
- DSRT_QUALCNT_4 => INTEGER_VALUE_FOR_DSRT_QUALCNT_4,
- ASRT_DELAY5 => INTEGER_VALUE_FOR_ASRT_DELAY5,
- DSRT_DELAY5 => INTEGER_VALUE_FOR_DSRT_DELAY5,
- ASRT_REMAP5 => INTEGER_VALUE_FOR_ASRT_REMAP5,
- DSRT_REMAP5 => INTEGER_VALUE_FOR_DSRT_REMAP5,
- DSRT_QUALCNT_5 => INTEGER_VALUE_FOR_DSRT_QUALCNT_5,
- ASRT_DELAY6 => INTEGER_VALUE_FOR_ASRT_DELAY6,
- DSRT_DELAY6 => INTEGER_VALUE_FOR_DSRT_DELAY6,
- ASRT_REMAP6 => INTEGER_VALUE_FOR_ASRT_REMAP6,
- DSRT_REMAP6 => INTEGER_VALUE_FOR_DSRT_REMAP6,
- DSRT_QUALCNT_6 => INTEGER_VALUE_FOR_DSRT_QUALCNT_6,
- ASRT_DELAY7 => INTEGER_VALUE_FOR_ASRT_DELAY7,
- DSRT_DELAY7 => INTEGER_VALUE_FOR_DSRT_DELAY7,
- ASRT_REMAP7 => INTEGER_VALUE_FOR_ASRT_REMAP7,
- DSRT_REMAP7 => INTEGER_VALUE_FOR_DSRT_REMAP7,
- DSRT_QUALCNT_7 => INTEGER_VALUE_FOR_DSRT_QUALCNT_7,
- ASRT_DELAY8 => INTEGER_VALUE_FOR_ASRT_DELAY8,
- DSRT_DELAY8 => INTEGER_VALUE_FOR_DSRT_DELAY8,
- ASRT_REMAP8 => INTEGER_VALUE_FOR_ASRT_REMAP8,
- DSRT_REMAP8 => INTEGER_VALUE_FOR_DSRT_REMAP8,
- DSRT_QUALCNT_8 => INTEGER_VALUE_FOR_DSRT_QUALCNT_8,
- ASRT_DELAY9 => INTEGER_VALUE_FOR_ASRT_DELAY9,
- DSRT_DELAY9 => INTEGER_VALUE_FOR_DSRT_DELAY9,
- ASRT_REMAP9 => INTEGER_VALUE_FOR_ASRT_REMAP9,
- DSRT_REMAP9 => INTEGER_VALUE_FOR_DSRT_REMAP9,
- DSRT_QUALCNT_9 => INTEGER_VALUE_FOR_DSRT_QUALCNT_9
- )
port map (
- av_address => CONNECTED_TO_av_address, -- av_csr.address
- av_readdata => CONNECTED_TO_av_readdata, -- .readdata
- av_read => CONNECTED_TO_av_read, -- .read
- av_writedata => CONNECTED_TO_av_writedata, -- .writedata
- av_write => CONNECTED_TO_av_write, -- .write
- irq => CONNECTED_TO_irq, -- av_csr_irq.irq
- clk => CONNECTED_TO_clk, -- clk.clk
- csr_reset => CONNECTED_TO_csr_reset, -- csr_reset.reset
- reset1_dsrt_qual => CONNECTED_TO_reset1_dsrt_qual, -- reset1_dsrt_qual.reset1_dsrt_qual
- reset2_dsrt_qual => CONNECTED_TO_reset2_dsrt_qual, -- reset2_dsrt_qual.reset2_dsrt_qual
- reset5_dsrt_qual => CONNECTED_TO_reset5_dsrt_qual, -- reset5_dsrt_qual.reset5_dsrt_qual
- reset_in0 => CONNECTED_TO_reset_in0, -- reset_in0.reset
- reset_out0 => CONNECTED_TO_reset_out0, -- reset_out0.reset
- reset_out1 => CONNECTED_TO_reset_out1, -- reset_out1.reset
- reset_out2 => CONNECTED_TO_reset_out2, -- reset_out2.reset
- reset_out3 => CONNECTED_TO_reset_out3, -- reset_out3.reset
- reset_out4 => CONNECTED_TO_reset_out4, -- reset_out4.reset
- reset_out5 => CONNECTED_TO_reset_out5, -- reset_out5.reset
- reset_out6 => CONNECTED_TO_reset_out6, -- reset_out6.reset
- reset_out7 => CONNECTED_TO_reset_out7 -- reset_out7.reset
+ av_csr_address => CONNECTED_TO_av_csr_address, -- av_csr.address
+ av_csr_readdata => CONNECTED_TO_av_csr_readdata, -- .readdata
+ av_csr_read => CONNECTED_TO_av_csr_read, -- .read
+ av_csr_writedata => CONNECTED_TO_av_csr_writedata, -- .writedata
+ av_csr_write => CONNECTED_TO_av_csr_write, -- .write
+ irq_irq => CONNECTED_TO_irq_irq, -- irq.irq
+ clk_clk => CONNECTED_TO_clk_clk, -- clk.clk
+ csr_reset_reset => CONNECTED_TO_csr_reset_reset, -- csr_reset.reset
+ reset1_dsrt_qual_reset1_dsrt_qual => CONNECTED_TO_reset1_dsrt_qual_reset1_dsrt_qual, -- reset1_dsrt_qual.reset1_dsrt_qual
+ reset2_dsrt_qual_reset2_dsrt_qual => CONNECTED_TO_reset2_dsrt_qual_reset2_dsrt_qual, -- reset2_dsrt_qual.reset2_dsrt_qual
+ reset5_dsrt_qual_reset5_dsrt_qual => CONNECTED_TO_reset5_dsrt_qual_reset5_dsrt_qual, -- reset5_dsrt_qual.reset5_dsrt_qual
+ reset_in0_reset => CONNECTED_TO_reset_in0_reset, -- reset_in0.reset
+ reset_out0_reset => CONNECTED_TO_reset_out0_reset, -- reset_out0.reset
+ reset_out1_reset => CONNECTED_TO_reset_out1_reset, -- reset_out1.reset
+ reset_out2_reset => CONNECTED_TO_reset_out2_reset, -- reset_out2.reset
+ reset_out3_reset => CONNECTED_TO_reset_out3_reset, -- reset_out3.reset
+ reset_out4_reset => CONNECTED_TO_reset_out4_reset, -- reset_out4.reset
+ reset_out5_reset => CONNECTED_TO_reset_out5_reset, -- reset_out5.reset
+ reset_out6_reset => CONNECTED_TO_reset_out6_reset, -- reset_out6.reset
+ reset_out7_reset => CONNECTED_TO_reset_out7_reset -- reset_out7.reset
);
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/synth/ip_arria10_e1sg_jesd204b_rx_reset_seq.vhd b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/synth/ip_arria10_e1sg_jesd204b_rx_reset_seq.vhd
index 2f63179972e48b4afbdb5ab98e196fdde52bf14a..e0d6f5d6383716f333dd8246b3ab1430038de769 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/synth/ip_arria10_e1sg_jesd204b_rx_reset_seq.vhd
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_reset_seq/synth/ip_arria10_e1sg_jesd204b_rx_reset_seq.vhd
@@ -1,156 +1,51 @@
-- ip_arria10_e1sg_jesd204b_rx_reset_seq.vhd
--- Generated using ACDS version 18.0 219
+-- Generated using ACDS version 19.4 64
library IEEE;
-library altera_reset_sequencer_180;
+library ip_arria10_e1sg_jesd204b_rx_reset_seq;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity ip_arria10_e1sg_jesd204b_rx_reset_seq is
- generic (
- NUM_OUTPUTS : integer := 8;
- ENABLE_DEASSERTION_INPUT_QUAL : integer := 38;
- ENABLE_ASSERTION_SEQUENCE : integer := 0;
- ENABLE_DEASSERTION_SEQUENCE : integer := 1;
- MIN_ASRT_TIME : integer := 20;
- ASRT_DELAY0 : integer := 0;
- DSRT_DELAY0 : integer := 2;
- ASRT_REMAP0 : integer := 0;
- DSRT_REMAP0 : integer := 0;
- DSRT_QUALCNT_0 : integer := 0;
- ASRT_DELAY1 : integer := 0;
- DSRT_DELAY1 : integer := 0;
- ASRT_REMAP1 : integer := 1;
- DSRT_REMAP1 : integer := 1;
- DSRT_QUALCNT_1 : integer := 2;
- ASRT_DELAY2 : integer := 0;
- DSRT_DELAY2 : integer := 0;
- ASRT_REMAP2 : integer := 2;
- DSRT_REMAP2 : integer := 2;
- DSRT_QUALCNT_2 : integer := 2;
- ASRT_DELAY3 : integer := 0;
- DSRT_DELAY3 : integer := 20;
- ASRT_REMAP3 : integer := 3;
- DSRT_REMAP3 : integer := 3;
- DSRT_QUALCNT_3 : integer := 0;
- ASRT_DELAY4 : integer := 0;
- DSRT_DELAY4 : integer := 0;
- ASRT_REMAP4 : integer := 4;
- DSRT_REMAP4 : integer := 4;
- DSRT_QUALCNT_4 : integer := 0;
- ASRT_DELAY5 : integer := 0;
- DSRT_DELAY5 : integer := 0;
- ASRT_REMAP5 : integer := 5;
- DSRT_REMAP5 : integer := 5;
- DSRT_QUALCNT_5 : integer := 2;
- ASRT_DELAY6 : integer := 0;
- DSRT_DELAY6 : integer := 20;
- ASRT_REMAP6 : integer := 6;
- DSRT_REMAP6 : integer := 6;
- DSRT_QUALCNT_6 : integer := 0;
- ASRT_DELAY7 : integer := 0;
- DSRT_DELAY7 : integer := 0;
- ASRT_REMAP7 : integer := 7;
- DSRT_REMAP7 : integer := 7;
- DSRT_QUALCNT_7 : integer := 0;
- ASRT_DELAY8 : integer := 0;
- DSRT_DELAY8 : integer := 0;
- ASRT_REMAP8 : integer := 8;
- DSRT_REMAP8 : integer := 8;
- DSRT_QUALCNT_8 : integer := 0;
- ASRT_DELAY9 : integer := 0;
- DSRT_DELAY9 : integer := 0;
- ASRT_REMAP9 : integer := 9;
- DSRT_REMAP9 : integer := 9;
- DSRT_QUALCNT_9 : integer := 0
- );
port (
- av_address : in std_logic_vector(7 downto 0) := (others => '0'); -- av_csr.address
- av_readdata : out std_logic_vector(31 downto 0); -- .readdata
- av_read : in std_logic := '0'; -- .read
- av_writedata : in std_logic_vector(31 downto 0) := (others => '0'); -- .writedata
- av_write : in std_logic := '0'; -- .write
- irq : out std_logic; -- av_csr_irq.irq
- clk : in std_logic := '0'; -- clk.clk
- csr_reset : in std_logic := '0'; -- csr_reset.reset
- reset1_dsrt_qual : in std_logic := '0'; -- reset1_dsrt_qual.reset1_dsrt_qual
- reset2_dsrt_qual : in std_logic := '0'; -- reset2_dsrt_qual.reset2_dsrt_qual
- reset5_dsrt_qual : in std_logic := '0'; -- reset5_dsrt_qual.reset5_dsrt_qual
- reset_in0 : in std_logic := '0'; -- reset_in0.reset
- reset_out0 : out std_logic; -- reset_out0.reset
- reset_out1 : out std_logic; -- reset_out1.reset
- reset_out2 : out std_logic; -- reset_out2.reset
- reset_out3 : out std_logic; -- reset_out3.reset
- reset_out4 : out std_logic; -- reset_out4.reset
- reset_out5 : out std_logic; -- reset_out5.reset
- reset_out6 : out std_logic; -- reset_out6.reset
- reset_out7 : out std_logic -- reset_out7.reset
+ av_csr_address : in std_logic_vector(7 downto 0) := (others => '0'); -- av_csr.address
+ av_csr_readdata : out std_logic_vector(31 downto 0); -- .readdata
+ av_csr_read : in std_logic := '0'; -- .read
+ av_csr_writedata : in std_logic_vector(31 downto 0) := (others => '0'); -- .writedata
+ av_csr_write : in std_logic := '0'; -- .write
+ irq_irq : out std_logic; -- irq.irq
+ clk_clk : in std_logic := '0'; -- clk.clk
+ csr_reset_reset : in std_logic := '0'; -- csr_reset.reset
+ reset1_dsrt_qual_reset1_dsrt_qual : in std_logic := '0'; -- reset1_dsrt_qual.reset1_dsrt_qual
+ reset2_dsrt_qual_reset2_dsrt_qual : in std_logic := '0'; -- reset2_dsrt_qual.reset2_dsrt_qual
+ reset5_dsrt_qual_reset5_dsrt_qual : in std_logic := '0'; -- reset5_dsrt_qual.reset5_dsrt_qual
+ reset_in0_reset : in std_logic := '0'; -- reset_in0.reset
+ reset_out0_reset : out std_logic; -- reset_out0.reset
+ reset_out1_reset : out std_logic; -- reset_out1.reset
+ reset_out2_reset : out std_logic; -- reset_out2.reset
+ reset_out3_reset : out std_logic; -- reset_out3.reset
+ reset_out4_reset : out std_logic; -- reset_out4.reset
+ reset_out5_reset : out std_logic; -- reset_out5.reset
+ reset_out6_reset : out std_logic; -- reset_out6.reset
+ reset_out7_reset : out std_logic -- reset_out7.reset
);
end entity ip_arria10_e1sg_jesd204b_rx_reset_seq;
architecture rtl of ip_arria10_e1sg_jesd204b_rx_reset_seq is
- component altera_reset_sequencer_cmp is
- generic (
- NUM_OUTPUTS : integer := 3;
- ENABLE_DEASSERTION_INPUT_QUAL : integer := 0;
- ENABLE_ASSERTION_SEQUENCE : integer := 0;
- ENABLE_DEASSERTION_SEQUENCE : integer := 0;
- MIN_ASRT_TIME : integer := 0;
- ASRT_DELAY0 : integer := 0;
- DSRT_DELAY0 : integer := 0;
- ASRT_REMAP0 : integer := 0;
- DSRT_REMAP0 : integer := 0;
- DSRT_QUALCNT_0 : integer := 0;
- ASRT_DELAY1 : integer := 0;
- DSRT_DELAY1 : integer := 0;
- ASRT_REMAP1 : integer := 1;
- DSRT_REMAP1 : integer := 1;
- DSRT_QUALCNT_1 : integer := 0;
- ASRT_DELAY2 : integer := 0;
- DSRT_DELAY2 : integer := 0;
- ASRT_REMAP2 : integer := 2;
- DSRT_REMAP2 : integer := 2;
- DSRT_QUALCNT_2 : integer := 0;
- ASRT_DELAY3 : integer := 0;
- DSRT_DELAY3 : integer := 0;
- ASRT_REMAP3 : integer := 3;
- DSRT_REMAP3 : integer := 3;
- DSRT_QUALCNT_3 : integer := 0;
- ASRT_DELAY4 : integer := 0;
- DSRT_DELAY4 : integer := 0;
- ASRT_REMAP4 : integer := 4;
- DSRT_REMAP4 : integer := 4;
- DSRT_QUALCNT_4 : integer := 0;
- ASRT_DELAY5 : integer := 0;
- DSRT_DELAY5 : integer := 0;
- ASRT_REMAP5 : integer := 5;
- DSRT_REMAP5 : integer := 5;
- DSRT_QUALCNT_5 : integer := 0;
- ASRT_DELAY6 : integer := 0;
- DSRT_DELAY6 : integer := 0;
- ASRT_REMAP6 : integer := 6;
- DSRT_REMAP6 : integer := 6;
- DSRT_QUALCNT_6 : integer := 0;
- ASRT_DELAY7 : integer := 0;
- DSRT_DELAY7 : integer := 0;
- ASRT_REMAP7 : integer := 7;
- DSRT_REMAP7 : integer := 7;
- DSRT_QUALCNT_7 : integer := 0;
- ASRT_DELAY8 : integer := 0;
- DSRT_DELAY8 : integer := 0;
- ASRT_REMAP8 : integer := 8;
- DSRT_REMAP8 : integer := 8;
- DSRT_QUALCNT_8 : integer := 0;
- ASRT_DELAY9 : integer := 0;
- DSRT_DELAY9 : integer := 0;
- ASRT_REMAP9 : integer := 9;
- DSRT_REMAP9 : integer := 9;
- DSRT_QUALCNT_9 : integer := 0;
- ENABLE_CSR : integer := 0
- );
+ component ip_arria10_e1sg_jesd204b_rx_reset_seq_cmp is
port (
+ av_address : in std_logic_vector(7 downto 0) := (others => 'X'); -- address
+ av_readdata : out std_logic_vector(31 downto 0); -- readdata
+ av_read : in std_logic := 'X'; -- read
+ av_writedata : in std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
+ av_write : in std_logic := 'X'; -- write
+ irq : out std_logic; -- irq
clk : in std_logic := 'X'; -- clk
+ csr_reset : in std_logic := 'X'; -- reset
+ reset1_dsrt_qual : in std_logic := 'X'; -- reset1_dsrt_qual
+ reset2_dsrt_qual : in std_logic := 'X'; -- reset2_dsrt_qual
+ reset5_dsrt_qual : in std_logic := 'X'; -- reset5_dsrt_qual
reset_in0 : in std_logic := 'X'; -- reset
reset_out0 : out std_logic; -- reset
reset_out1 : out std_logic; -- reset
@@ -159,180 +54,36 @@ architecture rtl of ip_arria10_e1sg_jesd204b_rx_reset_seq is
reset_out4 : out std_logic; -- reset
reset_out5 : out std_logic; -- reset
reset_out6 : out std_logic; -- reset
- reset_out7 : out std_logic; -- reset
- reset1_dsrt_qual : in std_logic := 'X'; -- reset1_dsrt_qual
- reset2_dsrt_qual : in std_logic := 'X'; -- reset2_dsrt_qual
- reset5_dsrt_qual : in std_logic := 'X'; -- reset5_dsrt_qual
- csr_reset : in std_logic := 'X'; -- reset
- av_address : in std_logic_vector(7 downto 0) := (others => 'X'); -- address
- av_readdata : out std_logic_vector(31 downto 0); -- readdata
- av_read : in std_logic := 'X'; -- read
- av_writedata : in std_logic_vector(31 downto 0) := (others => 'X'); -- writedata
- av_write : in std_logic := 'X'; -- write
- irq : out std_logic; -- irq
- reset_req_in0 : in std_logic := 'X'; -- reset_req
- reset_in1 : in std_logic := 'X'; -- reset
- reset_req_in1 : in std_logic := 'X'; -- reset_req
- reset_in2 : in std_logic := 'X'; -- reset
- reset_req_in2 : in std_logic := 'X'; -- reset_req
- reset_in3 : in std_logic := 'X'; -- reset
- reset_req_in3 : in std_logic := 'X'; -- reset_req
- reset_in4 : in std_logic := 'X'; -- reset
- reset_req_in4 : in std_logic := 'X'; -- reset_req
- reset_in5 : in std_logic := 'X'; -- reset
- reset_req_in5 : in std_logic := 'X'; -- reset_req
- reset_in6 : in std_logic := 'X'; -- reset
- reset_req_in6 : in std_logic := 'X'; -- reset_req
- reset_in7 : in std_logic := 'X'; -- reset
- reset_req_in7 : in std_logic := 'X'; -- reset_req
- reset_in8 : in std_logic := 'X'; -- reset
- reset_req_in8 : in std_logic := 'X'; -- reset_req
- reset_in9 : in std_logic := 'X'; -- reset
- reset_req_in9 : in std_logic := 'X'; -- reset_req
- reset_req_out0 : out std_logic; -- reset_req
- reset_req_out1 : out std_logic; -- reset_req
- reset_req_out2 : out std_logic; -- reset_req
- reset_req_out3 : out std_logic; -- reset_req
- reset_req_out4 : out std_logic; -- reset_req
- reset_req_out5 : out std_logic; -- reset_req
- reset_req_out6 : out std_logic; -- reset_req
- reset_req_out7 : out std_logic; -- reset_req
- reset_out8 : out std_logic; -- reset
- reset_req_out8 : out std_logic; -- reset_req
- reset_out9 : out std_logic; -- reset
- reset_req_out9 : out std_logic; -- reset_req
- reset0_dsrt_qual : in std_logic := 'X'; -- reset_dsrt_qual
- reset3_dsrt_qual : in std_logic := 'X'; -- reset_dsrt_qual
- reset4_dsrt_qual : in std_logic := 'X'; -- reset_dsrt_qual
- reset6_dsrt_qual : in std_logic := 'X'; -- reset_dsrt_qual
- reset7_dsrt_qual : in std_logic := 'X'; -- reset_dsrt_qual
- reset8_dsrt_qual : in std_logic := 'X'; -- reset_dsrt_qual
- reset9_dsrt_qual : in std_logic := 'X' -- reset_dsrt_qual
+ reset_out7 : out std_logic -- reset
);
- end component altera_reset_sequencer_cmp;
+ end component ip_arria10_e1sg_jesd204b_rx_reset_seq_cmp;
- for reset_seq : altera_reset_sequencer_cmp
- use entity altera_reset_sequencer_180.altera_reset_sequencer;
+ for reset_sequencer_0 : ip_arria10_e1sg_jesd204b_rx_reset_seq_cmp
+ use entity ip_arria10_e1sg_jesd204b_rx_reset_seq.ip_arria10_e1sg_jesd204b_rx_reset_seq;
begin
- reset_seq : component altera_reset_sequencer_cmp
- generic map (
- NUM_OUTPUTS => NUM_OUTPUTS,
- ENABLE_DEASSERTION_INPUT_QUAL => ENABLE_DEASSERTION_INPUT_QUAL,
- ENABLE_ASSERTION_SEQUENCE => ENABLE_ASSERTION_SEQUENCE,
- ENABLE_DEASSERTION_SEQUENCE => ENABLE_DEASSERTION_SEQUENCE,
- MIN_ASRT_TIME => MIN_ASRT_TIME,
- ASRT_DELAY0 => ASRT_DELAY0,
- DSRT_DELAY0 => DSRT_DELAY0,
- ASRT_REMAP0 => ASRT_REMAP0,
- DSRT_REMAP0 => DSRT_REMAP0,
- DSRT_QUALCNT_0 => DSRT_QUALCNT_0,
- ASRT_DELAY1 => ASRT_DELAY1,
- DSRT_DELAY1 => DSRT_DELAY1,
- ASRT_REMAP1 => ASRT_REMAP1,
- DSRT_REMAP1 => DSRT_REMAP1,
- DSRT_QUALCNT_1 => DSRT_QUALCNT_1,
- ASRT_DELAY2 => ASRT_DELAY2,
- DSRT_DELAY2 => DSRT_DELAY2,
- ASRT_REMAP2 => ASRT_REMAP2,
- DSRT_REMAP2 => DSRT_REMAP2,
- DSRT_QUALCNT_2 => DSRT_QUALCNT_2,
- ASRT_DELAY3 => ASRT_DELAY3,
- DSRT_DELAY3 => DSRT_DELAY3,
- ASRT_REMAP3 => ASRT_REMAP3,
- DSRT_REMAP3 => DSRT_REMAP3,
- DSRT_QUALCNT_3 => DSRT_QUALCNT_3,
- ASRT_DELAY4 => ASRT_DELAY4,
- DSRT_DELAY4 => DSRT_DELAY4,
- ASRT_REMAP4 => ASRT_REMAP4,
- DSRT_REMAP4 => DSRT_REMAP4,
- DSRT_QUALCNT_4 => DSRT_QUALCNT_4,
- ASRT_DELAY5 => ASRT_DELAY5,
- DSRT_DELAY5 => DSRT_DELAY5,
- ASRT_REMAP5 => ASRT_REMAP5,
- DSRT_REMAP5 => DSRT_REMAP5,
- DSRT_QUALCNT_5 => DSRT_QUALCNT_5,
- ASRT_DELAY6 => ASRT_DELAY6,
- DSRT_DELAY6 => DSRT_DELAY6,
- ASRT_REMAP6 => ASRT_REMAP6,
- DSRT_REMAP6 => DSRT_REMAP6,
- DSRT_QUALCNT_6 => DSRT_QUALCNT_6,
- ASRT_DELAY7 => ASRT_DELAY7,
- DSRT_DELAY7 => DSRT_DELAY7,
- ASRT_REMAP7 => ASRT_REMAP7,
- DSRT_REMAP7 => DSRT_REMAP7,
- DSRT_QUALCNT_7 => DSRT_QUALCNT_7,
- ASRT_DELAY8 => ASRT_DELAY8,
- DSRT_DELAY8 => DSRT_DELAY8,
- ASRT_REMAP8 => ASRT_REMAP8,
- DSRT_REMAP8 => DSRT_REMAP8,
- DSRT_QUALCNT_8 => DSRT_QUALCNT_8,
- ASRT_DELAY9 => ASRT_DELAY9,
- DSRT_DELAY9 => DSRT_DELAY9,
- ASRT_REMAP9 => ASRT_REMAP9,
- DSRT_REMAP9 => DSRT_REMAP9,
- DSRT_QUALCNT_9 => DSRT_QUALCNT_9,
- ENABLE_CSR => 1
- )
+ reset_sequencer_0 : component ip_arria10_e1sg_jesd204b_rx_reset_seq_cmp
port map (
- clk => clk, -- clk.clk
- reset_in0 => reset_in0, -- reset_in0.reset
- reset_out0 => reset_out0, -- reset_out0.reset
- reset_out1 => reset_out1, -- reset_out1.reset
- reset_out2 => reset_out2, -- reset_out2.reset
- reset_out3 => reset_out3, -- reset_out3.reset
- reset_out4 => reset_out4, -- reset_out4.reset
- reset_out5 => reset_out5, -- reset_out5.reset
- reset_out6 => reset_out6, -- reset_out6.reset
- reset_out7 => reset_out7, -- reset_out7.reset
- reset1_dsrt_qual => reset1_dsrt_qual, -- reset1_dsrt_qual.reset1_dsrt_qual
- reset2_dsrt_qual => reset2_dsrt_qual, -- reset2_dsrt_qual.reset2_dsrt_qual
- reset5_dsrt_qual => reset5_dsrt_qual, -- reset5_dsrt_qual.reset5_dsrt_qual
- csr_reset => csr_reset, -- csr_reset.reset
- av_address => av_address, -- av_csr.address
- av_readdata => av_readdata, -- .readdata
- av_read => av_read, -- .read
- av_writedata => av_writedata, -- .writedata
- av_write => av_write, -- .write
- irq => irq, -- av_csr_irq.irq
- reset_req_in0 => '0', -- (terminated)
- reset_in1 => '0', -- (terminated)
- reset_req_in1 => '0', -- (terminated)
- reset_in2 => '0', -- (terminated)
- reset_req_in2 => '0', -- (terminated)
- reset_in3 => '0', -- (terminated)
- reset_req_in3 => '0', -- (terminated)
- reset_in4 => '0', -- (terminated)
- reset_req_in4 => '0', -- (terminated)
- reset_in5 => '0', -- (terminated)
- reset_req_in5 => '0', -- (terminated)
- reset_in6 => '0', -- (terminated)
- reset_req_in6 => '0', -- (terminated)
- reset_in7 => '0', -- (terminated)
- reset_req_in7 => '0', -- (terminated)
- reset_in8 => '0', -- (terminated)
- reset_req_in8 => '0', -- (terminated)
- reset_in9 => '0', -- (terminated)
- reset_req_in9 => '0', -- (terminated)
- reset_req_out0 => open, -- (terminated)
- reset_req_out1 => open, -- (terminated)
- reset_req_out2 => open, -- (terminated)
- reset_req_out3 => open, -- (terminated)
- reset_req_out4 => open, -- (terminated)
- reset_req_out5 => open, -- (terminated)
- reset_req_out6 => open, -- (terminated)
- reset_req_out7 => open, -- (terminated)
- reset_out8 => open, -- (terminated)
- reset_req_out8 => open, -- (terminated)
- reset_out9 => open, -- (terminated)
- reset_req_out9 => open, -- (terminated)
- reset0_dsrt_qual => '0', -- (terminated)
- reset3_dsrt_qual => '0', -- (terminated)
- reset4_dsrt_qual => '0', -- (terminated)
- reset6_dsrt_qual => '0', -- (terminated)
- reset7_dsrt_qual => '0', -- (terminated)
- reset8_dsrt_qual => '0', -- (terminated)
- reset9_dsrt_qual => '0' -- (terminated)
+ av_address => av_csr_address, -- av_csr.address
+ av_readdata => av_csr_readdata, -- .readdata
+ av_read => av_csr_read, -- .read
+ av_writedata => av_csr_writedata, -- .writedata
+ av_write => av_csr_write, -- .write
+ irq => irq_irq, -- av_csr_irq.irq
+ clk => clk_clk, -- clk.clk
+ csr_reset => csr_reset_reset, -- csr_reset.reset
+ reset1_dsrt_qual => reset1_dsrt_qual_reset1_dsrt_qual, -- reset1_dsrt_qual.reset1_dsrt_qual
+ reset2_dsrt_qual => reset2_dsrt_qual_reset2_dsrt_qual, -- reset2_dsrt_qual.reset2_dsrt_qual
+ reset5_dsrt_qual => reset5_dsrt_qual_reset5_dsrt_qual, -- reset5_dsrt_qual.reset5_dsrt_qual
+ reset_in0 => reset_in0_reset, -- reset_in0.reset
+ reset_out0 => reset_out0_reset, -- reset_out0.reset
+ reset_out1 => reset_out1_reset, -- reset_out1.reset
+ reset_out2 => reset_out2_reset, -- reset_out2.reset
+ reset_out3 => reset_out3_reset, -- reset_out3.reset
+ reset_out4 => reset_out4_reset, -- reset_out4.reset
+ reset_out5 => reset_out5_reset, -- reset_out5.reset
+ reset_out6 => reset_out6_reset, -- reset_out6.reset
+ reset_out7 => reset_out7_reset -- reset_out7.reset
);
end architecture rtl; -- of ip_arria10_e1sg_jesd204b_rx_reset_seq
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip
index 231c2cd3e481f100100c08c6438aaf4d4b7563a6..e638f164fcf9f63bf331cb08f68e4c5a0bc34984 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip
@@ -1,601 +1,663 @@
<?xml version="1.0" ?>
-<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
- <spirit:vendor>Intel Corporation</spirit:vendor>
- <spirit:library>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</spirit:library>
- <spirit:name>xcvr_reset_control_0</spirit:name>
- <spirit:version>18.0</spirit:version>
- <spirit:busInterfaces>
- <spirit:busInterface>
- <spirit:name>clock</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="clock" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>clk</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>clock</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>clockRate</spirit:name>
- <spirit:displayName>Clock rate</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="clockRate">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>externallyDriven</spirit:name>
- <spirit:displayName>Externally driven</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="externallyDriven">false</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>ptfSchematicName</spirit:name>
- <spirit:displayName>PTF schematic name</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="ptfSchematicName"></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>reset</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="reset" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>reset</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>Associated clock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>synchronousEdges</spirit:name>
- <spirit:displayName>Synchronous edges</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="synchronousEdges">NONE</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>rx_analogreset</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>rx_analogreset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rx_analogreset</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
+<ipxact:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact2014/extensions" xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014">
+ <ipxact:vendor>Intel Corporation</ipxact:vendor>
+ <ipxact:library>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</ipxact:library>
+ <ipxact:name>xcvr_reset_control_0</ipxact:name>
+ <ipxact:version>19.1</ipxact:version>
+ <ipxact:busInterfaces>
+ <ipxact:busInterface>
+ <ipxact:name>clock</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="clock" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="clock" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>clk</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>clock</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="clockRate" type="longint">
+ <ipxact:name>clockRate</ipxact:name>
+ <ipxact:displayName>Clock rate</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="externallyDriven" type="bit">
+ <ipxact:name>externallyDriven</ipxact:name>
+ <ipxact:displayName>Externally driven</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="ptfSchematicName" type="string">
+ <ipxact:name>ptfSchematicName</ipxact:name>
+ <ipxact:displayName>PTF schematic name</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>reset</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="reset" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="reset" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>reset</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>Associated clock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="synchronousEdges" type="string">
+ <ipxact:name>synchronousEdges</ipxact:name>
+ <ipxact:displayName>Synchronous edges</ipxact:displayName>
+ <ipxact:value>NONE</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_analogreset</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_analogreset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_analogreset</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
<altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
</altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>rx_cal_busy</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>rx_cal_busy</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rx_cal_busy</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_digitalreset</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_digitalreset</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_digitalreset</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
<altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
</altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>rx_digitalreset</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>rx_digitalreset</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rx_digitalreset</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_ready</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_ready</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_ready</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
<altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>output</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
</altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>rx_is_lockedtodata</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>rx_is_lockedtodata</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rx_is_lockedtodata</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_is_lockedtodata</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_is_lockedtodata</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_is_lockedtodata</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
<altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">input</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
</altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- <spirit:busInterface>
- <spirit:name>rx_ready</spirit:name>
- <spirit:busType spirit:vendor="altera" spirit:library="altera" spirit:name="conduit" spirit:version="18.0"></spirit:busType>
- <spirit:slave></spirit:slave>
- <spirit:portMaps>
- <spirit:portMap>
- <spirit:logicalPort>
- <spirit:name>rx_ready</spirit:name>
- </spirit:logicalPort>
- <spirit:physicalPort>
- <spirit:name>rx_ready</spirit:name>
- </spirit:physicalPort>
- </spirit:portMap>
- </spirit:portMaps>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>associatedClock</spirit:name>
- <spirit:displayName>associatedClock</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedClock"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>associatedReset</spirit:name>
- <spirit:displayName>associatedReset</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="associatedReset"></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>prSafe</spirit:name>
- <spirit:displayName>Partial Reconfiguration Safe</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="prSafe">false</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
- <spirit:vendorExtensions>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ <ipxact:busInterface>
+ <ipxact:name>rx_cal_busy</ipxact:name>
+ <ipxact:busType vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:busType>
+ <ipxact:abstractionTypes>
+ <ipxact:abstractionType>
+ <ipxact:abstractionRef vendor="altera" library="altera" name="conduit" version="19.4"></ipxact:abstractionRef>
+ <ipxact:portMaps>
+ <ipxact:portMap>
+ <ipxact:logicalPort>
+ <ipxact:name>rx_cal_busy</ipxact:name>
+ </ipxact:logicalPort>
+ <ipxact:physicalPort>
+ <ipxact:name>rx_cal_busy</ipxact:name>
+ </ipxact:physicalPort>
+ </ipxact:portMap>
+ </ipxact:portMaps>
+ </ipxact:abstractionType>
+ </ipxact:abstractionTypes>
+ <ipxact:slave></ipxact:slave>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="associatedClock" type="string">
+ <ipxact:name>associatedClock</ipxact:name>
+ <ipxact:displayName>associatedClock</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="associatedReset" type="string">
+ <ipxact:name>associatedReset</ipxact:name>
+ <ipxact:displayName>associatedReset</ipxact:displayName>
+ <ipxact:value></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="prSafe" type="bit">
+ <ipxact:name>prSafe</ipxact:name>
+ <ipxact:displayName>Partial Reconfiguration Safe</ipxact:displayName>
+ <ipxact:value>false</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
+ <ipxact:vendorExtensions>
<altera:altera_assignments>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>ui.blockdiagram.direction</spirit:name>
- <spirit:value spirit:format="string" spirit:id="ui.blockdiagram.direction">output</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="ui.blockdiagram.direction" type="string">
+ <ipxact:name>ui.blockdiagram.direction</ipxact:name>
+ <ipxact:value>input</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
</altera:altera_assignments>
- </spirit:vendorExtensions>
- </spirit:busInterface>
- </spirit:busInterfaces>
- <spirit:model>
- <spirit:views>
- <spirit:view>
- <spirit:name>QUARTUS_SYNTH</spirit:name>
- <spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
- <spirit:modelName>altera_xcvr_reset_control</spirit:modelName>
- <spirit:fileSetRef>
- <spirit:localName>QUARTUS_SYNTH</spirit:localName>
- </spirit:fileSetRef>
- </spirit:view>
- </spirit:views>
- <spirit:ports>
- <spirit:port>
- <spirit:name>clock</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>reset</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rx_analogreset</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left>0</spirit:left>
- <spirit:right>11</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rx_digitalreset</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left>0</spirit:left>
- <spirit:right>11</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rx_ready</spirit:name>
- <spirit:wire>
- <spirit:direction>out</spirit:direction>
- <spirit:vector>
- <spirit:left>0</spirit:left>
- <spirit:right>11</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rx_is_lockedtodata</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left>0</spirit:left>
- <spirit:right>11</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- <spirit:port>
- <spirit:name>rx_cal_busy</spirit:name>
- <spirit:wire>
- <spirit:direction>in</spirit:direction>
- <spirit:vector>
- <spirit:left>0</spirit:left>
- <spirit:right>11</spirit:right>
- </spirit:vector>
- <spirit:wireTypeDefs>
- <spirit:wireTypeDef>
- <spirit:typeName>STD_LOGIC_VECTOR</spirit:typeName>
- <spirit:viewNameRef>QUARTUS_SYNTH</spirit:viewNameRef>
- </spirit:wireTypeDef>
- </spirit:wireTypeDefs>
- </spirit:wire>
- </spirit:port>
- </spirit:ports>
- </spirit:model>
- <spirit:vendorExtensions>
+ </ipxact:vendorExtensions>
+ </ipxact:busInterface>
+ </ipxact:busInterfaces>
+ <ipxact:model>
+ <ipxact:views>
+ <ipxact:view>
+ <ipxact:name>QUARTUS_SYNTH</ipxact:name>
+ <ipxact:envIdentifier>:quartus.altera.com:</ipxact:envIdentifier>
+ <ipxact:componentInstantiationRef>QUARTUS_SYNTH</ipxact:componentInstantiationRef>
+ </ipxact:view>
+ </ipxact:views>
+ <ipxact:instantiations>
+ <ipxact:componentInstantiation>
+ <ipxact:name>QUARTUS_SYNTH</ipxact:name>
+ <ipxact:moduleName>altera_xcvr_reset_control</ipxact:moduleName>
+ <ipxact:fileSetRef>
+ <ipxact:localName>QUARTUS_SYNTH</ipxact:localName>
+ </ipxact:fileSetRef>
+ <ipxact:parameters></ipxact:parameters>
+ </ipxact:componentInstantiation>
+ </ipxact:instantiations>
+ <ipxact:ports>
+ <ipxact:port>
+ <ipxact:name>clock</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>reset</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors></ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_analogreset</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>11</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_digitalreset</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>11</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_ready</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>out</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>11</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_is_lockedtodata</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>11</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ <ipxact:port>
+ <ipxact:name>rx_cal_busy</ipxact:name>
+ <ipxact:wire>
+ <ipxact:direction>in</ipxact:direction>
+ <ipxact:vectors>
+ <ipxact:vector>
+ <ipxact:left>0</ipxact:left>
+ <ipxact:right>11</ipxact:right>
+ </ipxact:vector>
+ </ipxact:vectors>
+ <ipxact:wireTypeDefs>
+ <ipxact:wireTypeDef>
+ <ipxact:typeName>STD_LOGIC_VECTOR</ipxact:typeName>
+ <ipxact:viewRef>QUARTUS_SYNTH</ipxact:viewRef>
+ </ipxact:wireTypeDef>
+ </ipxact:wireTypeDefs>
+ </ipxact:wire>
+ </ipxact:port>
+ </ipxact:ports>
+ </ipxact:model>
+ <ipxact:vendorExtensions>
<altera:entity_info>
- <spirit:vendor>Intel Corporation</spirit:vendor>
- <spirit:library>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</spirit:library>
- <spirit:name>altera_xcvr_reset_control</spirit:name>
- <spirit:version>18.0</spirit:version>
+ <ipxact:vendor>Intel Corporation</ipxact:vendor>
+ <ipxact:library>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</ipxact:library>
+ <ipxact:name>altera_xcvr_reset_control</ipxact:name>
+ <ipxact:version>19.1</ipxact:version>
</altera:entity_info>
<altera:altera_module_parameters>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>device_family</spirit:name>
- <spirit:displayName>device_family</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="device_family">Arria 10</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>CHANNELS</spirit:name>
- <spirit:displayName>Number of transceiver channels</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="CHANNELS">12</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>PLLS</spirit:name>
- <spirit:displayName>Number of TX PLLs</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="PLLS">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SYS_CLK_IN_MHZ</spirit:name>
- <spirit:displayName>Input clock frequency</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="SYS_CLK_IN_MHZ">100</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SYNCHRONIZE_RESET</spirit:name>
- <spirit:displayName>Synchronize reset input</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="SYNCHRONIZE_RESET">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>REDUCED_SIM_TIME</spirit:name>
- <spirit:displayName>Use fast reset for simulation</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="REDUCED_SIM_TIME">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_split_interfaces</spirit:name>
- <spirit:displayName>Separate interface per channel/PLL</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_split_interfaces">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TX_PLL_ENABLE</spirit:name>
- <spirit:displayName>Enable TX PLL reset control</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="TX_PLL_ENABLE">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>T_PLL_POWERDOWN</spirit:name>
- <spirit:displayName>pll_powerdown duration</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="T_PLL_POWERDOWN">1000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>SYNCHRONIZE_PLL_RESET</spirit:name>
- <spirit:displayName>Synchronize reset input for PLL powerdown</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="SYNCHRONIZE_PLL_RESET">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TX_ENABLE</spirit:name>
- <spirit:displayName>Enable TX channel reset control</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="TX_ENABLE">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>TX_PER_CHANNEL</spirit:name>
- <spirit:displayName>Use separate TX reset per channel</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="TX_PER_CHANNEL">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_tx_auto_reset</spirit:name>
- <spirit:displayName>TX digital reset mode</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_tx_auto_reset">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>T_TX_ANALOGRESET</spirit:name>
- <spirit:displayName>tx_analogreset duration</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="T_TX_ANALOGRESET">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>T_TX_DIGITALRESET</spirit:name>
- <spirit:displayName>tx_digitalreset duration</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="T_TX_DIGITALRESET">20</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>T_PLL_LOCK_HYST</spirit:name>
- <spirit:displayName>pll_locked input hysteresis</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="T_PLL_LOCK_HYST">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_pll_cal_busy</spirit:name>
- <spirit:displayName>Enable pll_cal_busy input port</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_pll_cal_busy">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>EN_PLL_CAL_BUSY</spirit:name>
- <spirit:displayName>EN_PLL_CAL_BUSY</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="EN_PLL_CAL_BUSY">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RX_ENABLE</spirit:name>
- <spirit:displayName>Enable RX channel reset control</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="RX_ENABLE">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>RX_PER_CHANNEL</spirit:name>
- <spirit:displayName>Use separate RX reset per channel</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="RX_PER_CHANNEL">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>gui_rx_auto_reset</spirit:name>
- <spirit:displayName>RX digital reset mode</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="gui_rx_auto_reset">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>T_RX_ANALOGRESET</spirit:name>
- <spirit:displayName>rx_analogreset duration</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="T_RX_ANALOGRESET">70000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>T_RX_DIGITALRESET</spirit:name>
- <spirit:displayName>rx_digitalreset duration</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="T_RX_DIGITALRESET">4000</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>l_terminate_pll</spirit:name>
- <spirit:displayName>l_terminate_pll</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="l_terminate_pll">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>l_terminate_tx</spirit:name>
- <spirit:displayName>l_terminate_tx</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="l_terminate_tx">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>l_terminate_rx</spirit:name>
- <spirit:displayName>l_terminate_rx</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="l_terminate_rx">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>l_terminate_tx_manual</spirit:name>
- <spirit:displayName>l_terminate_tx_manual</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="l_terminate_tx_manual">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>l_terminate_rx_manual</spirit:name>
- <spirit:displayName>l_terminate_rx_manual</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="l_terminate_rx_manual">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>l_tx_manual_term</spirit:name>
- <spirit:displayName>l_tx_manual_term</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="l_tx_manual_term">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>l_rx_manual_term</spirit:name>
- <spirit:displayName>l_rx_manual_term</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="l_rx_manual_term">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>l_pll_select_split</spirit:name>
- <spirit:displayName>l_pll_select_split</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="l_pll_select_split">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>l_pll_select_width</spirit:name>
- <spirit:displayName>l_pll_select_width</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="l_pll_select_width">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>l_pll_select_base</spirit:name>
- <spirit:displayName>l_pll_select_base</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="l_pll_select_base">1</spirit:value>
- </spirit:parameter>
- </spirit:parameters>
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="device_family" type="string">
+ <ipxact:name>device_family</ipxact:name>
+ <ipxact:displayName>device_family</ipxact:displayName>
+ <ipxact:value>Arria 10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="CHANNELS" type="int">
+ <ipxact:name>CHANNELS</ipxact:name>
+ <ipxact:displayName>Number of transceiver channels</ipxact:displayName>
+ <ipxact:value>12</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="PLLS" type="int">
+ <ipxact:name>PLLS</ipxact:name>
+ <ipxact:displayName>Number of TX PLLs</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="SYS_CLK_IN_MHZ" type="int">
+ <ipxact:name>SYS_CLK_IN_MHZ</ipxact:name>
+ <ipxact:displayName>Input clock frequency</ipxact:displayName>
+ <ipxact:value>100</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="SYNCHRONIZE_RESET" type="int">
+ <ipxact:name>SYNCHRONIZE_RESET</ipxact:name>
+ <ipxact:displayName>Synchronize reset input</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="REDUCED_SIM_TIME" type="int">
+ <ipxact:name>REDUCED_SIM_TIME</ipxact:name>
+ <ipxact:displayName>Use fast reset for simulation</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_split_interfaces" type="int">
+ <ipxact:name>gui_split_interfaces</ipxact:name>
+ <ipxact:displayName>Separate interface per channel/PLL</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="TX_PLL_ENABLE" type="int">
+ <ipxact:name>TX_PLL_ENABLE</ipxact:name>
+ <ipxact:displayName>Enable TX PLL reset control</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="T_PLL_POWERDOWN" type="int">
+ <ipxact:name>T_PLL_POWERDOWN</ipxact:name>
+ <ipxact:displayName>pll_powerdown duration</ipxact:displayName>
+ <ipxact:value>1000</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="SYNCHRONIZE_PLL_RESET" type="int">
+ <ipxact:name>SYNCHRONIZE_PLL_RESET</ipxact:name>
+ <ipxact:displayName>Synchronize reset input for PLL powerdown</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="TX_ENABLE" type="int">
+ <ipxact:name>TX_ENABLE</ipxact:name>
+ <ipxact:displayName>Enable TX channel reset control</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="TX_PER_CHANNEL" type="int">
+ <ipxact:name>TX_PER_CHANNEL</ipxact:name>
+ <ipxact:displayName>Use separate TX reset per channel</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_tx_auto_reset" type="int">
+ <ipxact:name>gui_tx_auto_reset</ipxact:name>
+ <ipxact:displayName>TX digital reset mode</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="T_TX_ANALOGRESET" type="int">
+ <ipxact:name>T_TX_ANALOGRESET</ipxact:name>
+ <ipxact:displayName>tx_analogreset duration</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="T_TX_DIGITALRESET" type="int">
+ <ipxact:name>T_TX_DIGITALRESET</ipxact:name>
+ <ipxact:displayName>tx_digitalreset duration</ipxact:displayName>
+ <ipxact:value>20</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="T_PLL_LOCK_HYST" type="int">
+ <ipxact:name>T_PLL_LOCK_HYST</ipxact:name>
+ <ipxact:displayName>pll_locked input hysteresis</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_pll_cal_busy" type="int">
+ <ipxact:name>gui_pll_cal_busy</ipxact:name>
+ <ipxact:displayName>Enable pll_cal_busy input port</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="EN_PLL_CAL_BUSY" type="int">
+ <ipxact:name>EN_PLL_CAL_BUSY</ipxact:name>
+ <ipxact:displayName>EN_PLL_CAL_BUSY</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="RX_ENABLE" type="int">
+ <ipxact:name>RX_ENABLE</ipxact:name>
+ <ipxact:displayName>Enable RX channel reset control</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="RX_PER_CHANNEL" type="int">
+ <ipxact:name>RX_PER_CHANNEL</ipxact:name>
+ <ipxact:displayName>Use separate RX reset per channel</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="gui_rx_auto_reset" type="int">
+ <ipxact:name>gui_rx_auto_reset</ipxact:name>
+ <ipxact:displayName>RX digital reset mode</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="T_RX_ANALOGRESET" type="int">
+ <ipxact:name>T_RX_ANALOGRESET</ipxact:name>
+ <ipxact:displayName>rx_analogreset duration</ipxact:displayName>
+ <ipxact:value>70000</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="T_RX_DIGITALRESET" type="int">
+ <ipxact:name>T_RX_DIGITALRESET</ipxact:name>
+ <ipxact:displayName>rx_digitalreset duration</ipxact:displayName>
+ <ipxact:value>4000</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_terminate_pll" type="int">
+ <ipxact:name>l_terminate_pll</ipxact:name>
+ <ipxact:displayName>l_terminate_pll</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_terminate_tx" type="int">
+ <ipxact:name>l_terminate_tx</ipxact:name>
+ <ipxact:displayName>l_terminate_tx</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_terminate_rx" type="int">
+ <ipxact:name>l_terminate_rx</ipxact:name>
+ <ipxact:displayName>l_terminate_rx</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_terminate_tx_manual" type="int">
+ <ipxact:name>l_terminate_tx_manual</ipxact:name>
+ <ipxact:displayName>l_terminate_tx_manual</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_terminate_rx_manual" type="int">
+ <ipxact:name>l_terminate_rx_manual</ipxact:name>
+ <ipxact:displayName>l_terminate_rx_manual</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_tx_manual_term" type="int">
+ <ipxact:name>l_tx_manual_term</ipxact:name>
+ <ipxact:displayName>l_tx_manual_term</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_rx_manual_term" type="int">
+ <ipxact:name>l_rx_manual_term</ipxact:name>
+ <ipxact:displayName>l_rx_manual_term</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_pll_select_split" type="int">
+ <ipxact:name>l_pll_select_split</ipxact:name>
+ <ipxact:displayName>l_pll_select_split</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_pll_select_width" type="int">
+ <ipxact:name>l_pll_select_width</ipxact:name>
+ <ipxact:displayName>l_pll_select_width</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="l_pll_select_base" type="int">
+ <ipxact:name>l_pll_select_base</ipxact:name>
+ <ipxact:displayName>l_pll_select_base</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
</altera:altera_module_parameters>
<altera:altera_system_parameters>
- <spirit:parameters>
- <spirit:parameter>
- <spirit:name>device</spirit:name>
- <spirit:displayName>Device</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="device">10AX115U2F45E1SG</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>deviceFamily</spirit:name>
- <spirit:displayName>Device family</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="deviceFamily">Arria 10</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>deviceSpeedGrade</spirit:name>
- <spirit:displayName>Device Speed Grade</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="deviceSpeedGrade">1</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>generationId</spirit:name>
- <spirit:displayName>Generation Id</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="generationId">0</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>bonusData</spirit:name>
- <spirit:displayName>bonusData</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="bonusData">bonusData
+ <ipxact:parameters>
+ <ipxact:parameter parameterId="device" type="string">
+ <ipxact:name>device</ipxact:name>
+ <ipxact:displayName>Device</ipxact:displayName>
+ <ipxact:value>10AX115U2F45E1SG</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="deviceFamily" type="string">
+ <ipxact:name>deviceFamily</ipxact:name>
+ <ipxact:displayName>Device family</ipxact:displayName>
+ <ipxact:value>Arria 10</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="deviceSpeedGrade" type="string">
+ <ipxact:name>deviceSpeedGrade</ipxact:name>
+ <ipxact:displayName>Device Speed Grade</ipxact:displayName>
+ <ipxact:value>1</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="generationId" type="int">
+ <ipxact:name>generationId</ipxact:name>
+ <ipxact:displayName>Generation Id</ipxact:displayName>
+ <ipxact:value>0</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="bonusData" type="string">
+ <ipxact:name>bonusData</ipxact:name>
+ <ipxact:displayName>bonusData</ipxact:displayName>
+ <ipxact:value>bonusData
{
+ element $system
+ {
+ datum _originalDeviceFamily
+ {
+ value = "Arria 10";
+ type = "String";
+ }
+ }
element xcvr_reset_control_0
{
datum _sortIndex
@@ -605,276 +667,276 @@
}
}
}
-</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>hideFromIPCatalog</spirit:name>
- <spirit:displayName>Hide from IP Catalog</spirit:displayName>
- <spirit:value spirit:format="bool" spirit:id="hideFromIPCatalog">true</spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>lockedInterfaceDefinition</spirit:name>
- <spirit:displayName>lockedInterfaceDefinition</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="lockedInterfaceDefinition"><![CDATA[<boundaryDefinition>
- <interfaces>
- <interface>
- <name>clock</name>
- <type>clock</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>clock</name>
- <role>clk</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>clockRate</key>
- <value>0</value>
- </entry>
- <entry>
- <key>externallyDriven</key>
- <value>false</value>
- </entry>
- <entry>
- <key>ptfSchematicName</key>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>reset</name>
- <type>reset</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>reset</name>
- <role>reset</role>
- <direction>Input</direction>
- <width>1</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap/>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>synchronousEdges</key>
- <value>NONE</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>rx_analogreset</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>rx_analogreset</name>
- <role>rx_analogreset</role>
- <direction>Output</direction>
- <width>12</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>ui.blockdiagram.direction</key>
- <value>output</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>rx_cal_busy</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>rx_cal_busy</name>
- <role>rx_cal_busy</role>
- <direction>Input</direction>
- <width>12</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>ui.blockdiagram.direction</key>
- <value>input</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>rx_digitalreset</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>rx_digitalreset</name>
- <role>rx_digitalreset</role>
- <direction>Output</direction>
- <width>12</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>ui.blockdiagram.direction</key>
- <value>output</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>rx_is_lockedtodata</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>rx_is_lockedtodata</name>
- <role>rx_is_lockedtodata</role>
- <direction>Input</direction>
- <width>12</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>ui.blockdiagram.direction</key>
- <value>input</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- <interface>
- <name>rx_ready</name>
- <type>conduit</type>
- <isStart>false</isStart>
- <ports>
- <port>
- <name>rx_ready</name>
- <role>rx_ready</role>
- <direction>Output</direction>
- <width>12</width>
- <lowerBound>0</lowerBound>
- <vhdlType>STD_LOGIC_VECTOR</vhdlType>
- </port>
- </ports>
- <assignments>
- <assignmentValueMap>
- <entry>
- <key>ui.blockdiagram.direction</key>
- <value>output</value>
- </entry>
- </assignmentValueMap>
- </assignments>
- <parameters>
- <parameterValueMap>
- <entry>
- <key>associatedClock</key>
- </entry>
- <entry>
- <key>associatedReset</key>
- </entry>
- <entry>
- <key>prSafe</key>
- <value>false</value>
- </entry>
- </parameterValueMap>
- </parameters>
- </interface>
- </interfaces>
-</boundaryDefinition>]]></spirit:value>
- </spirit:parameter>
- <spirit:parameter>
- <spirit:name>systemInfos</spirit:name>
- <spirit:displayName>systemInfos</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="systemInfos"><![CDATA[<systemInfosDefinition>
- <connPtSystemInfos/>
-</systemInfosDefinition>]]></spirit:value>
- </spirit:parameter>
- </spirit:parameters>
+</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="hideFromIPCatalog" type="bit">
+ <ipxact:name>hideFromIPCatalog</ipxact:name>
+ <ipxact:displayName>Hide from IP Catalog</ipxact:displayName>
+ <ipxact:value>true</ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="lockedInterfaceDefinition" type="string">
+ <ipxact:name>lockedInterfaceDefinition</ipxact:name>
+ <ipxact:displayName>lockedInterfaceDefinition</ipxact:displayName>
+ <ipxact:value><boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>clock</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clock</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_ready</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_ready</name>
+ <role>rx_ready</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_is_lockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_is_lockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition></ipxact:value>
+ </ipxact:parameter>
+ <ipxact:parameter parameterId="systemInfos" type="string">
+ <ipxact:name>systemInfos</ipxact:name>
+ <ipxact:displayName>systemInfos</ipxact:displayName>
+ <ipxact:value><systemInfosDefinition>
+ <connPtSystemInfos/>
+</systemInfosDefinition></ipxact:value>
+ </ipxact:parameter>
+ </ipxact:parameters>
</altera:altera_system_parameters>
<altera:altera_interface_boundary>
<altera:interface_mapping altera:name="clock" altera:internal="xcvr_reset_control_0.clock" altera:type="clock" altera:dir="end">
@@ -908,5 +970,5 @@
</altera:altera_interface_boundary>
<altera:altera_has_warnings>false</altera:altera_has_warnings>
<altera:altera_has_errors>false</altera:altera_has_errors>
- </spirit:vendorExtensions>
-</spirit:component>
\ No newline at end of file
+ </ipxact:vendorExtensions>
+</ipxact:component>
\ No newline at end of file
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qsys b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qsys
index 2683e874938ea18512b158efecc17542dd5f97b0..3f9072ab734ad6fa36f95bcbaef52b791d934f5a 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qsys
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qsys
@@ -10,6 +10,9 @@
tool="QsysPro" />
<parameter name="bonusData"><![CDATA[bonusData
{
+ element $system
+ {
+ }
element xcvr_reset_control_0
{
datum _sortIndex
@@ -20,7 +23,6 @@
}
}
]]></parameter>
- <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
<parameter name="device" value="10AX115U2F45E1SG" />
<parameter name="deviceFamily" value="Arria 10" />
<parameter name="deviceSpeedGrade" value="1" />
@@ -31,7 +33,6 @@
<parameter name="hdlLanguage" value="VERILOG" />
<parameter name="hideFromIPCatalog" value="false" />
<parameter name="lockedInterfaceDefinition" value="" />
- <parameter name="maxAdditionalLatency" value="1" />
<parameter name="sopcBorderPoints" value="false" />
<parameter name="systemHash" value="0" />
<parameter name="systemInfos"><![CDATA[<systemInfosDefinition>
@@ -337,7 +338,7 @@
</boundary>
<originalModuleInfo>
<className>altera_xcvr_reset_control</className>
- <version>18.0</version>
+ <version>19.1</version>
<displayName>Transceiver PHY Reset Controller Intel FPGA IP</displayName>
</originalModuleInfo>
<systemInfoParameterDescriptors>
@@ -354,6 +355,257 @@
<connPtSystemInfos/>
</systemInfos>
</componentDefinition>]]></parameter>
+ <parameter name="defaultBoundary"><![CDATA[<boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>clock</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clock</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_is_lockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_is_lockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_ready</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_ready</name>
+ <role>rx_ready</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition>]]></parameter>
<parameter name="generationInfoDefinition"><![CDATA[<generationInfoDefinition>
<hdlLibraryName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</hdlLibraryName>
<fileSets>
@@ -378,14 +630,10 @@
</fileSets>
</generationInfoDefinition>]]></parameter>
<parameter name="hlsFile" value="" />
- <parameter name="logicalView">/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip</parameter>
+ <parameter name="logicalView">ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip</parameter>
<parameter name="moduleAssignmentDefinition"><![CDATA[<assignmentDefinition>
<assignmentValueMap/>
</assignmentDefinition>]]></parameter>
<parameter name="svInterfaceDefinition" value="" />
</module>
- <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
- <interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
- <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
- <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.bsf b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.bsf
index 729f5f59f82b8d7ba838a32b8e6e9c99cd178449..e200accf6d5965522c1f841490dad83f41f6d161 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.bsf
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.bsf
@@ -4,9 +4,9 @@ editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
-Copyright (C) 2018 Intel Corporation. All rights reserved.
+Copyright (C) 2019 Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions
-and other software and tools, and its AMPP partner logic
+and other software and tools, and any partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
@@ -16,110 +16,100 @@ the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors. Please
-refer to the applicable agreement for further details.
+refer to the applicable agreement for further details, at
+https://fpgasoftware.intel.com/eula.
*/
(header "symbol" (version "1.1"))
(symbol
- (rect 0 0 416 224)
- (text "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" (rect 54 -1 267 11)(font "Arial" (font_size 10)))
+ (rect 0 0 640 224)
+ (text "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" (rect 166 -1 379 11)(font "Arial" (font_size 10)))
(text "inst" (rect 8 208 20 220)(font "Arial" ))
(port
(pt 0 72)
(input)
- (text "clock" (rect 0 0 20 12)(font "Arial" (font_size 8)))
- (text "clock" (rect 4 61 34 72)(font "Arial" (font_size 8)))
- (line (pt 0 72)(pt 128 72)(line_width 1))
+ (text "clock_clk" (rect 0 0 36 12)(font "Arial" (font_size 8)))
+ (text "clock_clk" (rect 4 61 58 72)(font "Arial" (font_size 8)))
+ (line (pt 0 72)(pt 240 72)(line_width 1))
)
(port
(pt 0 112)
(input)
- (text "reset" (rect 0 0 20 12)(font "Arial" (font_size 8)))
- (text "reset" (rect 4 101 34 112)(font "Arial" (font_size 8)))
- (line (pt 0 112)(pt 128 112)(line_width 1))
+ (text "reset_reset" (rect 0 0 46 12)(font "Arial" (font_size 8)))
+ (text "reset_reset" (rect 4 101 70 112)(font "Arial" (font_size 8)))
+ (line (pt 0 112)(pt 240 112)(line_width 1))
)
(port
(pt 0 152)
(input)
- (text "rx_cal_busy[11..0]" (rect 0 0 73 12)(font "Arial" (font_size 8)))
- (text "rx_cal_busy[11..0]" (rect 4 141 112 152)(font "Arial" (font_size 8)))
- (line (pt 0 152)(pt 128 152)(line_width 3))
+ (text "rx_cal_busy_rx_cal_busy[11..0]" (rect 0 0 129 12)(font "Arial" (font_size 8)))
+ (text "rx_cal_busy_rx_cal_busy[11..0]" (rect 4 141 184 152)(font "Arial" (font_size 8)))
+ (line (pt 0 152)(pt 240 152)(line_width 3))
)
(port
(pt 0 192)
(input)
- (text "rx_is_lockedtodata[11..0]" (rect 0 0 96 12)(font "Arial" (font_size 8)))
- (text "rx_is_lockedtodata[11..0]" (rect 4 181 154 192)(font "Arial" (font_size 8)))
- (line (pt 0 192)(pt 128 192)(line_width 3))
+ (text "rx_is_lockedtodata_rx_is_lockedtodata[11..0]" (rect 0 0 177 12)(font "Arial" (font_size 8)))
+ (text "rx_is_lockedtodata_rx_is_lockedtodata[11..0]" (rect 4 181 268 192)(font "Arial" (font_size 8)))
+ (line (pt 0 192)(pt 240 192)(line_width 3))
)
(port
- (pt 416 72)
+ (pt 640 72)
(output)
- (text "pll_powerdown" (rect 0 0 56 12)(font "Arial" (font_size 8)))
- (text "pll_powerdown" (rect 337 61 415 72)(font "Arial" (font_size 8)))
- (line (pt 416 72)(pt 288 72)(line_width 1))
+ (text "rx_analogreset_rx_analogreset[11..0]" (rect 0 0 146 12)(font "Arial" (font_size 8)))
+ (text "rx_analogreset_rx_analogreset[11..0]" (rect 457 61 673 72)(font "Arial" (font_size 8)))
+ (line (pt 640 72)(pt 400 72)(line_width 3))
)
(port
- (pt 416 112)
+ (pt 640 112)
(output)
- (text "rx_analogreset[11..0]" (rect 0 0 81 12)(font "Arial" (font_size 8)))
- (text "rx_analogreset[11..0]" (rect 314 101 440 112)(font "Arial" (font_size 8)))
- (line (pt 416 112)(pt 288 112)(line_width 3))
+ (text "rx_digitalreset_rx_digitalreset[11..0]" (rect 0 0 136 12)(font "Arial" (font_size 8)))
+ (text "rx_digitalreset_rx_digitalreset[11..0]" (rect 467 101 695 112)(font "Arial" (font_size 8)))
+ (line (pt 640 112)(pt 400 112)(line_width 3))
)
(port
- (pt 416 152)
+ (pt 640 152)
(output)
- (text "rx_digitalreset[11..0]" (rect 0 0 76 12)(font "Arial" (font_size 8)))
- (text "rx_digitalreset[11..0]" (rect 319 141 451 152)(font "Arial" (font_size 8)))
- (line (pt 416 152)(pt 288 152)(line_width 3))
- )
- (port
- (pt 416 192)
- (output)
- (text "rx_ready[11..0]" (rect 0 0 60 12)(font "Arial" (font_size 8)))
- (text "rx_ready[11..0]" (rect 343 181 433 192)(font "Arial" (font_size 8)))
- (line (pt 416 192)(pt 288 192)(line_width 3))
+ (text "rx_ready_rx_ready[11..0]" (rect 0 0 103 12)(font "Arial" (font_size 8)))
+ (text "rx_ready_rx_ready[11..0]" (rect 515 141 659 152)(font "Arial" (font_size 8)))
+ (line (pt 640 152)(pt 400 152)(line_width 3))
)
(drawing
- (text "clock" (rect 100 43 230 99)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "clk" (rect 133 67 284 144)(font "Arial" (color 0 0 0)))
- (text "pll_powerdown" (rect 289 43 656 99)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "pll_powerdown" (rect 224 67 526 144)(font "Arial" (color 0 0 0)))
- (text "reset" (rect 99 83 228 179)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "reset" (rect 133 107 296 224)(font "Arial" (color 0 0 0)))
- (text "rx_analogreset" (rect 289 83 662 179)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "rx_analogreset" (rect 221 107 526 224)(font "Arial" (color 0 0 0)))
- (text "rx_cal_busy" (rect 59 123 184 259)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "rx_cal_busy" (rect 133 147 332 304)(font "Arial" (color 0 0 0)))
- (text "rx_digitalreset" (rect 289 123 668 259)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "rx_digitalreset" (rect 224 147 538 304)(font "Arial" (color 0 0 0)))
- (text "rx_is_lockedtodata" (rect 19 163 146 339)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "rx_is_lockedtodata" (rect 133 187 374 384)(font "Arial" (color 0 0 0)))
- (text "rx_ready" (rect 289 163 626 339)(font "Arial" (color 128 0 0)(font_size 9)))
- (text "rx_ready" (rect 245 187 538 384)(font "Arial" (color 0 0 0)))
- (text " ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 " (rect 183 208 672 426)(font "Arial" ))
- (line (pt 128 32)(pt 288 32)(line_width 1))
- (line (pt 288 32)(pt 288 208)(line_width 1))
- (line (pt 128 208)(pt 288 208)(line_width 1))
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- (line (pt 0 0)(pt 416 0)(line_width 1))
- (line (pt 416 0)(pt 416 224)(line_width 1))
- (line (pt 0 224)(pt 416 224)(line_width 1))
+ (text "clock" (rect 212 43 454 99)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "clk" (rect 245 67 508 144)(font "Arial" (color 0 0 0)))
+ (text "reset" (rect 211 83 452 179)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "reset" (rect 245 107 520 224)(font "Arial" (color 0 0 0)))
+ (text "rx_analogreset" (rect 401 43 886 99)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "rx_analogreset" (rect 333 67 750 144)(font "Arial" (color 0 0 0)))
+ (text "rx_cal_busy" (rect 171 123 408 259)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "rx_cal_busy" (rect 245 147 556 304)(font "Arial" (color 0 0 0)))
+ (text "rx_digitalreset" (rect 401 83 892 179)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "rx_digitalreset" (rect 336 107 762 224)(font "Arial" (color 0 0 0)))
+ (text "rx_is_lockedtodata" (rect 131 163 370 339)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "rx_is_lockedtodata" (rect 245 187 598 384)(font "Arial" (color 0 0 0)))
+ (text "rx_ready" (rect 401 123 850 259)(font "Arial" (color 128 0 0)(font_size 9)))
+ (text "rx_ready" (rect 357 147 762 304)(font "Arial" (color 0 0 0)))
+ (text " ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 " (rect 407 208 1120 426)(font "Arial" ))
+ (line (pt 240 32)(pt 400 32)(line_width 1))
+ (line (pt 400 32)(pt 400 208)(line_width 1))
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+ (line (pt 399 52)(pt 399 76)(line_width 1))
+ (line (pt 398 52)(pt 398 76)(line_width 1))
+ (line (pt 241 132)(pt 241 156)(line_width 1))
+ (line (pt 242 132)(pt 242 156)(line_width 1))
+ (line (pt 399 92)(pt 399 116)(line_width 1))
+ (line (pt 398 92)(pt 398 116)(line_width 1))
+ (line (pt 241 172)(pt 241 196)(line_width 1))
+ (line (pt 242 172)(pt 242 196)(line_width 1))
+ (line (pt 399 132)(pt 399 156)(line_width 1))
+ (line (pt 398 132)(pt 398 156)(line_width 1))
+ (line (pt 0 0)(pt 640 0)(line_width 1))
+ (line (pt 640 0)(pt 640 224)(line_width 1))
+ (line (pt 0 224)(pt 640 224)(line_width 1))
(line (pt 0 0)(pt 0 224)(line_width 1))
)
)
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.cmp b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.cmp
index f242938706b59fc6d8c3212dd95f3bedb60ef11e..7ce6d6800819f89e594e4498519c940f2fe2cf34 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.cmp
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.cmp
@@ -1,13 +1,12 @@
component ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 is
port (
- clock : in std_logic := 'X'; -- clk
- pll_powerdown : out std_logic_vector(0 downto 0); -- pll_powerdown
- reset : in std_logic := 'X'; -- reset
- rx_analogreset : out std_logic_vector(11 downto 0); -- rx_analogreset
- rx_cal_busy : in std_logic_vector(11 downto 0) := (others => 'X'); -- rx_cal_busy
- rx_digitalreset : out std_logic_vector(11 downto 0); -- rx_digitalreset
- rx_is_lockedtodata : in std_logic_vector(11 downto 0) := (others => 'X'); -- rx_is_lockedtodata
- rx_ready : out std_logic_vector(11 downto 0) -- rx_ready
+ clock_clk : in std_logic := 'X'; -- clk
+ reset_reset : in std_logic := 'X'; -- reset
+ rx_analogreset_rx_analogreset : out std_logic_vector(11 downto 0); -- rx_analogreset
+ rx_cal_busy_rx_cal_busy : in std_logic_vector(11 downto 0) := (others => 'X'); -- rx_cal_busy
+ rx_digitalreset_rx_digitalreset : out std_logic_vector(11 downto 0); -- rx_digitalreset
+ rx_is_lockedtodata_rx_is_lockedtodata : in std_logic_vector(11 downto 0) := (others => 'X'); -- rx_is_lockedtodata
+ rx_ready_rx_ready : out std_logic_vector(11 downto 0) -- rx_ready
);
end component ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12;
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.html b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.html
index 84d8932e19dcebbeefd382e522c5f1c6477a3285..74eeec538127fb67fb5f9acf5afb699551811e01 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.html
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.html
@@ -67,7 +67,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
</table>
<table class="blueBar">
<tr>
- <td class="l">2019.11.25.09:39:35</td>
+ <td class="l">2020.11.26.17:15:22</td>
<td class="r">Datasheet</td>
</tr>
</table>
@@ -95,7 +95,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<a name="module_xcvr_reset_control_0"> </a>
<div>
<hr/>
- <h2>xcvr_reset_control_0</h2>altera_xcvr_reset_control v18.0
+ <h2>xcvr_reset_control_0</h2>altera_xcvr_reset_control v19.1
<br/>
<br/>
<br/>
@@ -104,94 +104,6 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<td class="parametersbox">
<h2>Parameters</h2>
<table>
- <tr>
- <td class="parametername">CHANNELS</td>
- <td class="parametervalue">12</td>
- </tr>
- <tr>
- <td class="parametername">PLLS</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">SYS_CLK_IN_MHZ</td>
- <td class="parametervalue">100</td>
- </tr>
- <tr>
- <td class="parametername">SYNCHRONIZE_RESET</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">REDUCED_SIM_TIME</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">gui_split_interfaces</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">TX_PLL_ENABLE</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">T_PLL_POWERDOWN</td>
- <td class="parametervalue">1000</td>
- </tr>
- <tr>
- <td class="parametername">SYNCHRONIZE_PLL_RESET</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">TX_ENABLE</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">TX_PER_CHANNEL</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">gui_tx_auto_reset</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">T_TX_ANALOGRESET</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">T_TX_DIGITALRESET</td>
- <td class="parametervalue">20</td>
- </tr>
- <tr>
- <td class="parametername">T_PLL_LOCK_HYST</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">gui_pll_cal_busy</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">RX_ENABLE</td>
- <td class="parametervalue">1</td>
- </tr>
- <tr>
- <td class="parametername">RX_PER_CHANNEL</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">gui_rx_auto_reset</td>
- <td class="parametervalue">0</td>
- </tr>
- <tr>
- <td class="parametername">T_RX_ANALOGRESET</td>
- <td class="parametervalue">70000</td>
- </tr>
- <tr>
- <td class="parametername">T_RX_DIGITALRESET</td>
- <td class="parametervalue">4000</td>
- </tr>
- <tr>
- <td class="parametername">deviceFamily</td>
- <td class="parametervalue">UNKNOWN</td>
- </tr>
<tr>
<td class="parametername">generateLegacySim</td>
<td class="parametervalue">false</td>
@@ -210,7 +122,7 @@ div.greydiv { vertical-align:top ; text-align:center ; background:#eeeeee ; bord
<table class="blueBar">
<tr>
<td class="l">generation took 0.00 seconds</td>
- <td class="r">rendering took 0.01 seconds</td>
+ <td class="r">rendering took 0.00 seconds</td>
</tr>
</table>
</body>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qgsynthc b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qgsynthc
index a7c42a97ea6ebdc5e51b55a276a9850494cc509f..bb9b88a55408ac940254cc458e281fd35f97ea72 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qgsynthc
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qgsynthc
@@ -3,16 +3,7 @@
<instanceKey xsi:type="xs:string">ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</instanceKey>
<instanceData xsi:type="data">
<parameters></parameters>
- <interconnectAssignments>
- <interconnectAssignment>
- <name>$system.qsys_mm.clockCrossingAdapter</name>
- <value>HANDSHAKE</value>
- </interconnectAssignment>
- <interconnectAssignment>
- <name>$system.qsys_mm.maxAdditionalLatency</name>
- <value>0</value>
- </interconnectAssignment>
- </interconnectAssignments>
+ <interconnectAssignments></interconnectAssignments>
<className>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</className>
<version>1.0</version>
<name>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</name>
@@ -26,144 +17,588 @@
<instanceData xsi:type="data">
<parameters>
<parameter>
- <name>CHANNELS</name>
- <value>12</value>
- </parameter>
- <parameter>
- <name>EN_PLL_CAL_BUSY</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>PLLS</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>REDUCED_SIM_TIME</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>RX_ENABLE</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>RX_PER_CHANNEL</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>SYNCHRONIZE_PLL_RESET</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>SYNCHRONIZE_RESET</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>SYS_CLK_IN_MHZ</name>
- <value>100</value>
- </parameter>
- <parameter>
- <name>TX_ENABLE</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>TX_PER_CHANNEL</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>TX_PLL_ENABLE</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>T_PLL_LOCK_HYST</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>T_PLL_POWERDOWN</name>
- <value>1000</value>
- </parameter>
- <parameter>
- <name>T_RX_ANALOGRESET</name>
- <value>70000</value>
- </parameter>
- <parameter>
- <name>T_RX_DIGITALRESET</name>
- <value>4000</value>
- </parameter>
- <parameter>
- <name>T_TX_ANALOGRESET</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>T_TX_DIGITALRESET</name>
- <value>20</value>
+ <name>componentDefinition</name>
+ <value><componentDefinition>
+ <boundary>
+ <interfaces>
+ <interface>
+ <name>clock</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clock</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_is_lockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_is_lockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_ready</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_ready</name>
+ <role>rx_ready</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+ </boundary>
+ <originalModuleInfo>
+ <className>altera_xcvr_reset_control</className>
+ <version>19.1</version>
+ <displayName>Transceiver PHY Reset Controller Intel FPGA IP</displayName>
+ </originalModuleInfo>
+ <systemInfoParameterDescriptors>
+ <descriptors>
+ <descriptor>
+ <parameterDefaultValue>Stratix V</parameterDefaultValue>
+ <parameterName>device_family</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfotype>DEVICE_FAMILY</systemInfotype>
+ </descriptor>
+ </descriptors>
+ </systemInfoParameterDescriptors>
+ <systemInfos>
+ <connPtSystemInfos/>
+ </systemInfos>
+</componentDefinition></value>
+ </parameter>
+ <parameter>
+ <name>defaultBoundary</name>
+ <value><boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>clock</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clock</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_is_lockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_is_lockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_ready</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_ready</name>
+ <role>rx_ready</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition></value>
</parameter>
<parameter>
<name>device_family</name>
<value>Arria 10</value>
</parameter>
<parameter>
- <name>gui_pll_cal_busy</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>gui_rx_auto_reset</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>gui_split_interfaces</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>gui_tx_auto_reset</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>l_pll_select_base</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>l_pll_select_split</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>l_pll_select_width</name>
- <value>1</value>
- </parameter>
- <parameter>
- <name>l_rx_manual_term</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>l_terminate_pll</name>
- <value>0</value>
- </parameter>
- <parameter>
- <name>l_terminate_rx</name>
- <value>0</value>
+ <name>generationInfoDefinition</name>
+ <value><generationInfoDefinition>
+ <hdlLibraryName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</hdlLibraryName>
+ <fileSets>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetFixedName>
+ <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetFixedName>
+ <fileSetKind>SIM_VERILOG</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetFixedName>
+ <fileSetKind>SIM_VHDL</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ </fileSets>
+</generationInfoDefinition></value>
</parameter>
<parameter>
- <name>l_terminate_rx_manual</name>
- <value>1</value>
+ <name>hlsFile</name>
+ <value></value>
</parameter>
<parameter>
- <name>l_terminate_tx</name>
- <value>1</value>
+ <name>logicalView</name>
+ <value>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip</value>
</parameter>
<parameter>
- <name>l_terminate_tx_manual</name>
- <value>1</value>
+ <name>moduleAssignmentDefinition</name>
+ <value><assignmentDefinition>
+ <assignmentValueMap/>
+</assignmentDefinition></value>
</parameter>
<parameter>
- <name>l_tx_manual_term</name>
- <value>0</value>
+ <name>svInterfaceDefinition</name>
+ <value></value>
</parameter>
</parameters>
<interconnectAssignments></interconnectAssignments>
- <className>altera_xcvr_reset_control</className>
- <version>18.0</version>
+ <className>altera_generic_component</className>
+ <version>1.0</version>
<name>xcvr_reset_control_0</name>
- <uniqueName>altera_xcvr_reset_control</uniqueName>
- <fixedName>altera_xcvr_reset_control</fixedName>
+ <uniqueName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</uniqueName>
+ <fixedName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fixedName>
<nonce>0</nonce>
<incidentConnections></incidentConnections>
<path>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.xcvr_reset_control_0</path>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qip b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qip
index 0b5704feae3f8834aae6c04fd6bbc4ec6fa9f689..4c030192d6f5173c091ee4a82072976ed404e7e4 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qip
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qip
@@ -1,61 +1,35 @@
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_TOOL_NAME "QsysPrimePro"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_TOOL_VERSION "18.0"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_TOOL_VERSION "19.4"
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_TOOL_ENV "QsysPrimePro"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_TOOL_VENDOR_NAME "Intel Corporation"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_TOP_LEVEL_COMPONENT_NAME "altera_xcvr_reset_control"
set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name SOPCINFO_FILE [file join $::quartus(qip_path) "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.sopcinfo"]
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name SLD_INFO "QSYS_NAME ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 HAS_SOPCINFO 1 GENERATION_ID 0"
set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name MISC_FILE [file join $::quartus(qip_path) "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.cmp"]
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_TARGETED_DEVICE_FAMILY "Arria 10"
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_GENERATED_DEVICE_FAMILY "{Arria 10}"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_QSYS_MODE "STANDALONE"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_QSYS_MODE "SYSTEM"
set_global_assignment -name SYNTHESIS_ONLY_QIP ON
-set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name MISC_FILE [file join $::quartus(qip_path) "../ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip"]
+set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name MISC_FILE [file join $::quartus(qip_path) "../ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qsys"]
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_NAME "YWx0ZXJhX3hjdnJfcmVzZXRfY29udHJvbA=="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_DISPLAY_NAME "VHJhbnNjZWl2ZXIgUEhZIFJlc2V0IENvbnRyb2xsZXIgSW50ZWwgRlBHQSBJUA=="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_INTERNAL "Off"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_VERSION "MTguMA=="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "ZGV2aWNlX2ZhbWlseQ==::QXJyaWEgMTA=::ZGV2aWNlX2ZhbWlseQ=="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "Q0hBTk5FTFM=::MTI=::TnVtYmVyIG9mIHRyYW5zY2VpdmVyIGNoYW5uZWxz"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "UExMUw==::MQ==::TnVtYmVyIG9mIFRYIFBMTHM="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "U1lTX0NMS19JTl9NSFo=::MTAw::SW5wdXQgY2xvY2sgZnJlcXVlbmN5"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "U1lOQ0hST05JWkVfUkVTRVQ=::MQ==::U3luY2hyb25pemUgcmVzZXQgaW5wdXQ="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "UkVEVUNFRF9TSU1fVElNRQ==::MQ==::VXNlIGZhc3QgcmVzZXQgZm9yIHNpbXVsYXRpb24="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "Z3VpX3NwbGl0X2ludGVyZmFjZXM=::MA==::U2VwYXJhdGUgaW50ZXJmYWNlIHBlciBjaGFubmVsL1BMTA=="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "VFhfUExMX0VOQUJMRQ==::MQ==::RW5hYmxlIFRYIFBMTCByZXNldCBjb250cm9s"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "VF9QTExfUE9XRVJET1dO::MTAwMA==::cGxsX3Bvd2VyZG93biBkdXJhdGlvbg=="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "U1lOQ0hST05JWkVfUExMX1JFU0VU::MA==::U3luY2hyb25pemUgcmVzZXQgaW5wdXQgZm9yIFBMTCBwb3dlcmRvd24="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "VFhfRU5BQkxF::MA==::RW5hYmxlIFRYIGNoYW5uZWwgcmVzZXQgY29udHJvbA=="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "UlhfRU5BQkxF::MQ==::RW5hYmxlIFJYIGNoYW5uZWwgcmVzZXQgY29udHJvbA=="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "UlhfUEVSX0NIQU5ORUw=::MA==::VXNlIHNlcGFyYXRlIFJYIHJlc2V0IHBlciBjaGFubmVs"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "Z3VpX3J4X2F1dG9fcmVzZXQ=::MA==::UlggZGlnaXRhbCByZXNldCBtb2Rl"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "VF9SWF9BTkFMT0dSRVNFVA==::NzAwMDA=::cnhfYW5hbG9ncmVzZXQgZHVyYXRpb24="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "VF9SWF9ESUdJVEFMUkVTRVQ=::NDAwMA==::cnhfZGlnaXRhbHJlc2V0IGR1cmF0aW9u"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "bF90ZXJtaW5hdGVfcGxs::MA==::bF90ZXJtaW5hdGVfcGxs"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "bF90ZXJtaW5hdGVfdHg=::MQ==::bF90ZXJtaW5hdGVfdHg="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "bF90ZXJtaW5hdGVfcng=::MA==::bF90ZXJtaW5hdGVfcng="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "bF90ZXJtaW5hdGVfdHhfbWFudWFs::MQ==::bF90ZXJtaW5hdGVfdHhfbWFudWFs"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "bF90ZXJtaW5hdGVfcnhfbWFudWFs::MQ==::bF90ZXJtaW5hdGVfcnhfbWFudWFs"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "bF90eF9tYW51YWxfdGVybQ==::MA==::bF90eF9tYW51YWxfdGVybQ=="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "bF9yeF9tYW51YWxfdGVybQ==::MA==::bF9yeF9tYW51YWxfdGVybQ=="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "bF9wbGxfc2VsZWN0X3NwbGl0::MA==::bF9wbGxfc2VsZWN0X3NwbGl0"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "bF9wbGxfc2VsZWN0X3dpZHRo::MQ==::bF9wbGxfc2VsZWN0X3dpZHRo"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_PARAMETER "bF9wbGxfc2VsZWN0X2Jhc2U=::MQ==::bF9wbGxfc2VsZWN0X2Jhc2U="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_GROUP "SW50ZXJmYWNlIFByb3RvY29scy9UcmFuc2NlaXZlciBQSFk="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvaGIvYXJyaWEtMTAvdWdfYXJyaWExMF94Y3ZyX3BoeS5wZGY="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL25pazEzOTg3MDcyMzA0NzIvbmlrMTM5ODcwNjk1MTM2OA=="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly9kb2N1bWVudGF0aW9uLmFsdGVyYS5jb20vIy9saW5rL2hjbzE0MjE2OTgwNDIwODcvaGNvMTQyMTY5NzY4OTMwMA=="
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvaGIvY3ljbG9uZS0xMC91Z19jeWNsb25lMTBfeGN2cl9waHkucGRm"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cHM6Ly93d3cuYWx0ZXJhLmNvbS9kb2N1bWVudGF0aW9uL2hraTE0ODY1MDc2MDA2MzYuaHRtbCN4Z2oxNDg2NTA2OTE4NzA2"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_COMPONENT_DOCUMENTATION_LINK "aHR0cDovL3d3dy5hbHRlcmEuY29tL2xpdGVyYXR1cmUvdWcveGN2cl91c2VyX2d1aWRlLnBkZg=="
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2plc2QyMDRiX3J4X3hjdnJfcmVzZXRfY29udHJvbF8xMg=="
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_DISPLAY_NAME "c3lzdGVt"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_DISPLAY_NAME "R2VuZXJpYyBDb21wb25lbnQ="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_REPORT_HIERARCHY "Off"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_INTERNAL "Off"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_AUTHOR "QWx0ZXJhIENvcnBvcmF0aW9u"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_VERSION "MS4w"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_DESCRIPTION "QSBkeW5hbWljIGNvbXBvbmVudCB3aGVyZSB5b3UgY2FuIGFkZCwgbW9kaWZ5IG9yIHJlbW92ZSBpbnRlcmZhY2VzIGFuZCBwb3J0cyBvbiB0aGUgZmx5"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_PARAMETER "Y29tcG9uZW50RGVmaW5pdGlvbg==::<componentDefinition>
    <boundary>
        <interfaces>
            <interface>
                <name>clock</name>
                <type>clock</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>clock</name>
                        <role>clk</role>
                        <direction>Input</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>clockRate</key>
                            <value>0</value>
                        </entry>
                        <entry>
                            <key>externallyDriven</key>
                            <value>false</value>
                        </entry>
                        <entry>
                            <key>ptfSchematicName</key>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>reset</name>
                <type>reset</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>reset</name>
                        <role>reset</role>
                        <direction>Input</direction>
                        <width>1</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap/>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                        </entry>
                        <entry>
                            <key>synchronousEdges</key>
                            <value>NONE</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>rx_analogreset</name>
                <type>conduit</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>rx_analogreset</name>
                        <role>rx_analogreset</role>
                        <direction>Output</direction>
                        <width>12</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap>
                        <entry>
                            <key>ui.blockdiagram.direction</key>
                            <value>output</value>
                        </entry>
                    </assignmentValueMap>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                        </entry>
                        <entry>
                            <key>associatedReset</key>
                        </entry>
                        <entry>
                            <key>prSafe</key>
                            <value>false</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>rx_cal_busy</name>
                <type>conduit</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>rx_cal_busy</name>
                        <role>rx_cal_busy</role>
                        <direction>Input</direction>
                        <width>12</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap>
                        <entry>
                            <key>ui.blockdiagram.direction</key>
                            <value>input</value>
                        </entry>
                    </assignmentValueMap>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                        </entry>
                        <entry>
                            <key>associatedReset</key>
                        </entry>
                        <entry>
                            <key>prSafe</key>
                            <value>false</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>rx_digitalreset</name>
                <type>conduit</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>rx_digitalreset</name>
                        <role>rx_digitalreset</role>
                        <direction>Output</direction>
                        <width>12</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap>
                        <entry>
                            <key>ui.blockdiagram.direction</key>
                            <value>output</value>
                        </entry>
                    </assignmentValueMap>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                        </entry>
                        <entry>
                            <key>associatedReset</key>
                        </entry>
                        <entry>
                            <key>prSafe</key>
                            <value>false</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>rx_is_lockedtodata</name>
                <type>conduit</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>rx_is_lockedtodata</name>
                        <role>rx_is_lockedtodata</role>
                        <direction>Input</direction>
                        <width>12</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap>
                        <entry>
                            <key>ui.blockdiagram.direction</key>
                            <value>input</value>
                        </entry>
                    </assignmentValueMap>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                        </entry>
                        <entry>
                            <key>associatedReset</key>
                        </entry>
                        <entry>
                            <key>prSafe</key>
                            <value>false</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
            <interface>
                <name>rx_ready</name>
                <type>conduit</type>
                <isStart>false</isStart>
                <ports>
                    <port>
                        <name>rx_ready</name>
                        <role>rx_ready</role>
                        <direction>Output</direction>
                        <width>12</width>
                        <lowerBound>0</lowerBound>
                        <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                    </port>
                </ports>
                <assignments>
                    <assignmentValueMap>
                        <entry>
                            <key>ui.blockdiagram.direction</key>
                            <value>output</value>
                        </entry>
                    </assignmentValueMap>
                </assignments>
                <parameters>
                    <parameterValueMap>
                        <entry>
                            <key>associatedClock</key>
                        </entry>
                        <entry>
                            <key>associatedReset</key>
                        </entry>
                        <entry>
                            <key>prSafe</key>
                            <value>false</value>
                        </entry>
                    </parameterValueMap>
                </parameters>
            </interface>
        </interfaces>
    </boundary>
    <originalModuleInfo>
        <className>altera_xcvr_reset_control</className>
        <version>19.1</version>
        <displayName>Transceiver PHY Reset Controller Intel FPGA IP</displayName>
    </originalModuleInfo>
    <systemInfoParameterDescriptors>
        <descriptors>
            <descriptor>
                <parameterDefaultValue>Stratix V</parameterDefaultValue>
                <parameterName>device_family</parameterName>
                <parameterType>java.lang.String</parameterType>
                <systemInfotype>DEVICE_FAMILY</systemInfotype>
            </descriptor>
        </descriptors>
    </systemInfoParameterDescriptors>
    <systemInfos>
        <connPtSystemInfos/>
    </systemInfos>
</componentDefinition>::Q29tcG9uZW50IGRlZmluaXRpb24="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_PARAMETER "Z2VuZXJhdGlvbkluZm9EZWZpbml0aW9u::PGdlbmVyYXRpb25JbmZvRGVmaW5pdGlvbj4KICAgIDxoZGxMaWJyYXJ5TmFtZT5pcF9hcnJpYTEwX2Uxc2dfamVzZDIwNGJfcnhfeGN2cl9yZXNldF9jb250cm9sXzEyPC9oZGxMaWJyYXJ5TmFtZT4KICAgIDxmaWxlU2V0cz4KICAgICAgICA8ZmlsZVNldD4KICAgICAgICAgICAgPGZpbGVTZXROYW1lPmlwX2FycmlhMTBfZTFzZ19qZXNkMjA0Yl9yeF94Y3ZyX3Jlc2V0X2NvbnRyb2xfMTI8L2ZpbGVTZXROYW1lPgogICAgICAgICAgICA8ZmlsZVNldEZpeGVkTmFtZT5pcF9hcnJpYTEwX2Uxc2dfamVzZDIwNGJfcnhfeGN2cl9yZXNldF9jb250cm9sXzEyPC9maWxlU2V0Rml4ZWROYW1lPgogICAgICAgICAgICA8ZmlsZVNldEtpbmQ+UVVBUlRVU19TWU5USDwvZmlsZVNldEtpbmQ+CiAgICAgICAgICAgIDxmaWxlU2V0RmlsZXMvPgogICAgICAgIDwvZmlsZVNldD4KICAgICAgICA8ZmlsZVNldD4KICAgICAgICAgICAgPGZpbGVTZXROYW1lPmlwX2FycmlhMTBfZTFzZ19qZXNkMjA0Yl9yeF94Y3ZyX3Jlc2V0X2NvbnRyb2xfMTI8L2ZpbGVTZXROYW1lPgogICAgICAgICAgICA8ZmlsZVNldEZpeGVkTmFtZT5pcF9hcnJpYTEwX2Uxc2dfamVzZDIwNGJfcnhfeGN2cl9yZXNldF9jb250cm9sXzEyPC9maWxlU2V0Rml4ZWROYW1lPgogICAgICAgICAgICA8ZmlsZVNldEtpbmQ+U0lNX1ZFUklMT0c8L2ZpbGVTZXRLaW5kPgogICAgICAgICAgICA8ZmlsZVNldEZpbGVzLz4KICAgICAgICA8L2ZpbGVTZXQ+CiAgICAgICAgPGZpbGVTZXQ+CiAgICAgICAgICAgIDxmaWxlU2V0TmFtZT5pcF9hcnJpYTEwX2Uxc2dfamVzZDIwNGJfcnhfeGN2cl9yZXNldF9jb250cm9sXzEyPC9maWxlU2V0TmFtZT4KICAgICAgICAgICAgPGZpbGVTZXRGaXhlZE5hbWU+aXBfYXJyaWExMF9lMXNnX2plc2QyMDRiX3J4X3hjdnJfcmVzZXRfY29udHJvbF8xMjwvZmlsZVNldEZpeGVkTmFtZT4KICAgICAgICAgICAgPGZpbGVTZXRLaW5kPlNJTV9WSERMPC9maWxlU2V0S2luZD4KICAgICAgICAgICAgPGZpbGVTZXRGaWxlcy8+CiAgICAgICAgPC9maWxlU2V0PgogICAgPC9maWxlU2V0cz4KPC9nZW5lcmF0aW9uSW5mb0RlZmluaXRpb24+::R2VuZXJhdGlvbiBCZWhhdmlvcg=="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_PARAMETER "bG9naWNhbFZpZXc=::aXBfYXJyaWExMF9lMXNnX2plc2QyMDRiX3J4X3hjdnJfcmVzZXRfY29udHJvbF8xMi5pcA==::TG9naWNhbCB2aWV3"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_PARAMETER "ZGVmYXVsdEJvdW5kYXJ5::<boundaryDefinition>
    <interfaces>
        <interface>
            <name>clock</name>
            <type>clock</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>clock</name>
                    <role>clk</role>
                    <direction>Input</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>clockRate</key>
                        <value>0</value>
                    </entry>
                    <entry>
                        <key>externallyDriven</key>
                        <value>false</value>
                    </entry>
                    <entry>
                        <key>ptfSchematicName</key>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>reset</name>
            <type>reset</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>reset</name>
                    <role>reset</role>
                    <direction>Input</direction>
                    <width>1</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap/>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                    </entry>
                    <entry>
                        <key>synchronousEdges</key>
                        <value>NONE</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>rx_analogreset</name>
            <type>conduit</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>rx_analogreset</name>
                    <role>rx_analogreset</role>
                    <direction>Output</direction>
                    <width>12</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap>
                    <entry>
                        <key>ui.blockdiagram.direction</key>
                        <value>output</value>
                    </entry>
                </assignmentValueMap>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                    </entry>
                    <entry>
                        <key>associatedReset</key>
                    </entry>
                    <entry>
                        <key>prSafe</key>
                        <value>false</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>rx_cal_busy</name>
            <type>conduit</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>rx_cal_busy</name>
                    <role>rx_cal_busy</role>
                    <direction>Input</direction>
                    <width>12</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap>
                    <entry>
                        <key>ui.blockdiagram.direction</key>
                        <value>input</value>
                    </entry>
                </assignmentValueMap>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                    </entry>
                    <entry>
                        <key>associatedReset</key>
                    </entry>
                    <entry>
                        <key>prSafe</key>
                        <value>false</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>rx_digitalreset</name>
            <type>conduit</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>rx_digitalreset</name>
                    <role>rx_digitalreset</role>
                    <direction>Output</direction>
                    <width>12</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap>
                    <entry>
                        <key>ui.blockdiagram.direction</key>
                        <value>output</value>
                    </entry>
                </assignmentValueMap>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                    </entry>
                    <entry>
                        <key>associatedReset</key>
                    </entry>
                    <entry>
                        <key>prSafe</key>
                        <value>false</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>rx_is_lockedtodata</name>
            <type>conduit</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>rx_is_lockedtodata</name>
                    <role>rx_is_lockedtodata</role>
                    <direction>Input</direction>
                    <width>12</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap>
                    <entry>
                        <key>ui.blockdiagram.direction</key>
                        <value>input</value>
                    </entry>
                </assignmentValueMap>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                    </entry>
                    <entry>
                        <key>associatedReset</key>
                    </entry>
                    <entry>
                        <key>prSafe</key>
                        <value>false</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
        <interface>
            <name>rx_ready</name>
            <type>conduit</type>
            <isStart>false</isStart>
            <ports>
                <port>
                    <name>rx_ready</name>
                    <role>rx_ready</role>
                    <direction>Output</direction>
                    <width>12</width>
                    <lowerBound>0</lowerBound>
                    <vhdlType>STD_LOGIC_VECTOR</vhdlType>
                </port>
            </ports>
            <assignments>
                <assignmentValueMap>
                    <entry>
                        <key>ui.blockdiagram.direction</key>
                        <value>output</value>
                    </entry>
                </assignmentValueMap>
            </assignments>
            <parameters>
                <parameterValueMap>
                    <entry>
                        <key>associatedClock</key>
                    </entry>
                    <entry>
                        <key>associatedReset</key>
                    </entry>
                    <entry>
                        <key>prSafe</key>
                        <value>false</value>
                    </entry>
                </parameterValueMap>
            </parameters>
        </interface>
    </interfaces>
</boundaryDefinition>::RGVmYXVsdCBib3VuZGFyeQ=="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_PARAMETER "bW9kdWxlQXNzaWdubWVudERlZmluaXRpb24=::PGFzc2lnbm1lbnREZWZpbml0aW9uPgogICAgPGFzc2lnbm1lbnRWYWx1ZU1hcC8+CjwvYXNzaWdubWVudERlZmluaXRpb24+::TW9kdWxlIEFzc2lnbm1lbnRz"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_PARAMETER "ZGV2aWNlX2ZhbWlseQ==::QXJyaWEgMTA=::ZGV2aWNlX2ZhbWlseQ=="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::QXJyaWEgMTA=::QXV0byBERVZJQ0VfRkFNSUxZ"
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0U=::MTBBWDExNVUyRjQ1RTFTRw==::QXV0byBERVZJQ0U="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_GROUP "R2VuZXJpYyBDb21wb25lbnQ="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_NAME "aXBfYXJyaWExMF9lMXNnX2plc2QyMDRiX3J4X3hjdnJfcmVzZXRfY29udHJvbF8xMg=="
+set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_DISPLAY_NAME "aXBfYXJyaWExMF9lMXNnX2plc2QyMDRiX3J4X3hjdnJfcmVzZXRfY29udHJvbF8xMg=="
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_REPORT_HIERARCHY "On"
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_INTERNAL "Off"
-set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_AUTHOR "SW50ZWwgQ29ycG9yYXRpb24="
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_VERSION "MS4w"
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_PARAMETER "QVVUT19HRU5FUkFUSU9OX0lE::MA==::QXV0byBHRU5FUkFUSU9OX0lE"
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_PARAMETER "QVVUT19ERVZJQ0VfRkFNSUxZ::QXJyaWEgMTA=::QXV0byBERVZJQ0VfRkFNSUxZ"
@@ -67,15 +41,5 @@ set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12
set_global_assignment -entity "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name IP_COMPONENT_GROUP "U3lzdGVt"
-set_global_assignment -library "altera_xcvr_reset_control_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_xcvr_reset_control_180/synth/altera_xcvr_functions.sv"]
-set_global_assignment -library "altera_xcvr_reset_control_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_xcvr_reset_control_180/synth/alt_xcvr_resync.sv"]
-set_global_assignment -library "altera_xcvr_reset_control_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_xcvr_reset_control_180/synth/altera_xcvr_reset_control.sv"]
-set_global_assignment -library "altera_xcvr_reset_control_180" -name SYSTEMVERILOG_FILE [file join $::quartus(qip_path) "altera_xcvr_reset_control_180/synth/alt_xcvr_reset_counter.sv"]
-set_global_assignment -library "altera_xcvr_reset_control_180" -name SOURCE_FILE [file join $::quartus(qip_path) "altera_xcvr_reset_control_180/synth/plain_files.txt"]
set_global_assignment -library "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" -name VHDL_FILE [file join $::quartus(qip_path) "synth/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.vhd"]
-
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_TOOL_NAME "altera_xcvr_reset_control"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_TOOL_VERSION "18.0"
-set_global_assignment -entity "altera_xcvr_reset_control" -library "altera_xcvr_reset_control_180" -name IP_TOOL_ENV "QsysPrimePro"
-
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.sopcinfo b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.sopcinfo
index f2c98a426e51d14cea8cef9a7f93654bdd7dfa53..c53a9fbcd9616bda2e5c19e27a058766f79f8e02 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.sopcinfo
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.sopcinfo
@@ -4,8 +4,8 @@
kind="ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12"
version="1.0"
fabric="QSYS">
- <!-- Format version 18.0 219 (Future versions may contain additional information.) -->
- <!-- 2019.11.25.09:39:35 -->
+ <!-- Format version 19.4 64 (Future versions may contain additional information.) -->
+ <!-- 2020.11.26.17:15:22 -->
<!-- A collection of modules and connections -->
<parameter name="AUTO_GENERATION_ID">
<type>java.lang.Integer</type>
@@ -102,282 +102,648 @@
<module
name="xcvr_reset_control_0"
kind="altera_xcvr_reset_control"
- version="18.0"
- path="xcvr_reset_control_0">
+ version="19.1"
+ entity="ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12"
+ library="ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12"
+ path="xcvr_reset_control_0"
+ hpath="xcvr_reset_control_0">
<!-- Describes a single module. Module parameters are
the requested settings for a module instance. -->
- <parameter name="device_family">
- <type>java.lang.String</type>
- <value>ARRIA10</value>
+ <parameter name="componentDefinition">
+ <type>com.altera.qsys.blackboxmodule.definitions.ComponentDefinition</type>
+ <value><![CDATA[<componentDefinition>
+ <boundary>
+ <interfaces>
+ <interface>
+ <name>clock</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clock</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_is_lockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_is_lockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_ready</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_ready</name>
+ <role>rx_ready</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+ </boundary>
+ <originalModuleInfo>
+ <className>altera_xcvr_reset_control</className>
+ <version>19.1</version>
+ <displayName>Transceiver PHY Reset Controller Intel FPGA IP</displayName>
+ </originalModuleInfo>
+ <systemInfoParameterDescriptors>
+ <descriptors>
+ <descriptor>
+ <parameterDefaultValue>Stratix V</parameterDefaultValue>
+ <parameterName>device_family</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfotype>DEVICE_FAMILY</systemInfotype>
+ </descriptor>
+ </descriptors>
+ </systemInfoParameterDescriptors>
+ <systemInfos>
+ <connPtSystemInfos/>
+ </systemInfos>
+</componentDefinition>]]></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
- <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
- </parameter>
- <parameter name="CHANNELS">
- <type>int</type>
- <value>12</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="PLLS">
- <type>int</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
</parameter>
- <parameter name="SYS_CLK_IN_MHZ">
- <type>int</type>
- <value>100</value>
+ <parameter name="generationInfoDefinition">
+ <type>com.altera.qsys.blackboxmodule.definitions.GenerationInfoDefinition</type>
+ <value><![CDATA[<generationInfoDefinition>
+ <hdlLibraryName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</hdlLibraryName>
+ <fileSets>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetFixedName>
+ <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetFixedName>
+ <fileSetKind>SIM_VERILOG</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetFixedName>
+ <fileSetKind>SIM_VHDL</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ </fileSets>
+</generationInfoDefinition>]]></value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="SYNCHRONIZE_RESET">
- <type>int</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="REDUCED_SIM_TIME">
- <type>int</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_split_interfaces">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="TX_PLL_ENABLE">
- <type>int</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="T_PLL_POWERDOWN">
- <type>int</type>
- <value>1000</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="SYNCHRONIZE_PLL_RESET">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="TX_ENABLE">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="TX_PER_CHANNEL">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_tx_auto_reset">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="T_TX_ANALOGRESET">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="T_TX_DIGITALRESET">
- <type>int</type>
- <value>20</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="T_PLL_LOCK_HYST">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_pll_cal_busy">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>false</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="EN_PLL_CAL_BUSY">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>false</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="RX_ENABLE">
- <type>int</type>
- <value>1</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="RX_PER_CHANNEL">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="gui_rx_auto_reset">
- <type>int</type>
- <value>0</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="T_RX_ANALOGRESET">
- <type>int</type>
- <value>70000</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="T_RX_DIGITALRESET">
- <type>int</type>
- <value>4000</value>
+ <parameter name="hlsFile">
+ <type>java.lang.String</type>
+ <value></value>
<derived>false</derived>
<enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="l_terminate_pll">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="l_terminate_tx">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="l_terminate_rx">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="l_terminate_tx_manual">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
+ <parameter name="logicalView">
+ <type>java.lang.String</type>
+ <value>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip</value>
+ <derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="l_terminate_rx_manual">
- <type>int</type>
- <value>1</value>
- <derived>true</derived>
+ <parameter name="defaultBoundary">
+ <type>com.altera.sopcmodel.definition.BoundaryDefinition</type>
+ <value><![CDATA[<boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>clock</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clock</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_is_lockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_is_lockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_ready</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_ready</name>
+ <role>rx_ready</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition>]]></value>
+ <derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="l_tx_manual_term">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
+ <parameter name="moduleAssignmentDefinition">
+ <type>com.altera.sopcmodel.definition.AssignmentDefinition</type>
+ <value><![CDATA[<assignmentDefinition>
+ <assignmentValueMap/>
+</assignmentDefinition>]]></value>
+ <derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="l_rx_manual_term">
- <type>int</type>
- <value>0</value>
- <derived>true</derived>
+ <parameter name="svInterfaceDefinition">
+ <type>com.altera.qsys.blackboxmodule.definitions.ModuleSvInterfaceDefinition</type>
+ <value></value>
+ <derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
- <parameter name="l_pll_select_split">
- <type>int</type>
- <value>0</value>
+ <parameter name="device_family">
+ <type>java.lang.String</type>
+ <value>ARRIA10</value>
<derived>true</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
+ <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
</parameter>
- <parameter name="l_pll_select_width">
- <type>int</type>
- <value>1</value>
+ <parameter name="AUTO_DEVICE_FAMILY">
+ <type>java.lang.String</type>
+ <value>ARRIA10</value>
<derived>true</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
+ <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
</parameter>
- <parameter name="l_pll_select_base">
- <type>int</type>
- <value>1</value>
+ <parameter name="AUTO_DEVICE">
+ <type>java.lang.String</type>
+ <value>10AX115U2F45E1SG</value>
<derived>true</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
+ <sysinfo_type>DEVICE</sysinfo_type>
</parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
- <value>UNKNOWN</value>
- <derived>false</derived>
+ <value>Arria 10</value>
+ <derived>true</derived>
<enabled>true</enabled>
- <visible>true</visible>
+ <visible>false</visible>
<valid>true</valid>
+ <sysinfo_type>DEVICE_FAMILY</sysinfo_type>
</parameter>
<parameter name="generateLegacySim">
<type>boolean</type>
@@ -387,7 +753,7 @@ the requested settings for a module instance. -->
<visible>true</visible>
<valid>true</valid>
</parameter>
- <interface name="clock" kind="clock_sink" version="18.0">
+ <interface name="clock" kind="clock_sink" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -432,7 +798,7 @@ parameters are a RESULT of the module parameters. -->
<role>clk</role>
</port>
</interface>
- <interface name="reset" kind="reset_sink" version="18.0">
+ <interface name="reset" kind="reset_sink" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -477,64 +843,7 @@ parameters are a RESULT of the module parameters. -->
<role>reset</role>
</port>
</interface>
- <interface name="pll_powerdown" kind="conduit_end" version="18.0">
- <!-- The connection points exposed by a module instance for the
-particular module parameters. Connection points and their
-parameters are a RESULT of the module parameters. -->
- <assignment>
- <name>ui.blockdiagram.direction</name>
- <value>output</value>
- </assignment>
- <parameter name="associatedClock">
- <type>java.lang.String</type>
- <value></value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="associatedReset">
- <type>java.lang.String</type>
- <value></value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="prSafe">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>false</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="deviceFamily">
- <type>java.lang.String</type>
- <value>UNKNOWN</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <parameter name="generateLegacySim">
- <type>boolean</type>
- <value>false</value>
- <derived>false</derived>
- <enabled>true</enabled>
- <visible>true</visible>
- <valid>true</valid>
- </parameter>
- <type>conduit</type>
- <isStart>false</isStart>
- <port>
- <name>pll_powerdown</name>
- <direction>Output</direction>
- <width>1</width>
- <role>pll_powerdown</role>
- </port>
- </interface>
- <interface name="rx_analogreset" kind="conduit_end" version="18.0">
+ <interface name="rx_analogreset" kind="conduit_end" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -591,13 +900,13 @@ parameters are a RESULT of the module parameters. -->
<role>rx_analogreset</role>
</port>
</interface>
- <interface name="rx_digitalreset" kind="conduit_end" version="18.0">
+ <interface name="rx_cal_busy" kind="conduit_end" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
<assignment>
<name>ui.blockdiagram.direction</name>
- <value>output</value>
+ <value>input</value>
</assignment>
<parameter name="associatedClock">
<type>java.lang.String</type>
@@ -642,13 +951,13 @@ parameters are a RESULT of the module parameters. -->
<type>conduit</type>
<isStart>false</isStart>
<port>
- <name>rx_digitalreset</name>
- <direction>Output</direction>
+ <name>rx_cal_busy</name>
+ <direction>Input</direction>
<width>12</width>
- <role>rx_digitalreset</role>
+ <role>rx_cal_busy</role>
</port>
</interface>
- <interface name="rx_ready" kind="conduit_end" version="18.0">
+ <interface name="rx_digitalreset" kind="conduit_end" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -699,13 +1008,13 @@ parameters are a RESULT of the module parameters. -->
<type>conduit</type>
<isStart>false</isStart>
<port>
- <name>rx_ready</name>
+ <name>rx_digitalreset</name>
<direction>Output</direction>
<width>12</width>
- <role>rx_ready</role>
+ <role>rx_digitalreset</role>
</port>
</interface>
- <interface name="rx_is_lockedtodata" kind="conduit_end" version="18.0">
+ <interface name="rx_is_lockedtodata" kind="conduit_end" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
@@ -762,13 +1071,13 @@ parameters are a RESULT of the module parameters. -->
<role>rx_is_lockedtodata</role>
</port>
</interface>
- <interface name="rx_cal_busy" kind="conduit_end" version="18.0">
+ <interface name="rx_ready" kind="conduit_end" version="19.4">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
<assignment>
<name>ui.blockdiagram.direction</name>
- <value>input</value>
+ <value>output</value>
</assignment>
<parameter name="associatedClock">
<type>java.lang.String</type>
@@ -813,20 +1122,20 @@ parameters are a RESULT of the module parameters. -->
<type>conduit</type>
<isStart>false</isStart>
<port>
- <name>rx_cal_busy</name>
- <direction>Input</direction>
+ <name>rx_ready</name>
+ <direction>Output</direction>
<width>12</width>
- <role>rx_cal_busy</role>
+ <role>rx_ready</role>
</port>
</interface>
</module>
<plugin>
<instanceCount>1</instanceCount>
- <name>altera_xcvr_reset_control</name>
+ <name>altera_generic_component</name>
<type>com.altera.entityinterfaces.IElementClass</type>
- <subtype>com.altera.entityinterfaces.IModule</subtype>
- <displayName>Transceiver PHY Reset Controller Intel FPGA IP</displayName>
- <version>18.0</version>
+ <subtype></subtype>
+ <displayName>Generic Component</displayName>
+ <version>1.0</version>
</plugin>
<plugin>
<instanceCount>1</instanceCount>
@@ -834,7 +1143,7 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
<displayName>Clock Input</displayName>
- <version>18.0</version>
+ <version>19.4</version>
</plugin>
<plugin>
<instanceCount>1</instanceCount>
@@ -842,16 +1151,16 @@ parameters are a RESULT of the module parameters. -->
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
<displayName>Reset Input</displayName>
- <version>18.0</version>
+ <version>19.4</version>
</plugin>
<plugin>
- <instanceCount>6</instanceCount>
+ <instanceCount>5</instanceCount>
<name>conduit_end</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
<displayName>Conduit</displayName>
- <version>18.0</version>
+ <version>19.4</version>
</plugin>
- <reportVersion>18.0 219</reportVersion>
+ <reportVersion>19.4 64</reportVersion>
<uniqueIdentifier></uniqueIdentifier>
</EnsembleReport>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.xml b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.xml
index 0c66bf4b76bfffef7a3b7bc041e5a8cfb0a1be2f..cadfac8d6572a85f81418a9439bd7dabda7b9890 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.xml
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.xml
@@ -1,7 +1,7 @@
<?xml version="1.0" encoding="UTF-8"?>
<deploy
- date="2019.11.25.09:39:35"
- outputDirectory="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/">
+ date="2020.11.26.17:15:22"
+ outputDirectory="/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/">
<perimeter>
<parameter
name="AUTO_GENERATION_ID"
@@ -55,29 +55,19 @@
<property name="clockRate" value="0" />
<property name="externallyDriven" value="false" />
<property name="ptfSchematicName" value="" />
- <port name="clock" direction="input" role="clk" width="1" />
- </interface>
- <interface name="pll_powerdown" kind="conduit" start="0">
- <property name="associatedClock" value="" />
- <property name="associatedReset" value="" />
- <property name="prSafe" value="false" />
- <port
- name="pll_powerdown"
- direction="output"
- role="pll_powerdown"
- width="1" />
+ <port name="clock_clk" direction="input" role="clk" width="1" />
</interface>
<interface name="reset" kind="reset" start="0">
<property name="associatedClock" value="" />
<property name="synchronousEdges" value="NONE" />
- <port name="reset" direction="input" role="reset" width="1" />
+ <port name="reset_reset" direction="input" role="reset" width="1" />
</interface>
<interface name="rx_analogreset" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<property name="prSafe" value="false" />
<port
- name="rx_analogreset"
+ name="rx_analogreset_rx_analogreset"
direction="output"
role="rx_analogreset"
width="12" />
@@ -86,14 +76,18 @@
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<property name="prSafe" value="false" />
- <port name="rx_cal_busy" direction="input" role="rx_cal_busy" width="12" />
+ <port
+ name="rx_cal_busy_rx_cal_busy"
+ direction="input"
+ role="rx_cal_busy"
+ width="12" />
</interface>
<interface name="rx_digitalreset" kind="conduit" start="0">
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<property name="prSafe" value="false" />
<port
- name="rx_digitalreset"
+ name="rx_digitalreset_rx_digitalreset"
direction="output"
role="rx_digitalreset"
width="12" />
@@ -103,7 +97,7 @@
<property name="associatedReset" value="" />
<property name="prSafe" value="false" />
<port
- name="rx_is_lockedtodata"
+ name="rx_is_lockedtodata_rx_is_lockedtodata"
direction="input"
role="rx_is_lockedtodata"
width="12" />
@@ -112,7 +106,11 @@
<property name="associatedClock" value="" />
<property name="associatedReset" value="" />
<property name="prSafe" value="false" />
- <port name="rx_ready" direction="output" role="rx_ready" width="12" />
+ <port
+ name="rx_ready_rx_ready"
+ direction="output"
+ role="rx_ready"
+ width="12" />
</interface>
</perimeter>
<entity
@@ -129,110 +127,599 @@
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="1" />
<generatedFiles>
<file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/synth/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.vhd"
+ path="/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/synth/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.vhd"
attributes="CONTAINS_INLINE_CONFIGURATION" />
</generatedFiles>
<childGeneratedFiles>
<file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/synth/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.vhd"
+ path="/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/synth/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.vhd"
attributes="CONTAINS_INLINE_CONFIGURATION" />
</childGeneratedFiles>
<sourceFiles>
<file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip" />
+ path="/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qsys" />
</sourceFiles>
- <childSourceFiles>
- <file
- path="/home/software/Altera/18.0/ip/altera/alt_xcvr/altera_xcvr_reset_control/tcl/altera_xcvr_reset_control_hw.tcl" />
- </childSourceFiles>
+ <childSourceFiles/>
<messages>
<message
level="Info"
culprit="ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12">"Generating: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12"</message>
<message
level="Info"
- culprit="ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12">"Generating: altera_xcvr_reset_control"</message>
- <message level="Info" culprit="xcvr_reset_control_0">add_fileset_file ./altera_xcvr_functions.sv SYSTEM_VERILOG PATH ../../../altera_xcvr_generic/altera_xcvr_functions.sv</message>
- <message level="Info" culprit="xcvr_reset_control_0">add_fileset_file ./alt_xcvr_resync.sv SYSTEM_VERILOG PATH ../../../altera_xcvr_generic/ctrl/alt_xcvr_resync.sv</message>
- <message level="Info" culprit="xcvr_reset_control_0">add_fileset_file ./altera_xcvr_reset_control.sv SYSTEM_VERILOG PATH ..//altera_xcvr_reset_control.sv</message>
- <message level="Info" culprit="xcvr_reset_control_0">add_fileset_file ./alt_xcvr_reset_counter.sv SYSTEM_VERILOG PATH ..//alt_xcvr_reset_counter.sv</message>
+ culprit="ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12">"Generating: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12"</message>
</messages>
</entity>
<entity
- kind="altera_xcvr_reset_control"
- version="18.0"
- name="altera_xcvr_reset_control">
- <parameter name="gui_rx_auto_reset" value="0" />
- <parameter name="T_TX_ANALOGRESET" value="0" />
+ kind="altera_generic_component"
+ version="1.0"
+ name="ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12">
+ <parameter name="hlsFile" value="" />
+ <parameter name="svInterfaceDefinition" value="" />
+ <parameter name="AUTO_DEVICE" value="10AX115U2F45E1SG" />
+ <parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
+ <parameter
+ name="defaultBoundary"
+ value="<boundaryDefinition>
+ <interfaces>
+ <interface>
+ <name>clock</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clock</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_is_lockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_is_lockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_ready</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_ready</name>
+ <role>rx_ready</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+</boundaryDefinition>" />
<parameter name="device_family" value="Arria 10" />
- <parameter name="T_TX_DIGITALRESET" value="20" />
- <parameter name="l_pll_select_width" value="1" />
- <parameter name="T_PLL_POWERDOWN" value="1000" />
- <parameter name="gui_tx_auto_reset" value="0" />
- <parameter name="TX_PLL_ENABLE" value="1" />
- <parameter name="l_pll_select_split" value="0" />
- <parameter name="l_pll_select_base" value="1" />
- <parameter name="l_terminate_pll" value="0" />
- <parameter name="SYS_CLK_IN_MHZ" value="100" />
- <parameter name="gui_pll_cal_busy" value="0" />
- <parameter name="REDUCED_SIM_TIME" value="1" />
- <parameter name="CHANNELS" value="12" />
- <parameter name="T_RX_DIGITALRESET" value="4000" />
- <parameter name="T_RX_ANALOGRESET" value="70000" />
- <parameter name="T_PLL_LOCK_HYST" value="0" />
- <parameter name="PLLS" value="1" />
- <parameter name="gui_split_interfaces" value="0" />
- <parameter name="l_terminate_rx_manual" value="1" />
- <parameter name="TX_ENABLE" value="0" />
- <parameter name="EN_PLL_CAL_BUSY" value="0" />
- <parameter name="l_rx_manual_term" value="0" />
- <parameter name="TX_PER_CHANNEL" value="0" />
- <parameter name="l_terminate_rx" value="0" />
- <parameter name="RX_ENABLE" value="1" />
- <parameter name="l_terminate_tx" value="1" />
- <parameter name="l_tx_manual_term" value="0" />
- <parameter name="SYNCHRONIZE_PLL_RESET" value="0" />
- <parameter name="RX_PER_CHANNEL" value="0" />
- <parameter name="l_terminate_tx_manual" value="1" />
- <parameter name="SYNCHRONIZE_RESET" value="1" />
- <generatedFiles>
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/altera_xcvr_reset_control_180/synth/altera_xcvr_functions.sv"
- attributes="" />
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/altera_xcvr_reset_control_180/synth/alt_xcvr_resync.sv"
- attributes="" />
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/altera_xcvr_reset_control_180/synth/altera_xcvr_reset_control.sv"
- attributes="" />
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/altera_xcvr_reset_control_180/synth/alt_xcvr_reset_counter.sv"
- attributes="" />
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/altera_xcvr_reset_control_180/synth/plain_files.txt"
- attributes="" />
- </generatedFiles>
- <childGeneratedFiles>
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/altera_xcvr_reset_control_180/synth/altera_xcvr_functions.sv"
- attributes="" />
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/altera_xcvr_reset_control_180/synth/alt_xcvr_resync.sv"
- attributes="" />
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/altera_xcvr_reset_control_180/synth/altera_xcvr_reset_control.sv"
- attributes="" />
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/altera_xcvr_reset_control_180/synth/alt_xcvr_reset_counter.sv"
- attributes="" />
- <file
- path="/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/altera_xcvr_reset_control_180/synth/plain_files.txt"
- attributes="" />
- </childGeneratedFiles>
- <sourceFiles>
- <file
- path="/home/software/Altera/18.0/ip/altera/alt_xcvr/altera_xcvr_reset_control/tcl/altera_xcvr_reset_control_hw.tcl" />
- </sourceFiles>
+ <parameter
+ name="componentDefinition"
+ value="<componentDefinition>
+ <boundary>
+ <interfaces>
+ <interface>
+ <name>clock</name>
+ <type>clock</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>clock</name>
+ <role>clk</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>clockRate</key>
+ <value>0</value>
+ </entry>
+ <entry>
+ <key>externallyDriven</key>
+ <value>false</value>
+ </entry>
+ <entry>
+ <key>ptfSchematicName</key>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>reset</name>
+ <type>reset</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>reset</name>
+ <role>reset</role>
+ <direction>Input</direction>
+ <width>1</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap/>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>synchronousEdges</key>
+ <value>NONE</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_analogreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_analogreset</name>
+ <role>rx_analogreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_cal_busy</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_cal_busy</name>
+ <role>rx_cal_busy</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_digitalreset</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_digitalreset</name>
+ <role>rx_digitalreset</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_is_lockedtodata</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_is_lockedtodata</name>
+ <role>rx_is_lockedtodata</role>
+ <direction>Input</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>input</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ <interface>
+ <name>rx_ready</name>
+ <type>conduit</type>
+ <isStart>false</isStart>
+ <ports>
+ <port>
+ <name>rx_ready</name>
+ <role>rx_ready</role>
+ <direction>Output</direction>
+ <width>12</width>
+ <lowerBound>0</lowerBound>
+ <vhdlType>STD_LOGIC_VECTOR</vhdlType>
+ </port>
+ </ports>
+ <assignments>
+ <assignmentValueMap>
+ <entry>
+ <key>ui.blockdiagram.direction</key>
+ <value>output</value>
+ </entry>
+ </assignmentValueMap>
+ </assignments>
+ <parameters>
+ <parameterValueMap>
+ <entry>
+ <key>associatedClock</key>
+ </entry>
+ <entry>
+ <key>associatedReset</key>
+ </entry>
+ <entry>
+ <key>prSafe</key>
+ <value>false</value>
+ </entry>
+ </parameterValueMap>
+ </parameters>
+ </interface>
+ </interfaces>
+ </boundary>
+ <originalModuleInfo>
+ <className>altera_xcvr_reset_control</className>
+ <version>19.1</version>
+ <displayName>Transceiver PHY Reset Controller Intel FPGA IP</displayName>
+ </originalModuleInfo>
+ <systemInfoParameterDescriptors>
+ <descriptors>
+ <descriptor>
+ <parameterDefaultValue>Stratix V</parameterDefaultValue>
+ <parameterName>device_family</parameterName>
+ <parameterType>java.lang.String</parameterType>
+ <systemInfotype>DEVICE_FAMILY</systemInfotype>
+ </descriptor>
+ </descriptors>
+ </systemInfoParameterDescriptors>
+ <systemInfos>
+ <connPtSystemInfos/>
+ </systemInfos>
+</componentDefinition>" />
+ <parameter
+ name="generationInfoDefinition"
+ value="<generationInfoDefinition>
+ <hdlLibraryName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</hdlLibraryName>
+ <fileSets>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetFixedName>
+ <fileSetKind>QUARTUS_SYNTH</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetFixedName>
+ <fileSetKind>SIM_VERILOG</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ <fileSet>
+ <fileSetName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetName>
+ <fileSetFixedName>ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12</fileSetFixedName>
+ <fileSetKind>SIM_VHDL</fileSetKind>
+ <fileSetFiles/>
+ </fileSet>
+ </fileSets>
+</generationInfoDefinition>" />
+ <parameter
+ name="logicalView"
+ value="ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip" />
+ <parameter
+ name="moduleAssignmentDefinition"
+ value="<assignmentDefinition>
+ <assignmentValueMap/>
+</assignmentDefinition>" />
+ <generatedFiles/>
+ <childGeneratedFiles/>
+ <sourceFiles/>
<childSourceFiles/>
<instantiator
instantiator="ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12"
@@ -240,11 +727,7 @@
<messages>
<message
level="Info"
- culprit="ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12">"Generating: altera_xcvr_reset_control"</message>
- <message level="Info" culprit="xcvr_reset_control_0">add_fileset_file ./altera_xcvr_functions.sv SYSTEM_VERILOG PATH ../../../altera_xcvr_generic/altera_xcvr_functions.sv</message>
- <message level="Info" culprit="xcvr_reset_control_0">add_fileset_file ./alt_xcvr_resync.sv SYSTEM_VERILOG PATH ../../../altera_xcvr_generic/ctrl/alt_xcvr_resync.sv</message>
- <message level="Info" culprit="xcvr_reset_control_0">add_fileset_file ./altera_xcvr_reset_control.sv SYSTEM_VERILOG PATH ..//altera_xcvr_reset_control.sv</message>
- <message level="Info" culprit="xcvr_reset_control_0">add_fileset_file ./alt_xcvr_reset_counter.sv SYSTEM_VERILOG PATH ..//alt_xcvr_reset_counter.sv</message>
+ culprit="ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12">"Generating: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12"</message>
</messages>
</entity>
</deploy>
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_bb.v b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_bb.v
index 2a17ed0255e09ab5309061604ac3fe56df858eda..4885be23ab1ae4e21bae96789179a612a4618e9f 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_bb.v
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_bb.v
@@ -1,12 +1,11 @@
module ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 (
- input wire clock, // clock.clk
- output wire [0:0] pll_powerdown, // pll_powerdown.pll_powerdown
- input wire reset, // reset.reset
- output wire [11:0] rx_analogreset, // rx_analogreset.rx_analogreset
- input wire [11:0] rx_cal_busy, // rx_cal_busy.rx_cal_busy
- output wire [11:0] rx_digitalreset, // rx_digitalreset.rx_digitalreset
- input wire [11:0] rx_is_lockedtodata, // rx_is_lockedtodata.rx_is_lockedtodata
- output wire [11:0] rx_ready // rx_ready.rx_ready
+ input wire clock_clk, // clock.clk
+ input wire reset_reset, // reset.reset
+ output wire [11:0] rx_analogreset_rx_analogreset, // rx_analogreset.rx_analogreset
+ input wire [11:0] rx_cal_busy_rx_cal_busy, // rx_cal_busy.rx_cal_busy
+ output wire [11:0] rx_digitalreset_rx_digitalreset, // rx_digitalreset.rx_digitalreset
+ input wire [11:0] rx_is_lockedtodata_rx_is_lockedtodata, // rx_is_lockedtodata.rx_is_lockedtodata
+ output wire [11:0] rx_ready_rx_ready // rx_ready.rx_ready
);
endmodule
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_generation.rpt b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_generation.rpt
index f719de1cda6f88e2d6f75c49cb3b7309d7fa7f7b..473d13ece67e110ae3d67500b7f97e473a6335c7 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_generation.rpt
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_generation.rpt
@@ -1,16 +1,35 @@
-Info: Generated by version: 18.0 build 219
-Info: Starting: Create simulation model
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip --simulation=VHDL --allow-mixed-language-simulation --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 --family="Arria 10" --part=10AX115U2F45E1SG
-Info: Skipping generation of ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12: files already generated.
-Info: qsys-generate succeeded.
-Info: Finished: Create simulation model
+Info: Generated by version: 19.4 build 64
Info: Starting: Create block symbol file (.bsf)
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip --block-symbol-file --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 --family="Arria 10" --part=10AX115U2F45E1SG
+Info: qsys-generate /home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qsys --block-symbol-file --output-directory=/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 --family="Arria 10" --part=10AX115U2F45E1SG
+Progress: Loading jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qsys
+Progress: Reading input file
+Progress: Adding xcvr_reset_control_0 [altera_generic_component 1.0]
+Progress: Parameterizing module xcvr_reset_control_0
+Progress: Building connections
+Progress: Parameterizing connections
+Progress: Validating
+Progress: Done reading input file
Info: qsys-generate succeeded.
Info: Finished: Create block symbol file (.bsf)
Info:
Info: Starting: Create HDL design files for synthesis
-Info: qsys-generate /home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip --synthesis=VHDL --output-directory=/home/hargreaves/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 --family="Arria 10" --part=10AX115U2F45E1SG
-Info: Skipping generation of ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12: files already generated.
+Info: qsys-generate /home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qsys --synthesis=VHDL --output-directory=/home/hiemstra/git/hdl/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 --family="Arria 10" --part=10AX115U2F45E1SG
+Progress: Loading jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.qsys
+Progress: Reading input file
+Progress: Adding xcvr_reset_control_0 [altera_generic_component 1.0]
+Progress: Parameterizing module xcvr_reset_control_0
+Progress: Building connections
+Progress: Parameterizing connections
+Progress: Validating
+Progress: Done reading input file
+Info: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12: "Transforming system: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12"
+Info: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12: "Naming system components in system: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12"
+Info: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12: "Processing generation queue"
+Info: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12: "Generating: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12"
+Info: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12: "Generating: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12"
+Info: ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12: Done "ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12" with 2 modules, 1 files
Info: qsys-generate succeeded.
Info: Finished: Create HDL design files for synthesis
+Info: Starting: Generate IP Core Documentation
+Info: No documentation filesets were found for components in ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12. No files generated.
+Info: Finished: Generate IP Core Documentation
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_inst.v b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_inst.v
index dcb14641fe8e4c5c76cae3c737dbc8e9fc560eed..482848f5c3c3990b620d5a7a70a3756abfc73cd8 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_inst.v
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_inst.v
@@ -1,11 +1,10 @@
ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 u0 (
- .clock (_connected_to_clock_), // input, width = 1, clock.clk
- .pll_powerdown (_connected_to_pll_powerdown_), // output, width = 1, pll_powerdown.pll_powerdown
- .reset (_connected_to_reset_), // input, width = 1, reset.reset
- .rx_analogreset (_connected_to_rx_analogreset_), // output, width = 12, rx_analogreset.rx_analogreset
- .rx_cal_busy (_connected_to_rx_cal_busy_), // input, width = 12, rx_cal_busy.rx_cal_busy
- .rx_digitalreset (_connected_to_rx_digitalreset_), // output, width = 12, rx_digitalreset.rx_digitalreset
- .rx_is_lockedtodata (_connected_to_rx_is_lockedtodata_), // input, width = 12, rx_is_lockedtodata.rx_is_lockedtodata
- .rx_ready (_connected_to_rx_ready_) // output, width = 12, rx_ready.rx_ready
+ .clock_clk (_connected_to_clock_clk_), // input, width = 1, clock.clk
+ .reset_reset (_connected_to_reset_reset_), // input, width = 1, reset.reset
+ .rx_analogreset_rx_analogreset (_connected_to_rx_analogreset_rx_analogreset_), // output, width = 12, rx_analogreset.rx_analogreset
+ .rx_cal_busy_rx_cal_busy (_connected_to_rx_cal_busy_rx_cal_busy_), // input, width = 12, rx_cal_busy.rx_cal_busy
+ .rx_digitalreset_rx_digitalreset (_connected_to_rx_digitalreset_rx_digitalreset_), // output, width = 12, rx_digitalreset.rx_digitalreset
+ .rx_is_lockedtodata_rx_is_lockedtodata (_connected_to_rx_is_lockedtodata_rx_is_lockedtodata_), // input, width = 12, rx_is_lockedtodata.rx_is_lockedtodata
+ .rx_ready_rx_ready (_connected_to_rx_ready_rx_ready_) // output, width = 12, rx_ready.rx_ready
);
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_inst.vhd b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_inst.vhd
index c3f72c1412b707df977cc937eab5896a85eb2cc3..105cd6fcaf9efe602cdaa2793dd652d3e0d52a46 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_inst.vhd
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_inst.vhd
@@ -1,25 +1,23 @@
component ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 is
port (
- clock : in std_logic := 'X'; -- clk
- pll_powerdown : out std_logic_vector(0 downto 0); -- pll_powerdown
- reset : in std_logic := 'X'; -- reset
- rx_analogreset : out std_logic_vector(11 downto 0); -- rx_analogreset
- rx_cal_busy : in std_logic_vector(11 downto 0) := (others => 'X'); -- rx_cal_busy
- rx_digitalreset : out std_logic_vector(11 downto 0); -- rx_digitalreset
- rx_is_lockedtodata : in std_logic_vector(11 downto 0) := (others => 'X'); -- rx_is_lockedtodata
- rx_ready : out std_logic_vector(11 downto 0) -- rx_ready
+ clock_clk : in std_logic := 'X'; -- clk
+ reset_reset : in std_logic := 'X'; -- reset
+ rx_analogreset_rx_analogreset : out std_logic_vector(11 downto 0); -- rx_analogreset
+ rx_cal_busy_rx_cal_busy : in std_logic_vector(11 downto 0) := (others => 'X'); -- rx_cal_busy
+ rx_digitalreset_rx_digitalreset : out std_logic_vector(11 downto 0); -- rx_digitalreset
+ rx_is_lockedtodata_rx_is_lockedtodata : in std_logic_vector(11 downto 0) := (others => 'X'); -- rx_is_lockedtodata
+ rx_ready_rx_ready : out std_logic_vector(11 downto 0) -- rx_ready
);
end component ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12;
u0 : component ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12
port map (
- clock => CONNECTED_TO_clock, -- clock.clk
- pll_powerdown => CONNECTED_TO_pll_powerdown, -- pll_powerdown.pll_powerdown
- reset => CONNECTED_TO_reset, -- reset.reset
- rx_analogreset => CONNECTED_TO_rx_analogreset, -- rx_analogreset.rx_analogreset
- rx_cal_busy => CONNECTED_TO_rx_cal_busy, -- rx_cal_busy.rx_cal_busy
- rx_digitalreset => CONNECTED_TO_rx_digitalreset, -- rx_digitalreset.rx_digitalreset
- rx_is_lockedtodata => CONNECTED_TO_rx_is_lockedtodata, -- rx_is_lockedtodata.rx_is_lockedtodata
- rx_ready => CONNECTED_TO_rx_ready -- rx_ready.rx_ready
+ clock_clk => CONNECTED_TO_clock_clk, -- clock.clk
+ reset_reset => CONNECTED_TO_reset_reset, -- reset.reset
+ rx_analogreset_rx_analogreset => CONNECTED_TO_rx_analogreset_rx_analogreset, -- rx_analogreset.rx_analogreset
+ rx_cal_busy_rx_cal_busy => CONNECTED_TO_rx_cal_busy_rx_cal_busy, -- rx_cal_busy.rx_cal_busy
+ rx_digitalreset_rx_digitalreset => CONNECTED_TO_rx_digitalreset_rx_digitalreset, -- rx_digitalreset.rx_digitalreset
+ rx_is_lockedtodata_rx_is_lockedtodata => CONNECTED_TO_rx_is_lockedtodata_rx_is_lockedtodata, -- rx_is_lockedtodata.rx_is_lockedtodata
+ rx_ready_rx_ready => CONNECTED_TO_rx_ready_rx_ready -- rx_ready.rx_ready
);
diff --git a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/synth/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.vhd b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/synth/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.vhd
index 9fa3098bceb2a13a62d7245728ba51999a8a4b78..8c2cd661b43f9854eb20c445e8bd07df5298c2aa 100644
--- a/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/synth/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.vhd
+++ b/libraries/technology/ip_arria10_e1sg/jesd204b/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12/synth/ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.vhd
@@ -1,115 +1,50 @@
-- ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.vhd
--- Generated using ACDS version 18.0 219
+-- Generated using ACDS version 19.4 64
library IEEE;
-library altera_xcvr_reset_control_180;
+library ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;
entity ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 is
port (
- clock : in std_logic := '0'; -- clock.clk
- pll_powerdown : out std_logic_vector(0 downto 0); -- pll_powerdown.pll_powerdown
- reset : in std_logic := '0'; -- reset.reset
- rx_analogreset : out std_logic_vector(11 downto 0); -- rx_analogreset.rx_analogreset
- rx_cal_busy : in std_logic_vector(11 downto 0) := (others => '0'); -- rx_cal_busy.rx_cal_busy
- rx_digitalreset : out std_logic_vector(11 downto 0); -- rx_digitalreset.rx_digitalreset
- rx_is_lockedtodata : in std_logic_vector(11 downto 0) := (others => '0'); -- rx_is_lockedtodata.rx_is_lockedtodata
- rx_ready : out std_logic_vector(11 downto 0) -- rx_ready.rx_ready
+ clock_clk : in std_logic := '0'; -- clock.clk
+ reset_reset : in std_logic := '0'; -- reset.reset
+ rx_analogreset_rx_analogreset : out std_logic_vector(11 downto 0); -- rx_analogreset.rx_analogreset
+ rx_cal_busy_rx_cal_busy : in std_logic_vector(11 downto 0) := (others => '0'); -- rx_cal_busy.rx_cal_busy
+ rx_digitalreset_rx_digitalreset : out std_logic_vector(11 downto 0); -- rx_digitalreset.rx_digitalreset
+ rx_is_lockedtodata_rx_is_lockedtodata : in std_logic_vector(11 downto 0) := (others => '0'); -- rx_is_lockedtodata.rx_is_lockedtodata
+ rx_ready_rx_ready : out std_logic_vector(11 downto 0) -- rx_ready.rx_ready
);
end entity ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12;
architecture rtl of ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12 is
- component altera_xcvr_reset_control_cmp is
- generic (
- CHANNELS : integer := 1;
- PLLS : integer := 1;
- SYS_CLK_IN_MHZ : integer := 250;
- SYNCHRONIZE_RESET : integer := 1;
- REDUCED_SIM_TIME : integer := 1;
- TX_PLL_ENABLE : integer := 1;
- T_PLL_POWERDOWN : integer := 1000;
- SYNCHRONIZE_PLL_RESET : integer := 0;
- TX_ENABLE : integer := 1;
- TX_PER_CHANNEL : integer := 0;
- T_TX_ANALOGRESET : integer := 0;
- T_TX_DIGITALRESET : integer := 20;
- T_PLL_LOCK_HYST : integer := 0;
- EN_PLL_CAL_BUSY : integer := 0;
- RX_ENABLE : integer := 1;
- RX_PER_CHANNEL : integer := 0;
- T_RX_ANALOGRESET : integer := 40;
- T_RX_DIGITALRESET : integer := 4000
- );
+ component ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_cmp is
port (
- clock : in std_logic := 'X'; -- clk
- reset : in std_logic := 'X'; -- reset
- pll_powerdown : out std_logic_vector(PLLS-1 downto 0); -- pll_powerdown
- rx_analogreset : out std_logic_vector(CHANNELS-1 downto 0); -- rx_analogreset
- rx_digitalreset : out std_logic_vector(CHANNELS-1 downto 0); -- rx_digitalreset
- rx_ready : out std_logic_vector(CHANNELS-1 downto 0); -- rx_ready
- rx_is_lockedtodata : in std_logic_vector(CHANNELS-1 downto 0) := (others => 'X'); -- rx_is_lockedtodata
- rx_cal_busy : in std_logic_vector(CHANNELS-1 downto 0) := (others => 'X'); -- rx_cal_busy
- tx_analogreset : out std_logic_vector(11 downto 0); -- tx_analogreset
- tx_digitalreset : out std_logic_vector(11 downto 0); -- tx_digitalreset
- tx_ready : out std_logic_vector(11 downto 0); -- tx_ready
- pll_locked : in std_logic_vector(0 downto 0) := (others => 'X'); -- pll_locked
- pll_select : in std_logic_vector(0 downto 0) := (others => 'X'); -- pll_select
- tx_cal_busy : in std_logic_vector(11 downto 0) := (others => 'X'); -- tx_cal_busy
- pll_cal_busy : in std_logic_vector(0 downto 0) := (others => 'X'); -- pll_cal_busy
- tx_manual : in std_logic_vector(11 downto 0) := (others => 'X'); -- tx_reset_mode
- rx_manual : in std_logic_vector(11 downto 0) := (others => 'X'); -- rx_reset_mode
- tx_digitalreset_or : in std_logic_vector(11 downto 0) := (others => 'X'); -- tx_digitalreset_or
- rx_digitalreset_or : in std_logic_vector(11 downto 0) := (others => 'X') -- rx_digitalreset_or
+ clock : in std_logic := 'X'; -- clk
+ reset : in std_logic := 'X'; -- reset
+ rx_analogreset : out std_logic_vector(11 downto 0); -- rx_analogreset
+ rx_cal_busy : in std_logic_vector(11 downto 0) := (others => 'X'); -- rx_cal_busy
+ rx_digitalreset : out std_logic_vector(11 downto 0); -- rx_digitalreset
+ rx_is_lockedtodata : in std_logic_vector(11 downto 0) := (others => 'X'); -- rx_is_lockedtodata
+ rx_ready : out std_logic_vector(11 downto 0) -- rx_ready
);
- end component altera_xcvr_reset_control_cmp;
+ end component ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_cmp;
- for xcvr_reset_control_0 : altera_xcvr_reset_control_cmp
- use entity altera_xcvr_reset_control_180.altera_xcvr_reset_control;
+ for xcvr_reset_control_0 : ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_cmp
+ use entity ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12.ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12;
begin
- xcvr_reset_control_0 : component altera_xcvr_reset_control_cmp
- generic map (
- CHANNELS => 12,
- PLLS => 1,
- SYS_CLK_IN_MHZ => 100,
- SYNCHRONIZE_RESET => 1,
- REDUCED_SIM_TIME => 1,
- TX_PLL_ENABLE => 1,
- T_PLL_POWERDOWN => 1000,
- SYNCHRONIZE_PLL_RESET => 0,
- TX_ENABLE => 0,
- TX_PER_CHANNEL => 0,
- T_TX_ANALOGRESET => 0,
- T_TX_DIGITALRESET => 20,
- T_PLL_LOCK_HYST => 0,
- EN_PLL_CAL_BUSY => 0,
- RX_ENABLE => 1,
- RX_PER_CHANNEL => 0,
- T_RX_ANALOGRESET => 70000,
- T_RX_DIGITALRESET => 4000
- )
+ xcvr_reset_control_0 : component ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12_cmp
port map (
- clock => clock, -- clock.clk
- reset => reset, -- reset.reset
- pll_powerdown => pll_powerdown, -- pll_powerdown.pll_powerdown
- rx_analogreset => rx_analogreset, -- rx_analogreset.rx_analogreset
- rx_digitalreset => rx_digitalreset, -- rx_digitalreset.rx_digitalreset
- rx_ready => rx_ready, -- rx_ready.rx_ready
- rx_is_lockedtodata => rx_is_lockedtodata, -- rx_is_lockedtodata.rx_is_lockedtodata
- rx_cal_busy => rx_cal_busy, -- rx_cal_busy.rx_cal_busy
- tx_analogreset => open, -- (terminated)
- tx_digitalreset => open, -- (terminated)
- tx_ready => open, -- (terminated)
- pll_locked => "0", -- (terminated)
- pll_select => "0", -- (terminated)
- tx_cal_busy => "000000000000", -- (terminated)
- pll_cal_busy => "0", -- (terminated)
- tx_manual => "000000000000", -- (terminated)
- rx_manual => "000000000000", -- (terminated)
- tx_digitalreset_or => "000000000000", -- (terminated)
- rx_digitalreset_or => "000000000000" -- (terminated)
+ clock => clock_clk, -- clock.clk
+ reset => reset_reset, -- reset.reset
+ rx_analogreset => rx_analogreset_rx_analogreset, -- rx_analogreset.rx_analogreset
+ rx_cal_busy => rx_cal_busy_rx_cal_busy, -- rx_cal_busy.rx_cal_busy
+ rx_digitalreset => rx_digitalreset_rx_digitalreset, -- rx_digitalreset.rx_digitalreset
+ rx_is_lockedtodata => rx_is_lockedtodata_rx_is_lockedtodata, -- rx_is_lockedtodata.rx_is_lockedtodata
+ rx_ready => rx_ready_rx_ready -- rx_ready.rx_ready
);
end architecture rtl; -- of ip_arria10_e1sg_jesd204b_rx_xcvr_reset_control_12
diff --git a/libraries/technology/jesd204b/tech_jesd204b.vhd b/libraries/technology/jesd204b/tech_jesd204b.vhd
index ecf327e563b86d2f60d03bc027f321dde7deda78..5858abfe17a9bddd203425eff8b8d32aab0a6a9e 100644
--- a/libraries/technology/jesd204b/tech_jesd204b.vhd
+++ b/libraries/technology/jesd204b/tech_jesd204b.vhd
@@ -61,7 +61,8 @@ ENTITY tech_jesd204b IS
g_technology : NATURAL := c_tech_arria10_e1sg;
g_nof_streams : NATURAL := 12;
g_nof_sync_n : NATURAL := 12;
- g_direction : STRING := "RX_ONLY" -- "TX_RX", "TX_ONLY", "RX_ONLY"
+ g_direction : STRING := "RX_ONLY"; -- "TX_RX", "TX_ONLY", "RX_ONLY"
+ g_jesd_freq : STRING := "200MHz"
);
PORT (
-- JESD204B external signals
@@ -69,6 +70,8 @@ ENTITY tech_jesd204b IS
jesd204b_sysref : IN STD_LOGIC := '0'; -- SYSREF should drive ADC and FPGA with correct phase wrt jesd204b_device_clk
jesd204b_sync_n_arr : OUT STD_LOGIC_VECTOR(g_nof_streams-1 DOWNTO 0); -- output to control ADC initialization/syncronization phase
+ jesd204b_disable_arr : IN STD_LOGIC_VECTOR(g_nof_streams-1 DOWNTO 0);
+
-- Data to fabric
rx_sosi_arr : OUT t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0); -- Parallel data out to fabric
rx_clk : OUT STD_LOGIC := '0'; -- Exported data clock (frame clock) to fabric
@@ -98,13 +101,16 @@ BEGIN
g_sim => g_sim,
g_nof_streams => g_nof_streams,
g_nof_sync_n => g_nof_sync_n,
- g_direction => g_direction
+ g_direction => g_direction,
+ g_jesd_freq => g_jesd_freq
)
PORT MAP(
jesd204b_refclk => jesd204b_refclk,
jesd204b_sysref => jesd204b_sysref,
jesd204b_sync_n_arr => jesd204b_sync_n_arr,
+ jesd204b_disable_arr => jesd204b_disable_arr,
+
rx_src_out_arr => rx_sosi_arr,
rx_clk => rx_clk,
rx_rst => rx_rst,
diff --git a/libraries/technology/jesd204b/tech_jesd204b_arria10_e1sg.vhd b/libraries/technology/jesd204b/tech_jesd204b_arria10_e1sg.vhd
index 1880c76a8f7255763173ecbd2f1e24b8a9859533..963dbe2509ca51f1141df8164611356c0c5279db 100644
--- a/libraries/technology/jesd204b/tech_jesd204b_arria10_e1sg.vhd
+++ b/libraries/technology/jesd204b/tech_jesd204b_arria10_e1sg.vhd
@@ -39,7 +39,8 @@ ENTITY tech_jesd204b_arria10_e1sg IS
g_sim : BOOLEAN := FALSE;
g_nof_streams : NATURAL := 12;
g_nof_sync_n : NATURAL := 12;
- g_direction : STRING := "RX_ONLY" -- "TX_RX", "TX_ONLY", "RX_ONLY"
+ g_direction : STRING := "RX_ONLY"; -- "TX_RX", "TX_ONLY", "RX_ONLY"
+ g_jesd_freq : STRING := "200MHz"
);
PORT (
-- JESD204B external signals
@@ -47,6 +48,8 @@ ENTITY tech_jesd204b_arria10_e1sg IS
jesd204b_sysref : IN STD_LOGIC := '0'; -- SYSREF should drive ADC and FPGA with correct phase wrt jesd204b_device_clk
jesd204b_sync_n_arr : OUT STD_LOGIC_VECTOR(g_nof_streams-1 DOWNTO 0); -- output to control ADC initialization/syncronization phase
+ jesd204b_disable_arr : IN STD_LOGIC_VECTOR(g_nof_streams-1 DOWNTO 0);
+
-- Data to fabric
rx_src_out_arr : OUT t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0); -- Parallel data out to fabric
rx_clk : OUT STD_LOGIC := '0'; -- Exported data clock (frame clock) to fabric
@@ -75,13 +78,16 @@ BEGIN
g_sim => g_sim,
g_nof_streams => g_nof_streams,
g_nof_sync_n => g_nof_sync_n,
- g_direction => g_direction
+ g_direction => g_direction,
+ g_jesd_freq => g_jesd_freq
)
PORT MAP(
jesd204b_refclk => jesd204b_refclk,
jesd204b_sysref => jesd204b_sysref,
jesd204b_sync_n_arr => jesd204b_sync_n_arr,
+ jesd204b_disable_arr => jesd204b_disable_arr,
+
rx_src_out_arr => rx_src_out_arr,
rx_clk => rx_clk,
rx_rst => rx_rst,
diff --git a/libraries/technology/jesd204b/tech_jesd204b_component_pkg.vhd b/libraries/technology/jesd204b/tech_jesd204b_component_pkg.vhd
index 3714caf7bd57edef58083f65160299fd1af8ce3a..27cee6e928931eafc535d6508252983b194d69d8 100644
--- a/libraries/technology/jesd204b/tech_jesd204b_component_pkg.vhd
+++ b/libraries/technology/jesd204b/tech_jesd204b_component_pkg.vhd
@@ -40,7 +40,8 @@ PACKAGE tech_jesd204b_component_pkg IS
g_sim : BOOLEAN := FALSE;
g_nof_streams : NATURAL := 1;
g_nof_sync_n : NATURAL := 1;
- g_direction : STRING := "RX_ONLY" -- "TX_RX", "TX_ONLY", "RX_ONLY"
+ g_direction : STRING := "RX_ONLY"; -- "TX_RX", "TX_ONLY", "RX_ONLY"
+ g_jesd_freq : STRING := "200MHz"
);
PORT (
-- JESD204B external signals
@@ -58,6 +59,8 @@ PACKAGE tech_jesd204b_component_pkg IS
mm_clk : IN STD_LOGIC;
mm_rst : IN STD_LOGIC;
+ jesd204b_disable_arr : IN STD_LOGIC_VECTOR(g_nof_streams-1 DOWNTO 0);
+
jesd204b_mosi : IN t_mem_mosi; -- mm control
jesd204b_miso : OUT t_mem_miso;