From 34b5647178aecf1b3f0f4405fef202c0ba3f867c Mon Sep 17 00:00:00 2001
From: Reinier van der Walle <walle@astron.nl>
Date: Mon, 5 Oct 2020 15:29:16 +0200
Subject: [PATCH] Assigned dp_clk frequency generic
---
.../src/vhdl/lofar2_unb2b_filterbank.vhd | 2 ++
1 file changed, 2 insertions(+)
diff --git a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd
index 5411570d34..1587113a05 100644
--- a/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd
+++ b/applications/lofar2/designs/lofar2_unb2b_filterbank/src/vhdl/lofar2_unb2b_filterbank.vhd
@@ -104,6 +104,7 @@ ARCHITECTURE str OF lofar2_unb2b_filterbank IS
-- Revision parameters
CONSTANT c_revision_select : t_lofar2_unb2b_filterbank_config := func_sel_revision_rec(g_design_name);
CONSTANT c_nof_streams : NATURAL := c_revision_select.nof_streams_input; -- Streams actually passed through for processing
+ CONSTANT c_dp_clk_freq : NATURAL := c_revision_select.dp_clk_freq;
-- Firmware version x.y
CONSTANT c_fw_version : t_unb2b_board_fw_version := (1, 1);
@@ -279,6 +280,7 @@ BEGIN
g_aux => c_unb2b_board_aux,
g_factory_image => g_factory_image,
g_protect_addr_range => g_protect_addr_range,
+ g_dp_clk_freq => c_dp_clk_freq,
g_dp_clk_use_pll => FALSE
)
PORT MAP (
--
GitLab