From 349c26434b80ac0cbd99b27bbafe55a22988bd09 Mon Sep 17 00:00:00 2001
From: Reinier van der Walle <walle@astron.nl>
Date: Fri, 12 Aug 2022 14:46:32 +0200
Subject: [PATCH] updated qsys design
---
.../qsys_disturb2_unb2b_station_cpu_0.ip | 4 +-
...s_disturb2_unb2b_station_ram_bf_weights.ip | 11 +-
...turb2_unb2b_station_ram_equalizer_gains.ip | 30 +--
.../quartus/qsys_disturb2_unb2b_station.qsys | 196 +++++++++---------
.../vhdl/qsys_disturb2_unb2b_station_pkg.vhd | 3 +-
5 files changed, 128 insertions(+), 116 deletions(-)
diff --git a/applications/disturb2/designs/disturb2_unb2b_station/quartus/ip/qsys_disturb2_unb2b_station/qsys_disturb2_unb2b_station_cpu_0.ip b/applications/disturb2/designs/disturb2_unb2b_station/quartus/ip/qsys_disturb2_unb2b_station/qsys_disturb2_unb2b_station_cpu_0.ip
index 4a7166ae9e..30d668a6e4 100644
--- a/applications/disturb2/designs/disturb2_unb2b_station/quartus/ip/qsys_disturb2_unb2b_station/qsys_disturb2_unb2b_station_cpu_0.ip
+++ b/applications/disturb2/designs/disturb2_unb2b_station/quartus/ip/qsys_disturb2_unb2b_station/qsys_disturb2_unb2b_station_cpu_0.ip
@@ -2218,7 +2218,7 @@
<spirit:parameter>
<spirit:name>dataSlaveMapParam</spirit:name>
<spirit:displayName>dataSlaveMapParam</spirit:displayName>
- <spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_block_validate_err_bf.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_stat_hdr_dat_xst.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx_xst.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx_bf.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_ring_lane_info_xst.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_bsn_monitor_v2_rx_align_bf.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_stat_hdr_dat_sst.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx_xst.mem' start='0x3200' end='0x3400' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx_bf.mem' start='0x3400' end='0x3800' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_st_histogram.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x18000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_st_xsq.mem' start='0x40000' end='0x80000' datawidth='32' /><slave name='reg_tr_10gbe_mac.mem' start='0x80000' end='0xA0000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0xA0000' end='0xC0000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0xC0000' end='0xE0000' datawidth='32' /><slave name='ram_st_sst.mem' start='0xE0000' end='0x100000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x100000' end='0x110000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x110000' end='0x120000' datawidth='32' /><slave name='ram_wg.mem' start='0x120000' end='0x130000' datawidth='32' /><slave name='jesd204b.mem' start='0x130000' end='0x134000' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x134000' end='0x134400' datawidth='32' /><slave name='reg_bsn_monitor_v2_rx_align_xsub.mem' start='0x134400' end='0x134600' datawidth='32' /><slave name='reg_stat_hdr_dat_bst.mem' start='0x134600' end='0x134800' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x134800' end='0x134A00' datawidth='32' /><slave name='reg_wg.mem' start='0x134A00' end='0x134B00' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x134B00' end='0x134C00' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x134C00' end='0x134D00' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x134D00' end='0x134E00' datawidth='32' /><slave name='reg_bsn_align_v2_xsub.mem' start='0x134E00' end='0x134E80' datawidth='32' /><slave name='reg_diag_data_buffer_bsn.mem' start='0x134E80' end='0x134F00' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x134F00' end='0x134F80' datawidth='32' /><slave name='reg_bsn_monitor_v2_aligned_bf.mem' start='0x134F80' end='0x134FC0' datawidth='32' /><slave name='reg_bsn_monitor_v2_beamlet_output.mem' start='0x134FC0' end='0x135000' datawidth='32' /><slave name='reg_bsn_monitor_v2_bst_offload.mem' start='0x135000' end='0x135040' datawidth='32' /><slave name='reg_dp_block_validate_err_xst.mem' start='0x135040' end='0x135080' datawidth='32' /><slave name='reg_bsn_sync_scheduler_xsub.mem' start='0x135080' end='0x1350C0' datawidth='32' /><slave name='reg_crosslets_info.mem' start='0x1350C0' end='0x135100' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x135100' end='0x135140' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x135140' end='0x135180' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync_bf.mem' start='0x135180' end='0x1351A0' datawidth='32' /><slave name='reg_bsn_align_v2_bf.mem' start='0x1351A0' end='0x1351C0' datawidth='32' /><slave name='reg_bsn_monitor_v2_sst_offload.mem' start='0x1351C0' end='0x1351E0' datawidth='32' /><slave name='reg_tr_10gbe_eth10g.mem' start='0x1351E0' end='0x135200' datawidth='32' /><slave name='reg_bsn_monitor_v2_xst_offload.mem' start='0x135200' end='0x135220' datawidth='32' /><slave name='reg_bsn_monitor_v2_aligned_xsub.mem' start='0x135220' end='0x135240' datawidth='32' /><slave name='reg_bsn_source_v2.mem' start='0x135240' end='0x135260' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x135260' end='0x135280' datawidth='32' /><slave name='reg_epcs.mem' start='0x135280' end='0x1352A0' datawidth='32' /><slave name='reg_remu.mem' start='0x1352A0' end='0x1352C0' datawidth='32' /><slave name='reg_ring_lane_info_bf.mem' start='0x1352C0' end='0x1352D0' datawidth='32' /><slave name='reg_ring_info.mem' start='0x1352D0' end='0x1352E0' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync_xst.mem' start='0x1352E0' end='0x1352F0' datawidth='32' /><slave name='reg_stat_enable_bst.mem' start='0x1352F0' end='0x135300' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0x135300' end='0x135310' datawidth='32' /><slave name='reg_bf_scale.mem' start='0x135310' end='0x135320' datawidth='32' /><slave name='pio_pps.mem' start='0x135320' end='0x135330' datawidth='32' /><slave name='reg_nof_crosslets.mem' start='0x135330' end='0x135338' datawidth='32' /><slave name='reg_stat_enable_xst.mem' start='0x135338' end='0x135340' datawidth='32' /><slave name='reg_stat_enable_sst.mem' start='0x135340' end='0x135348' datawidth='32' /><slave name='pio_jesd_ctrl.mem' start='0x135348' end='0x135350' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0x135350' end='0x135358' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x135358' end='0x135360' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x135360' end='0x135368' datawidth='32' /><slave name='reg_si.mem' start='0x135368' end='0x135370' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x135370' end='0x135378' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x135378' end='0x135380' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x135380' end='0x135388' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x135388' end='0x135390' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x135390' end='0x135398' datawidth='32' /><slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /></address-map>]]></spirit:value>
+ <spirit:value spirit:format="string" spirit:id="dataSlaveMapParam"><![CDATA[<address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_block_validate_err_bf.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_stat_hdr_dat_xst.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx_xst.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx_bf.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_ring_lane_info_xst.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_bsn_monitor_v2_rx_align_bf.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_stat_hdr_dat_sst.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx_xst.mem' start='0x3200' end='0x3400' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx_bf.mem' start='0x3400' end='0x3800' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_st_histogram.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x18000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_st_xsq.mem' start='0x40000' end='0x80000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0x80000' end='0xA0000' datawidth='32' /><slave name='reg_tr_10gbe_mac.mem' start='0xA0000' end='0xC0000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0xC0000' end='0xE0000' datawidth='32' /><slave name='ram_st_sst.mem' start='0xE0000' end='0x100000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x100000' end='0x110000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x110000' end='0x120000' datawidth='32' /><slave name='ram_wg.mem' start='0x120000' end='0x130000' datawidth='32' /><slave name='jesd204b.mem' start='0x130000' end='0x134000' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x134000' end='0x134400' datawidth='32' /><slave name='reg_bsn_monitor_v2_rx_align_xsub.mem' start='0x134400' end='0x134600' datawidth='32' /><slave name='reg_stat_hdr_dat_bst.mem' start='0x134600' end='0x134800' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x134800' end='0x134A00' datawidth='32' /><slave name='reg_wg.mem' start='0x134A00' end='0x134B00' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x134B00' end='0x134C00' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x134C00' end='0x134D00' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x134D00' end='0x134E00' datawidth='32' /><slave name='reg_bsn_align_v2_xsub.mem' start='0x134E00' end='0x134E80' datawidth='32' /><slave name='reg_diag_data_buffer_bsn.mem' start='0x134E80' end='0x134F00' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x134F00' end='0x134F80' datawidth='32' /><slave name='reg_bsn_monitor_v2_aligned_bf.mem' start='0x134F80' end='0x134FC0' datawidth='32' /><slave name='reg_bsn_monitor_v2_beamlet_output.mem' start='0x134FC0' end='0x135000' datawidth='32' /><slave name='reg_bsn_monitor_v2_bst_offload.mem' start='0x135000' end='0x135040' datawidth='32' /><slave name='reg_dp_block_validate_err_xst.mem' start='0x135040' end='0x135080' datawidth='32' /><slave name='reg_bsn_sync_scheduler_xsub.mem' start='0x135080' end='0x1350C0' datawidth='32' /><slave name='reg_crosslets_info.mem' start='0x1350C0' end='0x135100' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x135100' end='0x135140' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x135140' end='0x135180' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync_bf.mem' start='0x135180' end='0x1351A0' datawidth='32' /><slave name='reg_bsn_align_v2_bf.mem' start='0x1351A0' end='0x1351C0' datawidth='32' /><slave name='reg_bsn_monitor_v2_sst_offload.mem' start='0x1351C0' end='0x1351E0' datawidth='32' /><slave name='reg_tr_10gbe_eth10g.mem' start='0x1351E0' end='0x135200' datawidth='32' /><slave name='reg_bsn_monitor_v2_xst_offload.mem' start='0x135200' end='0x135220' datawidth='32' /><slave name='reg_bsn_monitor_v2_aligned_xsub.mem' start='0x135220' end='0x135240' datawidth='32' /><slave name='reg_bsn_source_v2.mem' start='0x135240' end='0x135260' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x135260' end='0x135280' datawidth='32' /><slave name='reg_epcs.mem' start='0x135280' end='0x1352A0' datawidth='32' /><slave name='reg_remu.mem' start='0x1352A0' end='0x1352C0' datawidth='32' /><slave name='reg_ring_lane_info_bf.mem' start='0x1352C0' end='0x1352D0' datawidth='32' /><slave name='reg_ring_info.mem' start='0x1352D0' end='0x1352E0' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync_xst.mem' start='0x1352E0' end='0x1352F0' datawidth='32' /><slave name='reg_stat_enable_bst.mem' start='0x1352F0' end='0x135300' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0x135300' end='0x135310' datawidth='32' /><slave name='reg_bf_scale.mem' start='0x135310' end='0x135320' datawidth='32' /><slave name='pio_pps.mem' start='0x135320' end='0x135330' datawidth='32' /><slave name='reg_nof_crosslets.mem' start='0x135330' end='0x135338' datawidth='32' /><slave name='reg_stat_enable_xst.mem' start='0x135338' end='0x135340' datawidth='32' /><slave name='reg_stat_enable_sst.mem' start='0x135340' end='0x135348' datawidth='32' /><slave name='pio_jesd_ctrl.mem' start='0x135348' end='0x135350' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0x135350' end='0x135358' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x135358' end='0x135360' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x135360' end='0x135368' datawidth='32' /><slave name='reg_si.mem' start='0x135368' end='0x135370' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x135370' end='0x135378' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x135378' end='0x135380' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x135380' end='0x135388' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x135388' end='0x135390' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x135390' end='0x135398' datawidth='32' /><slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /></address-map>]]></spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>tightlyCoupledDataMaster0MapParam</spirit:name>
@@ -3489,7 +3489,7 @@
<suppliedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_block_validate_err_bf.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_stat_hdr_dat_xst.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx_xst.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx_bf.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_ring_lane_info_xst.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_bsn_monitor_v2_rx_align_bf.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_stat_hdr_dat_sst.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx_xst.mem' start='0x3200' end='0x3400' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx_bf.mem' start='0x3400' end='0x3800' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_st_histogram.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x18000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_st_xsq.mem' start='0x40000' end='0x80000' datawidth='32' /><slave name='reg_tr_10gbe_mac.mem' start='0x80000' end='0xA0000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0xA0000' end='0xC0000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0xC0000' end='0xE0000' datawidth='32' /><slave name='ram_st_sst.mem' start='0xE0000' end='0x100000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x100000' end='0x110000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x110000' end='0x120000' datawidth='32' /><slave name='ram_wg.mem' start='0x120000' end='0x130000' datawidth='32' /><slave name='jesd204b.mem' start='0x130000' end='0x134000' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x134000' end='0x134400' datawidth='32' /><slave name='reg_bsn_monitor_v2_rx_align_xsub.mem' start='0x134400' end='0x134600' datawidth='32' /><slave name='reg_stat_hdr_dat_bst.mem' start='0x134600' end='0x134800' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x134800' end='0x134A00' datawidth='32' /><slave name='reg_wg.mem' start='0x134A00' end='0x134B00' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x134B00' end='0x134C00' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x134C00' end='0x134D00' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x134D00' end='0x134E00' datawidth='32' /><slave name='reg_bsn_align_v2_xsub.mem' start='0x134E00' end='0x134E80' datawidth='32' /><slave name='reg_diag_data_buffer_bsn.mem' start='0x134E80' end='0x134F00' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x134F00' end='0x134F80' datawidth='32' /><slave name='reg_bsn_monitor_v2_aligned_bf.mem' start='0x134F80' end='0x134FC0' datawidth='32' /><slave name='reg_bsn_monitor_v2_beamlet_output.mem' start='0x134FC0' end='0x135000' datawidth='32' /><slave name='reg_bsn_monitor_v2_bst_offload.mem' start='0x135000' end='0x135040' datawidth='32' /><slave name='reg_dp_block_validate_err_xst.mem' start='0x135040' end='0x135080' datawidth='32' /><slave name='reg_bsn_sync_scheduler_xsub.mem' start='0x135080' end='0x1350C0' datawidth='32' /><slave name='reg_crosslets_info.mem' start='0x1350C0' end='0x135100' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x135100' end='0x135140' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x135140' end='0x135180' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync_bf.mem' start='0x135180' end='0x1351A0' datawidth='32' /><slave name='reg_bsn_align_v2_bf.mem' start='0x1351A0' end='0x1351C0' datawidth='32' /><slave name='reg_bsn_monitor_v2_sst_offload.mem' start='0x1351C0' end='0x1351E0' datawidth='32' /><slave name='reg_tr_10gbe_eth10g.mem' start='0x1351E0' end='0x135200' datawidth='32' /><slave name='reg_bsn_monitor_v2_xst_offload.mem' start='0x135200' end='0x135220' datawidth='32' /><slave name='reg_bsn_monitor_v2_aligned_xsub.mem' start='0x135220' end='0x135240' datawidth='32' /><slave name='reg_bsn_source_v2.mem' start='0x135240' end='0x135260' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x135260' end='0x135280' datawidth='32' /><slave name='reg_epcs.mem' start='0x135280' end='0x1352A0' datawidth='32' /><slave name='reg_remu.mem' start='0x1352A0' end='0x1352C0' datawidth='32' /><slave name='reg_ring_lane_info_bf.mem' start='0x1352C0' end='0x1352D0' datawidth='32' /><slave name='reg_ring_info.mem' start='0x1352D0' end='0x1352E0' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync_xst.mem' start='0x1352E0' end='0x1352F0' datawidth='32' /><slave name='reg_stat_enable_bst.mem' start='0x1352F0' end='0x135300' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0x135300' end='0x135310' datawidth='32' /><slave name='reg_bf_scale.mem' start='0x135310' end='0x135320' datawidth='32' /><slave name='pio_pps.mem' start='0x135320' end='0x135330' datawidth='32' /><slave name='reg_nof_crosslets.mem' start='0x135330' end='0x135338' datawidth='32' /><slave name='reg_stat_enable_xst.mem' start='0x135338' end='0x135340' datawidth='32' /><slave name='reg_stat_enable_sst.mem' start='0x135340' end='0x135348' datawidth='32' /><slave name='pio_jesd_ctrl.mem' start='0x135348' end='0x135350' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0x135350' end='0x135358' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x135358' end='0x135360' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x135360' end='0x135368' datawidth='32' /><slave name='reg_si.mem' start='0x135368' end='0x135370' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x135370' end='0x135378' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x135378' end='0x135380' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x135380' end='0x135388' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x135388' end='0x135390' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x135390' end='0x135398' datawidth='32' /><slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_block_validate_err_bf.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_stat_hdr_dat_xst.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx_xst.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx_bf.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_ring_lane_info_xst.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_bsn_monitor_v2_rx_align_bf.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_stat_hdr_dat_sst.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx_xst.mem' start='0x3200' end='0x3400' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx_bf.mem' start='0x3400' end='0x3800' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_st_histogram.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x18000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_st_xsq.mem' start='0x40000' end='0x80000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0x80000' end='0xA0000' datawidth='32' /><slave name='reg_tr_10gbe_mac.mem' start='0xA0000' end='0xC0000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0xC0000' end='0xE0000' datawidth='32' /><slave name='ram_st_sst.mem' start='0xE0000' end='0x100000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x100000' end='0x110000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x110000' end='0x120000' datawidth='32' /><slave name='ram_wg.mem' start='0x120000' end='0x130000' datawidth='32' /><slave name='jesd204b.mem' start='0x130000' end='0x134000' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x134000' end='0x134400' datawidth='32' /><slave name='reg_bsn_monitor_v2_rx_align_xsub.mem' start='0x134400' end='0x134600' datawidth='32' /><slave name='reg_stat_hdr_dat_bst.mem' start='0x134600' end='0x134800' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x134800' end='0x134A00' datawidth='32' /><slave name='reg_wg.mem' start='0x134A00' end='0x134B00' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x134B00' end='0x134C00' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x134C00' end='0x134D00' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x134D00' end='0x134E00' datawidth='32' /><slave name='reg_bsn_align_v2_xsub.mem' start='0x134E00' end='0x134E80' datawidth='32' /><slave name='reg_diag_data_buffer_bsn.mem' start='0x134E80' end='0x134F00' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x134F00' end='0x134F80' datawidth='32' /><slave name='reg_bsn_monitor_v2_aligned_bf.mem' start='0x134F80' end='0x134FC0' datawidth='32' /><slave name='reg_bsn_monitor_v2_beamlet_output.mem' start='0x134FC0' end='0x135000' datawidth='32' /><slave name='reg_bsn_monitor_v2_bst_offload.mem' start='0x135000' end='0x135040' datawidth='32' /><slave name='reg_dp_block_validate_err_xst.mem' start='0x135040' end='0x135080' datawidth='32' /><slave name='reg_bsn_sync_scheduler_xsub.mem' start='0x135080' end='0x1350C0' datawidth='32' /><slave name='reg_crosslets_info.mem' start='0x1350C0' end='0x135100' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x135100' end='0x135140' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x135140' end='0x135180' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync_bf.mem' start='0x135180' end='0x1351A0' datawidth='32' /><slave name='reg_bsn_align_v2_bf.mem' start='0x1351A0' end='0x1351C0' datawidth='32' /><slave name='reg_bsn_monitor_v2_sst_offload.mem' start='0x1351C0' end='0x1351E0' datawidth='32' /><slave name='reg_tr_10gbe_eth10g.mem' start='0x1351E0' end='0x135200' datawidth='32' /><slave name='reg_bsn_monitor_v2_xst_offload.mem' start='0x135200' end='0x135220' datawidth='32' /><slave name='reg_bsn_monitor_v2_aligned_xsub.mem' start='0x135220' end='0x135240' datawidth='32' /><slave name='reg_bsn_source_v2.mem' start='0x135240' end='0x135260' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x135260' end='0x135280' datawidth='32' /><slave name='reg_epcs.mem' start='0x135280' end='0x1352A0' datawidth='32' /><slave name='reg_remu.mem' start='0x1352A0' end='0x1352C0' datawidth='32' /><slave name='reg_ring_lane_info_bf.mem' start='0x1352C0' end='0x1352D0' datawidth='32' /><slave name='reg_ring_info.mem' start='0x1352D0' end='0x1352E0' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync_xst.mem' start='0x1352E0' end='0x1352F0' datawidth='32' /><slave name='reg_stat_enable_bst.mem' start='0x1352F0' end='0x135300' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0x135300' end='0x135310' datawidth='32' /><slave name='reg_bf_scale.mem' start='0x135310' end='0x135320' datawidth='32' /><slave name='pio_pps.mem' start='0x135320' end='0x135330' datawidth='32' /><slave name='reg_nof_crosslets.mem' start='0x135330' end='0x135338' datawidth='32' /><slave name='reg_stat_enable_xst.mem' start='0x135338' end='0x135340' datawidth='32' /><slave name='reg_stat_enable_sst.mem' start='0x135340' end='0x135348' datawidth='32' /><slave name='pio_jesd_ctrl.mem' start='0x135348' end='0x135350' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0x135350' end='0x135358' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x135358' end='0x135360' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x135360' end='0x135368' datawidth='32' /><slave name='reg_si.mem' start='0x135368' end='0x135370' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x135370' end='0x135378' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x135378' end='0x135380' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x135380' end='0x135388' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x135388' end='0x135390' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x135390' end='0x135398' datawidth='32' /><slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
diff --git a/applications/disturb2/designs/disturb2_unb2b_station/quartus/ip/qsys_disturb2_unb2b_station/qsys_disturb2_unb2b_station_ram_bf_weights.ip b/applications/disturb2/designs/disturb2_unb2b_station/quartus/ip/qsys_disturb2_unb2b_station/qsys_disturb2_unb2b_station_ram_bf_weights.ip
index a141826e4a..bc0ce7fbdf 100644
--- a/applications/disturb2/designs/disturb2_unb2b_station/quartus/ip/qsys_disturb2_unb2b_station/qsys_disturb2_unb2b_station_ram_bf_weights.ip
+++ b/applications/disturb2/designs/disturb2_unb2b_station/quartus/ip/qsys_disturb2_unb2b_station/qsys_disturb2_unb2b_station_ram_bf_weights.ip
@@ -259,7 +259,7 @@
<spirit:parameter>
<spirit:name>readLatency</spirit:name>
<spirit:displayName>Read latency</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+ <spirit:value spirit:format="long" spirit:id="readLatency">2</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>readWaitStates</spirit:name>
@@ -570,7 +570,7 @@
<spirit:view>
<spirit:name>QUARTUS_SYNTH</spirit:name>
<spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
- <spirit:modelName>avs_common_mm</spirit:modelName>
+ <spirit:modelName>avs_common_mm_readlatency2</spirit:modelName>
<spirit:fileSetRef>
<spirit:localName>QUARTUS_SYNTH</spirit:localName>
</spirit:fileSetRef>
@@ -775,7 +775,7 @@
<altera:entity_info>
<spirit:vendor>ASTRON</spirit:vendor>
<spirit:library>qsys_disturb2_unb2b_station_ram_bf_weights</spirit:library>
- <spirit:name>avs_common_mm</spirit:name>
+ <spirit:name>avs_common_mm_readlatency2</spirit:name>
<spirit:version>1.0</spirit:version>
</altera:entity_info>
<altera:altera_module_parameters>
@@ -824,6 +824,9 @@
<spirit:displayName>bonusData</spirit:displayName>
<spirit:value spirit:format="string" spirit:id="bonusData">bonusData
{
+ element qsys_disturb2_unb2b_station_bf_weights
+ {
+ }
}
</spirit:value>
</spirit:parameter>
@@ -1082,7 +1085,7 @@
</entry>
<entry>
<key>readLatency</key>
- <value>1</value>
+ <value>2</value>
</entry>
<entry>
<key>readWaitStates</key>
diff --git a/applications/disturb2/designs/disturb2_unb2b_station/quartus/ip/qsys_disturb2_unb2b_station/qsys_disturb2_unb2b_station_ram_equalizer_gains.ip b/applications/disturb2/designs/disturb2_unb2b_station/quartus/ip/qsys_disturb2_unb2b_station/qsys_disturb2_unb2b_station_ram_equalizer_gains.ip
index 5633f085ae..3fedd2b973 100644
--- a/applications/disturb2/designs/disturb2_unb2b_station/quartus/ip/qsys_disturb2_unb2b_station/qsys_disturb2_unb2b_station_ram_equalizer_gains.ip
+++ b/applications/disturb2/designs/disturb2_unb2b_station/quartus/ip/qsys_disturb2_unb2b_station/qsys_disturb2_unb2b_station_ram_equalizer_gains.ip
@@ -2,7 +2,7 @@
<spirit:component xmlns:altera="http://www.altera.com/XMLSchema/IPXact/extensions" xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009">
<spirit:vendor>ASTRON</spirit:vendor>
<spirit:library>qsys_disturb2_unb2b_station_ram_equalizer_gains</spirit:library>
- <spirit:name>qsys_lofar2_unb2b_filterbank_ram_equalizer_gains</spirit:name>
+ <spirit:name>qsys_disturb2_unb2b_station_ram_equalizer_gains</spirit:name>
<spirit:version>1.0</spirit:version>
<spirit:busInterfaces>
<spirit:busInterface>
@@ -259,7 +259,7 @@
<spirit:parameter>
<spirit:name>readLatency</spirit:name>
<spirit:displayName>Read latency</spirit:displayName>
- <spirit:value spirit:format="long" spirit:id="readLatency">1</spirit:value>
+ <spirit:value spirit:format="long" spirit:id="readLatency">2</spirit:value>
</spirit:parameter>
<spirit:parameter>
<spirit:name>readWaitStates</spirit:name>
@@ -570,7 +570,7 @@
<spirit:view>
<spirit:name>QUARTUS_SYNTH</spirit:name>
<spirit:envIdentifier>:quartus.altera.com:</spirit:envIdentifier>
- <spirit:modelName>avs_common_mm</spirit:modelName>
+ <spirit:modelName>avs_common_mm_readlatency2</spirit:modelName>
<spirit:fileSetRef>
<spirit:localName>QUARTUS_SYNTH</spirit:localName>
</spirit:fileSetRef>
@@ -775,7 +775,7 @@
<altera:entity_info>
<spirit:vendor>ASTRON</spirit:vendor>
<spirit:library>qsys_disturb2_unb2b_station_ram_equalizer_gains</spirit:library>
- <spirit:name>avs_common_mm</spirit:name>
+ <spirit:name>avs_common_mm_readlatency2</spirit:name>
<spirit:version>1.0</spirit:version>
</altera:entity_info>
<altera:altera_module_parameters>
@@ -1082,7 +1082,7 @@
</entry>
<entry>
<key>readLatency</key>
- <value>1</value>
+ <value>2</value>
</entry>
<entry>
<key>readWaitStates</key>
@@ -1406,38 +1406,38 @@
</spirit:parameters>
</altera:altera_system_parameters>
<altera:altera_interface_boundary>
- <altera:interface_mapping altera:name="address" altera:internal="qsys_lofar2_unb2b_filterbank_ram_equalizer_gains.address" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="address" altera:internal="qsys_disturb2_unb2b_station_ram_equalizer_gains.address" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_address_export" altera:internal="coe_address_export"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="clk" altera:internal="qsys_lofar2_unb2b_filterbank_ram_equalizer_gains.clk" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="clk" altera:internal="qsys_disturb2_unb2b_station_ram_equalizer_gains.clk" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_clk_export" altera:internal="coe_clk_export"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="mem" altera:internal="qsys_lofar2_unb2b_filterbank_ram_equalizer_gains.mem" altera:type="avalon" altera:dir="end">
+ <altera:interface_mapping altera:name="mem" altera:internal="qsys_disturb2_unb2b_station_ram_equalizer_gains.mem" altera:type="avalon" altera:dir="end">
<altera:port_mapping altera:name="avs_mem_address" altera:internal="avs_mem_address"></altera:port_mapping>
<altera:port_mapping altera:name="avs_mem_read" altera:internal="avs_mem_read"></altera:port_mapping>
<altera:port_mapping altera:name="avs_mem_readdata" altera:internal="avs_mem_readdata"></altera:port_mapping>
<altera:port_mapping altera:name="avs_mem_write" altera:internal="avs_mem_write"></altera:port_mapping>
<altera:port_mapping altera:name="avs_mem_writedata" altera:internal="avs_mem_writedata"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="read" altera:internal="qsys_lofar2_unb2b_filterbank_ram_equalizer_gains.read" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="read" altera:internal="qsys_disturb2_unb2b_station_ram_equalizer_gains.read" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_read_export" altera:internal="coe_read_export"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="readdata" altera:internal="qsys_lofar2_unb2b_filterbank_ram_equalizer_gains.readdata" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="readdata" altera:internal="qsys_disturb2_unb2b_station_ram_equalizer_gains.readdata" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_readdata_export" altera:internal="coe_readdata_export"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="reset" altera:internal="qsys_lofar2_unb2b_filterbank_ram_equalizer_gains.reset" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="reset" altera:internal="qsys_disturb2_unb2b_station_ram_equalizer_gains.reset" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_reset_export" altera:internal="coe_reset_export"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="system" altera:internal="qsys_lofar2_unb2b_filterbank_ram_equalizer_gains.system" altera:type="clock" altera:dir="end">
+ <altera:interface_mapping altera:name="system" altera:internal="qsys_disturb2_unb2b_station_ram_equalizer_gains.system" altera:type="clock" altera:dir="end">
<altera:port_mapping altera:name="csi_system_clk" altera:internal="csi_system_clk"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="system_reset" altera:internal="qsys_lofar2_unb2b_filterbank_ram_equalizer_gains.system_reset" altera:type="reset" altera:dir="end">
+ <altera:interface_mapping altera:name="system_reset" altera:internal="qsys_disturb2_unb2b_station_ram_equalizer_gains.system_reset" altera:type="reset" altera:dir="end">
<altera:port_mapping altera:name="csi_system_reset" altera:internal="csi_system_reset"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="write" altera:internal="qsys_lofar2_unb2b_filterbank_ram_equalizer_gains.write" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="write" altera:internal="qsys_disturb2_unb2b_station_ram_equalizer_gains.write" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_write_export" altera:internal="coe_write_export"></altera:port_mapping>
</altera:interface_mapping>
- <altera:interface_mapping altera:name="writedata" altera:internal="qsys_lofar2_unb2b_filterbank_ram_equalizer_gains.writedata" altera:type="conduit" altera:dir="end">
+ <altera:interface_mapping altera:name="writedata" altera:internal="qsys_disturb2_unb2b_station_ram_equalizer_gains.writedata" altera:type="conduit" altera:dir="end">
<altera:port_mapping altera:name="coe_writedata_export" altera:internal="coe_writedata_export"></altera:port_mapping>
</altera:interface_mapping>
</altera:altera_interface_boundary>
diff --git a/applications/disturb2/designs/disturb2_unb2b_station/quartus/qsys_disturb2_unb2b_station.qsys b/applications/disturb2/designs/disturb2_unb2b_station/quartus/qsys_disturb2_unb2b_station.qsys
index 136af8c493..5632db3472 100644
--- a/applications/disturb2/designs/disturb2_unb2b_station/quartus/qsys_disturb2_unb2b_station.qsys
+++ b/applications/disturb2/designs/disturb2_unb2b_station/quartus/qsys_disturb2_unb2b_station.qsys
@@ -136,7 +136,7 @@
{
datum _sortIndex
{
- value = "46";
+ value = "44";
type = "int";
}
}
@@ -210,7 +210,7 @@
{
datum _sortIndex
{
- value = "36";
+ value = "79";
type = "int";
}
}
@@ -218,7 +218,7 @@
{
datum baseAddress
{
- value = "655360";
+ value = "524288";
type = "String";
}
}
@@ -226,7 +226,7 @@
{
datum _sortIndex
{
- value = "45";
+ value = "43";
type = "int";
}
}
@@ -242,7 +242,7 @@
{
datum _sortIndex
{
- value = "34";
+ value = "80";
type = "int";
}
}
@@ -250,7 +250,7 @@
{
datum baseAddress
{
- value = "1114112";
+ value = "1048576";
type = "String";
}
}
@@ -290,7 +290,7 @@
{
datum _sortIndex
{
- value = "35";
+ value = "34";
type = "int";
}
}
@@ -298,7 +298,7 @@
{
datum baseAddress
{
- value = "1048576";
+ value = "1114112";
type = "String";
}
}
@@ -306,7 +306,7 @@
{
datum _sortIndex
{
- value = "40";
+ value = "38";
type = "int";
}
}
@@ -322,7 +322,7 @@
{
datum _sortIndex
{
- value = "56";
+ value = "54";
type = "int";
}
}
@@ -354,7 +354,7 @@
{
datum _sortIndex
{
- value = "52";
+ value = "50";
type = "int";
}
}
@@ -402,7 +402,7 @@
{
datum _sortIndex
{
- value = "37";
+ value = "35";
type = "int";
}
}
@@ -418,7 +418,7 @@
{
datum _sortIndex
{
- value = "73";
+ value = "71";
type = "int";
}
}
@@ -434,7 +434,7 @@
{
datum _sortIndex
{
- value = "58";
+ value = "56";
type = "int";
}
}
@@ -466,7 +466,7 @@
{
datum _sortIndex
{
- value = "75";
+ value = "73";
type = "int";
}
}
@@ -482,7 +482,7 @@
{
datum _sortIndex
{
- value = "60";
+ value = "58";
type = "int";
}
}
@@ -498,7 +498,7 @@
{
datum _sortIndex
{
- value = "72";
+ value = "70";
type = "int";
}
}
@@ -514,7 +514,7 @@
{
datum _sortIndex
{
- value = "71";
+ value = "69";
type = "int";
}
}
@@ -530,7 +530,7 @@
{
datum _sortIndex
{
- value = "77";
+ value = "75";
type = "int";
}
}
@@ -546,7 +546,7 @@
{
datum _sortIndex
{
- value = "62";
+ value = "60";
type = "int";
}
}
@@ -562,7 +562,7 @@
{
datum _sortIndex
{
- value = "78";
+ value = "76";
type = "int";
}
}
@@ -578,7 +578,7 @@
{
datum _sortIndex
{
- value = "63";
+ value = "61";
type = "int";
}
}
@@ -594,7 +594,7 @@
{
datum _sortIndex
{
- value = "74";
+ value = "72";
type = "int";
}
}
@@ -610,7 +610,7 @@
{
datum _sortIndex
{
- value = "59";
+ value = "57";
type = "int";
}
}
@@ -626,7 +626,7 @@
{
datum _sortIndex
{
- value = "70";
+ value = "68";
type = "int";
}
}
@@ -642,7 +642,7 @@
{
datum _sortIndex
{
- value = "69";
+ value = "67";
type = "int";
}
}
@@ -690,7 +690,7 @@
{
datum _sortIndex
{
- value = "55";
+ value = "53";
type = "int";
}
}
@@ -706,7 +706,7 @@
{
datum _sortIndex
{
- value = "51";
+ value = "49";
type = "int";
}
}
@@ -722,7 +722,7 @@
{
datum _sortIndex
{
- value = "44";
+ value = "42";
type = "int";
}
}
@@ -738,7 +738,7 @@
{
datum _sortIndex
{
- value = "80";
+ value = "78";
type = "int";
}
}
@@ -750,11 +750,19 @@
type = "String";
}
}
+ element reg_dp_block_validate_bsn_at_sync_bf.write
+ {
+ datum _tags
+ {
+ value = "";
+ type = "String";
+ }
+ }
element reg_dp_block_validate_bsn_at_sync_xst
{
datum _sortIndex
{
- value = "65";
+ value = "63";
type = "int";
}
}
@@ -770,7 +778,7 @@
{
datum _sortIndex
{
- value = "79";
+ value = "77";
type = "int";
}
}
@@ -786,7 +794,7 @@
{
datum _sortIndex
{
- value = "64";
+ value = "62";
type = "int";
}
}
@@ -834,7 +842,7 @@
{
datum _sortIndex
{
- value = "39";
+ value = "37";
type = "int";
}
}
@@ -950,7 +958,7 @@
{
datum _sortIndex
{
- value = "38";
+ value = "36";
type = "int";
}
}
@@ -1008,7 +1016,7 @@
{
datum _sortIndex
{
- value = "57";
+ value = "55";
type = "int";
}
}
@@ -1024,7 +1032,7 @@
{
datum _sortIndex
{
- value = "42";
+ value = "40";
type = "int";
}
}
@@ -1040,7 +1048,7 @@
{
datum _sortIndex
{
- value = "43";
+ value = "41";
type = "int";
}
}
@@ -1077,7 +1085,7 @@
{
datum _sortIndex
{
- value = "66";
+ value = "64";
type = "int";
}
}
@@ -1093,7 +1101,7 @@
{
datum _sortIndex
{
- value = "76";
+ value = "74";
type = "int";
}
}
@@ -1109,7 +1117,7 @@
{
datum _sortIndex
{
- value = "61";
+ value = "59";
type = "int";
}
}
@@ -1125,7 +1133,7 @@
{
datum _sortIndex
{
- value = "41";
+ value = "39";
type = "int";
}
}
@@ -1157,7 +1165,7 @@
{
datum _sortIndex
{
- value = "49";
+ value = "47";
type = "int";
}
}
@@ -1173,7 +1181,7 @@
{
datum _sortIndex
{
- value = "47";
+ value = "45";
type = "int";
}
}
@@ -1189,7 +1197,7 @@
{
datum _sortIndex
{
- value = "53";
+ value = "51";
type = "int";
}
}
@@ -1205,7 +1213,7 @@
{
datum _sortIndex
{
- value = "50";
+ value = "48";
type = "int";
}
}
@@ -1221,7 +1229,7 @@
{
datum _sortIndex
{
- value = "48";
+ value = "46";
type = "int";
}
}
@@ -1237,7 +1245,7 @@
{
datum _sortIndex
{
- value = "54";
+ value = "52";
type = "int";
}
}
@@ -1253,7 +1261,7 @@
{
datum _sortIndex
{
- value = "67";
+ value = "65";
type = "int";
}
}
@@ -1269,7 +1277,7 @@
{
datum _sortIndex
{
- value = "68";
+ value = "66";
type = "int";
}
}
@@ -1277,7 +1285,7 @@
{
datum baseAddress
{
- value = "524288";
+ value = "655360";
type = "String";
}
}
@@ -7029,7 +7037,7 @@
<consumedSystemInfos>
<entry>
<key>ADDRESS_MAP</key>
- <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_block_validate_err_bf.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_stat_hdr_dat_xst.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx_xst.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx_bf.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_ring_lane_info_xst.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_bsn_monitor_v2_rx_align_bf.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_stat_hdr_dat_sst.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx_xst.mem' start='0x3200' end='0x3400' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx_bf.mem' start='0x3400' end='0x3800' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_st_histogram.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x18000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_st_xsq.mem' start='0x40000' end='0x80000' datawidth='32' /><slave name='reg_tr_10gbe_mac.mem' start='0x80000' end='0xA0000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0xA0000' end='0xC0000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0xC0000' end='0xE0000' datawidth='32' /><slave name='ram_st_sst.mem' start='0xE0000' end='0x100000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x100000' end='0x110000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x110000' end='0x120000' datawidth='32' /><slave name='ram_wg.mem' start='0x120000' end='0x130000' datawidth='32' /><slave name='jesd204b.mem' start='0x130000' end='0x134000' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x134000' end='0x134400' datawidth='32' /><slave name='reg_bsn_monitor_v2_rx_align_xsub.mem' start='0x134400' end='0x134600' datawidth='32' /><slave name='reg_stat_hdr_dat_bst.mem' start='0x134600' end='0x134800' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x134800' end='0x134A00' datawidth='32' /><slave name='reg_wg.mem' start='0x134A00' end='0x134B00' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x134B00' end='0x134C00' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x134C00' end='0x134D00' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x134D00' end='0x134E00' datawidth='32' /><slave name='reg_bsn_align_v2_xsub.mem' start='0x134E00' end='0x134E80' datawidth='32' /><slave name='reg_diag_data_buffer_bsn.mem' start='0x134E80' end='0x134F00' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x134F00' end='0x134F80' datawidth='32' /><slave name='reg_bsn_monitor_v2_aligned_bf.mem' start='0x134F80' end='0x134FC0' datawidth='32' /><slave name='reg_bsn_monitor_v2_beamlet_output.mem' start='0x134FC0' end='0x135000' datawidth='32' /><slave name='reg_bsn_monitor_v2_bst_offload.mem' start='0x135000' end='0x135040' datawidth='32' /><slave name='reg_dp_block_validate_err_xst.mem' start='0x135040' end='0x135080' datawidth='32' /><slave name='reg_bsn_sync_scheduler_xsub.mem' start='0x135080' end='0x1350C0' datawidth='32' /><slave name='reg_crosslets_info.mem' start='0x1350C0' end='0x135100' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x135100' end='0x135140' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x135140' end='0x135180' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync_bf.mem' start='0x135180' end='0x1351A0' datawidth='32' /><slave name='reg_bsn_align_v2_bf.mem' start='0x1351A0' end='0x1351C0' datawidth='32' /><slave name='reg_bsn_monitor_v2_sst_offload.mem' start='0x1351C0' end='0x1351E0' datawidth='32' /><slave name='reg_tr_10gbe_eth10g.mem' start='0x1351E0' end='0x135200' datawidth='32' /><slave name='reg_bsn_monitor_v2_xst_offload.mem' start='0x135200' end='0x135220' datawidth='32' /><slave name='reg_bsn_monitor_v2_aligned_xsub.mem' start='0x135220' end='0x135240' datawidth='32' /><slave name='reg_bsn_source_v2.mem' start='0x135240' end='0x135260' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x135260' end='0x135280' datawidth='32' /><slave name='reg_epcs.mem' start='0x135280' end='0x1352A0' datawidth='32' /><slave name='reg_remu.mem' start='0x1352A0' end='0x1352C0' datawidth='32' /><slave name='reg_ring_lane_info_bf.mem' start='0x1352C0' end='0x1352D0' datawidth='32' /><slave name='reg_ring_info.mem' start='0x1352D0' end='0x1352E0' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync_xst.mem' start='0x1352E0' end='0x1352F0' datawidth='32' /><slave name='reg_stat_enable_bst.mem' start='0x1352F0' end='0x135300' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0x135300' end='0x135310' datawidth='32' /><slave name='reg_bf_scale.mem' start='0x135310' end='0x135320' datawidth='32' /><slave name='pio_pps.mem' start='0x135320' end='0x135330' datawidth='32' /><slave name='reg_nof_crosslets.mem' start='0x135330' end='0x135338' datawidth='32' /><slave name='reg_stat_enable_xst.mem' start='0x135338' end='0x135340' datawidth='32' /><slave name='reg_stat_enable_sst.mem' start='0x135340' end='0x135348' datawidth='32' /><slave name='pio_jesd_ctrl.mem' start='0x135348' end='0x135350' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0x135350' end='0x135358' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x135358' end='0x135360' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x135360' end='0x135368' datawidth='32' /><slave name='reg_si.mem' start='0x135368' end='0x135370' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x135370' end='0x135378' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x135378' end='0x135380' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x135380' end='0x135388' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x135388' end='0x135390' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x135390' end='0x135398' datawidth='32' /><slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /></address-map></value>
+ <value><address-map><slave name='pio_system_info.mem' start='0x0' end='0x80' datawidth='32' /><slave name='reg_dp_block_validate_err_bf.mem' start='0x80' end='0x100' datawidth='32' /><slave name='reg_stat_hdr_dat_xst.mem' start='0x100' end='0x200' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx_xst.mem' start='0x200' end='0x400' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_tx_bf.mem' start='0x400' end='0x800' datawidth='32' /><slave name='ram_scrap.mem' start='0x800' end='0x1000' datawidth='32' /><slave name='avs_eth_0.mms_tse' start='0x1000' end='0x2000' datawidth='32' /><slave name='avs_eth_0.mms_ram' start='0x2000' end='0x3000' datawidth='32' /><slave name='reg_wdi.mem' start='0x3000' end='0x3008' datawidth='32' /><slave name='reg_ring_lane_info_xst.mem' start='0x3008' end='0x3010' datawidth='32' /><slave name='pio_wdi.s1' start='0x3010' end='0x3020' datawidth='32' /><slave name='timer_0.s1' start='0x3020' end='0x3040' datawidth='16' /><slave name='avs_eth_0.mms_reg' start='0x3040' end='0x3080' datawidth='32' /><slave name='reg_bsn_monitor_v2_rx_align_bf.mem' start='0x3080' end='0x3100' datawidth='32' /><slave name='reg_stat_hdr_dat_sst.mem' start='0x3100' end='0x3200' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx_xst.mem' start='0x3200' end='0x3400' datawidth='32' /><slave name='reg_bsn_monitor_v2_ring_rx_bf.mem' start='0x3400' end='0x3800' datawidth='32' /><slave name='cpu_0.debug_mem_slave' start='0x3800' end='0x4000' datawidth='32' /><slave name='ram_st_bst.mem' start='0x4000' end='0x8000' datawidth='32' /><slave name='ram_st_histogram.mem' start='0x8000' end='0x10000' datawidth='32' /><slave name='rom_system_info.mem' start='0x10000' end='0x18000' datawidth='32' /><slave name='reg_nw_10gbe_mac.mem' start='0x18000' end='0x20000' datawidth='32' /><slave name='onchip_memory2_0.s1' start='0x20000' end='0x40000' datawidth='32' /><slave name='ram_st_xsq.mem' start='0x40000' end='0x80000' datawidth='32' /><slave name='ram_bf_weights.mem' start='0x80000' end='0xA0000' datawidth='32' /><slave name='reg_tr_10gbe_mac.mem' start='0xA0000' end='0xC0000' datawidth='32' /><slave name='ram_fil_coefs.mem' start='0xC0000' end='0xE0000' datawidth='32' /><slave name='ram_st_sst.mem' start='0xE0000' end='0x100000' datawidth='32' /><slave name='ram_equalizer_gains.mem' start='0x100000' end='0x110000' datawidth='32' /><slave name='ram_ss_ss_wide.mem' start='0x110000' end='0x120000' datawidth='32' /><slave name='ram_wg.mem' start='0x120000' end='0x130000' datawidth='32' /><slave name='jesd204b.mem' start='0x130000' end='0x134000' datawidth='32' /><slave name='reg_bsn_monitor_input.mem' start='0x134000' end='0x134400' datawidth='32' /><slave name='reg_bsn_monitor_v2_rx_align_xsub.mem' start='0x134400' end='0x134600' datawidth='32' /><slave name='reg_stat_hdr_dat_bst.mem' start='0x134600' end='0x134800' datawidth='32' /><slave name='reg_hdr_dat.mem' start='0x134800' end='0x134A00' datawidth='32' /><slave name='reg_wg.mem' start='0x134A00' end='0x134B00' datawidth='32' /><slave name='reg_aduh_monitor.mem' start='0x134B00' end='0x134C00' datawidth='32' /><slave name='reg_unb_pmbus.mem' start='0x134C00' end='0x134D00' datawidth='32' /><slave name='reg_unb_sens.mem' start='0x134D00' end='0x134E00' datawidth='32' /><slave name='reg_bsn_align_v2_xsub.mem' start='0x134E00' end='0x134E80' datawidth='32' /><slave name='reg_diag_data_buffer_bsn.mem' start='0x134E80' end='0x134F00' datawidth='32' /><slave name='reg_dp_shiftram.mem' start='0x134F00' end='0x134F80' datawidth='32' /><slave name='reg_bsn_monitor_v2_aligned_bf.mem' start='0x134F80' end='0x134FC0' datawidth='32' /><slave name='reg_bsn_monitor_v2_beamlet_output.mem' start='0x134FC0' end='0x135000' datawidth='32' /><slave name='reg_bsn_monitor_v2_bst_offload.mem' start='0x135000' end='0x135040' datawidth='32' /><slave name='reg_dp_block_validate_err_xst.mem' start='0x135040' end='0x135080' datawidth='32' /><slave name='reg_bsn_sync_scheduler_xsub.mem' start='0x135080' end='0x1350C0' datawidth='32' /><slave name='reg_crosslets_info.mem' start='0x1350C0' end='0x135100' datawidth='32' /><slave name='reg_sdp_info.mem' start='0x135100' end='0x135140' datawidth='32' /><slave name='reg_fpga_voltage_sens.mem' start='0x135140' end='0x135180' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync_bf.mem' start='0x135180' end='0x1351A0' datawidth='32' /><slave name='reg_bsn_align_v2_bf.mem' start='0x1351A0' end='0x1351C0' datawidth='32' /><slave name='reg_bsn_monitor_v2_sst_offload.mem' start='0x1351C0' end='0x1351E0' datawidth='32' /><slave name='reg_tr_10gbe_eth10g.mem' start='0x1351E0' end='0x135200' datawidth='32' /><slave name='reg_bsn_monitor_v2_xst_offload.mem' start='0x135200' end='0x135220' datawidth='32' /><slave name='reg_bsn_monitor_v2_aligned_xsub.mem' start='0x135220' end='0x135240' datawidth='32' /><slave name='reg_bsn_source_v2.mem' start='0x135240' end='0x135260' datawidth='32' /><slave name='reg_fpga_temp_sens.mem' start='0x135260' end='0x135280' datawidth='32' /><slave name='reg_epcs.mem' start='0x135280' end='0x1352A0' datawidth='32' /><slave name='reg_remu.mem' start='0x1352A0' end='0x1352C0' datawidth='32' /><slave name='reg_ring_lane_info_bf.mem' start='0x1352C0' end='0x1352D0' datawidth='32' /><slave name='reg_ring_info.mem' start='0x1352D0' end='0x1352E0' datawidth='32' /><slave name='reg_dp_block_validate_bsn_at_sync_xst.mem' start='0x1352E0' end='0x1352F0' datawidth='32' /><slave name='reg_stat_enable_bst.mem' start='0x1352F0' end='0x135300' datawidth='32' /><slave name='reg_dp_xonoff.mem' start='0x135300' end='0x135310' datawidth='32' /><slave name='reg_bf_scale.mem' start='0x135310' end='0x135320' datawidth='32' /><slave name='pio_pps.mem' start='0x135320' end='0x135330' datawidth='32' /><slave name='reg_nof_crosslets.mem' start='0x135330' end='0x135338' datawidth='32' /><slave name='reg_stat_enable_xst.mem' start='0x135338' end='0x135340' datawidth='32' /><slave name='reg_stat_enable_sst.mem' start='0x135340' end='0x135348' datawidth='32' /><slave name='pio_jesd_ctrl.mem' start='0x135348' end='0x135350' datawidth='32' /><slave name='reg_nw_10gbe_eth10g.mem' start='0x135350' end='0x135358' datawidth='32' /><slave name='reg_dp_selector.mem' start='0x135358' end='0x135360' datawidth='32' /><slave name='reg_bsn_scheduler.mem' start='0x135360' end='0x135368' datawidth='32' /><slave name='reg_si.mem' start='0x135368' end='0x135370' datawidth='32' /><slave name='reg_mmdp_data.mem' start='0x135370' end='0x135378' datawidth='32' /><slave name='reg_mmdp_ctrl.mem' start='0x135378' end='0x135380' datawidth='32' /><slave name='reg_dpmm_data.mem' start='0x135380' end='0x135388' datawidth='32' /><slave name='reg_dpmm_ctrl.mem' start='0x135388' end='0x135390' datawidth='32' /><slave name='jtag_uart_0.avalon_jtag_slave' start='0x135390' end='0x135398' datawidth='32' /><slave name='ram_diag_data_buffer_bsn.mem' start='0x800000' end='0x1000000' datawidth='32' /></address-map></value>
</entry>
<entry>
<key>ADDRESS_WIDTH</key>
@@ -11768,7 +11776,7 @@
</entry>
<entry>
<key>readLatency</key>
- <value>1</value>
+ <value>2</value>
</entry>
<entry>
<key>readWaitStates</key>
@@ -12047,9 +12055,9 @@
</interfaces>
</boundary>
<originalModuleInfo>
- <className>avs_common_mm</className>
+ <className>avs_common_mm_readlatency2</className>
<version>1.0</version>
- <displayName>avs_common_mm</displayName>
+ <displayName>avs_common_mm_readlatency2</displayName>
</originalModuleInfo>
<systemInfoParameterDescriptors>
<descriptors>
@@ -13000,7 +13008,7 @@
</entry>
<entry>
<key>readLatency</key>
- <value>1</value>
+ <value>2</value>
</entry>
<entry>
<key>readWaitStates</key>
@@ -13279,9 +13287,9 @@
</interfaces>
</boundary>
<originalModuleInfo>
- <className>avs_common_mm</className>
+ <className>avs_common_mm_readlatency2</className>
<version>1.0</version>
- <displayName>avs_common_mm</displayName>
+ <displayName>avs_common_mm_readlatency2</displayName>
</originalModuleInfo>
<systemInfoParameterDescriptors>
<descriptors>
@@ -55562,26 +55570,12 @@
end="reg_dp_selector.mem">
<parameter name="baseAddress" value="0x00135358" />
</connection>
- <connection
- kind="avalon"
- version="18.0"
- start="cpu_0.data_master"
- end="ram_equalizer_gains.mem">
- <parameter name="baseAddress" value="0x00110000" />
- </connection>
<connection
kind="avalon"
version="18.0"
start="cpu_0.data_master"
end="ram_ss_ss_wide.mem">
- <parameter name="baseAddress" value="0x00100000" />
- </connection>
- <connection
- kind="avalon"
- version="18.0"
- start="cpu_0.data_master"
- end="ram_bf_weights.mem">
- <parameter name="baseAddress" value="0x000a0000" />
+ <parameter name="baseAddress" value="0x00110000" />
</connection>
<connection
kind="avalon"
@@ -55812,7 +55806,7 @@
version="18.0"
start="cpu_0.data_master"
end="reg_tr_10gbe_mac.mem">
- <parameter name="baseAddress" value="0x00080000" />
+ <parameter name="baseAddress" value="0x000a0000" />
</connection>
<connection
kind="avalon"
@@ -55891,6 +55885,20 @@
end="reg_dp_block_validate_bsn_at_sync_bf.mem">
<parameter name="baseAddress" value="0x00135180" />
</connection>
+ <connection
+ kind="avalon"
+ version="18.0"
+ start="cpu_0.data_master"
+ end="ram_bf_weights.mem">
+ <parameter name="baseAddress" value="0x00080000" />
+ </connection>
+ <connection
+ kind="avalon"
+ version="18.0"
+ start="cpu_0.data_master"
+ end="ram_equalizer_gains.mem">
+ <parameter name="baseAddress" value="0x00100000" />
+ </connection>
<connection
kind="avalon"
version="18.0"
@@ -56052,21 +56060,11 @@
version="18.0"
start="clk_0.clk"
end="reg_dp_selector.system" />
- <connection
- kind="clock"
- version="18.0"
- start="clk_0.clk"
- end="ram_equalizer_gains.system" />
<connection
kind="clock"
version="18.0"
start="clk_0.clk"
end="ram_ss_ss_wide.system" />
- <connection
- kind="clock"
- version="18.0"
- start="clk_0.clk"
- end="ram_bf_weights.system" />
<connection
kind="clock"
version="18.0"
@@ -56279,6 +56277,16 @@
version="18.0"
start="clk_0.clk"
end="reg_dp_block_validate_bsn_at_sync_bf.system" />
+ <connection
+ kind="clock"
+ version="18.0"
+ start="clk_0.clk"
+ end="ram_bf_weights.system" />
+ <connection
+ kind="clock"
+ version="18.0"
+ start="clk_0.clk"
+ end="ram_equalizer_gains.system" />
<connection
kind="interrupt"
version="18.0"
@@ -56455,21 +56463,11 @@
version="18.0"
start="clk_0.clk_reset"
end="reg_dp_selector.system_reset" />
- <connection
- kind="reset"
- version="18.0"
- start="clk_0.clk_reset"
- end="ram_equalizer_gains.system_reset" />
<connection
kind="reset"
version="18.0"
start="clk_0.clk_reset"
end="ram_ss_ss_wide.system_reset" />
- <connection
- kind="reset"
- version="18.0"
- start="clk_0.clk_reset"
- end="ram_bf_weights.system_reset" />
<connection
kind="reset"
version="18.0"
@@ -56690,6 +56688,16 @@
version="18.0"
start="clk_0.clk_reset"
end="reg_dp_block_validate_bsn_at_sync_bf.system_reset" />
+ <connection
+ kind="reset"
+ version="18.0"
+ start="clk_0.clk_reset"
+ end="ram_bf_weights.system_reset" />
+ <connection
+ kind="reset"
+ version="18.0"
+ start="clk_0.clk_reset"
+ end="ram_equalizer_gains.system_reset" />
<connection
kind="reset"
version="18.0"
diff --git a/applications/disturb2/designs/disturb2_unb2b_station/src/vhdl/qsys_disturb2_unb2b_station_pkg.vhd b/applications/disturb2/designs/disturb2_unb2b_station/src/vhdl/qsys_disturb2_unb2b_station_pkg.vhd
index 988e31de47..fc29b21585 100644
--- a/applications/disturb2/designs/disturb2_unb2b_station/src/vhdl/qsys_disturb2_unb2b_station_pkg.vhd
+++ b/applications/disturb2/designs/disturb2_unb2b_station/src/vhdl/qsys_disturb2_unb2b_station_pkg.vhd
@@ -1,6 +1,6 @@
-------------------------------------------------------------------------------
--
--- Copyright 2020
+-- Copyright 2022
-- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/>
-- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands
--
@@ -570,5 +570,6 @@ PACKAGE qsys_disturb2_unb2b_station_pkg IS
rom_system_info_writedata_export : out std_logic_vector(31 downto 0) -- export
);
end component qsys_disturb2_unb2b_station;
+
END qsys_disturb2_unb2b_station_pkg;
--
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