From 30a4d6dbefb2ee014dfd5274028d54dd515e1690 Mon Sep 17 00:00:00 2001
From: Reinier van der Walle <walle@astron.nl>
Date: Mon, 23 Nov 2020 11:06:32 +0100
Subject: [PATCH] changed the ready signal to be used to the actual DUT output.
---
libraries/base/dp/tb/vhdl/tb_dp_xonoff.vhd | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libraries/base/dp/tb/vhdl/tb_dp_xonoff.vhd b/libraries/base/dp/tb/vhdl/tb_dp_xonoff.vhd
index 727cabf21e..2b2f4c0b71 100644
--- a/libraries/base/dp/tb/vhdl/tb_dp_xonoff.vhd
+++ b/libraries/base/dp/tb/vhdl/tb_dp_xonoff.vhd
@@ -254,7 +254,7 @@ BEGIN
proc_dp_verify_block_size(exp_size, clk, verify_snk_in.valid, verify_snk_in.sop, verify_snk_in.eop, cnt_size);
-- Verify output ready latency
- proc_dp_verify_valid(clk, verify_en_valid, verify_snk_out.ready, prev_verify_snk_out.ready, verify_snk_in.valid);
+ proc_dp_verify_valid(clk, verify_en_valid, stimuli_src_in.ready, prev_verify_snk_out.ready, verify_snk_in.valid);
p_verify_xonoff : PROCESS
VARIABLE vI : INTEGER := 0;
--
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