diff --git a/libraries/base/common/src/vhdl/common_ram_cr_cw_ratio.vhd b/libraries/base/common/src/vhdl/common_ram_cr_cw_ratio.vhd
index 445e0306eba3dccd915526c65ccfb1206280b477..d314cdc9f5163c4e2a4bb0a28746479bedf119a1 100644
--- a/libraries/base/common/src/vhdl/common_ram_cr_cw_ratio.vhd
+++ b/libraries/base/common/src/vhdl/common_ram_cr_cw_ratio.vhd
@@ -29,7 +29,7 @@
 --   and unfortunately, the rwk_rw IP isn't supported either, the crk_cw IP
 --   has been created, resulting in modifications to this file.[1]
 -- Reference:
---   [1] Based on the stucture of common_crw_crw_ratio.vhd.
+--   [1] Based on the structure of common_crw_crw_ratio.vhd.
 
 library IEEE, technology_lib, tech_memory_lib;
 use IEEE.std_logic_1164.all;