From 2f90b3f2ab91bd4252662a2fda20a562d90959e3 Mon Sep 17 00:00:00 2001
From: Reinier van der Walle <walle@astron.nl>
Date: Fri, 25 Jun 2021 10:25:39 +0200
Subject: [PATCH] corrected nof_dat 3**2 -> 2**3
---
libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd b/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd
index eb5600b183..9453550440 100644
--- a/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_source_reg_v2.vhd
@@ -82,7 +82,7 @@ ARCHITECTURE rtl OF dp_bsn_source_reg_v2 IS
CONSTANT c_mm_reg : t_c_mem := (latency => 1,
adr_w => 3,
dat_w => c_word_w, -- Use MM bus data width = c_word_w = 32 for all MM registers
- nof_dat => 3**2,
+ nof_dat => 2**3,
init_sl => '0');
-- Registers in mm_clk domain
--
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