From 2edcd98ceced52ad199cd8d26b41af45064f5a8d Mon Sep 17 00:00:00 2001
From: Jonathan Hargreaves <hargreaves@astron.nl>
Date: Fri, 14 Nov 2014 15:37:39 +0000
Subject: [PATCH] latest pinning revision
---
.../build/quartus/unb2_pinning.qsf | 685 ++++++++++--------
.../designs/unb2_pinning/src/ip/ddr4.qsys | 14 +-
.../unb2_pinning/src/vhdl/unb2_pinning.vhd | 33 +-
.../unb2_test/build/quartus/unb2_test.qsf | 11 +
.../designs/unb2_test/src/ip/system_pll.qsys | 17 +-
.../designs/unb2_test/src/vhdl/unb2_test.vhd | 7 +-
6 files changed, 422 insertions(+), 345 deletions(-)
diff --git a/boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning.qsf b/boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning.qsf
index 6e24dea1e5..ce017f1c66 100644
--- a/boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning.qsf
+++ b/boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning.qsf
@@ -66,28 +66,25 @@ set_global_assignment -name ACTIVE_SERIAL_CLOCK FREQ_100MHZ
set_global_assignment -name USER_START_UP_CLOCK ON
# IO Location Assignments from Gijs
-#
-# rx pins modified from chip planner
-# # tx pins as per Gijs
-#
+# qsfp pins modified 23 sept from Gijs
-set_location_assignment PIN_AJ38 -to QSFP_0_RX[0]
-set_location_assignment PIN_AJ37 -to "QSFP_0_RX[0](n)"
-set_location_assignment PIN_AK40 -to QSFP_0_RX[1]
-set_location_assignment PIN_AK39 -to "QSFP_0_RX[1](n)"
-set_location_assignment PIN_AM40 -to QSFP_0_RX[2]
-set_location_assignment PIN_AM39 -to "QSFP_0_RX[2](n)"
-set_location_assignment PIN_AN38 -to QSFP_0_RX[3]
-set_location_assignment PIN_AN37 -to "QSFP_0_RX[3](n)"
-set_location_assignment PIN_AJ42 -to QSFP_0_TX[0]
-set_location_assignment PIN_AJ41 -to "QSFP_0_TX[0](n)"
-set_location_assignment PIN_AK44 -to QSFP_0_TX[1]
-set_location_assignment PIN_AK43 -to "QSFP_0_TX[1](n)"
-set_location_assignment PIN_AM44 -to QSFP_0_TX[2]
-set_location_assignment PIN_AM43 -to "QSFP_0_TX[2](n)"
-set_location_assignment PIN_AN42 -to QSFP_0_TX[3]
-set_location_assignment PIN_AN41 -to "QSFP_0_TX[3](n)"
+set_location_assignment PIN_AN38 -to QSFP_0_RX[0]
+set_location_assignment PIN_AN37 -to "QSFP_0_RX[0](n)"
+set_location_assignment PIN_AM40 -to QSFP_0_RX[1]
+set_location_assignment PIN_AM39 -to "QSFP_0_RX[1](n)"
+set_location_assignment PIN_AK40 -to QSFP_0_RX[2]
+set_location_assignment PIN_AK39 -to "QSFP_0_RX[2](n)"
+set_location_assignment PIN_AJ38 -to QSFP_0_RX[3]
+set_location_assignment PIN_AJ37 -to "QSFP_0_RX[3](n)"
+set_location_assignment PIN_AN42 -to QSFP_0_TX[0]
+set_location_assignment PIN_AN41 -to "QSFP_0_TX[0](n)"
+set_location_assignment PIN_AM44 -to QSFP_0_TX[1]
+set_location_assignment PIN_AM43 -to "QSFP_0_TX[1](n)"
+set_location_assignment PIN_AK44 -to QSFP_0_TX[2]
+set_location_assignment PIN_AK43 -to "QSFP_0_TX[2](n)"
+set_location_assignment PIN_AJ42 -to QSFP_0_TX[3]
+set_location_assignment PIN_AJ41 -to "QSFP_0_TX[3](n)"
set_location_assignment PIN_AC38 -to QSFP_1_RX[0]
set_location_assignment PIN_AC37 -to "QSFP_1_RX[0](n)"
set_location_assignment PIN_AD40 -to QSFP_1_RX[1]
@@ -104,22 +101,22 @@ set_location_assignment PIN_AF44 -to QSFP_1_TX[2]
set_location_assignment PIN_AF43 -to "QSFP_1_TX[2](n)"
set_location_assignment PIN_AG42 -to QSFP_1_TX[3]
set_location_assignment PIN_AG41 -to "QSFP_1_TX[3](n)"
-set_location_assignment PIN_AB40 -to QSFP_2_RX[0]
-set_location_assignment PIN_AB39 -to "QSFP_2_RX[0](n)"
-set_location_assignment PIN_AE38 -to QSFP_2_RX[1]
-set_location_assignment PIN_AE37 -to "QSFP_2_RX[1](n)"
-set_location_assignment PIN_AH40 -to QSFP_2_RX[2]
-set_location_assignment PIN_AH39 -to "QSFP_2_RX[2](n)"
-set_location_assignment PIN_AL38 -to QSFP_2_RX[3]
-set_location_assignment PIN_AL37 -to "QSFP_2_RX[3](n)"
-set_location_assignment PIN_AB44 -to QSFP_2_TX[0]
-set_location_assignment PIN_AB43 -to "QSFP_2_TX[0](n)"
-set_location_assignment PIN_AE42 -to QSFP_2_TX[1]
-set_location_assignment PIN_AE41 -to "QSFP_2_TX[1](n)"
-set_location_assignment PIN_AH44 -to QSFP_2_TX[2]
-set_location_assignment PIN_AH43 -to "QSFP_2_TX[2](n)"
-set_location_assignment PIN_AL42 -to QSFP_2_TX[3]
-set_location_assignment PIN_AL41 -to "QSFP_2_TX[3](n)"
+set_location_assignment PIN_AL38 -to QSFP_2_RX[0]
+set_location_assignment PIN_AL37 -to "QSFP_2_RX[0](n)"
+set_location_assignment PIN_AH40 -to QSFP_2_RX[1]
+set_location_assignment PIN_AH39 -to "QSFP_2_RX[1](n)"
+set_location_assignment PIN_AE38 -to QSFP_2_RX[2]
+set_location_assignment PIN_AE37 -to "QSFP_2_RX[2](n)"
+set_location_assignment PIN_AB40 -to QSFP_2_RX[3]
+set_location_assignment PIN_AB39 -to "QSFP_2_RX[3](n)"
+set_location_assignment PIN_AL42 -to QSFP_2_TX[0]
+set_location_assignment PIN_AL41 -to "QSFP_2_TX[0](n)"
+set_location_assignment PIN_AH44 -to QSFP_2_TX[1]
+set_location_assignment PIN_AH43 -to "QSFP_2_TX[1](n)"
+set_location_assignment PIN_AE42 -to QSFP_2_TX[2]
+set_location_assignment PIN_AE41 -to "QSFP_2_TX[2](n)"
+set_location_assignment PIN_AB44 -to QSFP_2_TX[3]
+set_location_assignment PIN_AB43 -to "QSFP_2_TX[3](n)"
set_location_assignment PIN_W38 -to QSFP_3_RX[0]
set_location_assignment PIN_W37 -to "QSFP_3_RX[0](n)"
set_location_assignment PIN_T40 -to QSFP_3_RX[1]
@@ -136,22 +133,22 @@ set_location_assignment PIN_N42 -to QSFP_3_TX[2]
set_location_assignment PIN_N41 -to "QSFP_3_TX[2](n)"
set_location_assignment PIN_K44 -to QSFP_3_TX[3]
set_location_assignment PIN_K43 -to "QSFP_3_TX[3](n)"
-set_location_assignment PIN_U38 -to QSFP_4_RX[0]
-set_location_assignment PIN_U37 -to "QSFP_4_RX[0](n)"
-set_location_assignment PIN_V40 -to QSFP_4_RX[1]
-set_location_assignment PIN_V39 -to "QSFP_4_RX[1](n)"
-set_location_assignment PIN_Y40 -to QSFP_4_RX[2]
-set_location_assignment PIN_Y39 -to "QSFP_4_RX[2](n)"
-set_location_assignment PIN_AA38 -to QSFP_4_RX[3]
-set_location_assignment PIN_AA37 -to "QSFP_4_RX[3](n)"
-set_location_assignment PIN_U42 -to QSFP_4_TX[0]
-set_location_assignment PIN_U41 -to "QSFP_4_TX[0](n)"
-set_location_assignment PIN_V44 -to QSFP_4_TX[1]
-set_location_assignment PIN_V43 -to "QSFP_4_TX[1](n)"
-set_location_assignment PIN_Y44 -to QSFP_4_TX[2]
-set_location_assignment PIN_Y43 -to "QSFP_4_TX[2](n)"
-set_location_assignment PIN_AA42 -to QSFP_4_TX[3]
-set_location_assignment PIN_AA41 -to "QSFP_4_TX[3](n)"
+set_location_assignment PIN_AA38 -to QSFP_4_RX[0]
+set_location_assignment PIN_AA37 -to "QSFP_4_RX[0](n)"
+set_location_assignment PIN_Y40 -to QSFP_4_RX[1]
+set_location_assignment PIN_Y39 -to "QSFP_4_RX[1](n)"
+set_location_assignment PIN_V40 -to QSFP_4_RX[2]
+set_location_assignment PIN_V39 -to "QSFP_4_RX[2](n)"
+set_location_assignment PIN_U38 -to QSFP_4_RX[3]
+set_location_assignment PIN_U37 -to "QSFP_4_RX[3](n)"
+set_location_assignment PIN_AA42 -to QSFP_4_TX[0]
+set_location_assignment PIN_AA41 -to "QSFP_4_TX[0](n)"
+set_location_assignment PIN_Y44 -to QSFP_4_TX[1]
+set_location_assignment PIN_Y43 -to "QSFP_4_TX[1](n)"
+set_location_assignment PIN_V44 -to QSFP_4_TX[2]
+set_location_assignment PIN_V43 -to "QSFP_4_TX[2](n)"
+set_location_assignment PIN_U42 -to QSFP_4_TX[3]
+set_location_assignment PIN_U41 -to "QSFP_4_TX[3](n)"
set_location_assignment PIN_L38 -to QSFP_5_RX[0]
set_location_assignment PIN_L37 -to "QSFP_5_RX[0](n)"
set_location_assignment PIN_M40 -to QSFP_5_RX[1]
@@ -168,8 +165,7 @@ set_location_assignment PIN_P44 -to QSFP_5_TX[2]
set_location_assignment PIN_P43 -to "QSFP_5_TX[2](n)"
set_location_assignment PIN_R42 -to QSFP_5_TX[3]
set_location_assignment PIN_R41 -to "QSFP_5_TX[3](n)"
-#
-#
+
set_location_assignment PIN_K15 -to CLK
set_location_assignment PIN_J15 -to "CLK(n)"
set_location_assignment PIN_N12 -to ETH_CLK
@@ -179,8 +175,6 @@ set_location_assignment PIN_Y36 -to SA_CLK
set_location_assignment PIN_Y35 -to "SA_CLK(n)"
set_location_assignment PIN_AH9 -to SB_CLK
set_location_assignment PIN_AH10 -to "SB_CLK(n)"
-# eth sgin (1) located by quartus
-
#set_location_assignment PIN_AT33 -to CFG_DATA[0]
#set_location_assignment PIN_AT32 -to CFG_DATA[1]
@@ -250,7 +244,7 @@ set_location_assignment PIN_BD19 -to MB_I_ODT[0]
set_location_assignment PIN_AR17 -to MB_I_ODT[1]
set_location_assignment PIN_BC18 -to MB_I_PARITY[0]
set_location_assignment PIN_BB15 -to MB_I_RAS_A16
-set_location_assignment PIN_BB21 -to MB_I_REF_CLK
+set_location_assignment PIN_AW17 -to MB_I_REF_CLK
set_location_assignment PIN_AV19 -to MB_I_RESET_N[0]
set_location_assignment PIN_AY17 -to MB_I_RZQ
set_location_assignment PIN_BC17 -to MB_I_WE_A14
@@ -314,9 +308,11 @@ set_location_assignment PIN_K30 -to MB_II_ODT[0]
set_location_assignment PIN_R27 -to MB_II_ODT[1]
set_location_assignment PIN_R28 -to MB_II_PARITY[0]
set_location_assignment PIN_G28 -to MB_II_RAS_A16
-set_location_assignment PIN_G31 -to MB_II_REF_CLK
+set_location_assignment PIN_J29 -to MB_II_REF_CLK
set_location_assignment PIN_L28 -to MB_II_RESET_N[0]
-set_location_assignment PIN_P20 -to MB_II_RZQ
+# RZQ changed after Altera review
+#set_location_assignment PIN_P20 -to MB_II_RZQ
+set_location_assignment PIN_J27 -to MB_II_RZQ
set_location_assignment PIN_F27 -to MB_II_WE_A14
# IO Standard Assignments from Gijs (excluding memory)
@@ -452,18 +448,19 @@ set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[2]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[3]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[4]
set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[5]
-set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[6]
-set_instance_assignment -name IO_STANDARD "1.8 V" -to TESTIO[7]
set_instance_assignment -name IO_STANDARD "1.8 V" -to VERSION[0]
set_instance_assignment -name IO_STANDARD "1.8 V" -to VERSION[1]
set_instance_assignment -name IO_STANDARD "1.8 V" -to WDI
-set_location_assignment PIN_U12 -to ID[0]
-set_location_assignment PIN_V12 -to ID[1]
-set_location_assignment PIN_Y12 -to ID[2]
-set_location_assignment PIN_U14 -to ID[3]
-set_location_assignment PIN_U13 -to ID[4]
-set_location_assignment PIN_Y13 -to ID[5]
-set_location_assignment PIN_AA12 -to ID[6]
+
+# locations changed 30 sept
+set_location_assignment PIN_P16 -to ID[0]
+set_location_assignment PIN_P15 -to ID[1]
+set_location_assignment PIN_K13 -to ID[2]
+set_location_assignment PIN_L13 -to ID[3]
+set_location_assignment PIN_N16 -to ID[4]
+set_location_assignment PIN_N14 -to ID[5]
+set_location_assignment PIN_U13 -to ID[6]
+
set_location_assignment PIN_T13 -to ID[7]
set_location_assignment PIN_AU31 -to INTA
set_location_assignment PIN_AR30 -to INTB
@@ -474,69 +471,68 @@ set_location_assignment PIN_BC31 -to SENS_SC
set_location_assignment PIN_BB31 -to SENS_SD
set_location_assignment PIN_AN32 -to TESTIO[0]
set_location_assignment PIN_AP32 -to TESTIO[1]
-set_location_assignment PIN_AP30 -to TESTIO[2]
-set_location_assignment PIN_AP31 -to TESTIO[3]
+set_location_assignment PIN_AT30 -to TESTIO[2]
+set_location_assignment PIN_BD31 -to TESTIO[3]
set_location_assignment PIN_AU30 -to TESTIO[4]
set_location_assignment PIN_BD30 -to TESTIO[5]
-set_location_assignment PIN_AT30 -to TESTIO[6]
-set_location_assignment PIN_BD31 -to TESTIO[7]
+set_location_assignment PIN_BA33 -to QSFP_LED[0]
+set_location_assignment PIN_BA30 -to QSFP_LED[1]
+set_location_assignment PIN_BB33 -to QSFP_LED[2]
+set_location_assignment PIN_AU33 -to QSFP_LED[3]
+set_location_assignment PIN_AV32 -to QSFP_LED[4]
+set_location_assignment PIN_AW30 -to QSFP_LED[5]
+set_location_assignment PIN_AP31 -to QSFP_LED[6]
+set_location_assignment PIN_AP30 -to QSFP_LED[7]
+set_location_assignment PIN_AT33 -to QSFP_LED[8]
+set_location_assignment PIN_AG32 -to QSFP_LED[9]
+set_location_assignment PIN_AF32 -to QSFP_LED[10]
+set_location_assignment PIN_AE32 -to QSFP_LED[11]
+
set_location_assignment PIN_AB12 -to VERSION[0]
set_location_assignment PIN_AB13 -to VERSION[1]
set_location_assignment PIN_BB30 -to WDI
-set_location_assignment PIN_N16 -to MB_SCL
-set_location_assignment PIN_P16 -to MB_SDA
-set_location_assignment PIN_N14 -to BCK_SCL[0]
-set_location_assignment PIN_P14 -to BCK_SCL[1]
-set_location_assignment PIN_R14 -to BCK_SCL[2]
-set_location_assignment PIN_R13 -to BCK_SDA[0]
-set_location_assignment PIN_P15 -to BCK_SDA[1]
-set_location_assignment PIN_T12 -to BCK_SDA[2]
-set_location_assignment PIN_AT31 -to QSFP_RST
-set_location_assignment PIN_AK33 -to QSFP_SCL[0]
-set_location_assignment PIN_AM33 -to QSFP_SCL[1]
-set_location_assignment PIN_AH32 -to QSFP_SCL[2]
-set_location_assignment PIN_AN31 -to QSFP_SCL[3]
-set_location_assignment PIN_AN33 -to QSFP_SCL[4]
-set_location_assignment PIN_AP33 -to QSFP_SCL[5]
-set_location_assignment PIN_AY30 -to QSFP_SDA[0]
-set_location_assignment PIN_AY32 -to QSFP_SDA[1]
-set_location_assignment PIN_AY33 -to QSFP_SDA[2]
-set_location_assignment PIN_AK32 -to QSFP_SDA[3]
-set_location_assignment PIN_BA31 -to QSFP_SDA[4]
-set_location_assignment PIN_BA32 -to QSFP_SDA[5]
-set_location_assignment PIN_K13 -to BCK_ERR[0]
-set_location_assignment PIN_L13 -to BCK_ERR[1]
-set_location_assignment PIN_M13 -to BCK_ERR[2]
+# locations changed 30 sept
+set_location_assignment PIN_Y12 -to MB_SCL
+set_location_assignment PIN_AA12 -to MB_SDA
+set_location_assignment PIN_R14 -to BCK_SCL[0]
+set_location_assignment PIN_Y13 -to BCK_SCL[1]
+set_location_assignment PIN_U14 -to BCK_SCL[2]
+set_location_assignment PIN_P14 -to BCK_SDA[0]
+set_location_assignment PIN_T12 -to BCK_SDA[1]
+set_location_assignment PIN_V12 -to BCK_SDA[2]
+
+set_location_assignment PIN_AT31 -to QSFP_RST
-set_location_assignment PIN_H13 -to ETH_SGIN[0]
-set_location_assignment PIN_H12 -to "ETH_SGIN[0](n)"
+# locations changed 30 sept
+set_location_assignment PIN_AY33 -to QSFP_SCL[0]
+set_location_assignment PIN_AY32 -to QSFP_SCL[1]
+set_location_assignment PIN_AY30 -to QSFP_SCL[2]
+set_location_assignment PIN_AN33 -to QSFP_SCL[3]
+set_location_assignment PIN_AN31 -to QSFP_SCL[4]
+set_location_assignment PIN_AJ33 -to QSFP_SCL[5]
+set_location_assignment PIN_BA32 -to QSFP_SDA[0]
+set_location_assignment PIN_BA31 -to QSFP_SDA[1]
+set_location_assignment PIN_AP33 -to QSFP_SDA[2]
+set_location_assignment PIN_AM33 -to QSFP_SDA[3]
+set_location_assignment PIN_AK33 -to QSFP_SDA[4]
+set_location_assignment PIN_AH32 -to QSFP_SDA[5]
+set_location_assignment PIN_M13 -to BCK_ERR[0]
+set_location_assignment PIN_R13 -to BCK_ERR[1]
+set_location_assignment PIN_U12 -to BCK_ERR[2]
+set_location_assignment PIN_K12 -to ETH_SGIN[0]
+set_location_assignment PIN_J12 -to "ETH_SGIN[0](n)"
set_location_assignment PIN_AF33 -to ETH_SGIN[1]
set_location_assignment PIN_AE33 -to "ETH_SGIN[1](n)"
-set_location_assignment PIN_K12 -to ETH_SGOUT[0]
-set_location_assignment PIN_J12 -to "ETH_SGOUT[0](n)"
+set_location_assignment PIN_H13 -to ETH_SGOUT[0]
+set_location_assignment PIN_H12 -to "ETH_SGOUT[0](n)"
set_location_assignment PIN_AW31 -to ETH_SGOUT[1]
set_location_assignment PIN_AV31 -to "ETH_SGOUT[1](n)"
+
set_instance_assignment -name IO_STANDARD LVDS -to PPS
set_instance_assignment -name IO_STANDARD LVDS -to "PPS(n)"
set_instance_assignment -name IO_STANDARD LVDS -to CLK
set_instance_assignment -name IO_STANDARD LVDS -to "CLK(n)"
-set_location_assignment PIN_AP40 -to RING_0_RX[0]
-set_location_assignment PIN_AR38 -to RING_0_RX[1]
-set_location_assignment PIN_AT40 -to RING_0_RX[2]
-set_location_assignment PIN_AU38 -to RING_0_RX[3]
-set_location_assignment PIN_AP44 -to RING_0_TX[0]
-set_location_assignment PIN_AR42 -to RING_0_TX[1]
-set_location_assignment PIN_AT44 -to RING_0_TX[2]
-set_location_assignment PIN_AU42 -to RING_0_TX[3]
-set_location_assignment PIN_J38 -to RING_1_RX[0]
-set_location_assignment PIN_H40 -to RING_1_RX[1]
-set_location_assignment PIN_G38 -to RING_1_RX[2]
-set_location_assignment PIN_F40 -to RING_1_RX[3]
-set_location_assignment PIN_J42 -to RING_1_TX[0]
-set_location_assignment PIN_H44 -to RING_1_TX[1]
-set_location_assignment PIN_F44 -to RING_1_TX[2]
-set_location_assignment PIN_G42 -to RING_1_TX[3]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to RING_0_RX[0]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to "RING_0_RX[0](n)"
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to RING_0_RX[1]
@@ -569,166 +565,195 @@ set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to RING
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to "RING_1_TX[2](n)"
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to RING_1_TX[3]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to "RING_1_TX[3](n)"
-set_location_assignment PIN_C11 -to BCK_RX[0]
-set_location_assignment PIN_C12 -to "BCK_RX[0](n)"
-set_location_assignment PIN_E11 -to BCK_RX[1]
-set_location_assignment PIN_E12 -to "BCK_RX[1](n)"
-set_location_assignment PIN_D9 -to BCK_RX[2]
-set_location_assignment PIN_D10 -to "BCK_RX[2](n)"
-set_location_assignment PIN_C7 -to BCK_RX[3]
-set_location_assignment PIN_C8 -to "BCK_RX[3](n)"
-set_location_assignment PIN_D5 -to BCK_RX[4]
-set_location_assignment PIN_D6 -to "BCK_RX[4](n)"
-set_location_assignment PIN_F9 -to BCK_RX[5]
-set_location_assignment PIN_F10 -to "BCK_RX[5](n)"
+
+# Enable internal termination for LVDS inputs
+set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to PPS
+set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to CLK
+set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to ETH_SGIN[0]
+set_instance_assignment -name INPUT_TERMINATION DIFFERENTIAL -to ETH_SGIN[1]
+
+# new bck transceiver signals 23 sept from Gijs
+#
+
+set_location_assignment PIN_B9 -to BCK_RX[0]
+set_location_assignment PIN_B10 -to "BCK_RX[0](n)"
+set_location_assignment PIN_D9 -to BCK_RX[1]
+set_location_assignment PIN_D10 -to "BCK_RX[1](n)"
+set_location_assignment PIN_C11 -to BCK_RX[2]
+set_location_assignment PIN_C12 -to "BCK_RX[2](n)"
+set_location_assignment PIN_F9 -to BCK_RX[3]
+set_location_assignment PIN_F10 -to "BCK_RX[3](n)"
+set_location_assignment PIN_C7 -to BCK_RX[4]
+set_location_assignment PIN_C8 -to "BCK_RX[4](n)"
+set_location_assignment PIN_E11 -to BCK_RX[5]
+set_location_assignment PIN_E12 -to "BCK_RX[5](n)"
set_location_assignment PIN_E7 -to BCK_RX[6]
set_location_assignment PIN_E8 -to "BCK_RX[6](n)"
-set_location_assignment PIN_B9 -to BCK_RX[7]
-set_location_assignment PIN_B10 -to "BCK_RX[7](n)"
-set_location_assignment PIN_F5 -to BCK_RX[8]
-set_location_assignment PIN_F6 -to "BCK_RX[8](n)"
-set_location_assignment PIN_G7 -to BCK_RX[9]
-set_location_assignment PIN_G8 -to "BCK_RX[9](n)"
-set_location_assignment PIN_H5 -to BCK_RX[10]
-set_location_assignment PIN_H6 -to "BCK_RX[10](n)"
-set_location_assignment PIN_J7 -to BCK_RX[11]
-set_location_assignment PIN_J8 -to "BCK_RX[11](n)"
-set_location_assignment PIN_K5 -to BCK_RX[12]
-set_location_assignment PIN_K6 -to "BCK_RX[12](n)"
-set_location_assignment PIN_L7 -to BCK_RX[13]
-set_location_assignment PIN_L8 -to "BCK_RX[13](n)"
-set_location_assignment PIN_M5 -to BCK_RX[14]
-set_location_assignment PIN_M6 -to "BCK_RX[14](n)"
-set_location_assignment PIN_N7 -to BCK_RX[15]
-set_location_assignment PIN_N8 -to "BCK_RX[15](n)"
-set_location_assignment PIN_P5 -to BCK_RX[16]
-set_location_assignment PIN_P6 -to "BCK_RX[16](n)"
-set_location_assignment PIN_R7 -to BCK_RX[17]
-set_location_assignment PIN_R8 -to "BCK_RX[17](n)"
-set_location_assignment PIN_T5 -to BCK_RX[18]
-set_location_assignment PIN_T6 -to "BCK_RX[18](n)"
-set_location_assignment PIN_U7 -to BCK_RX[19]
-set_location_assignment PIN_U8 -to "BCK_RX[19](n)"
-set_location_assignment PIN_V5 -to BCK_RX[20]
-set_location_assignment PIN_V6 -to "BCK_RX[20](n)"
-set_location_assignment PIN_W7 -to BCK_RX[21]
-set_location_assignment PIN_W8 -to "BCK_RX[21](n)"
-set_location_assignment PIN_Y5 -to BCK_RX[22]
-set_location_assignment PIN_Y6 -to "BCK_RX[22](n)"
-set_location_assignment PIN_AA7 -to BCK_RX[23]
-set_location_assignment PIN_AA8 -to "BCK_RX[23](n)"
-set_location_assignment PIN_AB5 -to BCK_RX[24]
-set_location_assignment PIN_AB6 -to "BCK_RX[24](n)"
-set_location_assignment PIN_AC7 -to BCK_RX[25]
-set_location_assignment PIN_AC8 -to "BCK_RX[25](n)"
-set_location_assignment PIN_AD5 -to BCK_RX[26]
-set_location_assignment PIN_AD6 -to "BCK_RX[26](n)"
-set_location_assignment PIN_AE7 -to BCK_RX[27]
-set_location_assignment PIN_AE8 -to "BCK_RX[27](n)"
-set_location_assignment PIN_AF5 -to BCK_RX[28]
-set_location_assignment PIN_AF6 -to "BCK_RX[28](n)"
-set_location_assignment PIN_AG7 -to BCK_RX[29]
-set_location_assignment PIN_AG8 -to "BCK_RX[29](n)"
-set_location_assignment PIN_AH5 -to BCK_RX[30]
-set_location_assignment PIN_AH6 -to "BCK_RX[30](n)"
-set_location_assignment PIN_AJ7 -to BCK_RX[31]
-set_location_assignment PIN_AJ8 -to "BCK_RX[31](n)"
-set_location_assignment PIN_AK5 -to BCK_RX[32]
-set_location_assignment PIN_AK6 -to "BCK_RX[32](n)"
-set_location_assignment PIN_AL7 -to BCK_RX[33]
-set_location_assignment PIN_AL8 -to "BCK_RX[33](n)"
-set_location_assignment PIN_AM5 -to BCK_RX[34]
-set_location_assignment PIN_AM6 -to "BCK_RX[34](n)"
-set_location_assignment PIN_AN7 -to BCK_RX[35]
-set_location_assignment PIN_AN8 -to "BCK_RX[35](n)"
-set_location_assignment PIN_AP5 -to BCK_RX[36]
-set_location_assignment PIN_AP6 -to "BCK_RX[36](n)"
-set_location_assignment PIN_AR7 -to BCK_RX[37]
-set_location_assignment PIN_AR8 -to "BCK_RX[37](n)"
-set_location_assignment PIN_AT5 -to BCK_RX[38]
-set_location_assignment PIN_AT6 -to "BCK_RX[38](n)"
-set_location_assignment PIN_AU7 -to BCK_RX[39]
-set_location_assignment PIN_AU8 -to "BCK_RX[39](n)"
-set_location_assignment PIN_AV5 -to BCK_RX[40]
-set_location_assignment PIN_AV6 -to "BCK_RX[40](n)"
-set_location_assignment PIN_AW7 -to BCK_RX[41]
-set_location_assignment PIN_AW8 -to "BCK_RX[41](n)"
-set_location_assignment PIN_AY5 -to BCK_RX[42]
-set_location_assignment PIN_AY6 -to "BCK_RX[42](n)"
-set_location_assignment PIN_AY9 -to BCK_RX[43]
-set_location_assignment PIN_AY10 -to "BCK_RX[43](n)"
-set_location_assignment PIN_BA7 -to BCK_RX[44]
-set_location_assignment PIN_BA8 -to "BCK_RX[44](n)"
+set_location_assignment PIN_D5 -to BCK_RX[7]
+set_location_assignment PIN_D6 -to "BCK_RX[7](n)"
+set_location_assignment PIN_G7 -to BCK_RX[8]
+set_location_assignment PIN_G8 -to "BCK_RX[8](n)"
+set_location_assignment PIN_F5 -to BCK_RX[9]
+set_location_assignment PIN_F6 -to "BCK_RX[9](n)"
+set_location_assignment PIN_J7 -to BCK_RX[10]
+set_location_assignment PIN_J8 -to "BCK_RX[10](n)"
+set_location_assignment PIN_H5 -to BCK_RX[11]
+set_location_assignment PIN_H6 -to "BCK_RX[11](n)"
+set_location_assignment PIN_L7 -to BCK_RX[12]
+set_location_assignment PIN_L8 -to "BCK_RX[12](n)"
+set_location_assignment PIN_K5 -to BCK_RX[13]
+set_location_assignment PIN_K6 -to "BCK_RX[13](n)"
+set_location_assignment PIN_N7 -to BCK_RX[14]
+set_location_assignment PIN_N8 -to "BCK_RX[14](n)"
+set_location_assignment PIN_M5 -to BCK_RX[15]
+set_location_assignment PIN_M6 -to "BCK_RX[15](n)"
+set_location_assignment PIN_R7 -to BCK_RX[16]
+set_location_assignment PIN_R8 -to "BCK_RX[16](n)"
+set_location_assignment PIN_P5 -to BCK_RX[17]
+set_location_assignment PIN_P6 -to "BCK_RX[17](n)"
+set_location_assignment PIN_U7 -to BCK_RX[18]
+set_location_assignment PIN_U8 -to "BCK_RX[18](n)"
+set_location_assignment PIN_T5 -to BCK_RX[19]
+set_location_assignment PIN_T6 -to "BCK_RX[19](n)"
+set_location_assignment PIN_W7 -to BCK_RX[20]
+set_location_assignment PIN_W8 -to "BCK_RX[20](n)"
+set_location_assignment PIN_V5 -to BCK_RX[21]
+set_location_assignment PIN_V6 -to "BCK_RX[21](n)"
+set_location_assignment PIN_AA7 -to BCK_RX[22]
+set_location_assignment PIN_AA8 -to "BCK_RX[22](n)"
+set_location_assignment PIN_Y5 -to BCK_RX[23]
+set_location_assignment PIN_Y6 -to "BCK_RX[23](n)"
+set_location_assignment PIN_AC7 -to BCK_RX[24]
+set_location_assignment PIN_AC8 -to "BCK_RX[24](n)"
+set_location_assignment PIN_AB5 -to BCK_RX[25]
+set_location_assignment PIN_AB6 -to "BCK_RX[25](n)"
+set_location_assignment PIN_AE7 -to BCK_RX[26]
+set_location_assignment PIN_AE8 -to "BCK_RX[26](n)"
+set_location_assignment PIN_AD5 -to BCK_RX[27]
+set_location_assignment PIN_AD6 -to "BCK_RX[27](n)"
+set_location_assignment PIN_AG7 -to BCK_RX[28]
+set_location_assignment PIN_AG8 -to "BCK_RX[28](n)"
+set_location_assignment PIN_AF5 -to BCK_RX[29]
+set_location_assignment PIN_AF6 -to "BCK_RX[29](n)"
+set_location_assignment PIN_AJ7 -to BCK_RX[30]
+set_location_assignment PIN_AJ8 -to "BCK_RX[30](n)"
+set_location_assignment PIN_AH5 -to BCK_RX[31]
+set_location_assignment PIN_AH6 -to "BCK_RX[31](n)"
+set_location_assignment PIN_AL7 -to BCK_RX[32]
+set_location_assignment PIN_AL8 -to "BCK_RX[32](n)"
+set_location_assignment PIN_AK5 -to BCK_RX[33]
+set_location_assignment PIN_AK6 -to "BCK_RX[33](n)"
+set_location_assignment PIN_AN7 -to BCK_RX[34]
+set_location_assignment PIN_AN8 -to "BCK_RX[34](n)"
+set_location_assignment PIN_AM5 -to BCK_RX[35]
+set_location_assignment PIN_AM6 -to "BCK_RX[35](n)"
+set_location_assignment PIN_AR7 -to BCK_RX[36]
+set_location_assignment PIN_AR8 -to "BCK_RX[36](n)"
+set_location_assignment PIN_AP5 -to BCK_RX[37]
+set_location_assignment PIN_AP6 -to "BCK_RX[37](n)"
+set_location_assignment PIN_AU7 -to BCK_RX[38]
+set_location_assignment PIN_AU8 -to "BCK_RX[38](n)"
+set_location_assignment PIN_AT5 -to BCK_RX[39]
+set_location_assignment PIN_AT6 -to "BCK_RX[39](n)"
+set_location_assignment PIN_AW7 -to BCK_RX[40]
+set_location_assignment PIN_AW8 -to "BCK_RX[40](n)"
+set_location_assignment PIN_AV5 -to BCK_RX[41]
+set_location_assignment PIN_AV6 -to "BCK_RX[41](n)"
+set_location_assignment PIN_BA7 -to BCK_RX[42]
+set_location_assignment PIN_BA8 -to "BCK_RX[42](n)"
+set_location_assignment PIN_AY5 -to BCK_RX[43]
+set_location_assignment PIN_AY6 -to "BCK_RX[43](n)"
+set_location_assignment PIN_BC7 -to BCK_RX[44]
+set_location_assignment PIN_BC8 -to "BCK_RX[44](n)"
set_location_assignment PIN_BB5 -to BCK_RX[45]
set_location_assignment PIN_BB6 -to "BCK_RX[45](n)"
-set_location_assignment PIN_BB9 -to BCK_RX[46]
-set_location_assignment PIN_BB10 -to "BCK_RX[46](n)"
-set_location_assignment PIN_BC7 -to BCK_RX[47]
-set_location_assignment PIN_BC8 -to "BCK_RX[47](n)"
-set_location_assignment PIN_A11 -to BCK_TX[0]
-set_location_assignment PIN_A7 -to BCK_TX[1]
-set_location_assignment PIN_A3 -to BCK_TX[2]
-set_location_assignment PIN_C3 -to BCK_TX[3]
-set_location_assignment PIN_E3 -to BCK_TX[4]
-set_location_assignment PIN_B1 -to BCK_TX[5]
+set_location_assignment PIN_AY9 -to BCK_RX[46]
+set_location_assignment PIN_AY10 -to "BCK_RX[46](n)"
+set_location_assignment PIN_BB9 -to BCK_RX[47]
+set_location_assignment PIN_BB10 -to "BCK_RX[47](n)"
+
+set_location_assignment PIN_B5 -to BCK_TX[0]
+set_location_assignment PIN_A3 -to BCK_TX[1]
+set_location_assignment PIN_A11 -to BCK_TX[2]
+set_location_assignment PIN_B1 -to BCK_TX[3]
+set_location_assignment PIN_C3 -to BCK_TX[4]
+set_location_assignment PIN_A7 -to BCK_TX[5]
set_location_assignment PIN_D1 -to BCK_TX[6]
-set_location_assignment PIN_B5 -to BCK_TX[7]
-set_location_assignment PIN_G3 -to BCK_TX[8]
-set_location_assignment PIN_F1 -to BCK_TX[9]
-set_location_assignment PIN_H1 -to BCK_TX[10]
-set_location_assignment PIN_J3 -to BCK_TX[11]
-set_location_assignment PIN_K1 -to BCK_TX[12]
-set_location_assignment PIN_L3 -to BCK_TX[13]
-set_location_assignment PIN_M1 -to BCK_TX[14]
-set_location_assignment PIN_N3 -to BCK_TX[15]
-set_location_assignment PIN_P1 -to BCK_TX[16]
-set_location_assignment PIN_R3 -to BCK_TX[17]
-set_location_assignment PIN_T1 -to BCK_TX[18]
-set_location_assignment PIN_U3 -to BCK_TX[19]
-set_location_assignment PIN_V1 -to BCK_TX[20]
-set_location_assignment PIN_W3 -to BCK_TX[21]
-set_location_assignment PIN_Y1 -to BCK_TX[22]
-set_location_assignment PIN_AA3 -to BCK_TX[23]
-set_location_assignment PIN_AB1 -to BCK_TX[24]
-set_location_assignment PIN_AC3 -to BCK_TX[25]
-set_location_assignment PIN_AD1 -to BCK_TX[26]
-set_location_assignment PIN_AE3 -to BCK_TX[27]
-set_location_assignment PIN_AF1 -to BCK_TX[28]
-set_location_assignment PIN_AG3 -to BCK_TX[29]
-set_location_assignment PIN_AH1 -to BCK_TX[30]
-set_location_assignment PIN_AJ3 -to BCK_TX[31]
-set_location_assignment PIN_AK1 -to BCK_TX[32]
-set_location_assignment PIN_AL3 -to BCK_TX[33]
-set_location_assignment PIN_AM1 -to BCK_TX[34]
-set_location_assignment PIN_AN3 -to BCK_TX[35]
-set_location_assignment PIN_AP1 -to BCK_TX[36]
-set_location_assignment PIN_AR3 -to BCK_TX[37]
-set_location_assignment PIN_AT1 -to BCK_TX[38]
-set_location_assignment PIN_AU3 -to BCK_TX[39]
-set_location_assignment PIN_AV1 -to BCK_TX[40]
-set_location_assignment PIN_AW3 -to BCK_TX[41]
-set_location_assignment PIN_AY1 -to BCK_TX[42]
-set_location_assignment PIN_BC3 -to BCK_TX[43]
-set_location_assignment PIN_BB1 -to BCK_TX[44]
+set_location_assignment PIN_E3 -to BCK_TX[7]
+set_location_assignment PIN_F1 -to BCK_TX[8]
+set_location_assignment PIN_G3 -to BCK_TX[9]
+set_location_assignment PIN_J3 -to BCK_TX[10]
+set_location_assignment PIN_H1 -to BCK_TX[11]
+set_location_assignment PIN_L3 -to BCK_TX[12]
+set_location_assignment PIN_K1 -to BCK_TX[13]
+set_location_assignment PIN_N3 -to BCK_TX[14]
+set_location_assignment PIN_M1 -to BCK_TX[15]
+set_location_assignment PIN_R3 -to BCK_TX[16]
+set_location_assignment PIN_P1 -to BCK_TX[17]
+set_location_assignment PIN_U3 -to BCK_TX[18]
+set_location_assignment PIN_T1 -to BCK_TX[19]
+set_location_assignment PIN_W3 -to BCK_TX[20]
+set_location_assignment PIN_V1 -to BCK_TX[21]
+set_location_assignment PIN_AA3 -to BCK_TX[22]
+set_location_assignment PIN_Y1 -to BCK_TX[23]
+set_location_assignment PIN_AC3 -to BCK_TX[24]
+set_location_assignment PIN_AB1 -to BCK_TX[25]
+set_location_assignment PIN_AE3 -to BCK_TX[26]
+set_location_assignment PIN_AD1 -to BCK_TX[27]
+set_location_assignment PIN_AG3 -to BCK_TX[28]
+set_location_assignment PIN_AF1 -to BCK_TX[29]
+set_location_assignment PIN_AJ3 -to BCK_TX[30]
+set_location_assignment PIN_AH1 -to BCK_TX[31]
+set_location_assignment PIN_AL3 -to BCK_TX[32]
+set_location_assignment PIN_AK1 -to BCK_TX[33]
+set_location_assignment PIN_AN3 -to BCK_TX[34]
+set_location_assignment PIN_AM1 -to BCK_TX[35]
+set_location_assignment PIN_AR3 -to BCK_TX[36]
+set_location_assignment PIN_AP1 -to BCK_TX[37]
+set_location_assignment PIN_AU3 -to BCK_TX[38]
+set_location_assignment PIN_AT1 -to BCK_TX[39]
+set_location_assignment PIN_AW3 -to BCK_TX[40]
+set_location_assignment PIN_AV1 -to BCK_TX[41]
+set_location_assignment PIN_BB1 -to BCK_TX[42]
+set_location_assignment PIN_AY1 -to BCK_TX[43]
+set_location_assignment PIN_BD5 -to BCK_TX[44]
set_location_assignment PIN_BA3 -to BCK_TX[45]
-set_location_assignment PIN_BD9 -to BCK_TX[46]
-set_location_assignment PIN_BD5 -to BCK_TX[47]
+set_location_assignment PIN_BC3 -to BCK_TX[46]
+set_location_assignment PIN_BD9 -to BCK_TX[47]
+
+set_location_assignment PIN_AP40 -to RING_0_RX[0]
+set_location_assignment PIN_AR38 -to RING_0_RX[1]
+set_location_assignment PIN_AT40 -to RING_0_RX[2]
+set_location_assignment PIN_AU38 -to RING_0_RX[3]
+set_location_assignment PIN_AP44 -to RING_0_TX[0]
+set_location_assignment PIN_AR42 -to RING_0_TX[1]
+set_location_assignment PIN_AT44 -to RING_0_TX[2]
+set_location_assignment PIN_AU42 -to RING_0_TX[3]
+set_location_assignment PIN_J38 -to RING_1_RX[0]
+set_location_assignment PIN_H40 -to RING_1_RX[1]
+set_location_assignment PIN_G38 -to RING_1_RX[2]
+set_location_assignment PIN_F40 -to RING_1_RX[3]
+set_location_assignment PIN_J42 -to RING_1_TX[0]
+set_location_assignment PIN_H44 -to RING_1_TX[1]
+set_location_assignment PIN_F44 -to RING_1_TX[2]
+set_location_assignment PIN_G42 -to RING_1_TX[3]
+
set_location_assignment PIN_AV40 -to RING_0_RX[4]
set_location_assignment PIN_AW38 -to RING_0_RX[5]
set_location_assignment PIN_AY40 -to RING_0_RX[6]
-set_location_assignment PIN_AY36 -to RING_0_RX[7]
+set_location_assignment PIN_BB40 -to RING_0_RX[7]
set_location_assignment PIN_BA38 -to RING_0_RX[8]
-set_location_assignment PIN_BB40 -to RING_0_RX[9]
-set_location_assignment PIN_BB36 -to RING_0_RX[10]
-set_location_assignment PIN_BC38 -to RING_0_RX[11]
+set_location_assignment PIN_AY36 -to RING_0_RX[9]
+set_location_assignment PIN_BC38 -to RING_0_RX[10]
+set_location_assignment PIN_BB36 -to RING_0_RX[11]
set_location_assignment PIN_AV44 -to RING_0_TX[4]
set_location_assignment PIN_AW42 -to RING_0_TX[5]
set_location_assignment PIN_AY44 -to RING_0_TX[6]
-set_location_assignment PIN_BC42 -to RING_0_TX[7]
+set_location_assignment PIN_BA42 -to RING_0_TX[7]
set_location_assignment PIN_BB44 -to RING_0_TX[8]
-set_location_assignment PIN_BA42 -to RING_0_TX[9]
-set_location_assignment PIN_BD36 -to RING_0_TX[10]
-set_location_assignment PIN_BD40 -to RING_0_TX[11]
+set_location_assignment PIN_BC42 -to RING_0_TX[9]
+set_location_assignment PIN_BD40 -to RING_0_TX[10]
+set_location_assignment PIN_BD36 -to RING_0_TX[11]
set_location_assignment PIN_F36 -to RING_1_RX[4]
set_location_assignment PIN_E38 -to RING_1_RX[5]
set_location_assignment PIN_E34 -to RING_1_RX[6]
@@ -745,6 +770,7 @@ set_location_assignment PIN_A42 -to RING_1_TX[8]
set_location_assignment PIN_C42 -to RING_1_TX[9]
set_location_assignment PIN_A34 -to RING_1_TX[10]
set_location_assignment PIN_B40 -to RING_1_TX[11]
+
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to BCK_RX[0]
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to "BCK_RX[0](n)"
set_instance_assignment -name IO_STANDARD "HIGH SPEED DIFFERENTIAL I/O" -to BCK_RX[1]
@@ -1008,8 +1034,9 @@ set_location_assignment PIN_AL32 -to CLKUSR
-set_global_assignment -name DEVICE 10AX115U3F45I2LG
-#set_global_assignment -name DEVICE 10AX115U4F45I3SG
+#set_global_assignment -name DEVICE 10AX115U3F45I2LG
+#set_global_assignment -name DEVICE 10AX115U4F45I3SGES
+set_global_assignment -name DEVICE 10AX115U4F45I3SG
@@ -1467,61 +1494,64 @@ set_location_assignment PIN_AJ31 -to altera_reserved_tck
set_location_assignment PIN_AK18 -to altera_reserved_tdi
set_location_assignment PIN_AH31 -to altera_reserved_ntrst
set_location_assignment PIN_AM29 -to altera_reserved_tdo
-set_location_assignment PIN_AV33 -to ~ALTERA_DATA0~
-set_location_assignment PIN_A12 -to "BCK_TX[0](n)"
-set_location_assignment PIN_A8 -to "BCK_TX[1](n)"
-set_location_assignment PIN_A4 -to "BCK_TX[2](n)"
-set_location_assignment PIN_C4 -to "BCK_TX[3](n)"
-set_location_assignment PIN_E4 -to "BCK_TX[4](n)"
-set_location_assignment PIN_B2 -to "BCK_TX[5](n)"
+#set_location_assignment PIN_AV33 -to ~ALTERA_DATA0~
+
+# new transceiver pins 23 sept form Gijs
+#
+set_location_assignment PIN_B6 -to "BCK_TX[0](n)"
+set_location_assignment PIN_A4 -to "BCK_TX[1](n)"
+set_location_assignment PIN_A12 -to "BCK_TX[2](n)"
+set_location_assignment PIN_B2 -to "BCK_TX[3](n)"
+set_location_assignment PIN_C4 -to "BCK_TX[4](n)"
+set_location_assignment PIN_A8 -to "BCK_TX[5](n)"
set_location_assignment PIN_D2 -to "BCK_TX[6](n)"
-set_location_assignment PIN_B6 -to "BCK_TX[7](n)"
-set_location_assignment PIN_G4 -to "BCK_TX[8](n)"
-set_location_assignment PIN_F2 -to "BCK_TX[9](n)"
-set_location_assignment PIN_H2 -to "BCK_TX[10](n)"
-set_location_assignment PIN_J4 -to "BCK_TX[11](n)"
-set_location_assignment PIN_K2 -to "BCK_TX[12](n)"
-set_location_assignment PIN_L4 -to "BCK_TX[13](n)"
-set_location_assignment PIN_M2 -to "BCK_TX[14](n)"
-set_location_assignment PIN_N4 -to "BCK_TX[15](n)"
-set_location_assignment PIN_P2 -to "BCK_TX[16](n)"
-set_location_assignment PIN_R4 -to "BCK_TX[17](n)"
-set_location_assignment PIN_T2 -to "BCK_TX[18](n)"
-set_location_assignment PIN_U4 -to "BCK_TX[19](n)"
-set_location_assignment PIN_V2 -to "BCK_TX[20](n)"
-set_location_assignment PIN_W4 -to "BCK_TX[21](n)"
-set_location_assignment PIN_Y2 -to "BCK_TX[22](n)"
-set_location_assignment PIN_AA4 -to "BCK_TX[23](n)"
-set_location_assignment PIN_AB2 -to "BCK_TX[24](n)"
-set_location_assignment PIN_AC4 -to "BCK_TX[25](n)"
-set_location_assignment PIN_AD2 -to "BCK_TX[26](n)"
-set_location_assignment PIN_AE4 -to "BCK_TX[27](n)"
-set_location_assignment PIN_AF2 -to "BCK_TX[28](n)"
-set_location_assignment PIN_AG4 -to "BCK_TX[29](n)"
-set_location_assignment PIN_AH2 -to "BCK_TX[30](n)"
-set_location_assignment PIN_AJ4 -to "BCK_TX[31](n)"
-set_location_assignment PIN_AK2 -to "BCK_TX[32](n)"
-set_location_assignment PIN_AL4 -to "BCK_TX[33](n)"
-set_location_assignment PIN_AM2 -to "BCK_TX[34](n)"
-set_location_assignment PIN_AN4 -to "BCK_TX[35](n)"
-set_location_assignment PIN_AP2 -to "BCK_TX[36](n)"
-set_location_assignment PIN_AR4 -to "BCK_TX[37](n)"
-set_location_assignment PIN_AT2 -to "BCK_TX[38](n)"
-set_location_assignment PIN_AU4 -to "BCK_TX[39](n)"
-set_location_assignment PIN_AV2 -to "BCK_TX[40](n)"
-set_location_assignment PIN_AW4 -to "BCK_TX[41](n)"
-set_location_assignment PIN_AY2 -to "BCK_TX[42](n)"
-set_location_assignment PIN_BC4 -to "BCK_TX[43](n)"
-set_location_assignment PIN_BB2 -to "BCK_TX[44](n)"
+set_location_assignment PIN_E4 -to "BCK_TX[7](n)"
+set_location_assignment PIN_F2 -to "BCK_TX[8](n)"
+set_location_assignment PIN_G4 -to "BCK_TX[9](n)"
+set_location_assignment PIN_J4 -to "BCK_TX[10](n)"
+set_location_assignment PIN_H2 -to "BCK_TX[11](n)"
+set_location_assignment PIN_L4 -to "BCK_TX[12](n)"
+set_location_assignment PIN_K2 -to "BCK_TX[13](n)"
+set_location_assignment PIN_N4 -to "BCK_TX[14](n)"
+set_location_assignment PIN_M2 -to "BCK_TX[15](n)"
+set_location_assignment PIN_R4 -to "BCK_TX[16](n)"
+set_location_assignment PIN_P2 -to "BCK_TX[17](n)"
+set_location_assignment PIN_U4 -to "BCK_TX[18](n)"
+set_location_assignment PIN_T2 -to "BCK_TX[19](n)"
+set_location_assignment PIN_W4 -to "BCK_TX[20](n)"
+set_location_assignment PIN_V2 -to "BCK_TX[21](n)"
+set_location_assignment PIN_AA4 -to "BCK_TX[22](n)"
+set_location_assignment PIN_Y2 -to "BCK_TX[23](n)"
+set_location_assignment PIN_AC4 -to "BCK_TX[24](n)"
+set_location_assignment PIN_AB2 -to "BCK_TX[25](n)"
+set_location_assignment PIN_AE4 -to "BCK_TX[26](n)"
+set_location_assignment PIN_AD2 -to "BCK_TX[27](n)"
+set_location_assignment PIN_AG4 -to "BCK_TX[28](n)"
+set_location_assignment PIN_AF2 -to "BCK_TX[29](n)"
+set_location_assignment PIN_AJ4 -to "BCK_TX[30](n)"
+set_location_assignment PIN_AH2 -to "BCK_TX[31](n)"
+set_location_assignment PIN_AL4 -to "BCK_TX[32](n)"
+set_location_assignment PIN_AK2 -to "BCK_TX[33](n)"
+set_location_assignment PIN_AN4 -to "BCK_TX[34](n)"
+set_location_assignment PIN_AM2 -to "BCK_TX[35](n)"
+set_location_assignment PIN_AR4 -to "BCK_TX[36](n)"
+set_location_assignment PIN_AP2 -to "BCK_TX[37](n)"
+set_location_assignment PIN_AU4 -to "BCK_TX[38](n)"
+set_location_assignment PIN_AT2 -to "BCK_TX[39](n)"
+set_location_assignment PIN_AW4 -to "BCK_TX[40](n)"
+set_location_assignment PIN_AV2 -to "BCK_TX[41](n)"
+set_location_assignment PIN_BB2 -to "BCK_TX[42](n)"
+set_location_assignment PIN_AY2 -to "BCK_TX[43](n)"
+set_location_assignment PIN_BD6 -to "BCK_TX[44](n)"
set_location_assignment PIN_BA4 -to "BCK_TX[45](n)"
-set_location_assignment PIN_BD10 -to "BCK_TX[46](n)"
-set_location_assignment PIN_BD6 -to "BCK_TX[47](n)"
+set_location_assignment PIN_BC4 -to "BCK_TX[46](n)"
+set_location_assignment PIN_BD10 -to "BCK_TX[47](n)"
set_location_assignment PIN_AY43 -to "RING_0_TX[6](n)"
-set_location_assignment PIN_BC41 -to "RING_0_TX[7](n)"
+set_location_assignment PIN_BA41 -to "RING_0_TX[7](n)"
set_location_assignment PIN_BB43 -to "RING_0_TX[8](n)"
-set_location_assignment PIN_BA41 -to "RING_0_TX[9](n)"
-set_location_assignment PIN_BD35 -to "RING_0_TX[10](n)"
-set_location_assignment PIN_BD39 -to "RING_0_TX[11](n)"
+set_location_assignment PIN_BC41 -to "RING_0_TX[9](n)"
+set_location_assignment PIN_BD39 -to "RING_0_TX[10](n)"
+set_location_assignment PIN_BD35 -to "RING_0_TX[11](n)"
set_location_assignment PIN_AP43 -to "RING_0_TX[0](n)"
set_location_assignment PIN_AR41 -to "RING_0_TX[1](n)"
set_location_assignment PIN_AT43 -to "RING_0_TX[2](n)"
@@ -1541,11 +1571,11 @@ set_location_assignment PIN_E41 -to "RING_1_TX[7](n)"
set_location_assignment PIN_A41 -to "RING_1_TX[8](n)"
set_location_assignment PIN_J41 -to "RING_1_TX[0](n)"
set_location_assignment PIN_AY39 -to "RING_0_RX[6](n)"
-set_location_assignment PIN_AY35 -to "RING_0_RX[7](n)"
+set_location_assignment PIN_BB39 -to "RING_0_RX[7](n)"
set_location_assignment PIN_BA37 -to "RING_0_RX[8](n)"
-set_location_assignment PIN_BB39 -to "RING_0_RX[9](n)"
-set_location_assignment PIN_BB35 -to "RING_0_RX[10](n)"
-set_location_assignment PIN_BC37 -to "RING_0_RX[11](n)"
+set_location_assignment PIN_AY35 -to "RING_0_RX[9](n)"
+set_location_assignment PIN_BC37 -to "RING_0_RX[10](n)"
+set_location_assignment PIN_BB35 -to "RING_0_RX[11](n)"
set_location_assignment PIN_AP39 -to "RING_0_RX[0](n)"
set_location_assignment PIN_AR37 -to "RING_0_RX[1](n)"
set_location_assignment PIN_AT39 -to "RING_0_RX[2](n)"
@@ -1569,6 +1599,18 @@ set_location_assignment PIN_J37 -to "RING_1_RX[0](n)"
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 1932
+
+
+
+
+
+
+
+
+
+
+
+
set_global_assignment -name VHDL_FILE ../../../../../../../../UniBoard/trunk/Firmware/modules/MegaWizard/mem/ram_cr_cw.vhd
set_global_assignment -name VHDL_FILE ../../../../../../../../UniBoard/trunk/Firmware/modules/MegaWizard/mem/ram_crw_crw.vhd
set_global_assignment -name VHDL_FILE ../../../../../../../../UniBoard/trunk/Firmware/modules/common/src/vhdl/common_ram_crw_crw_a_stratix4.vhd
@@ -1609,4 +1651,9 @@ set_global_assignment -name QSYS_FILE ../../src/ip/ddr4.qsys
set_global_assignment -name SIP_FILE ../../src/ip/ddr4.sip
set_global_assignment -name VHDL_FILE ../../src/vhdl/unb2_pinning.vhd
set_global_assignment -name SOURCE_FILE db/unb2_pinning.cmp.rdb
+set_global_assignment -name SDC_FILE ../../src/sdc/unb2_pinning.sdc
+set_global_assignment -name EDA_BOARD_DESIGN_SIGNAL_INTEGRITY_TOOL "IBIS (Signal Integrity)"
+set_global_assignment -name EDA_OUTPUT_DATA_FORMAT IBIS -section_id eda_board_design_signal_integrity
+set_global_assignment -name EDA_IBIS_SPECIFICATION_VERSION 5P0 -section_id eda_board_design_signal_integrity
+
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/boards/uniboard2/designs/unb2_pinning/src/ip/ddr4.qsys b/boards/uniboard2/designs/unb2_pinning/src/ip/ddr4.qsys
index 77341b0b94..dc77f66e32 100644
--- a/boards/uniboard2/designs/unb2_pinning/src/ip/ddr4.qsys
+++ b/boards/uniboard2/designs/unb2_pinning/src/ip/ddr4.qsys
@@ -23,9 +23,9 @@
}
]]></parameter>
<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
- <parameter name="device" value="10AX115U3F45I2SGES" />
+ <parameter name="device" value="10AX115U4F45I3SGES" />
<parameter name="deviceFamily" value="Arria 10" />
- <parameter name="deviceSpeedGrade" value="2" />
+ <parameter name="deviceSpeedGrade" value="3" />
<parameter name="fabricMode" value="QSYS" />
<parameter name="generateLegacySim" value="false" />
<parameter name="generationId" value="0" />
@@ -127,8 +127,8 @@
name="ddr4_inst"
autoexport="1">
<parameter name="SYS_INFO_DEVICE_FAMILY" value="Arria 10" />
- <parameter name="SYS_INFO_DEVICE" value="10AX115U3F45I2SGES" />
- <parameter name="SYS_INFO_DEVICE_SPEEDGRADE" value="2" />
+ <parameter name="SYS_INFO_DEVICE" value="10AX115U4F45I3SGES" />
+ <parameter name="SYS_INFO_DEVICE_SPEEDGRADE" value="3" />
<parameter name="PROTOCOL_ENUM" value="PROTOCOL_DDR4" />
<parameter name="IS_ED_SLAVE" value="false" />
<parameter name="INTERNAL_TESTING_MODE" value="false" />
@@ -152,7 +152,7 @@
<parameter name="PHY_DDR3_USER_PLL_REF_CLK_IO_STD_ENUM" value="unset" />
<parameter name="PHY_DDR3_USER_RZQ_IO_STD_ENUM" value="unset" />
<parameter name="PHY_DDR4_CONFIG_ENUM">CONFIG_PHY_AND_HARD_CTRL</parameter>
- <parameter name="PHY_DDR4_MEM_CLK_FREQ_MHZ" value="1200.0" />
+ <parameter name="PHY_DDR4_MEM_CLK_FREQ_MHZ" value="900.0" />
<parameter name="PHY_DDR4_DEFAULT_REF_CLK_FREQ" value="false" />
<parameter name="PHY_DDR4_USER_REF_CLK_FREQ_MHZ" value="25.0" />
<parameter name="PHY_DDR4_REF_CLK_JITTER_PS" value="10.0" />
@@ -360,8 +360,8 @@
<parameter name="MEM_DDR4_ASR_ENUM">DDR4_ASR_MANUAL_NORMAL</parameter>
<parameter name="MEM_DDR4_DRV_STR_ENUM" value="DDR4_DRV_STR_RZQ_7" />
<parameter name="MEM_DDR4_DLL_EN" value="true" />
- <parameter name="MEM_DDR4_RTT_NOM_ENUM">DDR4_RTT_NOM_ODT_DISABLED</parameter>
- <parameter name="MEM_DDR4_RTT_WR_ENUM">DDR4_RTT_WR_ODT_DISABLED</parameter>
+ <parameter name="MEM_DDR4_RTT_NOM_ENUM" value="DDR4_RTT_NOM_RZQ_4" />
+ <parameter name="MEM_DDR4_RTT_WR_ENUM" value="DDR4_RTT_WR_RZQ_2" />
<parameter name="MEM_DDR4_WTCL" value="18" />
<parameter name="MEM_DDR4_ATCL_ENUM" value="DDR4_ATCL_DISABLED" />
<parameter name="MEM_DDR4_TCL" value="18" />
diff --git a/boards/uniboard2/designs/unb2_pinning/src/vhdl/unb2_pinning.vhd b/boards/uniboard2/designs/unb2_pinning/src/vhdl/unb2_pinning.vhd
index 8ca399cfe7..ace0c1dd50 100644
--- a/boards/uniboard2/designs/unb2_pinning/src/vhdl/unb2_pinning.vhd
+++ b/boards/uniboard2/designs/unb2_pinning/src/vhdl/unb2_pinning.vhd
@@ -135,7 +135,8 @@ ENTITY unb2_pinning IS
-- CFG_DATA : inout std_logic_vector (3 downto 0);
VERSION : IN STD_LOGIC_VECTOR(1 DOWNTO 0);
ID : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
- TESTIO : INOUT STD_LOGIC_VECTOR(7 DOWNTO 0)
+ TESTIO : INOUT STD_LOGIC_VECTOR(5 DOWNTO 0);
+ QSFP_LED : INOUT STD_LOGIC_VECTOR(11 DOWNTO 0)
);
end unb2_pinning;
@@ -435,6 +436,8 @@ architecture str of unb2_pinning is
signal rx_serial_data_back : std_logic_vector(47 downto 0);
signal dataloopback_back : std_logic_vector(3071 downto 0);
signal controlloopback_back : std_logic_vector(383 downto 0);
+ signal dataloopback_test : std_logic_vector(1535 downto 0);
+ signal controlloopback_test : std_logic_vector(191 downto 0);
signal tx_serdesclk_back : std_logic_vector(47 downto 0);
signal validloopback_back : std_logic_vector(47 downto 0);
signal tx_analogreset_back : std_logic_vector(47 downto 0);
@@ -458,11 +461,13 @@ architecture str of unb2_pinning is
-- signals for the bidirectional and misc ios
signal inta_in : std_logic;
signal intb_in : std_logic;
- signal testio_in : std_logic_vector(7 downto 0);
+ signal testio_in : std_logic_vector(5 downto 0);
+ signal qsfp_led_in : std_logic_vector(11 downto 0);
signal bck_err_in : std_logic_vector(2 downto 0);
signal inta_out : std_logic;
signal intb_out : std_logic;
- signal testio_out : std_logic_vector(7 downto 0);
+ signal testio_out : std_logic_vector(5 downto 0);
+ signal qsfp_led_out : std_logic_vector(11 downto 0);
signal bck_err_out : std_logic_vector(2 downto 0);
signal ver_id_pmbusalert : std_logic_vector(10 downto 0);
@@ -689,11 +694,14 @@ begin
-- ****** Back side transceivers ******
-- upper 24 transceivers use sb_clk
+ -- Nov 4 - temporarily disconnect BCK_TX/RX(47) to see what gets synthesised away
- BCK_TX <= tx_serial_data_back(47 downto 0);
+ BCK_TX(47 downto 0) <= tx_serial_data_back(47 downto 0);
+-- BCK_TX(47) <= '0';
- rx_serial_data_back <= BCK_RX;
-
+ rx_serial_data_back(47 downto 0) <= BCK_RX(47 downto 0);
+-- dataloopback_test <= X"0000000000000000" & dataloopback_back(3007 downto 1536);
+-- controlloopback_test <= X"00" & controlloopback_back(375 downto 192);
transceiver_phy_back_upper : transceiver_phy_24channel
port map (
@@ -847,7 +855,8 @@ begin
u_system_pll : system_pll
port map(
- refclk => ETH_CLK,
+-- refclk => ETH_CLK,
+ refclk => CLK,
rst => reset_p,
locked => sys_locked,
outclk_0 => mm_clk, -- 100MHz
@@ -925,18 +934,22 @@ begin
INTA <= inta_out when PPS = '1' else 'Z';
INTB <= intb_out when PPS = '1' else 'Z';
- TESTIO <= testio_out when PPS = '1' else "ZZZZZZZZ";
+ TESTIO <= testio_out when PPS = '1' else "ZZZZZZ";
+ QSFP_LED <= qsfp_led_out when PPS = '1' else "ZZZZZZZZZZZZ";
BCK_ERR <= bck_err_out when PPS = '1' else "ZZZ";
inta_in <= INTA;
intb_in <= INTB;
testio_in <= TESTIO;
+ qsfp_led_in <= QSFP_LED;
bck_err_in <= BCK_ERR;
inta_out <= intb_in;
intb_out <= inta_in;
- testio_out(7 downto 4) <= testio_in(3 downto 0);
- testio_out(3 downto 0) <= testio_in(7 downto 4);
+ testio_out(5 downto 3) <= testio_in(2 downto 0);
+ testio_out(2 downto 0) <= testio_in(5 downto 3);
+ qsfp_led_out(11 downto 6) <= qsfp_led_in(5 downto 0);
+ qsfp_led_out(5 downto 0) <= qsfp_led_in(11 downto 6);
bck_err_out(2) <= bck_err_in(1);
bck_err_out(1) <= bck_err_in(0);
bck_err_out(0) <= bck_err_in(2);
diff --git a/boards/uniboard2/designs/unb2_test/build/quartus/unb2_test.qsf b/boards/uniboard2/designs/unb2_test/build/quartus/unb2_test.qsf
index e1dc54a19e..20fb5335f2 100644
--- a/boards/uniboard2/designs/unb2_test/build/quartus/unb2_test.qsf
+++ b/boards/uniboard2/designs/unb2_test/build/quartus/unb2_test.qsf
@@ -1570,6 +1570,7 @@ set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 1932
+set_global_assignment -name VHDL_FILE ../../../../../../libraries/base/common/src/vhdl/common_interface_layers_pkg.vhd
set_global_assignment -name QSYS_FILE ../../../../../../libraries/technology/ip_arria10/transceiver_pll/transceiver_pll.qsys
set_global_assignment -name QSYS_FILE ../../../../../../libraries/technology/ip_arria10/transceiver_reset_controller_48/transceiver_reset_controller_48.qsys
set_global_assignment -name QSYS_FILE ../../../../../../libraries/technology/ip_arria10/transceiver_phy_48/transceiver_phy_48.qsys
@@ -1661,4 +1662,14 @@ set_global_assignment -name VHDL_FILE ../../src/vhdl/unb2_test.vhd
set_global_assignment -name SOURCE_FILE db/unb2_test.cmp.rdb
set_global_assignment -name QSYS_FILE ../../../../../../libraries/technology/ip_arria10/mac_10g/ip_arria10_mac_10g.qsys
set_global_assignment -name SDC_FILE ../../src/sdc/unb2_test.sdc
+set_global_assignment -name EDA_BOARD_DESIGN_SIGNAL_INTEGRITY_TOOL "IBIS (Signal Integrity)"
+set_global_assignment -name EDA_OUTPUT_DATA_FORMAT IBIS -section_id eda_board_design_signal_integrity
+set_global_assignment -name EDA_IBIS_MODEL_SELECTOR ON -section_id eda_board_design_signal_integrity
+
+set_instance_assignment -name DONT_MERGE_REGISTER ON -to *u_transceiver|tx_pma_clkout*
+set_instance_assignment -name DONT_MERGE_REGISTER ON -to *u_transceiver|tx_pma_div_clkout*
+set_instance_assignment -name DONT_MERGE_REGISTER ON -to *u_transceiver|rx_pma_clkout*
+set_instance_assignment -name DONT_MERGE_REGISTER ON -to *u_transceiver|rx_pma_div_clkout*
+
+
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/boards/uniboard2/designs/unb2_test/src/ip/system_pll.qsys b/boards/uniboard2/designs/unb2_test/src/ip/system_pll.qsys
index 49b19e83da..5fe3aef228 100644
--- a/boards/uniboard2/designs/unb2_test/src/ip/system_pll.qsys
+++ b/boards/uniboard2/designs/unb2_test/src/ip/system_pll.qsys
@@ -6,7 +6,7 @@
version="1.0"
description=""
tags="INTERNAL_COMPONENT=true"
- categories="" />
+ categories="System" />
<parameter name="bonusData"><![CDATA[bonusData
{
element $${FILENAME}
@@ -14,11 +14,16 @@
}
element system_pll_inst
{
+ datum _sortIndex
+ {
+ value = "0";
+ type = "int";
+ }
}
}
]]></parameter>
<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
- <parameter name="device" value="10AX115U3F45I2SGES" />
+ <parameter name="device" value="10AX115U3F45I2LG" />
<parameter name="deviceFamily" value="Arria 10" />
<parameter name="deviceSpeedGrade" value="2" />
<parameter name="fabricMode" value="QSYS" />
@@ -82,7 +87,7 @@
<parameter name="gui_en_reconf" value="false" />
<parameter name="gui_en_dps_ports" value="false" />
<parameter name="gui_pll_mode" value="Integer-N PLL" />
- <parameter name="gui_reference_clock_frequency" value="25.0" />
+ <parameter name="gui_reference_clock_frequency" value="125.0" />
<parameter name="gui_fractional_cout" value="32" />
<parameter name="gui_dsm_out_sel" value="1st_order" />
<parameter name="gui_use_locked" value="true" />
@@ -107,8 +112,8 @@
<parameter name="gui_mif_generate" value="false" />
<parameter name="gui_device_speed_grade" value="1" />
<parameter name="system_info_device_family" value="Arria 10" />
- <parameter name="system_info_device_component" value="10AX115U3F45I2SGES" />
- <parameter name="system_info_device_speed_grade" value="" />
+ <parameter name="system_info_device_component" value="10AX115U3F45I2LG" />
+ <parameter name="system_info_device_speed_grade" value="2" />
<parameter name="gui_active_clk" value="false" />
<parameter name="gui_clk_bad" value="false" />
<parameter name="gui_switchover_mode">Automatic Switchover</parameter>
@@ -357,7 +362,7 @@
<parameter name="gui_actual_duty_cycle15" value="50.0" />
<parameter name="gui_actual_duty_cycle16" value="50.0" />
<parameter name="gui_actual_duty_cycle17" value="50.0" />
- <parameter name="AUTO_REFCLK_CLOCK_RATE" value="-1" />
+ <parameter name="AUTO_REFCLK_CLOCK_RATE" value="0" />
</module>
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
<interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
diff --git a/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd b/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
index 574bb586fe..8a117466c9 100644
--- a/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
+++ b/boards/uniboard2/designs/unb2_test/src/vhdl/unb2_test.vhd
@@ -28,7 +28,8 @@ use ieee.std_logic_unsigned.all;
USE common_lib.common_pkg.ALL;
USE common_lib.common_mem_pkg.ALL;
USE unb_common_lib.unb_common_pkg.ALL;
-USE tr_xaui_lib.tr_xaui_pkg.ALL;
+--USE tr_xaui_lib.tr_xaui_pkg.ALL;
+USE common_lib.common_interface_layers_pkg.ALL;
USE dp_lib.dp_stream_pkg.ALL;
USE technology_lib.technology_select_pkg.ALL;
USE technology_lib.technology_pkg.ALL;
@@ -617,7 +618,7 @@ begin
g_nof_macs => 48,
g_use_mdio => false,
g_mdio_epcs_dis => false,
- g_lpbk_sosi => false,
+ g_lpbk_sosi => true,
g_lpbk_xgmii => false,
g_lpbk_xaui => false,
g_use_hdr_ram => true
@@ -691,7 +692,7 @@ begin
g_lpbk_sosi => false,
g_lpbk_xgmii => false,
g_lpbk_xaui => false,
- g_use_hdr_ram => true
+ g_use_hdr_ram => false
)
PORT MAP (
-- System
--
GitLab