diff --git a/applications/aartfaac/designs/aartfaac_bn_sdo/src/vhdl/aartfaac_bn_sdo.vhd b/applications/aartfaac/designs/aartfaac_bn_sdo/src/vhdl/aartfaac_bn_sdo.vhd
index bb0e3a55d1ceb1e3e87c6805314402be96042583..b26787d6e1f2c727658294cab5954ced9f17aa11 100644
--- a/applications/aartfaac/designs/aartfaac_bn_sdo/src/vhdl/aartfaac_bn_sdo.vhd
+++ b/applications/aartfaac/designs/aartfaac_bn_sdo/src/vhdl/aartfaac_bn_sdo.vhd
@@ -545,8 +545,8 @@ BEGIN
       -- ctrl
       ss_parallel_sb_fifo_snk_in_arr(0) <= ss_parallel_sb_src_out_arr(0);
       -- Data
-      ss_parallel_sb_fifo_snk_in_arr(0).im(15 DOWNTO 0) <= ss_parallel_sb_src_out_arr(1).im(7 DOWNTO 0) & ss_parallel_sb_src_out_arr(1).re(7 DOWNTO 0);
-      ss_parallel_sb_fifo_snk_in_arr(0).re(15 DOWNTO 0) <= ss_parallel_sb_src_out_arr(0).im(7 DOWNTO 0) & ss_parallel_sb_src_out_arr(0).re(7 DOWNTO 0);
+      ss_parallel_sb_fifo_snk_in_arr(0).im(15 DOWNTO 0) <= ss_parallel_sb_src_out_arr(0).im(7 DOWNTO 0) & ss_parallel_sb_src_out_arr(0).re(7 DOWNTO 0);
+      ss_parallel_sb_fifo_snk_in_arr(0).re(15 DOWNTO 0) <= ss_parallel_sb_src_out_arr(1).im(7 DOWNTO 0) & ss_parallel_sb_src_out_arr(1).re(7 DOWNTO 0);
     END PROCESS;
 
     -- FIFO required as ss_parallel_sb does not have src flow control