diff --git a/libraries/base/reorder/tb/vhdl/tb_reorder_col_wide_row_select.vhd b/libraries/base/reorder/tb/vhdl/tb_reorder_col_wide_row_select.vhd
index 319940ecab203123907ea10e0ff096bb71b159b8..294c4ed3a80e1217cef05fb0ab8a2b9ad8786f98 100644
--- a/libraries/base/reorder/tb/vhdl/tb_reorder_col_wide_row_select.vhd
+++ b/libraries/base/reorder/tb/vhdl/tb_reorder_col_wide_row_select.vhd
@@ -125,8 +125,8 @@ architecture tb of tb_reorder_col_wide_row_select is
   signal out_sosi_arr        : t_dp_sosi_arr(g_nof_outputs - 1 downto 0);
   signal dly_out_sosi_arr    : t_dp_sosi_arr(g_nof_outputs - 1 downto 0);
 
-  signal reorder_row_in_select : std_logic_vector(c_in_select_w - 1 downto 0);
-  signal in_select : std_logic_vector(c_in_select_w - 1 downto 0);
+  signal reorder_row_in_select : std_logic_vector(c_in_select_w - 1 downto 0) := (others => '0');
+  signal in_select             : std_logic_vector(c_in_select_w - 1 downto 0);
 
 begin