From 2a889c4fe3f25a7df0199d71811946fbfd8bbd15 Mon Sep 17 00:00:00 2001
From: donker <donker@astron.nl>
Date: Thu, 5 Nov 2020 12:27:58 +0100
Subject: [PATCH] L2SDP-180, processed review commnents 3
---
.../common/src/vhdl/common_variable_delay.vhd | 25 ++++++++-----------
1 file changed, 10 insertions(+), 15 deletions(-)
diff --git a/libraries/base/common/src/vhdl/common_variable_delay.vhd b/libraries/base/common/src/vhdl/common_variable_delay.vhd
index 5db4449ca1..e9399733c6 100644
--- a/libraries/base/common/src/vhdl/common_variable_delay.vhd
+++ b/libraries/base/common/src/vhdl/common_variable_delay.vhd
@@ -24,7 +24,7 @@
-- Description:
-- . delay input pulse by nof_cycles_delay
-- . output pulse is derived from low-high transition of input pulse.
--- . during delay other input pulses are ignored
+-- . the actual pulse delay will be delay + 1, due to implementation latency of 1 clk cycle
-- --------------------------------------------------------------------------
LIBRARY IEEE, technology_lib;
@@ -54,31 +54,27 @@ ARCHITECTURE rtl OF common_variable_delay IS
SIGNAL nxt_out_val : STD_LOGIC;
SIGNAL delay_cnt : NATURAL;
SIGNAL nxt_delay_cnt : NATURAL;
- SIGNAL prev_in_val : STD_LOGIC := '0';
+ SIGNAL prev_in_val : STD_LOGIC;
BEGIN
out_val <= i_out_val;
- p_delay: PROCESS(enable, in_val, prev_in_val, nxt_delay_cnt, delay_cnt, delay)
+ p_delay: PROCESS(enable, in_val, prev_in_val, delay, delay_cnt)
BEGIN
nxt_out_val <= '0';
- nxt_delay_cnt <= delay_cnt + 1;
+ nxt_delay_cnt <= 0;
IF enable = '1' THEN
- IF in_val = '1' AND prev_in_val = '0' THEN -- detect risingedge of in_val
+ IF in_val = '1' AND prev_in_val = '0' THEN -- detect rising edge of in_val
IF delay = 0 THEN
nxt_out_val <= '1';
- nxt_delay_cnt <= g_max_delay;
- ELSE
- nxt_delay_cnt <= 1;
END IF;
- END IF;
-
- IF delay_cnt = delay THEN
- nxt_out_val <= '1';
+ ELSE
+ nxt_delay_cnt <= delay_cnt + 1;
+ IF (delay_cnt+1) = delay THEN
+ nxt_out_val <= '1';
+ END IF;
END IF;
- ELSE
- nxt_delay_cnt <= g_max_delay;
END IF;
END PROCESS;
@@ -95,5 +91,4 @@ BEGIN
END IF;
END PROCESS;
-
END rtl;
--
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