From 2475dd536b8e8374dfa437c6a1ebd46d0274b396 Mon Sep 17 00:00:00 2001
From: Jonathan Hargreaves <hargreaves@astron.nl>
Date: Fri, 16 Oct 2015 14:19:41 +0000
Subject: [PATCH] Added simple simulation model for voltage sensor.
---
libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd b/libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd
index 8f1e62a1bd..aeb5774000 100644
--- a/libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd
+++ b/libraries/io/fpga_sense/src/vhdl/fpga_sense.vhd
@@ -108,12 +108,9 @@ BEGIN
END GENERATE;
- gen_no_tech_fpga_temp_sens: IF g_sim=TRUE GENERATE
-
- -- temp = (708 * adc)/1024 - 273 => adc = (temp + 273)*1024/708
-
+ no_tech_fpga_temp_sens: IF g_sim=TRUE GENERATE
+ -- temp = (708 * adc)/1024 - 273 => adc = (temp + 273)*1024/708
temp_data <= TO_UVEC(460, temp_data'LENGTH); -- choose temp = 45 degrees so adc temp_data = 460
- --temp_data <= RESIZE_UVEC(x"45",10);
mm_reg_temp_data <= RESIZE_UVEC(temp_data,c_mem_reg_temp_dat_w);
END GENERATE;
@@ -146,6 +143,10 @@ BEGIN
-- voltage sensor
+ no_tech_fpga_voltage_sens: IF g_sim=TRUE GENERATE
+ -- Model the voltage sensor by returning the MM register address of the voltage field
+ reg_voltage_store_miso.rddata <= RESIZE_MEM_UDATA(reg_voltage_store_mosi.address(3 DOWNTO 0));
+ END GENERATE;
gen_tech_fpga_voltage_sens: IF g_sim=FALSE GENERATE
u_tech_fpga_voltage_sens : ENTITY tech_fpga_voltage_sens_lib.tech_fpga_voltage_sens
--
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