diff --git a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml
index 9b14e97efc2f9d4dbc89acfaffd871718961bed8..509125ec50daa4d37b6adc61a299461cad233b20 100644
--- a/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml
+++ b/applications/lofar2/designs/lofar2_unb2b_sdp_station/lofar2_unb2b_sdp_station.fpga.yaml
@@ -23,6 +23,7 @@ parameters:
   - { name: c_V_sample_delay,       value: 4096 }
   - { name: c_V_si_db_large,        value: 131072 }
   - { name: c_V_si_db,              value: 1024 }
+  - { name: c_V_si_histogram,       value: 512 }
   - { name: c_W_fir_coef,           value: 16 }
   - { name: c_W_subband,            value: 18 }
   - { name: c_P_pfb,                value: c_S_pn / c_Q_fft }  # = 6
@@ -141,7 +142,15 @@ peripherals:
     mm_port_names:
       - REG_WG
       - RAM_WG
-      
+
+  - peripheral_name: st/st_histogram
+    parameter_overrides:
+      - { name: g_nof_instances, value: c_S_pn }
+      - { name: g_nof_bins, value: c_V_si_histogram }
+      - { name: g_nof_data_per_sync, value: c_nof_clk_per_pps}
+    mm_port_names:
+      - RAM_ST_HISTOGRAM   
+
   - peripheral_name: aduh/aduh_mon_dc_power
     parameter_overrides:
       - { name: g_nof_streams, value: c_S_pn }
diff --git a/libraries/dsp/st/st.peripheral.yaml b/libraries/dsp/st/st.peripheral.yaml
index 805b806ab85e5b5e6d6798883148f55d1d553814..d2f47521bc059332db55f0e6fca7172312fb2317 100644
--- a/libraries/dsp/st/st.peripheral.yaml
+++ b/libraries/dsp/st/st.peripheral.yaml
@@ -6,6 +6,32 @@ hdl_library_name: st
 hdl_library_description: "Statistics (ST)"
 
 peripherals:
+  - peripheral_name: st_histogram  # pi_st_histogram.py
+    peripheral_description: |
+       "Count per sample value how often it occurs. The sample values are distributed over g_nof_bins = 512 bins per SI. 
+        The bins are 32 bit to be able to fit a maximum count of 200M in case the signal input is DC."
+    parameters:
+      # Parameters of mmp_st_histogram.vhd
+      - { name: g_nof_instances, value: 12 }
+      - { name: g_nof_bins, value: 512 } 
+      - { name: g_nof_data_per_sync, value: 200000000 }
+    mm_ports:
+      # MM port for mmp_st_histogram.vhd
+      - mm_port_name: RAM_ST_HISTOGRAM
+        mm_port_type: RAM
+        mm_port_span: ceil_pow2(g_nof_bins) * MM_BUS_SIZE
+        mm_port_description: |
+           "The bins are 32 bit to be able to fit a maximum count of 200M in case the signal input is DC."
+        number_of_mm_ports: g_nof_instances
+        fields:
+          - - field_name: histogram
+              field_description: ""
+              number_of_fields: g_nof_bins
+              address_offset: 0x0
+              mm_width: 32
+              user_width: ceil_pow2(g_nof_data_per_sync + 1 )
+
+
   - peripheral_name: st_sst  # pi_st_sst.py
     peripheral_description: |
        "Accumulate the signal power values during a sync interval: