From 2368729f02a44b53f05a5cd547ea987d1b092fda Mon Sep 17 00:00:00 2001
From: Daniel van der Schuur <schuur@astron.nl>
Date: Fri, 4 Jun 2021 15:14:00 +0200
Subject: [PATCH] -Updated comment.

---
 libraries/dsp/st/src/vhdl/st_histogram.vhd | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/libraries/dsp/st/src/vhdl/st_histogram.vhd b/libraries/dsp/st/src/vhdl/st_histogram.vhd
index e574b6c275..f611c09e11 100644
--- a/libraries/dsp/st/src/vhdl/st_histogram.vhd
+++ b/libraries/dsp/st/src/vhdl/st_histogram.vhd
@@ -74,7 +74,8 @@
 --         its own (clk_a,clk_b) clock domain, which is not what we need here.
 --   . Downside of common_ram_r_w: it uses a single clock
 --     . This st_histogram.vhd operates in dp_clk domain only, so we need to 
---       provide MM access to the user, in the mm_clk domain, elsewhere.
+--       provide MM access to the user, in the mm_clk domain, elsewhere. This
+--       has been done in mms_st_histogram.vhd.
 
 LIBRARY IEEE, common_lib, mm_lib, technology_lib, dp_lib;
 USE IEEE.std_logic_1164.ALL;
-- 
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