diff --git a/libraries/base/dp/src/vhdl/dp_fifo_fill.vhd b/libraries/base/dp/src/vhdl/dp_fifo_fill.vhd
index c77ea4adc285984c028092bb8ce1c843d3350eba..f3e379027b34679f52b21af52e81db2a1b9334dc 100644
--- a/libraries/base/dp/src/vhdl/dp_fifo_fill.vhd
+++ b/libraries/base/dp/src/vhdl/dp_fifo_fill.vhd
@@ -48,7 +48,8 @@ ENTITY dp_fifo_fill IS
     g_use_complex    : BOOLEAN := FALSE;  -- TRUE feeds the concatenated complex fields (im & re) through the FIFO instead of the data field.
     g_fifo_fill      : NATURAL := 0;
     g_fifo_size      : NATURAL := 256;    -- (32+2) * 256 = 1 M9K, g_data_w+2 for sop and eop
-    g_fifo_af_margin : NATURAL := 4;      -- Nof words below max (full) at which fifo is considered almost full
+    g_fifo_af_margin : NATURAL := 4;      -- >=4, Nof words below max (full) at which fifo is considered almost full for snk_out.ready
+    g_fifo_af_xon    : NATURAL := 0;      -- >=0, Nof words below max (full) at which fifo is considered almost full for snk_out.xon
     g_fifo_rl        : NATURAL := 1       -- use RL=0 for internal show ahead FIFO, default use RL=1 for internal normal FIFO
   );
   PORT (
@@ -95,6 +96,7 @@ BEGIN
     g_fifo_fill      => g_fifo_fill,
     g_fifo_size      => g_fifo_size,
     g_fifo_af_margin => g_fifo_af_margin,
+    g_fifo_af_xon    => g_fifo_af_xon,
     g_fifo_rl        => g_fifo_rl
   )
   PORT MAP (