From 22f4df286c807dc1aafad8bac64ac95b0f4c3047 Mon Sep 17 00:00:00 2001 From: Erik Kooistra <kooistra@astron.nl> Date: Thu, 30 Oct 2014 13:06:41 +0000 Subject: [PATCH] Move IP to /ip to prepare for defining a dedicated IP library. --- .../technology/ip_arria10/mac_10g/README.txt | 56 +++++++++++++++++++ .../technology/ip_arria10/mac_10g/hdllib.cfg | 12 +--- .../mac_10g/{ => ip}/compile_ip.tcl | 4 +- .../mac_10g/{ => ip}/generate_ip.sh | 0 .../ip_arria10/mac_10g/ip/hdllib.cfg | 20 +++++++ .../mac_10g/{ => ip}/ip_arria10_mac_10g.qsys | 0 6 files changed, 80 insertions(+), 12 deletions(-) create mode 100644 libraries/technology/ip_arria10/mac_10g/README.txt rename libraries/technology/ip_arria10/mac_10g/{ => ip}/compile_ip.tcl (99%) rename libraries/technology/ip_arria10/mac_10g/{ => ip}/generate_ip.sh (100%) create mode 100644 libraries/technology/ip_arria10/mac_10g/ip/hdllib.cfg rename libraries/technology/ip_arria10/mac_10g/{ => ip}/ip_arria10_mac_10g.qsys (100%) diff --git a/libraries/technology/ip_arria10/mac_10g/README.txt b/libraries/technology/ip_arria10/mac_10g/README.txt new file mode 100644 index 0000000000..e7b15700d0 --- /dev/null +++ b/libraries/technology/ip_arria10/mac_10g/README.txt @@ -0,0 +1,56 @@ +README.txt for $RADIOHDL/libraries/technology/ip_arria10/mac_10g + +1) Porting +2) IP component +3) Compilation, simulation and verification +4) Synthesis +5) Remarks + + +1) Porting + +The mac_10g IP was ported manually from Quartus v11.1 for Stratix IV to Quartus 14.0a10 for Arria10 by creating it in Qsys using +the same parameter settings. + + +2) IP component + +The generated IP is not kept in SVN, only the Qsys source file: + + ip_arria10_mac_10g.qsys + +Therefore first the IP needs to be generated using: + + ./generate_ip.sh + + +3) Compilation, simulation and verification + +The genrated IP also contains a msim_setup.tcl file that was used to manually create: + + compile_ip.tcl + +This compile_ip.tcl is in the hdllib.cfg and gets compiled before the other code. + + +4) Synthesis + +No synthesis trials were done, because this will implicitely be done when the IP is used in a design. The QIP file: + + generated/ip_arria10_mac_10g.qip + +is included in the ip/hdllib.cfg and contains what is needed to synthesize the IP. + + +5) Remarks + +a) Generated ip_arria10_mac_10g.vhd uses IP specific library ip_arria10_mac_10g_alt_em10g32_140 + + The ip/hdllib.cfg defines the IP specific library to make it known: + + hdl_lib_name = ip_arria10_mac_10g_alt_em10g32_140 + hdl_library_clause_name = ip_arria10_mac_10g_alt_em10g32_140 + + The ip_arria10_mac_10g_top.vhd wrapper makes the IP accessible via ip_arria10_mac_10g_lib, to + avoid that the IP specific library needs to be used at the technology independent level. + \ No newline at end of file diff --git a/libraries/technology/ip_arria10/mac_10g/hdllib.cfg b/libraries/technology/ip_arria10/mac_10g/hdllib.cfg index db6efe4fb5..a58f4fd7a6 100644 --- a/libraries/technology/ip_arria10/mac_10g/hdllib.cfg +++ b/libraries/technology/ip_arria10/mac_10g/hdllib.cfg @@ -1,24 +1,16 @@ hdl_lib_name = ip_arria10_mac_10g hdl_library_clause_name = ip_arria10_mac_10g_lib -hdl_lib_uses = +hdl_lib_uses = ip_arria10_mac_10g_alt_em10g32_140 hdl_lib_technology = ip_arria10 build_dir_sim = $HDL_BUILD_DIR build_dir_synth = $HDL_BUILD_DIR -modelsim_compile_ip_files = - $RADIOHDL/libraries/technology/ip_arria10/mac_10g/compile_ip.tcl - synth_files = + ip_arria10_mac_10g_top.vhd test_bench_files = - # The generated testbench is listed here to create a simulation configuration for it. However - # the tb is commented because it is not useful, see generate_ip.sh. - #$RADIOHDL/libraries/technology/ip_arria10/mac_10g/generated_tb/generated/sim/ip_arria10_mac_10g_tb.vhd modelsim_search_libraries = altera_ver lpm_ver sgate_ver altera_mf_ver altera_lnsim_ver twentynm_ver twentynm_hssi_ver twentynm_hip_ver altera lpm sgate altera_mf altera_lnsim twentynm twentynm_hssi twentynm_hip - -quartus_qip_files = - generated/ip_arria10_mac_10g.qip diff --git a/libraries/technology/ip_arria10/mac_10g/compile_ip.tcl b/libraries/technology/ip_arria10/mac_10g/ip/compile_ip.tcl similarity index 99% rename from libraries/technology/ip_arria10/mac_10g/compile_ip.tcl rename to libraries/technology/ip_arria10/mac_10g/ip/compile_ip.tcl index 917b7e8ebb..9825aea1b3 100644 --- a/libraries/technology/ip_arria10/mac_10g/compile_ip.tcl +++ b/libraries/technology/ip_arria10/mac_10g/ip/compile_ip.tcl @@ -26,8 +26,8 @@ # - replace QSYS_SIMDIR by IP_DIR # - if the testbench is also generated with QSYS then only the IP_TBDIR files are needed, because these also contain the source files. -set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10/mac_10g/generated/sim" -set IP_TBDIR "$env(RADIOHDL)/libraries/technology/ip_arria10/mac_10g/generated_tb/generated/sim" +set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_arria10/mac_10g/ip/generated/sim" +set IP_TBDIR "$env(RADIOHDL)/libraries/technology/ip_arria10/mac_10g/ip/generated_tb/generated/sim" vlib ./work/ diff --git a/libraries/technology/ip_arria10/mac_10g/generate_ip.sh b/libraries/technology/ip_arria10/mac_10g/ip/generate_ip.sh similarity index 100% rename from libraries/technology/ip_arria10/mac_10g/generate_ip.sh rename to libraries/technology/ip_arria10/mac_10g/ip/generate_ip.sh diff --git a/libraries/technology/ip_arria10/mac_10g/ip/hdllib.cfg b/libraries/technology/ip_arria10/mac_10g/ip/hdllib.cfg new file mode 100644 index 0000000000..19c6870c74 --- /dev/null +++ b/libraries/technology/ip_arria10/mac_10g/ip/hdllib.cfg @@ -0,0 +1,20 @@ +hdl_lib_name = ip_arria10_mac_10g_alt_em10g32_140 +hdl_library_clause_name = ip_arria10_mac_10g_alt_em10g32_140 +hdl_lib_uses = +hdl_lib_technology = ip_arria10 + +build_dir_sim = $HDL_BUILD_DIR +build_dir_synth = $HDL_BUILD_DIR + +modelsim_compile_ip_files = + $RADIOHDL/libraries/technology/ip_arria10/mac_10g/ip/compile_ip.tcl + +synth_files = + +test_bench_files = + # The generated testbench is listed here to create a simulation configuration for it. However + # the tb is commented because it is not useful, see generate_ip.sh. + #$RADIOHDL/libraries/technology/ip_arria10/mac_10g/generated_tb/generated/sim/ip_arria10_mac_10g_tb.vhd + +quartus_qip_files = + generated/ip_arria10_mac_10g.qip diff --git a/libraries/technology/ip_arria10/mac_10g/ip_arria10_mac_10g.qsys b/libraries/technology/ip_arria10/mac_10g/ip/ip_arria10_mac_10g.qsys similarity index 100% rename from libraries/technology/ip_arria10/mac_10g/ip_arria10_mac_10g.qsys rename to libraries/technology/ip_arria10/mac_10g/ip/ip_arria10_mac_10g.qsys -- GitLab