From 22e72f448e7104e7c4db69bd0594d55afe791132 Mon Sep 17 00:00:00 2001
From: Erik Kooistra <kooistra@astron.nl>
Date: Wed, 19 Nov 2014 15:20:32 +0000
Subject: [PATCH] Use xgmii functions to split 64b data and 8b control.
---
.../10gbase_r/tech_10gbase_r_arria10.vhd | 21 ++++---------------
1 file changed, 4 insertions(+), 17 deletions(-)
diff --git a/libraries/technology/10gbase_r/tech_10gbase_r_arria10.vhd b/libraries/technology/10gbase_r/tech_10gbase_r_arria10.vhd
index 1a2fc5c4c0..d9298514b5 100644
--- a/libraries/technology/10gbase_r/tech_10gbase_r_arria10.vhd
+++ b/libraries/technology/10gbase_r/tech_10gbase_r_arria10.vhd
@@ -112,23 +112,10 @@ BEGIN
END GENERATE;
-- XGMII
- tx_parallel_data_arr(I)(63 DOWNTO 56) <= xgmii_tx_dc_arr(I)(70 DOWNTO 63); tx_control_arr(I)(7) <= xgmii_tx_dc_arr(I)(71);
- tx_parallel_data_arr(I)(55 DOWNTO 48) <= xgmii_tx_dc_arr(I)(61 DOWNTO 54); tx_control_arr(I)(6) <= xgmii_tx_dc_arr(I)(62);
- tx_parallel_data_arr(I)(47 DOWNTO 40) <= xgmii_tx_dc_arr(I)(52 DOWNTO 45); tx_control_arr(I)(5) <= xgmii_tx_dc_arr(I)(53);
- tx_parallel_data_arr(I)(39 DOWNTO 32) <= xgmii_tx_dc_arr(I)(43 DOWNTO 36); tx_control_arr(I)(4) <= xgmii_tx_dc_arr(I)(44);
- tx_parallel_data_arr(I)(31 DOWNTO 24) <= xgmii_tx_dc_arr(I)(34 DOWNTO 27); tx_control_arr(I)(3) <= xgmii_tx_dc_arr(I)(35);
- tx_parallel_data_arr(I)(23 DOWNTO 16) <= xgmii_tx_dc_arr(I)(25 DOWNTO 18); tx_control_arr(I)(2) <= xgmii_tx_dc_arr(I)(26);
- tx_parallel_data_arr(I)(15 DOWNTO 8) <= xgmii_tx_dc_arr(I)(16 DOWNTO 9); tx_control_arr(I)(1) <= xgmii_tx_dc_arr(I)(17);
- tx_parallel_data_arr(I)( 7 DOWNTO 0) <= xgmii_tx_dc_arr(I)( 7 DOWNTO 0); tx_control_arr(I)(0) <= xgmii_tx_dc_arr(I)( 8);
-
- xgmii_rx_dc_arr(I)(70 DOWNTO 63) <= rx_parallel_data_arr(I)(63 DOWNTO 56); xgmii_rx_dc_arr(I)(71) <= rx_control_arr(I)(7);
- xgmii_rx_dc_arr(I)(61 DOWNTO 54) <= rx_parallel_data_arr(I)(55 DOWNTO 48); xgmii_rx_dc_arr(I)(62) <= rx_control_arr(I)(6);
- xgmii_rx_dc_arr(I)(52 DOWNTO 45) <= rx_parallel_data_arr(I)(47 DOWNTO 40); xgmii_rx_dc_arr(I)(53) <= rx_control_arr(I)(5);
- xgmii_rx_dc_arr(I)(43 DOWNTO 36) <= rx_parallel_data_arr(I)(39 DOWNTO 32); xgmii_rx_dc_arr(I)(44) <= rx_control_arr(I)(4);
- xgmii_rx_dc_arr(I)(34 DOWNTO 27) <= rx_parallel_data_arr(I)(31 DOWNTO 24); xgmii_rx_dc_arr(I)(35) <= rx_control_arr(I)(3);
- xgmii_rx_dc_arr(I)(25 DOWNTO 18) <= rx_parallel_data_arr(I)(23 DOWNTO 16); xgmii_rx_dc_arr(I)(26) <= rx_control_arr(I)(2);
- xgmii_rx_dc_arr(I)(16 DOWNTO 9) <= rx_parallel_data_arr(I)(15 DOWNTO 8); xgmii_rx_dc_arr(I)(17) <= rx_control_arr(I)(1);
- xgmii_rx_dc_arr(I)( 7 DOWNTO 0) <= rx_parallel_data_arr(I)( 7 DOWNTO 0); xgmii_rx_dc_arr(I)( 8) <= rx_control_arr(I)(0);
+ tx_parallel_data_arr(I) <= func_xgmii_d(xgmii_tx_dc_arr(I));
+ tx_control_arr(I) <= func_xgmii_c(xgmii_tx_dc_arr(I));
+
+ xgmii_rx_dc_arr(I) <= func_xgmii_dc(rx_parallel_data_arr(I), rx_control_arr(I));
u_ip_arria10_phy_10gbase_r_top : ip_arria10_phy_10gbase_r_top
PORT MAP (
--
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