diff --git a/applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd b/applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd
index dce30f2147dcd9cf534c73e145618a69d9fc2f59..7752b969126231d28336e4ee30ca848437197f9c 100644
--- a/applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd
+++ b/applications/lofar2/libraries/sdp/src/vhdl/sdp_statistics_offload.vhd
@@ -270,9 +270,10 @@ BEGIN
   
   u_dp_block_from_mm : ENTITY dp_lib.dp_block_from_mm_dc
   GENERIC MAP (
-    g_data_size => c_data_size,
-    g_step_size => c_step_size,
-    g_nof_data  => c_nof_data
+    g_data_size          => c_data_size,
+    g_step_size          => c_step_size,
+    g_nof_data           => c_nof_data,
+    g_reverse_word_order => TRUE -- default word order is MSB after LSB, we need to stream LSB after MSB.
   ) 
   PORT MAP(
     dp_rst        => dp_rst,
diff --git a/libraries/base/dp/src/vhdl/dp_block_from_mm.vhd b/libraries/base/dp/src/vhdl/dp_block_from_mm.vhd
index ca050afb700ddebdb067dbb9c34c3e5ca7a98c4e..c926592c910e2f72b5b86e55acfc1294f3b27835 100644
--- a/libraries/base/dp/src/vhdl/dp_block_from_mm.vhd
+++ b/libraries/base/dp/src/vhdl/dp_block_from_mm.vhd
@@ -18,7 +18,7 @@
 
 -- --------------------------------------------------------------------------
 -- Author: 
--- . Pieter Donker
+-- . Pieter Donker, R van der Walle
 -- Purpose:
 -- . Read a block of data from memory mapped (MM) location and stream it as a block of data.
 -- Description:
@@ -34,9 +34,10 @@ USE work.dp_stream_pkg.ALL;
 
 ENTITY dp_block_from_mm IS
   GENERIC (
-    g_data_size  : NATURAL;
-    g_step_size  : NATURAL;
-    g_nof_data   : NATURAL
+    g_data_size          : NATURAL;
+    g_step_size          : NATURAL;
+    g_nof_data           : NATURAL;
+    g_reverse_word_order : BOOLEAN := FALSE
   ); 
   PORT (
     rst           : IN  STD_LOGIC;
@@ -55,6 +56,7 @@ END dp_block_from_mm;
 ARCHITECTURE rtl OF dp_block_from_mm IS 
 
   CONSTANT c_mem_size : NATURAL := g_step_size * g_nof_data;
+  CONSTANT c_word_index_rst : NATURAL := sel_a_b(g_reverse_word_order, g_data_size - 1, 0);
 
   TYPE t_reg IS RECORD
     busy       : STD_LOGIC;
@@ -64,7 +66,7 @@ ARCHITECTURE rtl OF dp_block_from_mm IS
     step_index : NATURAL;
   END RECORD;
 
-  CONSTANT c_reg_rst : t_reg := ('0', '0', '0', 0, 0);
+  CONSTANT c_reg_rst : t_reg := ('0', '0', '0', c_word_index_rst, 0);
 
   SIGNAL r     : t_reg;
   SIGNAL nxt_r : t_reg;
@@ -111,29 +113,56 @@ BEGIN
       IF out_siso.ready = '1' THEN
         -- continue with block
         mm_mosi.rd <= '1';
-        IF r.word_index < g_data_size - 1 THEN
-          v.word_index := r.word_index + 1;
+
+        IF g_reverse_word_order THEN
+
+          IF r.word_index > 0 THEN
+            v.word_index := r.word_index - 1;
+          ELSE
+            v.word_index := g_data_size - 1;
+            v.step_index := r.step_index + g_step_size;
+          END IF;
+          
+          -- check start of block
+          IF r.word_index = g_data_size - 1 AND r.step_index = 0 THEN
+            v.sop := '1';
+          END IF;
+
         ELSE
-          v.word_index := 0;
-          v.step_index := r.step_index + g_step_size;
-        END IF;
-        
-        -- check start of block
-        IF r.word_index = 0 AND r.step_index = 0 THEN
-          v.sop := '1';
+
+          IF r.word_index < g_data_size - 1 THEN
+            v.word_index := r.word_index + 1;
+          ELSE
+            v.word_index := 0;
+            v.step_index := r.step_index + g_step_size;
+          END IF;
+          
+          -- check start of block
+          IF r.word_index = 0 AND r.step_index = 0 THEN
+            v.sop := '1';
+          END IF;
+
         END IF;
         
         -- check end of block
-        IF mm_address >= last_mm_address THEN
+        IF g_reverse_word_order THEN
+          IF mm_address = last_mm_address - (g_data_size - 1) THEN -- with reversed word order the last word to read is actually the first word of the last step index
+            v.eop := '1';
+            -- prepare for next block
+            v.busy := '0';
+            v.step_index := 0;
+            v.word_index := g_data_size - 1;
+          END IF;
+        ELSIF mm_address >= last_mm_address THEN -- g_reverse_word_order = False
           v.eop := '1';
           -- prepare for next block
           v.busy := '0';
-          v.word_index := 0;
           v.step_index := 0;
+          v.word_index := 0;
         END IF;
       END IF;
     END IF;
     nxt_r <= v;
   END PROCESS;
     
-END rtl;
\ No newline at end of file
+END rtl;
diff --git a/libraries/base/dp/src/vhdl/dp_block_from_mm_dc.vhd b/libraries/base/dp/src/vhdl/dp_block_from_mm_dc.vhd
index c2330f1ce6819eda3ed7d16808f6905b506c95f6..bb061f3bd196a17361a220bc9eb2a6806fab28f2 100644
--- a/libraries/base/dp/src/vhdl/dp_block_from_mm_dc.vhd
+++ b/libraries/base/dp/src/vhdl/dp_block_from_mm_dc.vhd
@@ -35,9 +35,10 @@ USE work.dp_stream_pkg.ALL;
 
 ENTITY dp_block_from_mm_dc IS
   GENERIC (
-    g_data_size  : NATURAL;
-    g_step_size  : NATURAL;
-    g_nof_data   : NATURAL
+    g_data_size          : NATURAL;
+    g_step_size          : NATURAL;
+    g_nof_data           : NATURAL;
+    g_reverse_word_order : BOOLEAN := FALSE
   ); 
   PORT (
     -- mm_clk domain
@@ -125,9 +126,10 @@ BEGIN
 
   p_dp_block_from_mm : ENTITY work.dp_block_from_mm
   GENERIC MAP (
-    g_data_size => g_data_size,
-    g_step_size => g_step_size,
-    g_nof_data  => g_nof_data 
+    g_data_size          => g_data_size,
+    g_step_size          => g_step_size,
+    g_nof_data           => g_nof_data,
+    g_reverse_word_order => g_reverse_word_order 
   )
   PORT MAP (
     clk         => mm_clk,
@@ -142,4 +144,4 @@ BEGIN
     out_siso      => mm_fifo_siso
   );
       
-END str;
\ No newline at end of file
+END str;