diff --git a/libraries/technology/ip_stratixiv/ddr3_mem_model/compile_ip.tcl b/libraries/technology/ip_stratixiv/ddr3_mem_model/compile_ip.tcl
index aa484a4ee70ee2594db2f55febaeaaf99cc3d3ba..a2129d9a99fbc73df2def0410fec51f4e143e4af 100644
--- a/libraries/technology/ip_stratixiv/ddr3_mem_model/compile_ip.tcl
+++ b/libraries/technology/ip_stratixiv/ddr3_mem_model/compile_ip.tcl
@@ -22,9 +22,8 @@
 
 # This file is based on Megawizard-generated file msim_setup.tcl.
 
-# Get the memory model fro the uphy_4g_* from the ip_stratixiv_ddr3_uphy_4g_800_master example design
-#set IP_DIR "$env(RADIOHDL)/libraries/technology/ip_stratixiv/ddr3_uphy_4g_800_master/generated/ip_stratixiv_ddr3_uphy_4g_800_master_example_design"
-set IP_DIR "$env(RADIOHDL_BUILD_DIR)/unb1/qmegawiz/ip_stratixiv_ddr3_uphy_4g_800_master_example_design
+# Get the memory model for the uphy_4g_* from the ip_stratixiv_ddr3_uphy_4g_800_master example design
+set IP_DIR "$env(RADIOHDL_BUILD_DIR)/unb1/qmegawiz/ip_stratixiv_ddr3_uphy_4g_800_master_example_design"
 
 # Assume library work already exists