diff --git a/libraries/base/dp/src/vhdl/dp_bsn_align_v2.vhd b/libraries/base/dp/src/vhdl/dp_bsn_align_v2.vhd
index 051a6533af01d0afb85aa59f074c0c48220fa7b4..ed3cfcba50327e86a79eddb393e015e47f2f76ce 100644
--- a/libraries/base/dp/src/vhdl/dp_bsn_align_v2.vhd
+++ b/libraries/base/dp/src/vhdl/dp_bsn_align_v2.vhd
@@ -131,6 +131,14 @@ ARCHITECTURE rtl OF dp_bsn_align_v2 IS
out_bsn : STD_LOGIC_VECTOR(g_bsn_w-1 DOWNTO 0); -- hold BSN for streaming output
END RECORD;
+ TYPE t_comb IS RECORD
+ ref_sosi : t_dp_sosi;
+ pointer_slv : STD_LOGIC_VECTOR(c_blk_pointer_w-1 DOWNTO 0);
+ product_slv : STD_LOGIC_VECTOR(c_product_w-1 DOWNTO 0);
+ lost_data_flag : STD_LOGIC;
+ out_sosi_arr : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
+ END RECORD;
+
CONSTANT c_reg_rst : t_reg := (0,
(OTHERS=>c_mem_copi_rst),
(OTHERS=>(OTHERS=>'0')),
@@ -145,11 +153,14 @@ ARCHITECTURE rtl OF dp_bsn_align_v2 IS
(OTHERS=>c_mem_cipo_rst),
(OTHERS=>'0'));
- -- State registers
+ -- State registers for p_comb
SIGNAL r : t_reg;
SIGNAL nxt_r : t_reg;
- -- Wires
+ -- Memoryless signals in p_comb (wires used as local auxiliary variables)
+ SIGNAL s : t_comb;
+
+ -- Structural signals (wires used to connect components and IO)
SIGNAL dp_done : STD_LOGIC;
SIGNAL dp_done_arr : STD_LOGIC_VECTOR(g_nof_streams-1 DOWNTO 0);
SIGNAL dp_copi : t_mem_copi;
@@ -190,16 +201,10 @@ BEGIN
END PROCESS;
p_comb : PROCESS(r, in_sosi_arr_p, mm_copi, dp_copi, rd_cipo_arr, rd_sosi_arr)
- -- State variable
- VARIABLE v : t_reg;
- -- Auxiliary variables / local wires / no memory
- VARIABLE v_ref_sosi : t_dp_sosi;
- VARIABLE v_pointer_slv : STD_LOGIC_VECTOR(c_blk_pointer_w-1 DOWNTO 0);
- VARIABLE v_product_slv : STD_LOGIC_VECTOR(c_product_w-1 DOWNTO 0);
- VARIABLE v_lost_data_flag : STD_LOGIC;
- VARIABLE v_out_sosi_arr : t_dp_sosi_arr(g_nof_streams-1 DOWNTO 0);
+ VARIABLE v : t_reg; -- State variable
+ VARIABLE d : t_comb; -- Memoryless auxiliary variables, local wires
BEGIN
- v := r;
+ v := r; -- state signals
v.mm_sosi := func_dp_stream_reset_control(r.mm_sosi);
v.wr_copi_arr := RESET_MEM_COPI_CTRL(r.wr_copi_arr);
@@ -217,24 +222,24 @@ BEGIN
IF in_sosi_arr_p(I).sop = '1' THEN
-- . set address at start of block
- v_pointer_slv := in_sosi_arr_p(I).bsn(c_blk_pointer_w-1 DOWNTO 0);
- v_product_slv := MULT_UVEC(v_pointer_slv, c_block_size_slv);
- v.wr_copi_arr(I).address := RESIZE_MEM_ADDRESS(v_product_slv);
+ d.pointer_slv := in_sosi_arr_p(I).bsn(c_blk_pointer_w-1 DOWNTO 0);
+ d.product_slv := MULT_UVEC(d.pointer_slv, c_block_size_slv);
+ v.wr_copi_arr(I).address := RESIZE_MEM_ADDRESS(d.product_slv);
-- . set filled flag at sop, so assume rest of block will follow in time
- v.filled_arr(I)(TO_UINT(v_pointer_slv)) := '1';
+ v.filled_arr(I)(TO_UINT(d.pointer_slv)) := '1';
END IF;
END LOOP;
----------------------------------------------------------------------------
-- p_control, all at sop of local reference input 0
----------------------------------------------------------------------------
- v_ref_sosi := in_sosi_arr_p(0);
- IF v_ref_sosi.sop = '1' THEN
+ d.ref_sosi := in_sosi_arr_p(0);
+ IF d.ref_sosi.sop = '1' THEN
-- . write sync & bsn buffer
- v.wr_pointer := TO_UINT(v_ref_sosi.bsn(c_blk_pointer_w-1 DOWNTO 0));
- v.sync_arr(v.wr_pointer) := v_ref_sosi.sync;
- v.bsn_arr(v.wr_pointer) := v_ref_sosi.bsn(g_bsn_w-1 DOWNTO 0);
+ v.wr_pointer := TO_UINT(d.ref_sosi.bsn(c_blk_pointer_w-1 DOWNTO 0));
+ v.sync_arr(v.wr_pointer) := d.ref_sosi.sync;
+ v.bsn_arr(v.wr_pointer) := d.ref_sosi.bsn(g_bsn_w-1 DOWNTO 0);
-- . update read block pointer at g_bsn_latency_max blocks behind the reference write pointer
IF g_nof_aligners_max = 1 THEN
@@ -247,9 +252,9 @@ BEGIN
END IF;
-- . update read address of read block pointer
- v_pointer_slv := TO_UVEC(v.rd_pointer, c_blk_pointer_w);
- v_product_slv := MULT_UVEC(v_pointer_slv, c_block_size_slv);
- v.rd_offset := RESIZE_UVEC(v_product_slv, c_mem_ram.adr_w);
+ d.pointer_slv := TO_UVEC(v.rd_pointer, c_blk_pointer_w);
+ d.product_slv := MULT_UVEC(d.pointer_slv, c_block_size_slv);
+ v.rd_offset := RESIZE_UVEC(d.product_slv, c_mem_ram.adr_w);
-- . issue mm_sosi, if there is output ready to be read, indicated by filled reference block
IF r.filled_arr(0)(v.rd_pointer) = '1' THEN
@@ -263,10 +268,10 @@ BEGIN
-- determine whether the ouput has to insert replacement data
v.mm_sosi.channel := (OTHERS=>'0');
FOR I IN 0 TO g_nof_streams-1 LOOP
- v_lost_data_flag := NOT v.filled_arr(I)(v.rd_pointer);
+ d.lost_data_flag := NOT v.filled_arr(I)(v.rd_pointer);
IF stream_en_arr(I) = '1' THEN -- use MM bit at sop
- v.use_replacement_data(I) := v_lost_data_flag; -- enabled stream, so replace if data was lost
- v.mm_sosi.channel(I) := v_lost_data_flag;
+ v.use_replacement_data(I) := d.lost_data_flag; -- enabled stream, so replace if data was lost
+ v.mm_sosi.channel(I) := d.lost_data_flag;
ELSE
v.use_replacement_data(I) := '1'; -- disabled stream, so replace data
END IF;
@@ -319,25 +324,28 @@ BEGIN
END IF;
-- apply mm_sosi.sync and bsn at sop to all streams in out_sosi_arr
- v_out_sosi_arr := rd_sosi_arr; -- = v.fill_cipo_arr in streaming format, contains the
+ d.out_sosi_arr := rd_sosi_arr; -- = v.fill_cipo_arr in streaming format, contains the
-- input data from the buffer or replacement data
IF rd_sosi_arr(0).sop = '1' THEN
- v_out_sosi_arr := func_dp_stream_arr_set(v_out_sosi_arr, r.dp_sosi.sync, "SYNC");
- v_out_sosi_arr := func_dp_stream_arr_set(v_out_sosi_arr, r.dp_sosi.bsn, "BSN");
+ d.out_sosi_arr := func_dp_stream_arr_set(d.out_sosi_arr, r.dp_sosi.sync, "SYNC");
+ d.out_sosi_arr := func_dp_stream_arr_set(d.out_sosi_arr, r.dp_sosi.bsn, "BSN");
v.out_bsn := r.dp_sosi.bsn(g_bsn_w-1 DOWNTO 0); -- hold BSN until next sop, to ease view in wave window
ELSE
-- hold BSN until next sop, to ease view in wave window
- v_out_sosi_arr := func_dp_stream_arr_set(v_out_sosi_arr, r.out_bsn, "BSN");
+ d.out_sosi_arr := func_dp_stream_arr_set(d.out_sosi_arr, r.out_bsn, "BSN");
END IF;
-- . output via DP streaming interface
- out_sosi_arr <= v_out_sosi_arr;
+ out_sosi_arr <= d.out_sosi_arr;
END IF;
----------------------------------------------------------------------------
-- next state
----------------------------------------------------------------------------
nxt_r <= v;
+
+ -- memory less signals, only for view in wave window
+ s <= d;
END PROCESS;
------------------------------------------------------------------------------