Added new ddr versions

boards/uniboard1/designs/unb1_test/revisions/unb1_test_all/unb1_test_all.vhd

@@ -91,7 +91,12 @@ ENTITY unb1_test_all IS
     -- SO-DIMM Memory Bank I
     MB_I_IN       : IN    t_tech_ddr3_phy_in;
     MB_I_IO       : INOUT t_tech_ddr3_phy_io;
-    MB_I_OU       : OUT   t_tech_ddr3_phy_ou
+    MB_I_OU       : OUT   t_tech_ddr3_phy_ou;
+
+    -- SO-DIMM Memory Bank II
+    MB_II_IN      : IN    t_tech_ddr3_phy_in;
+    MB_II_IO      : INOUT t_tech_ddr3_phy_io;
+    MB_II_OU      : OUT   t_tech_ddr3_phy_ou
   );
 END unb1_test_all;
 
@@ -163,11 +168,11 @@ BEGIN
 
     MB_I_IN => MB_I_IN,
     MB_I_IO => MB_I_IO,
-    MB_I_OU => MB_I_OU
+    MB_I_OU => MB_I_OU,
 
---    MB_II_IN => MB_II_IN,
---    MB_II_IO => MB_II_IO,
---    MB_II_OU => MB_II_OU
+    MB_II_IN => MB_II_IN,
+    MB_II_IO => MB_II_IO,
+    MB_II_OU => MB_II_OU
   );
 
 END str;