From 16921d35330c232fb7a0957ef382240434ca77d4 Mon Sep 17 00:00:00 2001
From: Eric Kooistra <kooistra@astron.nl>
Date: Thu, 16 Feb 2023 09:05:10 +0100
Subject: [PATCH] Add missing common_adder_tree_im_sum in sensitivity list of
p_src_out.
---
libraries/base/dp/src/vhdl/dp_complex_add.vhd | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/libraries/base/dp/src/vhdl/dp_complex_add.vhd b/libraries/base/dp/src/vhdl/dp_complex_add.vhd
index 24a2d604f6..ad8607a9ec 100644
--- a/libraries/base/dp/src/vhdl/dp_complex_add.vhd
+++ b/libraries/base/dp/src/vhdl/dp_complex_add.vhd
@@ -106,7 +106,7 @@ BEGIN
sum => common_adder_tree_im_sum
);
- p_src_out : PROCESS(snk_in_pipe, common_adder_tree_re_sum)
+ p_src_out : PROCESS(snk_in_pipe, common_adder_tree_re_sum, common_adder_tree_im_sum)
BEGIN
src_out <= snk_in_pipe;
src_out.re <= RESIZE_DP_DSP_DATA(common_adder_tree_re_sum(c_common_adder_tree_sum_w-1 DOWNTO 0));
@@ -117,6 +117,7 @@ BEGIN
-- Forward the other snk_in fields with the correct latency
-----------------------------------------------------------------------------
+ -- All g_nof_inputs have same, so use other fields from input 0 for all
snk_in <= snk_in_arr(0);
u_dp_pipeline : ENTITY work.dp_pipeline
--
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