From 157e3c6b303a51adb99ba8f0795e38a410ee3aa0 Mon Sep 17 00:00:00 2001
From: Leon Hiemstra <hiemstra@astron.nl>
Date: Thu, 13 Nov 2014 07:56:22 +0000
Subject: [PATCH] tuning

---
 boards/uniboard1/designs/unb1_test/hdllib.cfg          |  2 +-
 .../uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd | 10 +++-------
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/boards/uniboard1/designs/unb1_test/hdllib.cfg b/boards/uniboard1/designs/unb1_test/hdllib.cfg
index 521d1d8bc2..21d5da89bb 100644
--- a/boards/uniboard1/designs/unb1_test/hdllib.cfg
+++ b/boards/uniboard1/designs/unb1_test/hdllib.cfg
@@ -1,6 +1,6 @@
 hdl_lib_name = unb1_test
 hdl_library_clause_name = unb1_test_lib
-hdl_lib_uses = common technology tech_tse mm i2c unb1_board epcs dp eth tr_10GbE mdio diagnostics diag
+hdl_lib_uses = common technology mm i2c unb1_board epcs dp eth tech_tse tr_10GbE mdio diagnostics diag
 hdl_lib_technology = ip_stratixiv
 
 build_dir_sim = $HDL_BUILD_DIR
diff --git a/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd b/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd
index 2d10b3fb83..1b498ff5ae 100644
--- a/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd
+++ b/boards/uniboard1/designs/unb1_test/src/vhdl/unb1_test.vhd
@@ -128,12 +128,10 @@ ARCHITECTURE str OF unb1_test IS
 
 
   -- Block generator
-  --CONSTANT c_bg_block_size              : NATURAL := 900;
-  CONSTANT c_bg_block_size              : NATURAL := 700;
+  CONSTANT c_bg_block_size              : NATURAL := 900;
   CONSTANT c_bg_gapsize                 : NATURAL := 100;
   CONSTANT c_bg_blocks_per_sync         : NATURAL := sel_a_b(g_sim, 10, 200000); -- 200000*(900+100) = 200000000 cycles = 1 second
-  --CONSTANT c_bg_ctrl                    : t_diag_block_gen := ('1',                                -- enable             
-  CONSTANT c_bg_ctrl                    : t_diag_block_gen := ('0',                                -- enable             
+  CONSTANT c_bg_ctrl                    : t_diag_block_gen := ('0',                                -- enable (disabled by default) 
                                                                '0',                                -- enable_sync        
                                                               TO_UVEC(     c_bg_block_size, c_diag_bg_samples_per_packet_w),
                                                               TO_UVEC(c_bg_blocks_per_sync, c_diag_bg_blocks_per_sync_w),
@@ -735,8 +733,7 @@ BEGIN
     g_nof_streams  => c_nof_streams,
     g_data_w       => c_data_w,
     g_buf_nof_data => 1024,
-    --g_buf_use_sync => TRUE
-    g_buf_use_sync => FALSE
+    g_buf_use_sync => FALSE -- sync by reading last address of data buffer
   )
   PORT MAP (
     mm_rst            => mm_rst,
@@ -785,7 +782,6 @@ BEGIN
       g_sim_level     => 1,
       g_nof_macs      => c_nof_streams,
       g_use_mdio      => TRUE,
-      --g_mdio_epcs_dis => c_use_pc_target,
       g_pkt_len       => c_def_10GbE_block_size
     )
     PORT MAP (
-- 
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