diff --git a/libraries/base/dp/src/vhdl/dp_components_pkg.vhd b/libraries/base/dp/src/vhdl/dp_components_pkg.vhd
index 1bedd23e323fa8184edbf9a10574adc013603a99..994b5988181f6921038a36ca7ca57313c2ff9716 100644
--- a/libraries/base/dp/src/vhdl/dp_components_pkg.vhd
+++ b/libraries/base/dp/src/vhdl/dp_components_pkg.vhd
@@ -30,15 +30,17 @@ USE common_lib.common_pkg.ALL;
 
 PACKAGE dp_components_pkg IS
 
-  CONSTANT c_dp_clk_MHz                           : NATURAL := 200;
-  CONSTANT c_dp_sync_timeout                      : NATURAL := c_dp_clk_MHz*10**6 + c_dp_clk_MHz*10**5;  -- 10% margin for nominal 1 s
+  CONSTANT c_dp_clk_MHz                               : NATURAL := 200;
+  CONSTANT c_dp_sync_timeout                          : NATURAL := c_dp_clk_MHz*10**6 + c_dp_clk_MHz*10**5;  -- 10% margin for nominal 1 s
 
-  CONSTANT c_dp_bsn_monitor_v2_reg_adr_w          : NATURAL := ceil_log2(7);  -- = 3
-  CONSTANT c_dp_bsn_monitor_v2_reg_adr_span       : NATURAL := 2**c_dp_bsn_monitor_v2_reg_adr_w; -- = 8
+  CONSTANT c_dp_bsn_monitor_v2_reg_adr_w              : NATURAL := ceil_log2(7);  -- = 3
+  CONSTANT c_dp_bsn_monitor_v2_reg_adr_span           : NATURAL := 2**c_dp_bsn_monitor_v2_reg_adr_w; -- = 8
 
-  CONSTANT c_dp_strobe_total_count_reg_adr_w      : NATURAL := ceil_log2(15*2 + 1); -- = 5
-  CONSTANT c_dp_strobe_total_count_reg_adr_span   : NATURAL := 2**c_dp_strobe_total_count_reg_adr_w;  -- = 32
-  CONSTANT c_dp_strobe_total_count_nof_counts_max : NATURAL := 2**c_dp_strobe_total_count_reg_adr_w / 2 - 1;  -- = 15
+  CONSTANT c_dp_strobe_total_count_reg_nof_words      : NATURAL := 15*2 + 1; -- = 31
+  CONSTANT c_dp_strobe_total_count_reg_adr_w          : NATURAL := ceil_log2(c_dp_strobe_total_count_reg_nof_words); -- = 5
+  CONSTANT c_dp_strobe_total_count_reg_adr_span       : NATURAL := 2**c_dp_strobe_total_count_reg_adr_w;  -- = 32
+  CONSTANT c_dp_strobe_total_count_reg_nof_counts_max : NATURAL := 2**c_dp_strobe_total_count_reg_adr_w / 2 - 1;  -- = 15
+  CONSTANT c_dp_strobe_total_count_reg_clear_adr      : NATURAL := c_dp_strobe_total_count_reg_nof_counts_max*2;  -- after counters in REGMAP
 
 END dp_components_pkg;
 
diff --git a/libraries/base/dp/src/vhdl/dp_strobe_total_count.vhd b/libraries/base/dp/src/vhdl/dp_strobe_total_count.vhd
index cae82db6f7ce41435ef8c336817327f5402936c8..2a08ade6252bd31a5064cfbbe7c6f557f7c565e7 100644
--- a/libraries/base/dp/src/vhdl/dp_strobe_total_count.vhd
+++ b/libraries/base/dp/src/vhdl/dp_strobe_total_count.vhd
@@ -99,15 +99,15 @@ END dp_strobe_total_count;
 
 ARCHITECTURE rtl OF dp_strobe_total_count IS
 
-  CONSTANT c_nof_counts_max : NATURAL := c_dp_strobe_total_count_nof_counts_max;  -- fixed by REGMAP
-  CONSTANT c_nof_words      : NATURAL := c_nof_counts_max*2 + 1;  -- +1 for clear
-  CONSTANT c_clear_adr      : NATURAL := c_nof_counts_max*2;  -- after counters in REGMAP
+  -- Fixed by REGMAP
+  CONSTANT c_nof_counts_max : NATURAL := c_dp_strobe_total_count_reg_nof_counts_max;
+  CONSTANT c_clear_adr      : NATURAL := c_dp_strobe_total_count_reg_clear_adr;
 
   -- Define the size of the MM slave register
   CONSTANT c_mm_reg : t_c_mem := (latency  => 1,
                                   adr_w    => c_dp_strobe_total_count_reg_adr_w,
                                   dat_w    => g_mm_w,  -- Use MM bus data width = c_word_w = 32 for all MM registers
-                                  nof_dat  => c_nof_words,
+                                  nof_dat  => c_dp_strobe_total_count_reg_nof_words,
                                   init_sl  => '0');
 
   TYPE t_cnt_arr IS ARRAY (INTEGER RANGE <>) OF STD_LOGIC_VECTOR(g_count_w-1 DOWNTO 0);