From 14044edd21220958419491df5fc9dfd2a96ce6e0 Mon Sep 17 00:00:00 2001 From: David Brouwer <dbrouwer@astron.nl> Date: Wed, 17 Jan 2024 16:00:09 +0100 Subject: [PATCH] RTSD-181: Clearified issue and use for Agilex7 in information header. --- libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd | 6 +++--- libraries/base/common/src/vhdl/common_ram_crw_cr.vhd | 4 ++-- libraries/base/common/src/vhdl/common_ram_crw_crw.vhd | 6 +++--- libraries/base/common/src/vhdl/common_ram_crw_crw_ratio.vhd | 6 +++--- libraries/base/common/src/vhdl/common_ram_crw_cw.vhd | 6 +++--- 5 files changed, 14 insertions(+), 14 deletions(-) diff --git a/libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd b/libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd index c4012fc054..c125c8ec5a 100644 --- a/libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd +++ b/libraries/base/common/src/vhdl/common_paged_ram_crw_crw.vhd @@ -1,6 +1,6 @@ -- ----------------------------------------------------------------------------- -- --- Copyright 2011-2023 +-- Copyright 2011-2024 -- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> -- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands -- @@ -38,8 +38,8 @@ -- pages are then mapped at subsequent addresses in the buf RAM. -- . The "use_adr" variant is optimal for speed, so that is set as default. -- Issues: --- Unavailable for Intel Agilex 7 (agi027_xxxx). See common_paged_ram_rw_rw --- for more context. +-- Dual clock support is unavailable for Intel Agilex 7 (agi027_xxxx). +-- See common_paged_ram_rw_rw for more context. library IEEE, technology_lib; use IEEE.std_logic_1164.all; diff --git a/libraries/base/common/src/vhdl/common_ram_crw_cr.vhd b/libraries/base/common/src/vhdl/common_ram_crw_cr.vhd index 9460631e1d..bbb0341aa4 100644 --- a/libraries/base/common/src/vhdl/common_ram_crw_cr.vhd +++ b/libraries/base/common/src/vhdl/common_ram_crw_cr.vhd @@ -23,8 +23,8 @@ -- Changed by: -- D.F. Brouwer -- Issues: --- Unavailable for Intel Agilex 7 (agi027_xxxx). See common_ram_rw_rw --- for more context. +-- Dual clock support is unavailable for Intel Agilex 7 (agi027_xxxx). +-- See common_ram_rw_rw for more context. library IEEE, technology_lib; use IEEE.std_logic_1164.all; diff --git a/libraries/base/common/src/vhdl/common_ram_crw_crw.vhd b/libraries/base/common/src/vhdl/common_ram_crw_crw.vhd index b602cf707d..e83f794595 100644 --- a/libraries/base/common/src/vhdl/common_ram_crw_crw.vhd +++ b/libraries/base/common/src/vhdl/common_ram_crw_crw.vhd @@ -1,6 +1,6 @@ -- ----------------------------------------------------------------------------- -- --- Copyright 2014-2023 +-- Copyright 2014-2024 -- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> -- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands -- @@ -23,8 +23,8 @@ -- Changed by: -- D.F. Brouwer -- Issues: --- Unavailable for Intel Agilex 7 (agi027_xxxx). See common_ram_rw_rw --- for more context. +-- Dual clock support is unavailable for Intel Agilex 7 (agi027_xxxx). +-- See common_ram_rw_rw for more context. library IEEE, technology_lib, tech_memory_lib; use IEEE.std_logic_1164.all; diff --git a/libraries/base/common/src/vhdl/common_ram_crw_crw_ratio.vhd b/libraries/base/common/src/vhdl/common_ram_crw_crw_ratio.vhd index c85bd11f2e..aeeb36fb8a 100644 --- a/libraries/base/common/src/vhdl/common_ram_crw_crw_ratio.vhd +++ b/libraries/base/common/src/vhdl/common_ram_crw_crw_ratio.vhd @@ -1,6 +1,6 @@ -- ----------------------------------------------------------------------------- -- --- Copyright 2014-2023 +-- Copyright 2014-2024 -- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> -- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands -- @@ -23,8 +23,8 @@ -- Changed by: -- D.F. Brouwer -- Issues: --- Unavailable for Intel Agilex 7 (agi027_xxxx). See common_ram_cr_cw_ratio --- for more context. +-- Dual clock and ratio support is unavailable for Intel Agilex 7 (agi027_xxxx). +-- See common_ram_cr_cw_ratio for more context. library IEEE, technology_lib, tech_memory_lib; use IEEE.std_logic_1164.all; diff --git a/libraries/base/common/src/vhdl/common_ram_crw_cw.vhd b/libraries/base/common/src/vhdl/common_ram_crw_cw.vhd index 5fe4fde778..26bdd49ae1 100644 --- a/libraries/base/common/src/vhdl/common_ram_crw_cw.vhd +++ b/libraries/base/common/src/vhdl/common_ram_crw_cw.vhd @@ -1,6 +1,6 @@ -- ----------------------------------------------------------------------------- -- --- Copyright 2014-2023 +-- Copyright 2014-2024 -- ASTRON (Netherlands Institute for Radio Astronomy) <http://www.astron.nl/> -- P.O.Box 2, 7990 AA Dwingeloo, The Netherlands -- @@ -23,8 +23,8 @@ -- Changed by: -- D.F. Brouwer -- Issues: --- Unavailable for Intel Agilex 7 (agi027_xxxx). See common_ram_rw_rw --- for more context. +-- Dual clock support is unavailable for Intel Agilex 7 (agi027_xxxx). +-- See common_ram_rw_rw for more context. library IEEE, technology_lib; use IEEE.std_logic_1164.all; -- GitLab