From 1193e115ab8e6fb938b95aa776d2fc454f901491 Mon Sep 17 00:00:00 2001
From: Daniel van der Schuur <schuur@astron.nl>
Date: Tue, 24 Feb 2015 14:00:55 +0000
Subject: [PATCH] -Renamed SOPC: unb_* -> unb1_*. -Added files to hdllib.cfg.
---
.../dp/designs/unb1_dp_offload/hdllib.cfg | 23 ++++++++++++++++---
.../quartus/sopc_unb1_dp_offload.sopc | 8 +++----
2 files changed, 24 insertions(+), 7 deletions(-)
diff --git a/libraries/base/dp/designs/unb1_dp_offload/hdllib.cfg b/libraries/base/dp/designs/unb1_dp_offload/hdllib.cfg
index 4731f4337b..ec9d3eaf12 100644
--- a/libraries/base/dp/designs/unb1_dp_offload/hdllib.cfg
+++ b/libraries/base/dp/designs/unb1_dp_offload/hdllib.cfg
@@ -1,16 +1,33 @@
hdl_lib_name = unb1_dp_offload
hdl_library_clause_name = unb1_dp_offload_lib
-hdl_lib_uses_synth = common dp diag
+hdl_lib_uses_synth = common dp unb1_board diag
hdl_lib_uses_sim =
-hdl_lib_technology =
+hdl_lib_technology = ip_stratixiv
build_dir_sim = $HDL_BUILD_DIR
build_dir_synth = $HDL_BUILD_DIR
+synth_top_level_entity =
+
+quartus_copy_files =
+ quartus/sopc_unb1_dp_offload.sopc .
+
synth_files =
- src/vhdl/unb1_dp_offload.vhd
+ $HDL_BUILD_DIR/quartus/unb1_dp_offload/sopc_unb1_dp_offload/synthesis/sopc_unb1_dp_offload.vhd
src/vhdl/mmm_unb1_dp_offload.vhd
+ src/vhdl/unb1_dp_offload.vhd
test_bench_files =
tb/vhdl/tb_unb1_dp_offload.vhd
+
+quartus_qsf_files =
+ $RADIOHDL/boards/uniboard1/libraries/unb1_board/quartus/unb1_board.qsf
+
+quartus_tcl_files =
+ quartus/unb1_dp_offload_pins.tcl
+
+quartus_vhdl_files =
+
+quartus_qip_files =
+ $HDL_BUILD_DIR/quartus/unb1_dp_offload/sopc_unb1_dp_offload/synthesis/sopc_unb1_dp_offload.qip
diff --git a/libraries/base/dp/designs/unb1_dp_offload/quartus/sopc_unb1_dp_offload.sopc b/libraries/base/dp/designs/unb1_dp_offload/quartus/sopc_unb1_dp_offload.sopc
index c0d7f3feb0..de8d0beb6e 100644
--- a/libraries/base/dp/designs/unb1_dp_offload/quartus/sopc_unb1_dp_offload.sopc
+++ b/libraries/base/dp/designs/unb1_dp_offload/quartus/sopc_unb1_dp_offload.sopc
@@ -1,5 +1,5 @@
<?xml version="1.0" encoding="UTF-8"?>
-<system name="sopc_unb_dp_offload">
+<system name="sopc_unb1_dp_offload">
<parameter name="bonusData"><![CDATA[bonusData
{
element altpll_0
@@ -268,7 +268,7 @@
}
datum megawizard_uipreferences
{
- value = "{output_language=VHDL, output_directory=D:\\svnroot\\UniBoard_FP7\\UniBoard\\trunk\\Firmware\\designs\\unb_dp_offload\\build\\synth\\quartus}";
+ value = "{output_language=VHDL, output_directory=D:\\svnroot\\UniBoard_FP7\\UniBoard\\trunk\\Firmware\\designs\\unb1_dp_offload\\build\\synth\\quartus}";
type = "String";
}
}
@@ -463,7 +463,7 @@
type = "long";
}
}
- element sopc_unb_dp_offload
+ element sopc_unb1_dp_offload
{
}
element timer_0
@@ -486,7 +486,7 @@
<parameter name="globalResetBus" value="true" />
<parameter name="hdlLanguage" value="VHDL" />
<parameter name="maxAdditionalLatency" value="0" />
- <parameter name="projectName" value="unb_dp_offload.qpf" />
+ <parameter name="projectName" value="unb1_dp_offload.qpf" />
<parameter name="sopcBorderPoints" value="true" />
<parameter name="systemHash" value="-49214265646" />
<parameter name="timeStamp" value="1409904751768" />
--
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