diff --git a/boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning.qsf b/boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning.qsf
index 7b32c8f5a434dab38dcc997b8b1f7c431df4273a..a1101f9d87f0c0a787ea0e207b1a57c69c69067e 100644
--- a/boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning.qsf
+++ b/boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning.qsf
@@ -1035,9 +1035,10 @@ set_location_assignment PIN_M16 -to MB_EVENT
-set_global_assignment -name DEVICE 10AX115U3F45I2LG
+#set_global_assignment -name DEVICE 10AX115U3F45I2LG
#set_global_assignment -name DEVICE 10AX115U4F45I3SGES
-#set_global_assignment -name DEVICE 10AX115U4F45I3SG
+#set_global_assignment -name DEVICE 10AX115U4F45I2SGES
+set_global_assignment -name DEVICE 10AX115U4F45I3SG
@@ -1619,6 +1620,9 @@ set_global_assignment -name EDA_IBIS_SPECIFICATION_VERSION 5P0 -section_id eda_b
+
+
+
set_global_assignment -name VHDL_FILE ../../../../../../../../UniBoard/trunk/Firmware/modules/MegaWizard/mem/ram_cr_cw.vhd
set_global_assignment -name VHDL_FILE ../../../../../../../../UniBoard/trunk/Firmware/modules/MegaWizard/mem/ram_crw_crw.vhd
set_global_assignment -name VHDL_FILE ../../../../../../../../UniBoard/trunk/Firmware/modules/common/src/vhdl/common_ram_crw_crw_a_stratix4.vhd
@@ -1660,5 +1664,4 @@ set_global_assignment -name SIP_FILE ../../src/ip/ddr4.sip
set_global_assignment -name VHDL_FILE ../../src/vhdl/unb2_pinning.vhd
set_global_assignment -name SOURCE_FILE db/unb2_pinning.cmp.rdb
set_global_assignment -name SDC_FILE ../../src/sdc/unb2_pinning.sdc
-
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file
diff --git a/boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning_qsys.qsys b/boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning_qsys.qsys
index 9814d1bb7cc51e568fc047372c83591883618f93..c98068836cbc34c000182130ba30517bf02862a1 100644
--- a/boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning_qsys.qsys
+++ b/boards/uniboard2/designs/unb2_pinning/build/quartus/unb2_pinning_qsys.qsys
@@ -11,6 +11,11 @@
{
element $${FILENAME}
{
+ datum _originalDeviceFamily
+ {
+ value = "Arria 10";
+ type = "String";
+ }
}
element avs_i2c_master_0
{
@@ -20,331 +25,339 @@
type = "int";
}
}
- element avs_i2c_master_1
+ element avs_i2c_master_0.control
{
- datum _sortIndex
+ datum baseAddress
{
- value = "4";
- type = "int";
+ value = "96360";
+ type = "String";
}
}
- element avs_i2c_master_10
+ element avs_i2c_master_0.protocol
{
- datum _sortIndex
+ datum baseAddress
{
- value = "13";
- type = "int";
+ value = "95232";
+ type = "String";
}
}
- element avs_i2c_master_11
+ element avs_i2c_master_0.result
{
- datum _sortIndex
+ datum baseAddress
{
- value = "14";
- type = "int";
+ value = "94208";
+ type = "String";
}
}
- element avs_i2c_master_2
+ element avs_i2c_master_0.system_reset
{
- datum _sortIndex
+ datum _tags
{
- value = "5";
- type = "int";
+ value = "";
+ type = "String";
}
}
- element avs_i2c_master_3
+ element avs_i2c_master_1
{
datum _sortIndex
{
- value = "6";
+ value = "4";
type = "int";
}
}
- element avs_i2c_master_4
+ element avs_i2c_master_1.control
{
- datum _sortIndex
+ datum baseAddress
{
- value = "7";
- type = "int";
+ value = "96352";
+ type = "String";
}
}
- element avs_i2c_master_5
+ element avs_i2c_master_1.protocol
{
- datum _sortIndex
+ datum baseAddress
{
- value = "8";
- type = "int";
+ value = "93184";
+ type = "String";
}
}
- element avs_i2c_master_6
+ element avs_i2c_master_1.result
{
- datum _sortIndex
+ datum baseAddress
{
- value = "9";
- type = "int";
+ value = "92160";
+ type = "String";
}
}
- element avs_i2c_master_7
+ element avs_i2c_master_10
{
datum _sortIndex
{
- value = "10";
+ value = "13";
type = "int";
}
}
- element avs_i2c_master_8
+ element avs_i2c_master_10.control
{
- datum _sortIndex
+ datum baseAddress
{
- value = "11";
- type = "int";
+ value = "96280";
+ type = "String";
}
}
- element avs_i2c_master_9
+ element avs_i2c_master_10.protocol
{
- datum _sortIndex
+ datum baseAddress
{
- value = "12";
- type = "int";
+ value = "74752";
+ type = "String";
}
}
- element clk_0
+ element avs_i2c_master_10.result
+ {
+ datum baseAddress
+ {
+ value = "73728";
+ type = "String";
+ }
+ }
+ element avs_i2c_master_11
{
datum _sortIndex
{
- value = "0";
+ value = "14";
type = "int";
}
}
- element avs_i2c_master_7.control
+ element avs_i2c_master_11.control
{
datum baseAddress
{
- value = "96304";
+ value = "96272";
type = "String";
}
}
- element avs_i2c_master_2.control
+ element avs_i2c_master_11.protocol
{
datum baseAddress
{
- value = "96344";
+ value = "70656";
type = "String";
}
}
- element avs_i2c_master_3.control
+ element avs_i2c_master_11.result
{
datum baseAddress
{
- value = "96336";
+ value = "69632";
type = "String";
}
}
- element avs_i2c_master_11.control
+ element avs_i2c_master_2
{
- datum baseAddress
+ datum _sortIndex
{
- value = "96272";
- type = "String";
+ value = "5";
+ type = "int";
}
}
- element avs_i2c_master_6.control
+ element avs_i2c_master_2.control
{
datum baseAddress
{
- value = "96312";
+ value = "96344";
type = "String";
}
}
- element avs_i2c_master_5.control
+ element avs_i2c_master_2.protocol
{
datum baseAddress
{
- value = "96320";
+ value = "91136";
type = "String";
}
}
- element avs_i2c_master_8.control
+ element avs_i2c_master_2.result
{
datum baseAddress
{
- value = "96296";
+ value = "90112";
type = "String";
}
}
- element avs_i2c_master_4.control
+ element avs_i2c_master_3
{
- datum baseAddress
+ datum _sortIndex
{
- value = "96328";
- type = "String";
+ value = "6";
+ type = "int";
}
}
- element avs_i2c_master_1.control
+ element avs_i2c_master_3.control
{
datum baseAddress
{
- value = "96352";
+ value = "96336";
type = "String";
}
}
- element avs_i2c_master_10.control
+ element avs_i2c_master_3.protocol
{
datum baseAddress
{
- value = "96280";
+ value = "89088";
type = "String";
}
}
- element avs_i2c_master_0.control
+ element avs_i2c_master_3.result
{
datum baseAddress
{
- value = "96360";
+ value = "88064";
type = "String";
}
}
- element avs_i2c_master_9.control
+ element avs_i2c_master_4
{
- datum baseAddress
+ datum _sortIndex
{
- value = "96288";
- type = "String";
+ value = "7";
+ type = "int";
}
}
- element eth_tse_1.control_port
+ element avs_i2c_master_4.control
{
datum baseAddress
{
- value = "71680";
+ value = "96328";
type = "String";
}
}
- element eth_tse_0.control_port
+ element avs_i2c_master_4.protocol
{
datum baseAddress
{
- value = "72704";
+ value = "87040";
type = "String";
}
}
- element eth_tse_0
+ element avs_i2c_master_4.result
{
- datum _sortIndex
+ datum baseAddress
{
- value = "15";
- type = "int";
+ value = "86016";
+ type = "String";
}
}
- element eth_tse_1
+ element avs_i2c_master_5
{
datum _sortIndex
{
- value = "16";
+ value = "8";
type = "int";
}
}
- element nios2_qsys_0.jtag_debug_module
+ element avs_i2c_master_5.control
{
datum baseAddress
{
- value = "67584";
+ value = "96320";
type = "String";
}
}
- element nios2_qsys_0
+ element avs_i2c_master_5.protocol
{
- datum _sortIndex
+ datum baseAddress
{
- value = "1";
- type = "int";
+ value = "84992";
+ type = "String";
}
}
- element onchip_memory2_0
+ element avs_i2c_master_5.result
{
- datum _sortIndex
+ datum baseAddress
{
- value = "2";
- type = "int";
+ value = "83968";
+ type = "String";
}
}
- element pio_0
+ element avs_i2c_master_6
{
datum _sortIndex
{
- value = "17";
+ value = "9";
type = "int";
}
}
- element avs_i2c_master_4.protocol
+ element avs_i2c_master_6.control
{
datum baseAddress
{
- value = "87040";
+ value = "96312";
type = "String";
}
}
- element avs_i2c_master_1.protocol
+ element avs_i2c_master_6.protocol
{
datum baseAddress
{
- value = "93184";
+ value = "82944";
type = "String";
}
}
- element avs_i2c_master_5.protocol
+ element avs_i2c_master_6.result
{
datum baseAddress
{
- value = "84992";
+ value = "81920";
type = "String";
}
}
- element avs_i2c_master_6.protocol
+ element avs_i2c_master_7
{
- datum baseAddress
+ datum _sortIndex
{
- value = "82944";
- type = "String";
+ value = "10";
+ type = "int";
}
}
- element avs_i2c_master_7.protocol
+ element avs_i2c_master_7.control
{
datum baseAddress
{
- value = "80896";
+ value = "96304";
type = "String";
}
}
- element avs_i2c_master_0.protocol
+ element avs_i2c_master_7.protocol
{
datum baseAddress
{
- value = "95232";
+ value = "80896";
type = "String";
}
}
- element avs_i2c_master_9.protocol
+ element avs_i2c_master_7.result
{
datum baseAddress
{
- value = "76800";
+ value = "79872";
type = "String";
}
}
- element avs_i2c_master_3.protocol
+ element avs_i2c_master_8
{
- datum baseAddress
+ datum _sortIndex
{
- value = "89088";
- type = "String";
+ value = "11";
+ type = "int";
}
}
- element avs_i2c_master_11.protocol
+ element avs_i2c_master_8.control
{
datum baseAddress
{
- value = "70656";
+ value = "96296";
type = "String";
}
}
@@ -356,116 +369,116 @@
type = "String";
}
}
- element avs_i2c_master_10.protocol
+ element avs_i2c_master_8.result
{
datum baseAddress
{
- value = "74752";
+ value = "77824";
type = "String";
}
}
- element avs_i2c_master_2.protocol
+ element avs_i2c_master_9
{
- datum baseAddress
+ datum _sortIndex
{
- value = "91136";
- type = "String";
+ value = "12";
+ type = "int";
}
}
- element avs_i2c_master_4.result
+ element avs_i2c_master_9.control
{
datum baseAddress
{
- value = "86016";
+ value = "96288";
type = "String";
}
}
- element avs_i2c_master_7.result
+ element avs_i2c_master_9.protocol
{
datum baseAddress
{
- value = "79872";
+ value = "76800";
type = "String";
}
}
- element avs_i2c_master_3.result
+ element avs_i2c_master_9.result
{
datum baseAddress
{
- value = "88064";
+ value = "75776";
type = "String";
}
}
- element avs_i2c_master_5.result
+ element clk_0
{
- datum baseAddress
+ datum _sortIndex
{
- value = "83968";
- type = "String";
+ value = "0";
+ type = "int";
}
}
- element avs_i2c_master_1.result
+ element eth_tse_0
{
- datum baseAddress
+ datum _sortIndex
{
- value = "92160";
- type = "String";
+ value = "15";
+ type = "int";
}
}
- element avs_i2c_master_2.result
+ element eth_tse_0.control_port
{
datum baseAddress
{
- value = "90112";
+ value = "72704";
type = "String";
}
}
- element avs_i2c_master_9.result
+ element eth_tse_1
{
- datum baseAddress
+ datum _sortIndex
{
- value = "75776";
- type = "String";
+ value = "16";
+ type = "int";
}
}
- element avs_i2c_master_0.result
+ element eth_tse_1.control_port
{
datum baseAddress
{
- value = "94208";
+ value = "71680";
type = "String";
}
}
- element avs_i2c_master_6.result
+ element nios2_qsys_0
{
- datum baseAddress
+ datum _sortIndex
{
- value = "81920";
- type = "String";
+ value = "1";
+ type = "int";
}
}
- element avs_i2c_master_10.result
+ element onchip_memory2_0
{
- datum baseAddress
+ datum _sortIndex
{
- value = "73728";
- type = "String";
+ value = "2";
+ type = "int";
}
}
- element avs_i2c_master_11.result
+ element onchip_memory2_0.s1
{
datum baseAddress
{
- value = "69632";
+ value = "32768";
type = "String";
}
}
- element avs_i2c_master_8.result
+ element pio_0
{
- datum baseAddress
+ datum _sortIndex
{
- value = "77824";
- type = "String";
+ value = "17";
+ type = "int";
}
}
element pio_0.s1
@@ -476,28 +489,12 @@
type = "String";
}
}
- element onchip_memory2_0.s1
- {
- datum baseAddress
- {
- value = "32768";
- type = "String";
- }
- }
- element avs_i2c_master_0.system_reset
- {
- datum _tags
- {
- value = "";
- type = "String";
- }
- }
}
]]></parameter>
<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
- <parameter name="device" value="10AX115U4F45I3SG" />
+ <parameter name="device" value="10AX115U3F45I2LG" />
<parameter name="deviceFamily" value="Arria 10" />
- <parameter name="deviceSpeedGrade" value="3" />
+ <parameter name="deviceSpeedGrade" value="2" />
<parameter name="fabricMode" value="QSYS" />
<parameter name="generateLegacySim" value="false" />
<parameter name="generationId" value="0" />
@@ -512,18 +509,11 @@
<parameter name="timeStamp" value="0" />
<parameter name="useTestBenchNamingPattern" value="false" />
<instanceScript></instanceScript>
- <interface name="clk" internal="clk_0.clk_in" type="clock" dir="end" />
- <interface name="reset" internal="clk_0.clk_in_reset" type="reset" dir="end" />
<interface
name="avs_i2c_master_0_gs_sim"
internal="avs_i2c_master_0.gs_sim"
type="conduit"
dir="end" />
- <interface
- name="avs_i2c_master_0_sync"
- internal="avs_i2c_master_0.sync"
- type="conduit"
- dir="end" />
<interface
name="avs_i2c_master_0_i2c_scl"
internal="avs_i2c_master_0.i2c_scl"
@@ -535,23 +525,18 @@
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_1_gs_sim"
- internal="avs_i2c_master_1.gs_sim"
- type="conduit"
- dir="end" />
- <interface
- name="avs_i2c_master_1_sync"
- internal="avs_i2c_master_1.sync"
+ name="avs_i2c_master_0_sync"
+ internal="avs_i2c_master_0.sync"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_1_i2c_scl"
- internal="avs_i2c_master_1.i2c_scl"
+ name="avs_i2c_master_10_gs_sim"
+ internal="avs_i2c_master_10.gs_sim"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_1_i2c_sda"
- internal="avs_i2c_master_1.i2c_sda"
+ name="avs_i2c_master_10_i2c_scl"
+ internal="avs_i2c_master_10.i2c_scl"
type="conduit"
dir="end" />
<interface
@@ -559,114 +544,109 @@
internal="avs_i2c_master_10.i2c_sda"
type="conduit"
dir="end" />
- <interface
- name="avs_i2c_master_10_i2c_scl"
- internal="avs_i2c_master_10.i2c_scl"
- type="conduit"
- dir="end" />
<interface
name="avs_i2c_master_10_sync"
internal="avs_i2c_master_10.sync"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_10_gs_sim"
- internal="avs_i2c_master_10.gs_sim"
+ name="avs_i2c_master_11_gs_sim"
+ internal="avs_i2c_master_11.gs_sim"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_9_i2c_sda"
- internal="avs_i2c_master_9.i2c_sda"
+ name="avs_i2c_master_11_i2c_scl"
+ internal="avs_i2c_master_11.i2c_scl"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_9_i2c_scl"
- internal="avs_i2c_master_9.i2c_scl"
+ name="avs_i2c_master_11_i2c_sda"
+ internal="avs_i2c_master_11.i2c_sda"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_9_sync"
- internal="avs_i2c_master_9.sync"
+ name="avs_i2c_master_11_sync"
+ internal="avs_i2c_master_11.sync"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_9_gs_sim"
- internal="avs_i2c_master_9.gs_sim"
+ name="avs_i2c_master_1_gs_sim"
+ internal="avs_i2c_master_1.gs_sim"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_8_i2c_sda"
- internal="avs_i2c_master_8.i2c_sda"
+ name="avs_i2c_master_1_i2c_scl"
+ internal="avs_i2c_master_1.i2c_scl"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_8_sync"
- internal="avs_i2c_master_8.sync"
+ name="avs_i2c_master_1_i2c_sda"
+ internal="avs_i2c_master_1.i2c_sda"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_8_gs_sim"
- internal="avs_i2c_master_8.gs_sim"
+ name="avs_i2c_master_1_sync"
+ internal="avs_i2c_master_1.sync"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_8_i2c_scl"
- internal="avs_i2c_master_8.i2c_scl"
+ name="avs_i2c_master_2_gs_sim"
+ internal="avs_i2c_master_2.gs_sim"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_7_i2c_sda"
- internal="avs_i2c_master_7.i2c_sda"
+ name="avs_i2c_master_2_i2c_scl"
+ internal="avs_i2c_master_2.i2c_scl"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_7_i2c_scl"
- internal="avs_i2c_master_7.i2c_scl"
+ name="avs_i2c_master_2_i2c_sda"
+ internal="avs_i2c_master_2.i2c_sda"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_7_sync"
- internal="avs_i2c_master_7.sync"
+ name="avs_i2c_master_2_sync"
+ internal="avs_i2c_master_2.sync"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_7_gs_sim"
- internal="avs_i2c_master_7.gs_sim"
+ name="avs_i2c_master_3_gs_sim"
+ internal="avs_i2c_master_3.gs_sim"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_6_i2c_sda"
- internal="avs_i2c_master_6.i2c_sda"
+ name="avs_i2c_master_3_i2c_scl"
+ internal="avs_i2c_master_3.i2c_scl"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_6_i2c_scl"
- internal="avs_i2c_master_6.i2c_scl"
+ name="avs_i2c_master_3_i2c_sda"
+ internal="avs_i2c_master_3.i2c_sda"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_6_sync"
- internal="avs_i2c_master_6.sync"
+ name="avs_i2c_master_3_sync"
+ internal="avs_i2c_master_3.sync"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_6_gs_sim"
- internal="avs_i2c_master_6.gs_sim"
+ name="avs_i2c_master_4_gs_sim"
+ internal="avs_i2c_master_4.gs_sim"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_5_i2c_sda"
- internal="avs_i2c_master_5.i2c_sda"
+ name="avs_i2c_master_4_i2c_scl"
+ internal="avs_i2c_master_4.i2c_scl"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_5_i2c_scl"
- internal="avs_i2c_master_5.i2c_scl"
+ name="avs_i2c_master_4_i2c_sda"
+ internal="avs_i2c_master_4.i2c_sda"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_5_sync"
- internal="avs_i2c_master_5.sync"
+ name="avs_i2c_master_4_sync"
+ internal="avs_i2c_master_4.sync"
type="conduit"
dir="end" />
<interface
@@ -675,747 +655,742 @@
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_4_i2c_sda"
- internal="avs_i2c_master_4.i2c_sda"
+ name="avs_i2c_master_5_i2c_scl"
+ internal="avs_i2c_master_5.i2c_scl"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_4_sync"
- internal="avs_i2c_master_4.sync"
+ name="avs_i2c_master_5_i2c_sda"
+ internal="avs_i2c_master_5.i2c_sda"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_4_gs_sim"
- internal="avs_i2c_master_4.gs_sim"
+ name="avs_i2c_master_5_sync"
+ internal="avs_i2c_master_5.sync"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_4_i2c_scl"
- internal="avs_i2c_master_4.i2c_scl"
+ name="avs_i2c_master_6_gs_sim"
+ internal="avs_i2c_master_6.gs_sim"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_3_gs_sim"
- internal="avs_i2c_master_3.gs_sim"
+ name="avs_i2c_master_6_i2c_scl"
+ internal="avs_i2c_master_6.i2c_scl"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_3_sync"
- internal="avs_i2c_master_3.sync"
+ name="avs_i2c_master_6_i2c_sda"
+ internal="avs_i2c_master_6.i2c_sda"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_3_i2c_scl"
- internal="avs_i2c_master_3.i2c_scl"
+ name="avs_i2c_master_6_sync"
+ internal="avs_i2c_master_6.sync"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_3_i2c_sda"
- internal="avs_i2c_master_3.i2c_sda"
+ name="avs_i2c_master_7_gs_sim"
+ internal="avs_i2c_master_7.gs_sim"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_2_gs_sim"
- internal="avs_i2c_master_2.gs_sim"
+ name="avs_i2c_master_7_i2c_scl"
+ internal="avs_i2c_master_7.i2c_scl"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_2_sync"
- internal="avs_i2c_master_2.sync"
+ name="avs_i2c_master_7_i2c_sda"
+ internal="avs_i2c_master_7.i2c_sda"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_2_i2c_scl"
- internal="avs_i2c_master_2.i2c_scl"
+ name="avs_i2c_master_7_sync"
+ internal="avs_i2c_master_7.sync"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_2_i2c_sda"
- internal="avs_i2c_master_2.i2c_sda"
+ name="avs_i2c_master_8_gs_sim"
+ internal="avs_i2c_master_8.gs_sim"
type="conduit"
dir="end" />
<interface
- name="eth_tse_0_serial_connection"
- internal="eth_tse_0.serial_connection"
+ name="avs_i2c_master_8_i2c_scl"
+ internal="avs_i2c_master_8.i2c_scl"
type="conduit"
dir="end" />
<interface
- name="eth_tse_0_pcs_ref_clk_clock_connection"
- internal="eth_tse_0.pcs_ref_clk_clock_connection"
- type="clock"
+ name="avs_i2c_master_8_i2c_sda"
+ internal="avs_i2c_master_8.i2c_sda"
+ type="conduit"
dir="end" />
<interface
- name="eth_tse_1_pcs_ref_clk_clock_connection"
- internal="eth_tse_1.pcs_ref_clk_clock_connection"
- type="clock"
- dir="end" />
+ name="avs_i2c_master_8_sync"
+ internal="avs_i2c_master_8.sync"
+ type="conduit"
+ dir="end" />
<interface
- name="eth_tse_1_serial_connection"
- internal="eth_tse_1.serial_connection"
+ name="avs_i2c_master_9_gs_sim"
+ internal="avs_i2c_master_9.gs_sim"
type="conduit"
dir="end" />
<interface
- name="pio_0_external_connection"
- internal="pio_0.external_connection"
+ name="avs_i2c_master_9_i2c_scl"
+ internal="avs_i2c_master_9.i2c_scl"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_11_gs_sim"
- internal="avs_i2c_master_11.gs_sim"
+ name="avs_i2c_master_9_i2c_sda"
+ internal="avs_i2c_master_9.i2c_sda"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_11_sync"
- internal="avs_i2c_master_11.sync"
+ name="avs_i2c_master_9_sync"
+ internal="avs_i2c_master_9.sync"
type="conduit"
dir="end" />
+ <interface name="clk" internal="clk_0.clk_in" type="clock" dir="end" />
<interface
- name="avs_i2c_master_11_i2c_scl"
- internal="avs_i2c_master_11.i2c_scl"
+ name="eth_tse_0_pcs_ref_clk_clock_connection"
+ internal="eth_tse_0.pcs_ref_clk_clock_connection"
+ type="clock"
+ dir="end" />
+ <interface
+ name="eth_tse_0_serial_connection"
+ internal="eth_tse_0.serial_connection"
type="conduit"
dir="end" />
<interface
- name="avs_i2c_master_11_i2c_sda"
- internal="avs_i2c_master_11.i2c_sda"
+ name="eth_tse_1_pcs_ref_clk_clock_connection"
+ internal="eth_tse_1.pcs_ref_clk_clock_connection"
+ type="clock"
+ dir="end" />
+ <interface
+ name="eth_tse_1_serial_connection"
+ internal="eth_tse_1.serial_connection"
type="conduit"
dir="end" />
- <module kind="clock_source" version="14.0" enabled="1" name="clk_0">
- <parameter name="clockFrequency" value="50000000" />
- <parameter name="clockFrequencyKnown" value="true" />
- <parameter name="inputClockFrequency" value="0" />
- <parameter name="resetSynchronousEdges" value="NONE" />
- </module>
- <module
- kind="altera_nios2_qsys"
- version="14.0"
- enabled="1"
- name="nios2_qsys_0">
- <parameter name="setting_showUnpublishedSettings" value="false" />
- <parameter name="setting_showInternalSettings" value="false" />
- <parameter name="setting_preciseSlaveAccessErrorException" value="false" />
- <parameter name="setting_preciseIllegalMemAccessException" value="false" />
- <parameter name="setting_preciseDivisionErrorException" value="false" />
- <parameter name="setting_performanceCounter" value="false" />
- <parameter name="setting_illegalMemAccessDetection" value="false" />
- <parameter name="setting_illegalInstructionsTrap" value="false" />
- <parameter name="setting_fullWaveformSignals" value="false" />
- <parameter name="setting_extraExceptionInfo" value="false" />
- <parameter name="setting_exportPCB" value="false" />
- <parameter name="setting_debugSimGen" value="false" />
- <parameter name="setting_clearXBitsLDNonBypass" value="true" />
- <parameter name="setting_bit31BypassDCache" value="true" />
- <parameter name="setting_bigEndian" value="false" />
- <parameter name="setting_export_large_RAMs" value="false" />
- <parameter name="setting_asic_enabled" value="false" />
- <parameter name="setting_asic_synopsys_translate_on_off" value="false" />
- <parameter name="setting_oci_export_jtag_signals" value="false" />
- <parameter name="setting_bhtIndexPcOnly" value="false" />
- <parameter name="setting_avalonDebugPortPresent" value="false" />
- <parameter name="setting_alwaysEncrypt" value="true" />
- <parameter name="setting_allowFullAddressRange" value="false" />
- <parameter name="setting_activateTrace" value="true" />
- <parameter name="setting_activateTrace_user" value="false" />
- <parameter name="setting_activateTestEndChecker" value="false" />
- <parameter name="setting_ecc_sim_test_ports" value="false" />
- <parameter name="setting_activateMonitors" value="true" />
- <parameter name="setting_activateModelChecker" value="false" />
- <parameter name="setting_HDLSimCachesCleared" value="true" />
- <parameter name="setting_HBreakTest" value="false" />
- <parameter name="setting_breakslaveoveride" value="false" />
- <parameter name="muldiv_divider" value="false" />
- <parameter name="mpu_useLimit" value="false" />
- <parameter name="mpu_enabled" value="false" />
- <parameter name="mmu_enabled" value="false" />
- <parameter name="mmu_autoAssignTlbPtrSz" value="true" />
- <parameter name="manuallyAssignCpuID" value="true" />
- <parameter name="debug_triggerArming" value="true" />
- <parameter name="debug_embeddedPLL" value="true" />
- <parameter name="debug_debugReqSignals" value="false" />
- <parameter name="debug_assignJtagInstanceID" value="false" />
- <parameter name="dcache_omitDataMaster" value="false" />
- <parameter name="cpuReset" value="false" />
- <parameter name="resetrequest_enabled" value="true" />
- <parameter name="setting_removeRAMinit" value="false" />
- <parameter name="setting_shadowRegisterSets" value="0" />
- <parameter name="mpu_numOfInstRegion" value="8" />
- <parameter name="mpu_numOfDataRegion" value="8" />
- <parameter name="mmu_TLBMissExcOffset" value="0" />
- <parameter name="debug_jtagInstanceID" value="0" />
- <parameter name="resetOffset" value="0" />
- <parameter name="exceptionOffset" value="32" />
- <parameter name="cpuID" value="0" />
- <parameter name="cpuID_stored" value="0" />
- <parameter name="breakOffset" value="32" />
- <parameter name="userDefinedSettings" value="" />
- <parameter name="resetSlave" value="Absolute" />
- <parameter name="mmu_TLBMissExcSlave" value="None" />
- <parameter name="exceptionSlave" value="Absolute" />
- <parameter name="breakSlave">nios2_qsys_0.jtag_debug_module</parameter>
- <parameter name="setting_perfCounterWidth" value="32" />
- <parameter name="setting_interruptControllerType" value="Internal" />
- <parameter name="setting_branchPredictionType" value="Automatic" />
- <parameter name="setting_bhtPtrSz" value="8" />
- <parameter name="muldiv_multiplierType" value="DSPBlock" />
- <parameter name="mpu_minInstRegionSize" value="12" />
- <parameter name="mpu_minDataRegionSize" value="12" />
- <parameter name="mmu_uitlbNumEntries" value="4" />
- <parameter name="mmu_udtlbNumEntries" value="6" />
- <parameter name="mmu_tlbPtrSz" value="7" />
- <parameter name="mmu_tlbNumWays" value="16" />
- <parameter name="mmu_processIDNumBits" value="8" />
- <parameter name="impl" value="Fast" />
- <parameter name="icache_size" value="4096" />
- <parameter name="icache_tagramBlockType" value="Automatic" />
- <parameter name="icache_ramBlockType" value="Automatic" />
- <parameter name="icache_numTCIM" value="0" />
- <parameter name="icache_burstType" value="None" />
- <parameter name="dcache_bursts" value="false" />
- <parameter name="dcache_victim_buf_impl" value="ram" />
- <parameter name="debug_level" value="Level1" />
- <parameter name="debug_OCIOnchipTrace" value="_128" />
- <parameter name="dcache_size" value="2048" />
- <parameter name="dcache_tagramBlockType" value="Automatic" />
- <parameter name="dcache_ramBlockType" value="Automatic" />
- <parameter name="dcache_numTCDM" value="0" />
- <parameter name="dcache_lineSize" value="32" />
- <parameter name="setting_exportvectors" value="false" />
- <parameter name="setting_ecc_present" value="false" />
- <parameter name="setting_ic_ecc_present" value="true" />
- <parameter name="setting_rf_ecc_present" value="true" />
- <parameter name="setting_mmu_ecc_present" value="true" />
- <parameter name="setting_dc_ecc_present" value="false" />
- <parameter name="setting_itcm_ecc_present" value="false" />
- <parameter name="setting_dtcm_ecc_present" value="false" />
- <parameter name="regfile_ramBlockType" value="Automatic" />
- <parameter name="ocimem_ramBlockType" value="Automatic" />
- <parameter name="mmu_ramBlockType" value="Automatic" />
- <parameter name="bht_ramBlockType" value="Automatic" />
- <parameter name="instAddrWidth" value="17" />
- <parameter name="dataAddrWidth" value="17" />
- <parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
- <parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
- <parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
- <parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
- <parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
- <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
- <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
- <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
- <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='onchip_memory2_0.s1' start='0x8000' end='0x10000' /><slave name='nios2_qsys_0.jtag_debug_module' start='0x10800' end='0x11000' /></address-map>]]></parameter>
- <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='onchip_memory2_0.s1' start='0x8000' end='0x10000' /><slave name='nios2_qsys_0.jtag_debug_module' start='0x10800' end='0x11000' /><slave name='avs_i2c_master_11.result' start='0x11000' end='0x11400' /><slave name='avs_i2c_master_11.protocol' start='0x11400' end='0x11800' /><slave name='eth_tse_1.control_port' start='0x11800' end='0x11C00' /><slave name='eth_tse_0.control_port' start='0x11C00' end='0x12000' /><slave name='avs_i2c_master_10.result' start='0x12000' end='0x12400' /><slave name='avs_i2c_master_10.protocol' start='0x12400' end='0x12800' /><slave name='avs_i2c_master_9.result' start='0x12800' end='0x12C00' /><slave name='avs_i2c_master_9.protocol' start='0x12C00' end='0x13000' /><slave name='avs_i2c_master_8.result' start='0x13000' end='0x13400' /><slave name='avs_i2c_master_8.protocol' start='0x13400' end='0x13800' /><slave name='avs_i2c_master_7.result' start='0x13800' end='0x13C00' /><slave name='avs_i2c_master_7.protocol' start='0x13C00' end='0x14000' /><slave name='avs_i2c_master_6.result' start='0x14000' end='0x14400' /><slave name='avs_i2c_master_6.protocol' start='0x14400' end='0x14800' /><slave name='avs_i2c_master_5.result' start='0x14800' end='0x14C00' /><slave name='avs_i2c_master_5.protocol' start='0x14C00' end='0x15000' /><slave name='avs_i2c_master_4.result' start='0x15000' end='0x15400' /><slave name='avs_i2c_master_4.protocol' start='0x15400' end='0x15800' /><slave name='avs_i2c_master_3.result' start='0x15800' end='0x15C00' /><slave name='avs_i2c_master_3.protocol' start='0x15C00' end='0x16000' /><slave name='avs_i2c_master_2.result' start='0x16000' end='0x16400' /><slave name='avs_i2c_master_2.protocol' start='0x16400' end='0x16800' /><slave name='avs_i2c_master_1.result' start='0x16800' end='0x16C00' /><slave name='avs_i2c_master_1.protocol' start='0x16C00' end='0x17000' /><slave name='avs_i2c_master_0.result' start='0x17000' end='0x17400' /><slave name='avs_i2c_master_0.protocol' start='0x17400' end='0x17800' /><slave name='pio_0.s1' start='0x17800' end='0x17810' /><slave name='avs_i2c_master_11.control' start='0x17810' end='0x17818' /><slave name='avs_i2c_master_10.control' start='0x17818' end='0x17820' /><slave name='avs_i2c_master_9.control' start='0x17820' end='0x17828' /><slave name='avs_i2c_master_8.control' start='0x17828' end='0x17830' /><slave name='avs_i2c_master_7.control' start='0x17830' end='0x17838' /><slave name='avs_i2c_master_6.control' start='0x17838' end='0x17840' /><slave name='avs_i2c_master_5.control' start='0x17840' end='0x17848' /><slave name='avs_i2c_master_4.control' start='0x17848' end='0x17850' /><slave name='avs_i2c_master_3.control' start='0x17850' end='0x17858' /><slave name='avs_i2c_master_2.control' start='0x17858' end='0x17860' /><slave name='avs_i2c_master_1.control' start='0x17860' end='0x17868' /><slave name='avs_i2c_master_0.control' start='0x17868' end='0x17870' /></address-map>]]></parameter>
- <parameter name="clockFrequency" value="50000000" />
- <parameter name="deviceFamilyName" value="Arria 10" />
- <parameter name="internalIrqMaskSystemInfo" value="2047" />
- <parameter name="customInstSlavesSystemInfo" value="<info/>" />
- <parameter name="deviceFeaturesSystemInfo">ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGICAL_FLOORPLANNER_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 1 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 0 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</parameter>
- <parameter name="tightlyCoupledDataMaster0MapParam" value="" />
- <parameter name="tightlyCoupledDataMaster1MapParam" value="" />
- <parameter name="tightlyCoupledDataMaster2MapParam" value="" />
- <parameter name="tightlyCoupledDataMaster3MapParam" value="" />
- <parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
- <parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
- <parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
- <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
- </module>
+ <interface
+ name="pio_0_external_connection"
+ internal="pio_0.external_connection"
+ type="conduit"
+ dir="end" />
+ <interface name="reset" internal="clk_0.clk_in_reset" type="reset" dir="end" />
<module
+ name="avs_i2c_master_0"
kind="avs_i2c_master"
version="1.0"
- enabled="1"
- name="avs_i2c_master_0">
+ enabled="1">
+ <parameter name="g_clk_cnt" value="399" />
+ <parameter name="g_comma_w" value="0" />
<parameter name="g_control_adr_w" value="1" />
<parameter name="g_protocol_adr_w" value="10" />
<parameter name="g_result_adr_w" value="10" />
- <parameter name="g_clk_cnt" value="399" />
- <parameter name="g_comma_w" value="0" />
- <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
</module>
<module
+ name="avs_i2c_master_1"
kind="avs_i2c_master"
version="1.0"
- enabled="1"
- name="avs_i2c_master_1">
+ enabled="1">
+ <parameter name="g_clk_cnt" value="399" />
+ <parameter name="g_comma_w" value="0" />
<parameter name="g_control_adr_w" value="1" />
<parameter name="g_protocol_adr_w" value="10" />
<parameter name="g_result_adr_w" value="10" />
- <parameter name="g_clk_cnt" value="399" />
- <parameter name="g_comma_w" value="0" />
- <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
- </module>
- <module
- kind="altera_avalon_onchip_memory2"
- version="14.0"
- enabled="1"
- name="onchip_memory2_0">
- <parameter name="allowInSystemMemoryContentEditor" value="false" />
- <parameter name="blockType" value="AUTO" />
- <parameter name="dataWidth" value="32" />
- <parameter name="dualPort" value="false" />
- <parameter name="initMemContent" value="true" />
- <parameter name="initializationFileName" value="onchip_mem.hex" />
- <parameter name="instanceID" value="NONE" />
- <parameter name="memorySize" value="32768" />
- <parameter name="readDuringWriteMode" value="DONT_CARE" />
- <parameter name="simAllowMRAMContentsFile" value="false" />
- <parameter name="simMemInitOnlyFilename" value="0" />
- <parameter name="singleClockOperation" value="false" />
- <parameter name="slave1Latency" value="1" />
- <parameter name="slave2Latency" value="1" />
- <parameter name="useNonDefaultInitFile" value="false" />
- <parameter name="useShallowMemBlocks" value="false" />
- <parameter name="writable" value="true" />
- <parameter name="ecc_enabled" value="false" />
- <parameter name="resetrequest_enabled" value="true" />
- <parameter name="autoInitializationFileName">$${FILENAME}_onchip_memory2_0</parameter>
- <parameter name="deviceFamily" value="Arria 10" />
- <parameter name="deviceFeatures">ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGICAL_FLOORPLANNER_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 1 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 0 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</parameter>
</module>
<module
+ name="avs_i2c_master_10"
kind="avs_i2c_master"
version="1.0"
- enabled="1"
- name="avs_i2c_master_2">
+ enabled="1">
+ <parameter name="g_clk_cnt" value="399" />
+ <parameter name="g_comma_w" value="0" />
<parameter name="g_control_adr_w" value="1" />
<parameter name="g_protocol_adr_w" value="10" />
<parameter name="g_result_adr_w" value="10" />
- <parameter name="g_clk_cnt" value="399" />
- <parameter name="g_comma_w" value="0" />
- <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
</module>
<module
+ name="avs_i2c_master_11"
kind="avs_i2c_master"
version="1.0"
- enabled="1"
- name="avs_i2c_master_3">
+ enabled="1">
+ <parameter name="g_clk_cnt" value="399" />
+ <parameter name="g_comma_w" value="0" />
<parameter name="g_control_adr_w" value="1" />
<parameter name="g_protocol_adr_w" value="10" />
<parameter name="g_result_adr_w" value="10" />
- <parameter name="g_clk_cnt" value="399" />
- <parameter name="g_comma_w" value="0" />
- <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
</module>
<module
+ name="avs_i2c_master_2"
kind="avs_i2c_master"
version="1.0"
- enabled="1"
- name="avs_i2c_master_4">
+ enabled="1">
+ <parameter name="g_clk_cnt" value="399" />
+ <parameter name="g_comma_w" value="0" />
<parameter name="g_control_adr_w" value="1" />
<parameter name="g_protocol_adr_w" value="10" />
<parameter name="g_result_adr_w" value="10" />
- <parameter name="g_clk_cnt" value="399" />
- <parameter name="g_comma_w" value="0" />
- <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
</module>
<module
+ name="avs_i2c_master_3"
kind="avs_i2c_master"
version="1.0"
- enabled="1"
- name="avs_i2c_master_5">
+ enabled="1">
+ <parameter name="g_clk_cnt" value="399" />
+ <parameter name="g_comma_w" value="0" />
<parameter name="g_control_adr_w" value="1" />
<parameter name="g_protocol_adr_w" value="10" />
<parameter name="g_result_adr_w" value="10" />
- <parameter name="g_clk_cnt" value="399" />
- <parameter name="g_comma_w" value="0" />
- <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
</module>
<module
+ name="avs_i2c_master_4"
kind="avs_i2c_master"
version="1.0"
- enabled="1"
- name="avs_i2c_master_6">
+ enabled="1">
+ <parameter name="g_clk_cnt" value="399" />
+ <parameter name="g_comma_w" value="0" />
<parameter name="g_control_adr_w" value="1" />
<parameter name="g_protocol_adr_w" value="10" />
<parameter name="g_result_adr_w" value="10" />
- <parameter name="g_clk_cnt" value="399" />
- <parameter name="g_comma_w" value="0" />
- <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
</module>
<module
+ name="avs_i2c_master_5"
kind="avs_i2c_master"
version="1.0"
- enabled="1"
- name="avs_i2c_master_7">
+ enabled="1">
+ <parameter name="g_clk_cnt" value="399" />
+ <parameter name="g_comma_w" value="0" />
<parameter name="g_control_adr_w" value="1" />
<parameter name="g_protocol_adr_w" value="10" />
<parameter name="g_result_adr_w" value="10" />
- <parameter name="g_clk_cnt" value="399" />
- <parameter name="g_comma_w" value="0" />
- <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
</module>
<module
+ name="avs_i2c_master_6"
kind="avs_i2c_master"
version="1.0"
- enabled="1"
- name="avs_i2c_master_8">
+ enabled="1">
+ <parameter name="g_clk_cnt" value="399" />
+ <parameter name="g_comma_w" value="0" />
<parameter name="g_control_adr_w" value="1" />
<parameter name="g_protocol_adr_w" value="10" />
<parameter name="g_result_adr_w" value="10" />
- <parameter name="g_clk_cnt" value="399" />
- <parameter name="g_comma_w" value="0" />
- <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
</module>
<module
+ name="avs_i2c_master_7"
kind="avs_i2c_master"
version="1.0"
- enabled="1"
- name="avs_i2c_master_9">
+ enabled="1">
+ <parameter name="g_clk_cnt" value="399" />
+ <parameter name="g_comma_w" value="0" />
<parameter name="g_control_adr_w" value="1" />
<parameter name="g_protocol_adr_w" value="10" />
<parameter name="g_result_adr_w" value="10" />
- <parameter name="g_clk_cnt" value="399" />
- <parameter name="g_comma_w" value="0" />
- <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
</module>
<module
+ name="avs_i2c_master_8"
kind="avs_i2c_master"
version="1.0"
- enabled="1"
- name="avs_i2c_master_10">
+ enabled="1">
+ <parameter name="g_clk_cnt" value="399" />
+ <parameter name="g_comma_w" value="0" />
<parameter name="g_control_adr_w" value="1" />
<parameter name="g_protocol_adr_w" value="10" />
<parameter name="g_result_adr_w" value="10" />
+ </module>
+ <module
+ name="avs_i2c_master_9"
+ kind="avs_i2c_master"
+ version="1.0"
+ enabled="1">
<parameter name="g_clk_cnt" value="399" />
<parameter name="g_comma_w" value="0" />
- <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
+ <parameter name="g_control_adr_w" value="1" />
+ <parameter name="g_protocol_adr_w" value="10" />
+ <parameter name="g_result_adr_w" value="10" />
</module>
- <module kind="altera_eth_tse" version="14.0" enabled="1" name="eth_tse_0">
- <parameter name="deviceFamilyName" value="Arria 10" />
+ <module name="clk_0" kind="clock_source" version="14.1" enabled="1">
+ <parameter name="clockFrequency" value="50000000" />
+ <parameter name="clockFrequencyKnown" value="true" />
+ <parameter name="inputClockFrequency" value="0" />
+ <parameter name="resetSynchronousEdges" value="NONE" />
+ </module>
+ <module name="eth_tse_0" kind="altera_eth_tse" version="14.1" enabled="1">
+ <parameter name="AUTO_DEVICE" value="10AX115U3F45I2LG" />
+ <parameter name="AUTO_DEVICE_SPEEDGRADE" value="2" />
<parameter name="core_variation" value="MAC_PCS" />
- <parameter name="ifGMII" value="MII_GMII" />
- <parameter name="enable_use_internal_fifo" value="true" />
+ <parameter name="deviceFamilyName" value="Arria 10" />
+ <parameter name="eg_addr" value="11" />
+ <parameter name="ena_hash" value="false" />
+ <parameter name="enable_alt_reconfig" value="false" />
<parameter name="enable_ecc" value="false" />
- <parameter name="max_channels" value="1" />
- <parameter name="use_misc_ports" value="true" />
- <parameter name="transceiver_type" value="LVDS_IO" />
- <parameter name="enable_hd_logic" value="false" />
+ <parameter name="enable_ena" value="32" />
<parameter name="enable_gmii_loopback" value="false" />
- <parameter name="enable_sup_addr" value="false" />
- <parameter name="stat_cnt_ena" value="true" />
- <parameter name="ext_stat_cnt_ena" value="false" />
- <parameter name="ena_hash" value="false" />
- <parameter name="enable_shift16" value="true" />
+ <parameter name="enable_hd_logic" value="false" />
<parameter name="enable_mac_flow_ctrl" value="false" />
<parameter name="enable_mac_vlan" value="false" />
<parameter name="enable_magic_detect" value="true" />
- <parameter name="useMDIO" value="false" />
- <parameter name="mdio_clk_div" value="40" />
- <parameter name="enable_ena" value="32" />
- <parameter name="eg_addr" value="11" />
- <parameter name="ing_addr" value="11" />
- <parameter name="phy_identifier" value="0" />
+ <parameter name="enable_ptp_1step" value="false" />
<parameter name="enable_sgmii" value="false" />
+ <parameter name="enable_shift16" value="true" />
+ <parameter name="enable_sup_addr" value="false" />
+ <parameter name="enable_timestamping" value="false" />
+ <parameter name="enable_use_internal_fifo" value="true" />
<parameter name="export_pwrdn" value="false" />
- <parameter name="enable_alt_reconfig" value="false" />
- <parameter name="starting_channel_number" value="0" />
- <parameter name="phyip_pll_type" value="CMU" />
- <parameter name="phyip_pll_base_data_rate" value="1250 Mbps" />
+ <parameter name="ext_stat_cnt_ena" value="false" />
+ <parameter name="ifGMII" value="MII_GMII" />
+ <parameter name="ing_addr" value="11" />
+ <parameter name="max_channels" value="1" />
+ <parameter name="mdio_clk_div" value="40" />
+ <parameter name="nf_phyip_rcfg_enable" value="false" />
+ <parameter name="phy_identifier" value="0" />
<parameter name="phyip_en_synce_support" value="false" />
+ <parameter name="phyip_pll_base_data_rate" value="1250 Mbps" />
+ <parameter name="phyip_pll_type" value="CMU" />
<parameter name="phyip_pma_bonding_mode" value="x1" />
- <parameter name="nf_phyip_rcfg_enable" value="false" />
- <parameter name="enable_timestamping" value="false" />
- <parameter name="enable_ptp_1step" value="false" />
+ <parameter name="starting_channel_number" value="0" />
+ <parameter name="stat_cnt_ena" value="true" />
+ <parameter name="transceiver_type" value="LVDS_IO" />
<parameter name="tstamp_fp_width" value="4" />
- <parameter name="AUTO_DEVICE" value="10AX115U4F45I3SG" />
+ <parameter name="useMDIO" value="false" />
+ <parameter name="use_misc_ports" value="true" />
</module>
- <module kind="altera_eth_tse" version="14.0" enabled="1" name="eth_tse_1">
- <parameter name="deviceFamilyName" value="Arria 10" />
+ <module name="eth_tse_1" kind="altera_eth_tse" version="14.1" enabled="1">
+ <parameter name="AUTO_DEVICE" value="10AX115U3F45I2LG" />
+ <parameter name="AUTO_DEVICE_SPEEDGRADE" value="2" />
<parameter name="core_variation" value="MAC_PCS" />
- <parameter name="ifGMII" value="MII_GMII" />
- <parameter name="enable_use_internal_fifo" value="true" />
+ <parameter name="deviceFamilyName" value="Arria 10" />
+ <parameter name="eg_addr" value="11" />
+ <parameter name="ena_hash" value="false" />
+ <parameter name="enable_alt_reconfig" value="false" />
<parameter name="enable_ecc" value="false" />
- <parameter name="max_channels" value="1" />
- <parameter name="use_misc_ports" value="true" />
- <parameter name="transceiver_type" value="LVDS_IO" />
- <parameter name="enable_hd_logic" value="false" />
+ <parameter name="enable_ena" value="32" />
<parameter name="enable_gmii_loopback" value="false" />
- <parameter name="enable_sup_addr" value="false" />
- <parameter name="stat_cnt_ena" value="true" />
- <parameter name="ext_stat_cnt_ena" value="false" />
- <parameter name="ena_hash" value="false" />
- <parameter name="enable_shift16" value="true" />
+ <parameter name="enable_hd_logic" value="false" />
<parameter name="enable_mac_flow_ctrl" value="false" />
<parameter name="enable_mac_vlan" value="false" />
<parameter name="enable_magic_detect" value="true" />
- <parameter name="useMDIO" value="false" />
- <parameter name="mdio_clk_div" value="40" />
- <parameter name="enable_ena" value="32" />
- <parameter name="eg_addr" value="11" />
- <parameter name="ing_addr" value="11" />
- <parameter name="phy_identifier" value="0" />
+ <parameter name="enable_ptp_1step" value="false" />
<parameter name="enable_sgmii" value="false" />
+ <parameter name="enable_shift16" value="true" />
+ <parameter name="enable_sup_addr" value="false" />
+ <parameter name="enable_timestamping" value="false" />
+ <parameter name="enable_use_internal_fifo" value="true" />
<parameter name="export_pwrdn" value="false" />
- <parameter name="enable_alt_reconfig" value="false" />
- <parameter name="starting_channel_number" value="0" />
- <parameter name="phyip_pll_type" value="CMU" />
- <parameter name="phyip_pll_base_data_rate" value="1250 Mbps" />
+ <parameter name="ext_stat_cnt_ena" value="false" />
+ <parameter name="ifGMII" value="MII_GMII" />
+ <parameter name="ing_addr" value="11" />
+ <parameter name="max_channels" value="1" />
+ <parameter name="mdio_clk_div" value="40" />
+ <parameter name="nf_phyip_rcfg_enable" value="false" />
+ <parameter name="phy_identifier" value="0" />
<parameter name="phyip_en_synce_support" value="false" />
+ <parameter name="phyip_pll_base_data_rate" value="1250 Mbps" />
+ <parameter name="phyip_pll_type" value="CMU" />
<parameter name="phyip_pma_bonding_mode" value="x1" />
- <parameter name="nf_phyip_rcfg_enable" value="false" />
- <parameter name="enable_timestamping" value="false" />
- <parameter name="enable_ptp_1step" value="false" />
+ <parameter name="starting_channel_number" value="0" />
+ <parameter name="stat_cnt_ena" value="true" />
+ <parameter name="transceiver_type" value="LVDS_IO" />
<parameter name="tstamp_fp_width" value="4" />
- <parameter name="AUTO_DEVICE" value="10AX115U4F45I3SG" />
+ <parameter name="useMDIO" value="false" />
+ <parameter name="use_misc_ports" value="true" />
</module>
- <module kind="altera_avalon_pio" version="14.0" enabled="1" name="pio_0">
+ <module
+ name="nios2_qsys_0"
+ kind="altera_nios2_gen2"
+ version="14.1"
+ enabled="1">
+ <parameter name="AUTO_CLK_CLOCK_DOMAIN" value="1" />
+ <parameter name="AUTO_CLK_RESET_DOMAIN" value="1" />
+ <parameter name="AUTO_DEVICE" value="10AX115U3F45I2LG" />
+ <parameter name="AUTO_DEVICE_SPEEDGRADE" value="2" />
+ <parameter name="bht_ramBlockType" value="Automatic" />
+ <parameter name="breakOffset" value="32" />
+ <parameter name="breakSlave">nios2_qsys_0.jtag_debug_module</parameter>
+ <parameter name="cdx_enabled" value="false" />
+ <parameter name="clockFrequency" value="50000000" />
+ <parameter name="cpuArchRev" value="1" />
+ <parameter name="cpuID" value="0" />
+ <parameter name="cpuReset" value="false" />
+ <parameter name="customInstSlavesSystemInfo" value="<info/>" />
+ <parameter name="customInstSlavesSystemInfo_nios_a" value="<info/>" />
+ <parameter name="customInstSlavesSystemInfo_nios_b" value="<info/>" />
+ <parameter name="customInstSlavesSystemInfo_nios_c" value="<info/>" />
+ <parameter name="dataAddrWidth" value="17" />
+ <parameter name="dataMasterHighPerformanceAddrWidth" value="1" />
+ <parameter name="dataMasterHighPerformanceMapParam" value="" />
+ <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='onchip_memory2_0.s1' start='0x8000' end='0x10000' /><slave name='nios2_qsys_0.debug_mem_slave' start='0x10800' end='0x11000' /><slave name='avs_i2c_master_11.result' start='0x11000' end='0x11400' /><slave name='avs_i2c_master_11.protocol' start='0x11400' end='0x11800' /><slave name='eth_tse_1.control_port' start='0x11800' end='0x11C00' /><slave name='eth_tse_0.control_port' start='0x11C00' end='0x12000' /><slave name='avs_i2c_master_10.result' start='0x12000' end='0x12400' /><slave name='avs_i2c_master_10.protocol' start='0x12400' end='0x12800' /><slave name='avs_i2c_master_9.result' start='0x12800' end='0x12C00' /><slave name='avs_i2c_master_9.protocol' start='0x12C00' end='0x13000' /><slave name='avs_i2c_master_8.result' start='0x13000' end='0x13400' /><slave name='avs_i2c_master_8.protocol' start='0x13400' end='0x13800' /><slave name='avs_i2c_master_7.result' start='0x13800' end='0x13C00' /><slave name='avs_i2c_master_7.protocol' start='0x13C00' end='0x14000' /><slave name='avs_i2c_master_6.result' start='0x14000' end='0x14400' /><slave name='avs_i2c_master_6.protocol' start='0x14400' end='0x14800' /><slave name='avs_i2c_master_5.result' start='0x14800' end='0x14C00' /><slave name='avs_i2c_master_5.protocol' start='0x14C00' end='0x15000' /><slave name='avs_i2c_master_4.result' start='0x15000' end='0x15400' /><slave name='avs_i2c_master_4.protocol' start='0x15400' end='0x15800' /><slave name='avs_i2c_master_3.result' start='0x15800' end='0x15C00' /><slave name='avs_i2c_master_3.protocol' start='0x15C00' end='0x16000' /><slave name='avs_i2c_master_2.result' start='0x16000' end='0x16400' /><slave name='avs_i2c_master_2.protocol' start='0x16400' end='0x16800' /><slave name='avs_i2c_master_1.result' start='0x16800' end='0x16C00' /><slave name='avs_i2c_master_1.protocol' start='0x16C00' end='0x17000' /><slave name='avs_i2c_master_0.result' start='0x17000' end='0x17400' /><slave name='avs_i2c_master_0.protocol' start='0x17400' end='0x17800' /><slave name='pio_0.s1' start='0x17800' end='0x17810' /><slave name='avs_i2c_master_11.control' start='0x17810' end='0x17818' /><slave name='avs_i2c_master_10.control' start='0x17818' end='0x17820' /><slave name='avs_i2c_master_9.control' start='0x17820' end='0x17828' /><slave name='avs_i2c_master_8.control' start='0x17828' end='0x17830' /><slave name='avs_i2c_master_7.control' start='0x17830' end='0x17838' /><slave name='avs_i2c_master_6.control' start='0x17838' end='0x17840' /><slave name='avs_i2c_master_5.control' start='0x17840' end='0x17848' /><slave name='avs_i2c_master_4.control' start='0x17848' end='0x17850' /><slave name='avs_i2c_master_3.control' start='0x17850' end='0x17858' /><slave name='avs_i2c_master_2.control' start='0x17858' end='0x17860' /><slave name='avs_i2c_master_1.control' start='0x17860' end='0x17868' /><slave name='avs_i2c_master_0.control' start='0x17868' end='0x17870' /></address-map>]]></parameter>
+ <parameter name="data_master_high_performance_paddr_base" value="0" />
+ <parameter name="data_master_high_performance_paddr_size" value="0" />
+ <parameter name="data_master_paddr_base" value="0" />
+ <parameter name="data_master_paddr_size" value="0" />
+ <parameter name="dcache_bursts" value="false" />
+ <parameter name="dcache_numTCDM" value="0" />
+ <parameter name="dcache_ramBlockType" value="Automatic" />
+ <parameter name="dcache_size" value="2048" />
+ <parameter name="dcache_tagramBlockType" value="Automatic" />
+ <parameter name="dcache_victim_buf_impl" value="ram" />
+ <parameter name="debug_OCIOnchipTrace" value="_128" />
+ <parameter name="debug_assignJtagInstanceID" value="false" />
+ <parameter name="debug_datatrigger" value="0" />
+ <parameter name="debug_debugReqSignals" value="false" />
+ <parameter name="debug_enabled" value="true" />
+ <parameter name="debug_hwbreakpoint" value="0" />
+ <parameter name="debug_jtagInstanceID" value="0" />
+ <parameter name="debug_traceStorage" value="onchip_trace" />
+ <parameter name="debug_traceType" value="none" />
+ <parameter name="debug_triggerArming" value="true" />
+ <parameter name="deviceFamilyName" value="Arria 10" />
+ <parameter name="deviceFeaturesSystemInfo">ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 1 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</parameter>
+ <parameter name="dividerType" value="no_div" />
+ <parameter name="exceptionOffset" value="32" />
+ <parameter name="exceptionSlave" value="Absolute" />
+ <parameter name="faAddrWidth" value="1" />
+ <parameter name="faSlaveMapParam" value="" />
+ <parameter name="fa_cache_line" value="2" />
+ <parameter name="fa_cache_linesize" value="0" />
+ <parameter name="flash_instruction_master_paddr_base" value="0" />
+ <parameter name="flash_instruction_master_paddr_size" value="0" />
+ <parameter name="icache_burstType" value="None" />
+ <parameter name="icache_numTCIM" value="0" />
+ <parameter name="icache_ramBlockType" value="Automatic" />
+ <parameter name="icache_size" value="4096" />
+ <parameter name="icache_tagramBlockType" value="Automatic" />
+ <parameter name="impl" value="Fast" />
+ <parameter name="instAddrWidth" value="17" />
+ <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='onchip_memory2_0.s1' start='0x8000' end='0x10000' /><slave name='nios2_qsys_0.debug_mem_slave' start='0x10800' end='0x11000' /></address-map>]]></parameter>
+ <parameter name="instructionMasterHighPerformanceAddrWidth" value="1" />
+ <parameter name="instructionMasterHighPerformanceMapParam" value="" />
+ <parameter name="instruction_master_high_performance_paddr_base" value="0" />
+ <parameter name="instruction_master_high_performance_paddr_size" value="0" />
+ <parameter name="instruction_master_paddr_base" value="0" />
+ <parameter name="instruction_master_paddr_size" value="0" />
+ <parameter name="internalIrqMaskSystemInfo" value="2047" />
+ <parameter name="io_regionbase" value="0" />
+ <parameter name="io_regionsize" value="0" />
+ <parameter name="master_addr_map" value="false" />
+ <parameter name="mmu_TLBMissExcOffset" value="0" />
+ <parameter name="mmu_TLBMissExcSlave" value="None" />
+ <parameter name="mmu_autoAssignTlbPtrSz" value="true" />
+ <parameter name="mmu_enabled" value="false" />
+ <parameter name="mmu_processIDNumBits" value="8" />
+ <parameter name="mmu_ramBlockType" value="Automatic" />
+ <parameter name="mmu_tlbNumWays" value="16" />
+ <parameter name="mmu_tlbPtrSz" value="7" />
+ <parameter name="mmu_udtlbNumEntries" value="6" />
+ <parameter name="mmu_uitlbNumEntries" value="4" />
+ <parameter name="mpu_enabled" value="false" />
+ <parameter name="mpu_minDataRegionSize" value="12" />
+ <parameter name="mpu_minInstRegionSize" value="12" />
+ <parameter name="mpu_numOfDataRegion" value="8" />
+ <parameter name="mpu_numOfInstRegion" value="8" />
+ <parameter name="mpu_useLimit" value="false" />
+ <parameter name="mpx_enabled" value="false" />
+ <parameter name="mul_32_impl" value="3" />
+ <parameter name="mul_64_impl" value="0" />
+ <parameter name="mul_shift_choice" value="0" />
+ <parameter name="ocimem_ramBlockType" value="Automatic" />
+ <parameter name="ocimem_ramInit" value="false" />
+ <parameter name="regfile_ramBlockType" value="Automatic" />
+ <parameter name="resetOffset" value="0" />
+ <parameter name="resetSlave" value="Absolute" />
+ <parameter name="resetrequest_enabled" value="true" />
+ <parameter name="setting_HBreakTest" value="false" />
+ <parameter name="setting_HDLSimCachesCleared" value="true" />
+ <parameter name="setting_activateMonitors" value="true" />
+ <parameter name="setting_activateTestEndChecker" value="false" />
+ <parameter name="setting_activateTrace" value="true" />
+ <parameter name="setting_allow_break_inst" value="false" />
+ <parameter name="setting_alwaysEncrypt" value="true" />
+ <parameter name="setting_asic_add_scan_mode_input" value="false" />
+ <parameter name="setting_asic_enabled" value="false" />
+ <parameter name="setting_asic_synopsys_translate_on_off" value="false" />
+ <parameter name="setting_asic_third_party_synthesis" value="false" />
+ <parameter name="setting_avalonDebugPortPresent" value="false" />
+ <parameter name="setting_bhtPtrSz" value="8" />
+ <parameter name="setting_bigEndian" value="false" />
+ <parameter name="setting_branchpredictiontype" value="Dynamic" />
+ <parameter name="setting_breakslaveoveride" value="false" />
+ <parameter name="setting_clearXBitsLDNonBypass" value="true" />
+ <parameter name="setting_dc_ecc_present" value="false" />
+ <parameter name="setting_disable_tmr_inj" value="false" />
+ <parameter name="setting_disableocitrace" value="false" />
+ <parameter name="setting_dtcm_ecc_present" value="false" />
+ <parameter name="setting_ecc_present" value="false" />
+ <parameter name="setting_ecc_sim_test_ports" value="false" />
+ <parameter name="setting_exportHostDebugPort" value="false" />
+ <parameter name="setting_exportPCB" value="false" />
+ <parameter name="setting_export_large_RAMs" value="false" />
+ <parameter name="setting_exportdebuginfo" value="false" />
+ <parameter name="setting_exportvectors" value="false" />
+ <parameter name="setting_fast_register_read" value="false" />
+ <parameter name="setting_ic_ecc_present" value="true" />
+ <parameter name="setting_interruptControllerType" value="Internal" />
+ <parameter name="setting_itcm_ecc_present" value="false" />
+ <parameter name="setting_mmu_ecc_present" value="true" />
+ <parameter name="setting_oci_export_jtag_signals" value="false" />
+ <parameter name="setting_oci_version" value="1" />
+ <parameter name="setting_preciseIllegalMemAccessException" value="false" />
+ <parameter name="setting_removeRAMinit" value="false" />
+ <parameter name="setting_rf_ecc_present" value="true" />
+ <parameter name="setting_shadowRegisterSets" value="0" />
+ <parameter name="setting_showInternalSettings" value="false" />
+ <parameter name="setting_showUnpublishedSettings" value="false" />
+ <parameter name="setting_support31bitdcachebypass" value="true" />
+ <parameter name="setting_usedesignware" value="false" />
+ <parameter name="shift_rot_impl" value="0" />
+ <parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
+ <parameter name="tightlyCoupledDataMaster0MapParam" value="" />
+ <parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
+ <parameter name="tightlyCoupledDataMaster1MapParam" value="" />
+ <parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
+ <parameter name="tightlyCoupledDataMaster2MapParam" value="" />
+ <parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
+ <parameter name="tightlyCoupledDataMaster3MapParam" value="" />
+ <parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
+ <parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
+ <parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
+ <parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
+ <parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
+ <parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
+ <parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
+ <parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
+ <parameter name="tightly_coupled_data_master_0_paddr_base" value="0" />
+ <parameter name="tightly_coupled_data_master_0_paddr_size" value="0" />
+ <parameter name="tightly_coupled_data_master_1_paddr_base" value="0" />
+ <parameter name="tightly_coupled_data_master_1_paddr_size" value="0" />
+ <parameter name="tightly_coupled_data_master_2_paddr_base" value="0" />
+ <parameter name="tightly_coupled_data_master_2_paddr_size" value="0" />
+ <parameter name="tightly_coupled_data_master_3_paddr_base" value="0" />
+ <parameter name="tightly_coupled_data_master_3_paddr_size" value="0" />
+ <parameter name="tightly_coupled_instruction_master_0_paddr_base" value="0" />
+ <parameter name="tightly_coupled_instruction_master_0_paddr_size" value="0" />
+ <parameter name="tightly_coupled_instruction_master_1_paddr_base" value="0" />
+ <parameter name="tightly_coupled_instruction_master_1_paddr_size" value="0" />
+ <parameter name="tightly_coupled_instruction_master_2_paddr_base" value="0" />
+ <parameter name="tightly_coupled_instruction_master_2_paddr_size" value="0" />
+ <parameter name="tightly_coupled_instruction_master_3_paddr_base" value="0" />
+ <parameter name="tightly_coupled_instruction_master_3_paddr_size" value="0" />
+ <parameter name="tmr_enabled" value="false" />
+ <parameter name="tracefilename" value="" />
+ <parameter name="userDefinedSettings" value="" />
+ </module>
+ <module
+ name="onchip_memory2_0"
+ kind="altera_avalon_onchip_memory2"
+ version="14.1"
+ enabled="1">
+ <parameter name="allowInSystemMemoryContentEditor" value="false" />
+ <parameter name="autoInitializationFileName">$${FILENAME}_onchip_memory2_0</parameter>
+ <parameter name="blockType" value="AUTO" />
+ <parameter name="copyInitFile" value="false" />
+ <parameter name="dataWidth" value="32" />
+ <parameter name="deviceFamily" value="Arria 10" />
+ <parameter name="deviceFeatures">ADDRESS_STALL 0 ADVANCED_INFO 0 ALLOWS_COMPILING_OTHER_FAMILY_IP 0 ANY_QFP 0 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 1 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 0 EMUL 0 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 ENABLE_PIN_PLANNER 0 ENGINEERING_SAMPLE 0 EPCS 0 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 0 FASTEST 0 FINAL_TIMING_MODEL 0 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ACTIVE_PARALLEL_FLASH_SUPPORT 0 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 1 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 1 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 1 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 0 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 0 HAS_BSDL_FILE_GENERATION 0 HAS_CDB_RE_NETWORK_PRESERVATION_SUPPORT 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 0 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 0 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 1 HAS_DDB_FDI_SUPPORT 1 HAS_DESIGN_ANALYZER_SUPPORT 0 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 0 HAS_DETAILED_LE_POWER_MODEL 0 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 0 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 1 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 0 HAS_FITTER_ECO_SUPPORT 0 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 0 HAS_FPGA_XCHANGE_SUPPORT 0 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 1 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 1 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HARDCOPYII_SUPPORT 0 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 0 HAS_HSPICE_WRITER_SUPPORT 0 HAS_HSSI_POWER_CALCULATOR 1 HAS_IBISO_WRITER_SUPPORT 0 HAS_ICD_DATA_IP 1 HAS_IDB_SUPPORT 1 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 1 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 0 HAS_IO_PLACEMENT_USING_GEOMETRY_RULE 0 HAS_IO_PLACEMENT_USING_PHYSIC_RULE 0 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 0 HAS_MIN_TIMING_ANALYSIS_SUPPORT 0 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 0 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 1 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 1 HAS_PASSIVE_PARALLEL_SUPPORT 0 HAS_PHYSICAL_DESIGN_PLANNER_SUPPORT 1 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 1 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 0 HAS_POWER_BINNING_LIMITS_DATA 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 1 HAS_PRE_FITTER_FPP_SUPPORT 1 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 1 HAS_PVA_SUPPORT 1 HAS_QUARTUS_HIERARCHICAL_DESIGN_SUPPORT 1 HAS_RAPID_RECOMPILE_SUPPORT 0 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 0 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_STRICT_PRESERVATION_SUPPORT 0 HAS_SYNTHESIS_ON_ATOMS 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 0 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 1 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 1 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 0 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 1 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 1 HAS_USE_FITTER_INFO_SUPPORT 0 HAS_VCCPD_POWER_RAIL 1 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO2_WRITER_SUPPORT 0 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 INTERNAL_POF_SUPPORT_ENABLED 0 INTERNAL_USE_ONLY 0 ISSUE_MILITARY_TEMPERATURE_WARNING 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_FOR_INTERNAL_TESTING_ONLY 0 IS_HARDCOPY_FAMILY 0 IS_HBGA_PACKAGE 0 IS_HIGH_CURRENT_PART 0 IS_LOW_POWER_PART 0 IS_SDM_ONLY_PACKAGE 0 IS_SMI_PART 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 1 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 0 MLAB_MEMORY 1 MRAM_MEMORY 0 NOT_LISTED 0 NOT_MIGRATABLE 0 NO_FITTER_DELAY_CACHE_GENERATED 0 NO_PIN_OUT 0 NO_POF 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 0 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 0 PROGRAMMER_SUPPORT 1 PVA_SUPPORTS_ONLY_SUBSET_OF_ATOMS 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 0 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 REQUIRE_QUARTUS_HIERARCHICAL_DESIGN 0 REQUIRE_SPECIAL_HANDLING_FOR_LOCAL_LABLINE 0 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 0 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 SHOW_HIDDEN_FAMILY_IN_PROGRAMMER 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_HIPI_RETIMING 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 0 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 SUPPORTS_VID 0 TMV_RUN_CUSTOMIZABLE_VIEWER 0 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 0 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 0 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_NETWORK_ROUTING_POWER_CALCULATOR 1 USES_PART_INFO_FOR_DISPLAYING_CORE_VOLTAGE_VALUE 1 USES_POWER_SIGNAL_ACTIVITIES 1 USES_PVAFAM2 1 USES_SECOND_GENERATION_POWER_ANALYZER 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 1 USES_XML_FORMAT_FOR_EMIF_PIN_MAP_FILE 1 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 0 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 1 USING_28NM_OR_OLDER_TIMING_METHODOLOGY 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 0</parameter>
+ <parameter name="dualPort" value="false" />
+ <parameter name="ecc_enabled" value="false" />
+ <parameter name="initMemContent" value="true" />
+ <parameter name="initializationFileName" value="onchip_mem.hex" />
+ <parameter name="instanceID" value="NONE" />
+ <parameter name="memorySize" value="32768" />
+ <parameter name="readDuringWriteMode" value="DONT_CARE" />
+ <parameter name="resetrequest_enabled" value="true" />
+ <parameter name="simAllowMRAMContentsFile" value="false" />
+ <parameter name="simMemInitOnlyFilename" value="0" />
+ <parameter name="singleClockOperation" value="false" />
+ <parameter name="slave1Latency" value="1" />
+ <parameter name="slave2Latency" value="1" />
+ <parameter name="useNonDefaultInitFile" value="false" />
+ <parameter name="useShallowMemBlocks" value="false" />
+ <parameter name="writable" value="true" />
+ </module>
+ <module name="pio_0" kind="altera_avalon_pio" version="14.1" enabled="1">
<parameter name="bitClearingEdgeCapReg" value="false" />
<parameter name="bitModifyingOutReg" value="false" />
<parameter name="captureEdge" value="false" />
- <parameter name="direction" value="Input" />
- <parameter name="edgeType" value="RISING" />
- <parameter name="generateIRQ" value="false" />
- <parameter name="irqType" value="LEVEL" />
- <parameter name="resetValue" value="0" />
- <parameter name="simDoTestBenchWiring" value="false" />
- <parameter name="simDrivenValue" value="0" />
- <parameter name="width" value="12" />
<parameter name="clockRate" value="50000000" />
- </module>
- <module
- kind="avs_i2c_master"
- version="1.0"
- enabled="1"
- name="avs_i2c_master_11">
- <parameter name="g_control_adr_w" value="1" />
- <parameter name="g_protocol_adr_w" value="10" />
- <parameter name="g_result_adr_w" value="10" />
- <parameter name="g_clk_cnt" value="399" />
- <parameter name="g_comma_w" value="0" />
- <parameter name="AUTO_SYSTEM_CLOCK_RATE" value="50000000" />
+ <parameter name="direction" value="Input" />
+ <parameter name="edgeType" value="RISING" />
+ <parameter name="generateIRQ" value="false" />
+ <parameter name="irqType" value="LEVEL" />
+ <parameter name="resetValue" value="0" />
+ <parameter name="simDoTestBenchWiring" value="false" />
+ <parameter name="simDrivenValue" value="0" />
+ <parameter name="width" value="12" />
</module>
<connection
kind="avalon"
- version="14.0"
- start="nios2_qsys_0.instruction_master"
- end="nios2_qsys_0.jtag_debug_module">
+ version="14.1"
+ start="nios2_qsys_0.data_master"
+ end="avs_i2c_master_0.control">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00010800" />
+ <parameter name="baseAddress" value="0x00017868" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="nios2_qsys_0.jtag_debug_module">
+ end="avs_i2c_master_1.control">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00010800" />
+ <parameter name="baseAddress" value="0x00017860" />
<parameter name="defaultConnection" value="false" />
</connection>
- <connection kind="clock" version="14.0" start="clk_0.clk" end="nios2_qsys_0.clk" />
- <connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="nios2_qsys_0.reset_n" />
- <connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="avs_i2c_master_0.system" />
- <connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="avs_i2c_master_0.system_reset" />
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_0.control">
+ end="avs_i2c_master_2.control">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017868" />
+ <parameter name="baseAddress" value="0x00017858" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_0.protocol">
+ end="avs_i2c_master_3.control">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017400" />
+ <parameter name="baseAddress" value="0x00017850" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_0.result">
+ end="avs_i2c_master_4.control">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017000" />
+ <parameter name="baseAddress" value="0x00017848" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
- kind="interrupt"
- version="14.0"
- start="nios2_qsys_0.d_irq"
- end="avs_i2c_master_0.interrupt">
- <parameter name="irqNumber" value="0" />
+ kind="avalon"
+ version="14.1"
+ start="nios2_qsys_0.data_master"
+ end="avs_i2c_master_5.control">
+ <parameter name="arbitrationPriority" value="1" />
+ <parameter name="baseAddress" value="0x00017840" />
+ <parameter name="defaultConnection" value="false" />
</connection>
- <connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="avs_i2c_master_1.system" />
- <connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="avs_i2c_master_1.system_reset" />
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_1.control">
+ end="avs_i2c_master_6.control">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017860" />
+ <parameter name="baseAddress" value="0x00017838" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_1.protocol">
+ end="avs_i2c_master_7.control">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00016c00" />
+ <parameter name="baseAddress" value="0x00017830" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_1.result">
+ end="avs_i2c_master_8.control">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00016800" />
+ <parameter name="baseAddress" value="0x00017828" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
- kind="interrupt"
- version="14.0"
- start="nios2_qsys_0.d_irq"
- end="avs_i2c_master_1.interrupt">
- <parameter name="irqNumber" value="1" />
+ kind="avalon"
+ version="14.1"
+ start="nios2_qsys_0.data_master"
+ end="avs_i2c_master_9.control">
+ <parameter name="arbitrationPriority" value="1" />
+ <parameter name="baseAddress" value="0x00017820" />
+ <parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
- start="nios2_qsys_0.instruction_master"
- end="onchip_memory2_0.s1">
+ version="14.1"
+ start="nios2_qsys_0.data_master"
+ end="avs_i2c_master_10.control">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x8000" />
+ <parameter name="baseAddress" value="0x00017818" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="onchip_memory2_0.s1">
+ end="avs_i2c_master_11.control">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x8000" />
+ <parameter name="baseAddress" value="0x00017810" />
<parameter name="defaultConnection" value="false" />
</connection>
- <connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="onchip_memory2_0.clk1" />
- <connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="onchip_memory2_0.reset1" />
- <connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="avs_i2c_master_2.system" />
- <connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="avs_i2c_master_2.system_reset" />
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_2.control">
+ end="eth_tse_0.control_port">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017858" />
+ <parameter name="baseAddress" value="0x00011c00" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_2.protocol">
+ end="eth_tse_1.control_port">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00016400" />
+ <parameter name="baseAddress" value="0x00011800" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_2.result">
+ end="nios2_qsys_0.debug_mem_slave">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00016000" />
+ <parameter name="baseAddress" value="0x00010800" />
<parameter name="defaultConnection" value="false" />
</connection>
- <connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="avs_i2c_master_3.system" />
- <connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="avs_i2c_master_3.system_reset" />
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_3.control">
+ end="avs_i2c_master_0.protocol">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017850" />
+ <parameter name="baseAddress" value="0x00017400" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_3.protocol">
+ end="avs_i2c_master_1.protocol">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00015c00" />
+ <parameter name="baseAddress" value="0x00016c00" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_3.result">
+ end="avs_i2c_master_2.protocol">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00015800" />
+ <parameter name="baseAddress" value="0x00016400" />
<parameter name="defaultConnection" value="false" />
</connection>
- <connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="avs_i2c_master_4.system" />
- <connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="avs_i2c_master_4.system_reset" />
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_4.control">
+ end="avs_i2c_master_3.protocol">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017848" />
+ <parameter name="baseAddress" value="0x00015c00" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
end="avs_i2c_master_4.protocol">
<parameter name="arbitrationPriority" value="1" />
@@ -1424,118 +1399,133 @@
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_4.result">
+ end="avs_i2c_master_5.protocol">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00015000" />
+ <parameter name="baseAddress" value="0x00014c00" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="avs_i2c_master_5.system" />
- <connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="avs_i2c_master_5.system_reset" />
+ kind="avalon"
+ version="14.1"
+ start="nios2_qsys_0.data_master"
+ end="avs_i2c_master_6.protocol">
+ <parameter name="arbitrationPriority" value="1" />
+ <parameter name="baseAddress" value="0x00014400" />
+ <parameter name="defaultConnection" value="false" />
+ </connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_5.control">
+ end="avs_i2c_master_7.protocol">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017840" />
+ <parameter name="baseAddress" value="0x00013c00" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_5.protocol">
+ end="avs_i2c_master_8.protocol">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00014c00" />
+ <parameter name="baseAddress" value="0x00013400" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_5.result">
+ end="avs_i2c_master_9.protocol">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00014800" />
+ <parameter name="baseAddress" value="0x00012c00" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="avs_i2c_master_6.system" />
+ kind="avalon"
+ version="14.1"
+ start="nios2_qsys_0.data_master"
+ end="avs_i2c_master_10.protocol">
+ <parameter name="arbitrationPriority" value="1" />
+ <parameter name="baseAddress" value="0x00012400" />
+ <parameter name="defaultConnection" value="false" />
+ </connection>
<connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="avs_i2c_master_6.system_reset" />
+ kind="avalon"
+ version="14.1"
+ start="nios2_qsys_0.data_master"
+ end="avs_i2c_master_11.protocol">
+ <parameter name="arbitrationPriority" value="1" />
+ <parameter name="baseAddress" value="0x00011400" />
+ <parameter name="defaultConnection" value="false" />
+ </connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_6.control">
+ end="avs_i2c_master_0.result">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017838" />
+ <parameter name="baseAddress" value="0x00017000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_6.protocol">
+ end="avs_i2c_master_1.result">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00014400" />
+ <parameter name="baseAddress" value="0x00016800" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_6.result">
+ end="avs_i2c_master_2.result">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00014000" />
+ <parameter name="baseAddress" value="0x00016000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="avs_i2c_master_7.system" />
+ kind="avalon"
+ version="14.1"
+ start="nios2_qsys_0.data_master"
+ end="avs_i2c_master_3.result">
+ <parameter name="arbitrationPriority" value="1" />
+ <parameter name="baseAddress" value="0x00015800" />
+ <parameter name="defaultConnection" value="false" />
+ </connection>
<connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="avs_i2c_master_7.system_reset" />
+ kind="avalon"
+ version="14.1"
+ start="nios2_qsys_0.data_master"
+ end="avs_i2c_master_4.result">
+ <parameter name="arbitrationPriority" value="1" />
+ <parameter name="baseAddress" value="0x00015000" />
+ <parameter name="defaultConnection" value="false" />
+ </connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_7.control">
+ end="avs_i2c_master_5.result">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017830" />
+ <parameter name="baseAddress" value="0x00014800" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_7.protocol">
+ end="avs_i2c_master_6.result">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00013c00" />
+ <parameter name="baseAddress" value="0x00014000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
end="avs_i2c_master_7.result">
<parameter name="arbitrationPriority" value="1" />
@@ -1543,296 +1533,343 @@
<parameter name="defaultConnection" value="false" />
</connection>
<connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="avs_i2c_master_8.system" />
+ kind="avalon"
+ version="14.1"
+ start="nios2_qsys_0.data_master"
+ end="avs_i2c_master_8.result">
+ <parameter name="arbitrationPriority" value="1" />
+ <parameter name="baseAddress" value="0x00013000" />
+ <parameter name="defaultConnection" value="false" />
+ </connection>
<connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="avs_i2c_master_8.system_reset" />
+ kind="avalon"
+ version="14.1"
+ start="nios2_qsys_0.data_master"
+ end="avs_i2c_master_9.result">
+ <parameter name="arbitrationPriority" value="1" />
+ <parameter name="baseAddress" value="0x00012800" />
+ <parameter name="defaultConnection" value="false" />
+ </connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_8.control">
+ end="avs_i2c_master_10.result">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017828" />
+ <parameter name="baseAddress" value="0x00012000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_8.protocol">
+ end="avs_i2c_master_11.result">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00013400" />
+ <parameter name="baseAddress" value="0x00011000" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_8.result">
+ end="onchip_memory2_0.s1">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00013000" />
+ <parameter name="baseAddress" value="0x8000" />
<parameter name="defaultConnection" value="false" />
</connection>
- <connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="avs_i2c_master_9.system" />
- <connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="avs_i2c_master_9.system_reset" />
<connection
kind="avalon"
- version="14.0"
+ version="14.1"
start="nios2_qsys_0.data_master"
- end="avs_i2c_master_9.control">
+ end="pio_0.s1">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017820" />
+ <parameter name="baseAddress" value="0x00017800" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
- start="nios2_qsys_0.data_master"
- end="avs_i2c_master_9.protocol">
+ version="14.1"
+ start="nios2_qsys_0.instruction_master"
+ end="nios2_qsys_0.debug_mem_slave">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00012c00" />
+ <parameter name="baseAddress" value="0x00010800" />
<parameter name="defaultConnection" value="false" />
</connection>
<connection
kind="avalon"
- version="14.0"
- start="nios2_qsys_0.data_master"
- end="avs_i2c_master_9.result">
+ version="14.1"
+ start="nios2_qsys_0.instruction_master"
+ end="onchip_memory2_0.s1">
<parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00012800" />
+ <parameter name="baseAddress" value="0x8000" />
<parameter name="defaultConnection" value="false" />
</connection>
+ <connection
+ kind="avalon_streaming"
+ version="14.1"
+ start="eth_tse_0.receive"
+ end="eth_tse_1.transmit" />
+ <connection
+ kind="avalon_streaming"
+ version="14.1"
+ start="eth_tse_1.receive"
+ end="eth_tse_0.transmit" />
+ <connection kind="clock" version="14.1" start="clk_0.clk" end="nios2_qsys_0.clk" />
+ <connection kind="clock" version="14.1" start="clk_0.clk" end="pio_0.clk" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="onchip_memory2_0.clk1" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="eth_tse_0.control_port_clock_connection" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="eth_tse_1.control_port_clock_connection" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="eth_tse_0.receive_clock_connection" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="eth_tse_1.receive_clock_connection" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="avs_i2c_master_0.system" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="avs_i2c_master_1.system" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="avs_i2c_master_2.system" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="avs_i2c_master_3.system" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="avs_i2c_master_4.system" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="avs_i2c_master_5.system" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="avs_i2c_master_6.system" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="avs_i2c_master_7.system" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="avs_i2c_master_8.system" />
+ <connection
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="avs_i2c_master_9.system" />
<connection
kind="clock"
- version="14.0"
+ version="14.1"
start="clk_0.clk"
end="avs_i2c_master_10.system" />
<connection
- kind="reset"
- version="14.0"
- start="clk_0.clk_reset"
- end="avs_i2c_master_10.system_reset" />
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="avs_i2c_master_11.system" />
<connection
- kind="avalon"
- version="14.0"
- start="nios2_qsys_0.data_master"
- end="avs_i2c_master_10.control">
- <parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017818" />
- <parameter name="defaultConnection" value="false" />
- </connection>
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="eth_tse_0.transmit_clock_connection" />
<connection
- kind="avalon"
- version="14.0"
- start="nios2_qsys_0.data_master"
- end="avs_i2c_master_10.protocol">
- <parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00012400" />
- <parameter name="defaultConnection" value="false" />
+ kind="clock"
+ version="14.1"
+ start="clk_0.clk"
+ end="eth_tse_1.transmit_clock_connection" />
+ <connection
+ kind="interrupt"
+ version="14.1"
+ start="nios2_qsys_0.irq"
+ end="avs_i2c_master_0.interrupt">
+ <parameter name="irqNumber" value="0" />
</connection>
<connection
- kind="avalon"
- version="14.0"
- start="nios2_qsys_0.data_master"
- end="avs_i2c_master_10.result">
- <parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00012000" />
- <parameter name="defaultConnection" value="false" />
+ kind="interrupt"
+ version="14.1"
+ start="nios2_qsys_0.irq"
+ end="avs_i2c_master_1.interrupt">
+ <parameter name="irqNumber" value="1" />
</connection>
<connection
kind="interrupt"
- version="14.0"
- start="nios2_qsys_0.d_irq"
+ version="14.1"
+ start="nios2_qsys_0.irq"
end="avs_i2c_master_2.interrupt">
<parameter name="irqNumber" value="2" />
</connection>
<connection
kind="interrupt"
- version="14.0"
- start="nios2_qsys_0.d_irq"
+ version="14.1"
+ start="nios2_qsys_0.irq"
end="avs_i2c_master_3.interrupt">
<parameter name="irqNumber" value="3" />
</connection>
<connection
kind="interrupt"
- version="14.0"
- start="nios2_qsys_0.d_irq"
+ version="14.1"
+ start="nios2_qsys_0.irq"
end="avs_i2c_master_4.interrupt">
<parameter name="irqNumber" value="4" />
</connection>
<connection
kind="interrupt"
- version="14.0"
- start="nios2_qsys_0.d_irq"
+ version="14.1"
+ start="nios2_qsys_0.irq"
end="avs_i2c_master_5.interrupt">
<parameter name="irqNumber" value="5" />
</connection>
<connection
kind="interrupt"
- version="14.0"
- start="nios2_qsys_0.d_irq"
+ version="14.1"
+ start="nios2_qsys_0.irq"
end="avs_i2c_master_6.interrupt">
<parameter name="irqNumber" value="6" />
</connection>
<connection
kind="interrupt"
- version="14.0"
- start="nios2_qsys_0.d_irq"
+ version="14.1"
+ start="nios2_qsys_0.irq"
end="avs_i2c_master_7.interrupt">
<parameter name="irqNumber" value="7" />
</connection>
<connection
kind="interrupt"
- version="14.0"
- start="nios2_qsys_0.d_irq"
+ version="14.1"
+ start="nios2_qsys_0.irq"
end="avs_i2c_master_8.interrupt">
<parameter name="irqNumber" value="8" />
</connection>
<connection
kind="interrupt"
- version="14.0"
- start="nios2_qsys_0.d_irq"
+ version="14.1"
+ start="nios2_qsys_0.irq"
end="avs_i2c_master_9.interrupt">
<parameter name="irqNumber" value="9" />
</connection>
<connection
kind="interrupt"
- version="14.0"
- start="nios2_qsys_0.d_irq"
+ version="14.1"
+ start="nios2_qsys_0.irq"
end="avs_i2c_master_10.interrupt">
<parameter name="irqNumber" value="10" />
</connection>
<connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="eth_tse_0.control_port_clock_connection" />
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="nios2_qsys_0.reset" />
+ <connection kind="reset" version="14.1" start="clk_0.clk_reset" end="pio_0.reset" />
+ <connection
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="onchip_memory2_0.reset1" />
<connection
kind="reset"
- version="14.0"
+ version="14.1"
start="clk_0.clk_reset"
end="eth_tse_0.reset_connection" />
<connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="eth_tse_0.receive_clock_connection" />
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="eth_tse_1.reset_connection" />
<connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="eth_tse_0.transmit_clock_connection" />
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="avs_i2c_master_0.system_reset" />
<connection
- kind="avalon"
- version="14.0"
- start="nios2_qsys_0.data_master"
- end="eth_tse_0.control_port">
- <parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00011c00" />
- <parameter name="defaultConnection" value="false" />
- </connection>
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="avs_i2c_master_1.system_reset" />
<connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="eth_tse_1.control_port_clock_connection" />
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="avs_i2c_master_2.system_reset" />
<connection
kind="reset"
- version="14.0"
+ version="14.1"
start="clk_0.clk_reset"
- end="eth_tse_1.reset_connection" />
+ end="avs_i2c_master_3.system_reset" />
<connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="eth_tse_1.receive_clock_connection" />
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="avs_i2c_master_4.system_reset" />
<connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="eth_tse_1.transmit_clock_connection" />
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="avs_i2c_master_5.system_reset" />
<connection
- kind="avalon_streaming"
- version="14.0"
- start="eth_tse_0.receive"
- end="eth_tse_1.transmit" />
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="avs_i2c_master_6.system_reset" />
<connection
- kind="avalon_streaming"
- version="14.0"
- start="eth_tse_1.receive"
- end="eth_tse_0.transmit" />
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="avs_i2c_master_7.system_reset" />
<connection
- kind="avalon"
- version="14.0"
- start="nios2_qsys_0.data_master"
- end="eth_tse_1.control_port">
- <parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00011800" />
- <parameter name="defaultConnection" value="false" />
- </connection>
- <connection kind="clock" version="14.0" start="clk_0.clk" end="pio_0.clk" />
- <connection kind="reset" version="14.0" start="clk_0.clk_reset" end="pio_0.reset" />
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="avs_i2c_master_8.system_reset" />
<connection
- kind="avalon"
- version="14.0"
- start="nios2_qsys_0.data_master"
- end="pio_0.s1">
- <parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017800" />
- <parameter name="defaultConnection" value="false" />
- </connection>
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="avs_i2c_master_9.system_reset" />
<connection
- kind="clock"
- version="14.0"
- start="clk_0.clk"
- end="avs_i2c_master_11.system" />
+ kind="reset"
+ version="14.1"
+ start="clk_0.clk_reset"
+ end="avs_i2c_master_10.system_reset" />
<connection
kind="reset"
- version="14.0"
+ version="14.1"
start="clk_0.clk_reset"
end="avs_i2c_master_11.system_reset" />
- <connection
- kind="avalon"
- version="14.0"
- start="nios2_qsys_0.data_master"
- end="avs_i2c_master_11.control">
- <parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00017810" />
- <parameter name="defaultConnection" value="false" />
- </connection>
- <connection
- kind="avalon"
- version="14.0"
- start="nios2_qsys_0.data_master"
- end="avs_i2c_master_11.protocol">
- <parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00011400" />
- <parameter name="defaultConnection" value="false" />
- </connection>
- <connection
- kind="avalon"
- version="14.0"
- start="nios2_qsys_0.data_master"
- end="avs_i2c_master_11.result">
- <parameter name="arbitrationPriority" value="1" />
- <parameter name="baseAddress" value="0x00011000" />
- <parameter name="defaultConnection" value="false" />
- </connection>
<interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
- <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
<interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="false" />
+ <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>